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r588:86f47bdf2a6e
force ADC output to constant or ramp.
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0
r587:f2c158b74433
global reset delayed in function of ram_nbusy signal (waiting 16 falling edge).
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r586:e44412efb127
temp JC
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r585:fd7ec3818c5e
temp Alexis
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r584:e4c118ae5ff2
update version
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r583:3d475eacd91a
LFR-EQM 2.1.71
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0
r582:3fed66e2161d
Simulation without RAM_CEL
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r581:006d69890bba
custom dma : update lock generation into LPP_DMA's FSM state (Just for test)
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0
r580:f4e8c3120b82
custom dma : update transition's condition between FSM state "ARBITER" and "CTRL"
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r579:da926ab85276
Étiquette (LFR-EQM) 2-1-70 ajoutée à la révision bcb5a865d2bb
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JC
0
r578:3cb99769151e
Étiquette (MINI-LFR) 0-1-70 ajoutée à la révision bcb5a865d2bb
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JC
0
r577:bcb5a865d2bb
LFR-EQM et MINI-LFR x.1.70
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r576:4347a39d5ac8
custom dma ready to test on board
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r575:125577122712
add custom AHB DMA
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r574:2fa92ec9cb4f
change the generic name mbpbusy to mbpedac in implementation of srctrle_0ws
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JC
0
r573:6b86feeb81a3
test avec 2 LFR
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r572:049317d554b2
modif 1 : echange des ahbslave 0 (srctrle-0ws) et slave 2 (DSU) => empecher le blocage de l'arbitre AHB pendant un SCRUB
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JC
0
r571:87dba9f24867
debug EQM
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JC
0
r570:0b1aedcd4196
debug EQM => memory controller and DMA lock W.I.P.
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JC
0
r569:64f72d322da8
EQM debug
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JC
0
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