HG_REPOSITORIES/LPP/INSTRUMENTATION/USERS/PELLION/VHD_Lib Commit - r100:fc97c34d69e3

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boards/LeonLPP-A3PE3kL/Makefile.inc created 644 +18 0

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		1	TECHNOLOGY=PROASIC3
		2	PACKAGE=\"\"
		3	SPEED=Std
		4	SYNFREQ=50
		5
		6	PART=A3PE3000L
		7	DESIGNER_PACKAGE=FBGA
		8	DESIGNER_PINS=324
		9	DESIGNER_VOLTAGE=COM
		10	DESIGNER_TEMP=COM
		11
		12	MANUFACTURER=Actel
		13	MGCPART=$(PART)
		14	MGCTECHNOLOGY=PROASIC3
		15	MGCPACKAGE= {$(DESIGNER_PINS) $(DESIGNER_PACKAGE)}
		16	LIBERO_DIE=IT14X14M4LDP
		17	LIBERO_PACKAGE=fg$(DESIGNER_PINS)
		18

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boards/LeonLPP-A3PE3kL/Projet-Blanc-A3PE3kL.pdc created 644 +570 0

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	1	# Actel Physical design constraints file
	2	# Generated file
	3
	4	# Version: 9.1 SP3 9.1.3.4
	5	# Family: ProASIC3L , Die: A3PE3000L , Package: 324 FBGA
	6	# Date generated: Tue Oct 18 08:21:45 2011
	7
	8
	9	#
	10	# IO banks setting
	11	#
	12
	13
	14	#
	15	# I/O constraints
	16	#
	17
	18	set_io CE2 \
	19	-pinname K14 \
	20	-fixed yes \
	21	-DIRECTION Inout
	22
	23
	24	set_io MODE \
	25	-pinname C15 \
	26	-fixed yes \
	27	-DIRECTION Inout
	28
	29
	30	set_io SSRAM_CLK \
	31	-pinname D15 \
	32	-fixed yes \
	33	-DIRECTION Inout
	34
	35
	36	set_io ZZ \
	37	-pinname E18 \
	38	-fixed yes \
	39	-DIRECTION Inout
	40
	41
	42	set_io {address[0]} \
	43	-pinname D18 \
	44	-fixed yes \
	45	-DIRECTION Inout
	46
	47
	48	set_io {address[1]} \
	49	-pinname B17 \
	50	-fixed yes \
	51	-DIRECTION Inout
	52
	53
	54	set_io {address[2]} \
	55	-pinname A17 \
	56	-fixed yes \
	57	-DIRECTION Inout
	58
	59
	60	set_io {address[3]} \
	61	-pinname B16 \
	62	-fixed yes \
	63	-DIRECTION Inout
	64
	65
	66	set_io {address[4]} \
	67	-pinname A16 \
	68	-fixed yes \
	69	-DIRECTION Inout
	70
	71
	72	set_io {address[5]} \
	73	-pinname A15 \
	74	-fixed yes \
	75	-DIRECTION Inout
	76
	77
	78	set_io {address[6]} \
	79	-pinname A14 \
	80	-fixed yes \
	81	-DIRECTION Inout
	82
	83
	84	set_io {address[7]} \
	85	-pinname B13 \
	86	-fixed yes \
	87	-DIRECTION Inout
	88
	89
	90	set_io {address[8]} \
	91	-pinname B9 \
	92	-fixed yes \
	93	-DIRECTION Inout
	94
	95
	96	set_io {address[9]} \
	97	-pinname A8 \
	98	-fixed yes \
	99	-DIRECTION Inout
	100
	101
	102	set_io {address[10]} \
	103	-pinname B7 \
	104	-fixed yes \
	105	-DIRECTION Inout
	106
	107
	108	set_io {address[11]} \
	109	-pinname A6 \
	110	-fixed yes \
	111	-DIRECTION Inout
	112
	113
	114	set_io {address[12]} \
	115	-pinname B6 \
	116	-fixed yes \
	117	-DIRECTION Inout
	118
	119
	120	set_io {address[13]} \
	121	-pinname A5 \
	122	-fixed yes \
	123	-DIRECTION Inout
	124
	125
	126	set_io {address[14]} \
	127	-pinname A4 \
	128	-fixed yes \
	129	-DIRECTION Inout
	130
	131
	132	set_io {address[15]} \
	133	-pinname B3 \
	134	-fixed yes \
	135	-DIRECTION Inout
	136
	137
	138	set_io {address[16]} \
	139	-pinname B18 \
	140	-fixed yes \
	141	-DIRECTION Inout
	142
	143
	144	set_io {address[17]} \
	145	-pinname A13 \
	146	-fixed yes \
	147	-DIRECTION Inout
	148
	149
	150	set_io {address[18]} \
	151	-pinname B12 \
	152	-fixed yes \
	153	-DIRECTION Inout
	154
	155
	156	set_io ahbrxd \
	157	-pinname V4 \
	158	-fixed yes \
	159	-DIRECTION Inout
	160
	161
	162	set_io ahbtxd \
	163	-pinname V3 \
	164	-fixed yes \
	165	-DIRECTION Inout
	166
	167
	168	set_io clk50MHz \
	169	-pinname D13 \
	170	-fixed yes \
	171	-DIRECTION Inout
	172
	173
	174	set_io {data[0]} \
	175	-pinname F10 \
	176	-fixed yes \
	177	-DIRECTION Inout
	178
	179
	180	set_io {data[1]} \
	181	-pinname F9 \
	182	-fixed yes \
	183	-DIRECTION Inout
	184
	185
	186	set_io {data[2]} \
	187	-pinname F8 \
	188	-fixed yes \
	189	-DIRECTION Inout
	190
	191
	192	set_io {data[3]} \
	193	-pinname F7 \
	194	-fixed yes \
	195	-DIRECTION Inout
	196
	197
	198	set_io {data[4]} \
	199	-pinname E6 \
	200	-fixed yes \
	201	-DIRECTION Inout
	202
	203
	204	set_io {data[5]} \
	205	-pinname D5 \
	206	-fixed yes \
	207	-DIRECTION Inout
	208
	209
	210	set_io {data[6]} \
	211	-pinname C4 \
	212	-fixed yes \
	213	-DIRECTION Inout
	214
	215
	216	set_io {data[7]} \
	217	-pinname D3 \
	218	-fixed yes \
	219	-DIRECTION Inout
	220
	221
	222	set_io {data[8]} \
	223	-pinname F18 \
	224	-fixed yes \
	225	-DIRECTION Inout
	226
	227
	228	set_io {data[9]} \
	229	-pinname H18 \
	230	-fixed yes \
	231	-DIRECTION Inout
	232
	233
	234	set_io {data[10]} \
	235	-pinname J18 \
	236	-fixed yes \
	237	-DIRECTION Inout
	238
	239
	240	set_io {data[11]} \
	241	-pinname K18 \
	242	-fixed yes \
	243	-DIRECTION Inout
	244
	245
	246	set_io {data[12]} \
	247	-pinname L18 \
	248	-fixed yes \
	249	-DIRECTION Inout
	250
	251
	252	set_io {data[13]} \
	253	-pinname N18 \
	254	-fixed yes \
	255	-DIRECTION Inout
	256
	257
	258	set_io {data[14]} \
	259	-pinname P18 \
	260	-fixed yes \
	261	-DIRECTION Inout
	262
	263
	264	set_io {data[15]} \
	265	-pinname R18 \
	266	-fixed yes \
	267	-DIRECTION Inout
	268
	269
	270	set_io {data[16]} \
	271	-pinname M16 \
	272	-fixed yes \
	273	-DIRECTION Inout
	274
	275
	276	set_io {data[17]} \
	277	-pinname N17 \
	278	-fixed yes \
	279	-DIRECTION Inout
	280
	281
	282	set_io {data[18]} \
	283	-pinname P16 \
	284	-fixed yes \
	285	-DIRECTION Inout
	286
	287
	288	set_io {data[19]} \
	289	-pinname R13 \
	290	-fixed yes \
	291	-DIRECTION Inout
	292
	293
	294	set_io {data[20]} \
	295	-pinname T13 \
	296	-fixed yes \
	297	-DIRECTION Inout
	298
	299
	300	set_io {data[21]} \
	301	-pinname U13 \
	302	-fixed yes \
	303	-DIRECTION Inout
	304
	305
	306	set_io {data[22]} \
	307	-pinname U12 \
	308	-fixed yes \
	309	-DIRECTION Inout
	310
	311
	312	set_io {data[23]} \
	313	-pinname U10 \
	314	-fixed yes \
	315	-DIRECTION Inout
	316
	317
	318	set_io {data[24]} \
	319	-pinname C16 \
	320	-fixed yes \
	321	-DIRECTION Inout
	322
	323
	324	set_io {data[25]} \
	325	-pinname D16 \
	326	-fixed yes \
	327	-DIRECTION Inout
	328
	329
	330	set_io {data[26]} \
	331	-pinname E15 \
	332	-fixed yes \
	333	-DIRECTION Inout
	334
	335
	336	set_io {data[27]} \
	337	-pinname F16 \
	338	-fixed yes \
	339	-DIRECTION Inout
	340
	341
	342	set_io {data[28]} \
	343	-pinname G16 \
	344	-fixed yes \
	345	-DIRECTION Inout
	346
	347
	348	set_io {data[29]} \
	349	-pinname H16 \
	350	-fixed yes \
	351	-DIRECTION Inout
	352
	353
	354	set_io {data[30]} \
	355	-pinname J15 \
	356	-fixed yes \
	357	-DIRECTION Inout
	358
	359
	360	set_io {data[31]} \
	361	-pinname K15 \
	362	-fixed yes \
	363	-DIRECTION Inout
	364
	365
	366	set_io dsuact \
	367	-pinname N7 \
	368	-fixed yes \
	369	-DIRECTION Inout
	370
	371
	372	set_io dsubre \
	373	-pinname N6 \
	374	-fixed yes \
	375	-DIRECTION Inout
	376
	377
	378	set_io errorn \
	379	-pinname U6 \
	380	-fixed yes \
	381	-DIRECTION Inout
	382
	383
	384	set_io {led[0]} \
	385	-pinname T11 \
	386	-fixed no \
	387	-DIRECTION Inout
	388
	389
	390	set_io {led[1]} \
	391	-pinname R11 \
	392	-fixed no \
	393	-DIRECTION Inout
	394
	395
	396	set_io nADSC \
	397	-pinname D10 \
	398	-fixed yes \
	399	-DIRECTION Inout
	400
	401
	402	set_io nADSP \
	403	-pinname C10 \
	404	-fixed yes \
	405	-DIRECTION Inout
	406
	407
	408	set_io nADV \
	409	-pinname B10 \
	410	-fixed yes \
	411	-DIRECTION Inout
	412
	413
	414	set_io nBWE \
	415	-pinname F11 \
	416	-fixed yes \
	417	-DIRECTION Inout
	418
	419
	420	set_io nBWa \
	421	-pinname F15 \
	422	-fixed yes \
	423	-DIRECTION Inout
	424
	425
	426	set_io nBWb \
	427	-pinname G15 \
	428	-fixed yes \
	429	-DIRECTION Inout
	430
	431
	432	set_io nBWc \
	433	-pinname H15 \
	434	-fixed yes \
	435	-DIRECTION Inout
	436
	437
	438	set_io nBWd \
	439	-pinname J14 \
	440	-fixed yes \
	441	-DIRECTION Inout
	442
	443
	444	set_io nCE1 \
	445	-pinname L15 \
	446	-fixed yes \
	447	-DIRECTION Inout
	448
	449
	450	set_io nCE3 \
	451	-pinname E13 \
	452	-fixed yes \
	453	-DIRECTION Inout
	454
	455
	456	set_io nGW \
	457	-pinname C11 \
	458	-fixed yes \
	459	-DIRECTION Inout
	460
	461
	462	set_io nOE \
	463	-pinname E10 \
	464	-fixed yes \
	465	-DIRECTION Inout
	466
	467
	468	set_io reset \
	469	-pinname P13 \
	470	-fixed yes \
	471	-DIRECTION Inout
	472
	473
	474
	475	set_io {gpio[0]} -pinname J7 -fixed yes
	476	set_io {gpio[1]} -pinname C2 -fixed yes
	477	set_io {gpio[2]} -pinname C3 -fixed yes
	478	set_io {gpio[3]} -pinname D4 -fixed yes
	479	set_io {gpio[4]} -pinname E4 -fixed yes
	480	set_io {gpio[5]} -pinname F2 -fixed yes
	481	set_io {gpio[6]} -pinname G3 -fixed yes
	482
	483
	484	#
	485	# Non IO constraints
	486	#
	487
	488
	489	#
	490	# Old IO constraints, commented out for reference
	491	#
	492
	493	# set_io clk50MHz -pinname D13 -fixed yes
	494	# set_io reset -pinname P13 -fixed yes
	495	# set_io errorn -pinname U6 -fixed yes
	496	# set_io dsubre -pinname N6 -fixed yes
	497	# set_io dsuact -pinname N7 -fixed yes
	498	# set_io {led[0]} -pinname T11 -fixed yes
	499	# set_io {led[1]} -pinname R11 -fixed yes
	500	# set_io ahbrxd -pinname V4 -fixed yes
	501	# set_io ahbtxd -pinname V3 -fixed yes
	502	# set_io urxd1 -pinname V9 -fixed yes
	503	# set_io utxd1 -pinname V8 -fixed yes
	504	# set_io {data[0]} -pinname F10 -fixed yes
	505	# set_io {data[1]} -pinname F9 -fixed yes
	506	# set_io {data[2]} -pinname F8 -fixed yes
	507	# set_io {data[3]} -pinname F7 -fixed yes
	508	# set_io {data[4]} -pinname E6 -fixed yes
	509	# set_io {data[5]} -pinname D5 -fixed yes
	510	# set_io {data[6]} -pinname C4 -fixed yes
	511	# set_io {data[7]} -pinname D3 -fixed yes
	512	# set_io {data[8]} -pinname F18 -fixed yes
	513	# set_io {data[9]} -pinname H18 -fixed yes
	514	# set_io {data[10]} -pinname J18 -fixed yes
	515	# set_io {data[11]} -pinname K18 -fixed yes
	516	# set_io {data[12]} -pinname L18 -fixed yes
	517	# set_io {data[13]} -pinname N18 -fixed yes
	518	# set_io {data[14]} -pinname P18 -fixed yes
	519	# set_io {data[15]} -pinname R18 -fixed yes
	520	# set_io {data[16]} -pinname M16 -fixed yes
	521	# set_io {data[17]} -pinname N17 -fixed yes
	522	# set_io {data[18]} -pinname P16 -fixed yes
	523	# set_io {data[19]} -pinname R13 -fixed yes
	524	# set_io {data[20]} -pinname T13 -fixed yes
	525	# set_io {data[21]} -pinname U13 -fixed yes
	526	# set_io {data[22]} -pinname U12 -fixed yes
	527	# set_io {data[23]} -pinname U10 -fixed yes
	528	# set_io {data[24]} -pinname C16 -fixed yes
	529	# set_io {data[25]} -pinname D16 -fixed yes
	530	# set_io {data[26]} -pinname E15 -fixed yes
	531	# set_io {data[27]} -pinname F16 -fixed yes
	532	# set_io {data[28]} -pinname G16 -fixed yes
	533	# set_io {data[29]} -pinname H16 -fixed yes
	534	# set_io {data[30]} -pinname J15 -fixed yes
	535	# set_io {data[31]} -pinname K15 -fixed yes
	536	# set_io {address[0]} -pinname D18 -fixed yes
	537	# set_io {address[1]} -pinname B17 -fixed yes
	538	# set_io {address[2]} -pinname A17 -fixed yes
	539	# set_io {address[3]} -pinname B16 -fixed yes
	540	# set_io {address[4]} -pinname A16 -fixed yes
	541	# set_io {address[5]} -pinname A15 -fixed yes
	542	# set_io {address[6]} -pinname A14 -fixed yes
	543	# set_io {address[7]} -pinname B13 -fixed yes
	544	# set_io {address[8]} -pinname B9 -fixed yes
	545	# set_io {address[9]} -pinname A8 -fixed yes
	546	# set_io {address[10]} -pinname B7 -fixed yes
	547	# set_io {address[11]} -pinname A6 -fixed yes
	548	# set_io {address[12]} -pinname B6 -fixed yes
	549	# set_io {address[13]} -pinname A5 -fixed yes
	550	# set_io {address[14]} -pinname A4 -fixed yes
	551	# set_io {address[15]} -pinname B3 -fixed yes
	552	# set_io {address[16]} -pinname B18 -fixed yes
	553	# set_io {address[17]} -pinname A13 -fixed yes
	554	# set_io {address[18]} -pinname B12 -fixed yes
	555	# set_io nBWa -pinname F15 -fixed yes
	556	# set_io nBWb -pinname G15 -fixed yes
	557	# set_io nBWc -pinname H15 -fixed yes
	558	# set_io nBWd -pinname J14 -fixed yes
	559	# set_io nBWE -pinname F11 -fixed yes
	560	# set_io nADSC -pinname D10 -fixed yes
	561	# set_io nADSP -pinname C10 -fixed yes
	562	# set_io nADV -pinname B10 -fixed yes
	563	# set_io nGW -pinname C11 -fixed yes
	564	# set_io nCE1 -pinname L15 -fixed yes
	565	# set_io CE2 -pinname K14 -fixed yes
	566	# set_io nCE3 -pinname E13 -fixed yes
	567	# set_io nOE -pinname E10 -fixed yes
	568	# set_io MODE -pinname C15 -fixed yes
	569	# set_io SSRAM_CLK -pinname D15 -fixed yes
	570	# set_io ZZ -pinname E18 -fixed yes

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boards/LeonLPP-A3PE3kL/default.sdc created 644 +59 0

			@@ -0,0 +1,59
		1	# Synplicity, Inc. constraint file
		2	# /home/jiri/ibm/vhdl/grlib/boards/actel-coremp7-1000/default.sdc
		3	# Written on Wed Aug 1 19:29:24 2007
		4	# by Synplify Pro, Synplify Pro 8.8.0.4 Scope Editor
		5
		6	#
		7	# Collections
		8	#
		9
		10	#
		11	# Clocks
		12	#
		13	define_clock {clk} -name {clk} -freq 60 -clockgroup default_clkgroup -route 5
		14
		15	#
		16	# Clock to Clock
		17	#
		18
		19	#
		20	# Inputs/Outputs
		21	#
		22	define_output_delay -disable -default 5.00 -improve 0.00 -route 0.00 -ref {clk:r}
		23	define_input_delay -disable -default 5.00 -improve 0.00 -route 0.00 -ref {clk:r}
		24
		25
		26	#
		27	# Registers
		28	#
		29
		30	#
		31	# Multicycle Path
		32	#
		33
		34	#
		35	# False Path
		36	#
		37
		38	#
		39	# Path Delay
		40	#
		41
		42	#
		43	# Attributes
		44	#
		45	define_global_attribute syn_useioff {1}
		46	define_global_attribute -disable syn_netlist_hierarchy {0}
		47	define_attribute {etx_clk} syn_noclockbuf {1}
		48
		49	#
		50	# I/O standards
		51	#
		52
		53	#
		54	# Compile Points
		55	#
		56
		57	#
		58	# Other Constraints
		59	#

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boards/LeonLPP-M7A3P1k/Makefile.inc created 644 +18 0

			@@ -0,0 +1,18
		1	TECHNOLOGY=PROASIC3
		2	PACKAGE=\"\"
		3	SPEED=Std
		4	SYNFREQ=50
		5
		6	PART=PROASIC3
		7	DESIGNER_PACKAGE=FBGA
		8	DESIGNER_PINS=484
		9	DESIGNER_VOLTAGE=COM
		10	DESIGNER_TEMP=COM
		11
		12	MANUFACTURER=Actel
		13	MGCPART=$(PART)
		14	MGCTECHNOLOGY=PROASIC3
		15	MGCPACKAGE= {$(DESIGNER_PINS) $(DESIGNER_PACKAGE)}
		16	LIBERO_DIE=IT14X14M4LDP
		17	LIBERO_PACKAGE=fg$(DESIGNER_PINS)
		18

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boards/LeonLPP-M7A3P1k/Projet-Blanc-M7A3P1k.pdc created 644 +124 0

			@@ -0,0 +1,124
		1	##########################################################################
		2	# FILE NAME : LFR-142200-DM-MINIAMBA.pdc
		3	# DATA : July 19, 2011
		4	# VERSION : 1.0
		5	#
		6	# DESCRIPTION : Physical Constraints for LFR developpement model
		7	#
		8	# MODIFICATION HISTORY:
		9	# 19/07/2011 1.0 Initial Release
		10	##########################################################################
		11
		12
		13	##########################################################################
		14	# SYSTEM SIGNALS
		15	##########################################################################
		16	set_io clk50MHz -pinname W17 -fixed yes
		17	set_io reset -pinname W15 -fixed yes
		18
		19	##########################################################################
		20	# FLASH/SRAM MEMORY INTERFACE SIGNALS
		21	##########################################################################
		22	set_io romsn -pinname B16 -fixed yes
		23	set_io oen -pinname A16 -fixed yes
		24	set_io writen -pinname A17 -fixed yes
		25
		26	set_io sram_adsc -pinname E19 -fixed yes
		27	set_io sram_adsp -pinname F19 -fixed yes
		28	set_io sram_adv -pinname G20 -fixed yes
		29	set_io sram_gwen -pinname J16 -fixed yes
		30	set_io sram_pwrdwn -pinname A18 -fixed yes
		31	set_io ramclk -pinname F18 -fixed yes
		32	set_io ramsn -pinname H17 -fixed yes
		33	set_io rwen -pinname G19 -fixed yes
		34	set_io ramben\[0\] -pinname J18
		35	set_io ramben\[1\] -pinname J17
		36	set_io ramben\[2\] -pinname H19
		37	set_io ramben\[3\] -pinname H18
		38	set_io ramoen -pinname G18 -fixed yes
		39
		40	set_io address\[0\] -pinname F12
		41	set_io address\[1\] -pinname E12
		42	set_io address\[2\] -pinname G12
		43	set_io address\[3\] -pinname H12
		44	set_io address\[4\] -pinname A12
		45	set_io address\[5\] -pinname B12
		46	set_io address\[6\] -pinname D13
		47	set_io address\[7\] -pinname D12
		48	set_io address\[8\] -pinname E14
		49	set_io address\[9\] -pinname E13
		50	set_io address\[10\] -pinname G13
		51	set_io address\[11\] -pinname F13
		52	set_io address\[12\] -pinname A13
		53	set_io address\[13\] -pinname B13
		54	set_io address\[14\] -pinname F14
		55	set_io address\[15\] -pinname G14
		56	set_io address\[16\] -pinname D15
		57	set_io address\[17\] -pinname D14
		58	set_io address\[18\] -pinname A15
		59
		60	set_io data\[0\] -pinname B5 -fixed yes
		61	set_io data\[1\] -pinname B4 -fixed yes
		62	set_io data\[2\] -pinname C7 -fixed yes
		63	set_io data\[3\] -pinname C6 -fixed yes
		64	set_io data\[4\] -pinname D8 -fixed yes
		65	set_io data\[5\] -pinname E8 -fixed yes
		66	set_io data\[6\] -pinname A5 -fixed yes
		67	set_io data\[7\] -pinname A4 -fixed yes
		68	set_io data\[8\] -pinname B7 -fixed yes
		69	set_io data\[9\] -pinname B6 -fixed yes
		70	set_io data\[10\] -pinname A7 -fixed yes
		71	set_io data\[11\] -pinname A6 -fixed yes
		72	set_io data\[12\] -pinname G10 -fixed yes
		73	set_io data\[13\] -pinname G9 -fixed yes
		74	set_io data\[14\] -pinname D9 -fixed yes
		75	set_io data\[15\] -pinname E9 -fixed yes
		76	set_io data\[16\] -pinname A8 -fixed yes
		77	set_io data\[17\] -pinname B8 -fixed yes
		78	set_io data\[18\] -pinname D10 -fixed yes
		79	set_io data\[19\] -pinname E10 -fixed yes
		80	set_io data\[20\] -pinname G11 -fixed yes
		81	set_io data\[21\] -pinname H11 -fixed yes
		82	set_io data\[22\] -pinname B10 -fixed yes
		83	set_io data\[23\] -pinname C10 -fixed yes
		84	set_io data\[24\] -pinname F11 -fixed yes
		85	set_io data\[25\] -pinname F10 -fixed yes
		86	set_io data\[26\] -pinname E11 -fixed yes
		87	set_io data\[27\] -pinname D11 -fixed yes
		88	set_io data\[28\] -pinname A9 -fixed yes
		89	set_io data\[29\] -pinname B9 -fixed yes
		90	set_io data\[30\] -pinname A11 -fixed yes
		91	set_io data\[31\] -pinname A10 -fixed yes
		92
		93
		94	##########################################################################
		95	# PUSH-BUTTON SWITCHES SIGNALS
		96	##########################################################################
		97	set_io gpio\[0\] -pinname P7 -fixed yes
		98	set_io gpio\[1\] -pinname R5 -fixed yes
		99	set_io gpio\[2\] -pinname P6 -fixed yes
		100	set_io gpio\[3\] -pinname R6 -fixed yes
		101	set_io gpio\[4\] -pinname U3 -fixed yes
		102	set_io gpio\[5\] -pinname T5 -fixed yes
		103	set_io gpio\[6\] -pinname U2 -fixed yes
		104	#set_io gpio\[7\] -pinname T4 -fixed yes
		105
		106
		107	##########################################################################
		108	# LED SIGNALS
		109	##########################################################################
		110	set_io led\[0\] -pinname R4 -fixed yes
		111	set_io led\[1\] -pinname P5 -fixed yes
		112	set_io led\[2\] -pinname R2 -fixed yes
		113	set_io led\[3\] -pinname T2 -fixed yes
		114	set_io led\[4\] -pinname P2 -fixed yes
		115	set_io led\[5\] -pinname N2 -fixed yes
		116	set_io errorn -pinname N6 -fixed yes
		117	set_io dsuact -pinname N7 -fixed yes
		118	set_io dsubre -pinname T4 -fixed yes
		119
		120	##########################################################################
		121	# RS-232 INTERFACE SIGNALS
		122	##########################################################################
		123	set_io ahbrxd -pinname K18 -fixed yes
		124	set_io ahbtxd -pinname C11 -fixed yes

0

boards/LeonLPP-M7A3P1k/default.sdc created 644 +59 0

			@@ -0,0 +1,59
		1	# Synplicity, Inc. constraint file
		2	# /home/jiri/ibm/vhdl/grlib/boards/actel-coremp7-1000/default.sdc
		3	# Written on Wed Aug 1 19:29:24 2007
		4	# by Synplify Pro, Synplify Pro 8.8.0.4 Scope Editor
		5
		6	#
		7	# Collections
		8	#
		9
		10	#
		11	# Clocks
		12	#
		13	define_clock {clk} -name {clk} -freq 60 -clockgroup default_clkgroup -route 5
		14
		15	#
		16	# Clock to Clock
		17	#
		18
		19	#
		20	# Inputs/Outputs
		21	#
		22	define_output_delay -disable -default 5.00 -improve 0.00 -route 0.00 -ref {clk:r}
		23	define_input_delay -disable -default 5.00 -improve 0.00 -route 0.00 -ref {clk:r}
		24
		25
		26	#
		27	# Registers
		28	#
		29
		30	#
		31	# Multicycle Path
		32	#
		33
		34	#
		35	# False Path
		36	#
		37
		38	#
		39	# Path Delay
		40	#
		41
		42	#
		43	# Attributes
		44	#
		45	define_global_attribute syn_useioff {1}
		46	define_global_attribute -disable syn_netlist_hierarchy {0}
		47	define_attribute {etx_clk} syn_noclockbuf {1}
		48
		49	#
		50	# I/O standards
		51	#
		52
		53	#
		54	# Compile Points
		55	#
		56
		57	#
		58	# Other Constraints
		59	#

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              device LPP_FIFO_PID 11
              device LPP_FFT 12
              device LPP_MATRIX 13
-             device LPP_BALISE 14
+             device LPP_DELAY 14
              device LPP_USB 15
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