##// END OF EJS Templates
Cleaned EGSE_ICI design.
Alexis Jeandet -
r218:8124d5736ed6 alexis
parent child
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@@ -0,0 +1,158
1 -- TOP_GSE.vhd
2 library IEEE;
3 use IEEE.std_logic_1164.all;
4 use IEEE.numeric_std.all;
5 library lpp;
6 use lpp.lpp_usb.all;
7 library techmap;
8 use techmap.gencomp.all;
9
10 entity TOP_EGSE2 is
11 generic(WordSize : integer := 8; WordCnt : integer := 144;MinFCount : integer := 64;Simu : integer :=0);
12 port(
13 Clock : in std_logic;
14 reset : in std_logic;
15 DataRTX : in std_logic;
16 DataRTX_echo : out std_logic;
17 SCLK : out std_logic;
18 Gate : out std_logic;
19 Major_Frame : out std_logic;
20 Minor_Frame : out std_logic;
21 if_clk : out STD_LOGIC;
22 flagb : in STD_LOGIC;
23 slwr : out STD_LOGIC;
24 slrd : out std_logic;
25 pktend : out STD_LOGIC;
26 sloe : out STD_LOGIC;
27 fdbusw : out std_logic_vector (7 downto 0);
28 fifoadr : out std_logic_vector (1 downto 0)
29 );
30 end TOP_EGSE2;
31
32
33
34 architecture ar_TOP_EGSE2 of TOP_EGSE2 is
35
36 component CLKINT
37 port( A : in std_logic := 'U';
38 Y : out std_logic
39 );
40 end component;
41
42 signal clk : std_logic;
43 signal sclkint : std_logic;
44 signal RaZ : std_logic;
45 signal rstn : std_logic;
46 signal WordCount : integer range 0 to WordCnt-1;
47 signal WordClk : std_logic;
48 signal MinFCnt : integer range 0 to MinFCount-1;
49 signal MinF : std_logic;
50 signal MinFclk : std_logic;
51 signal MajF : std_logic;
52 signal GateLF : std_logic;
53 signal GateHF : std_logic;
54 signal GateDC : std_logic;
55 signal Gateint : std_logic;
56 signal GateR : std_logic;
57 signal NwDat : std_logic;
58 signal DATA : std_logic_vector(WordSize-1 downto 0);
59
60 Signal FIFODATin : std_logic_vector(7 downto 0);
61 Signal FIFODATout : std_logic_vector(7 downto 0);
62
63 Signal USB_DATA : std_logic_vector(7 downto 0);
64 Signal FIFOwe,FIFOre,FIFOfull : std_logic;
65 Signal USBwe,USBfull,USBempty : std_logic;
66
67 Signal clk80 : std_logic;
68
69
70
71 begin
72
73
74 DataRTX_echo <= DataRTX; --P48
75
76 ck_int0 : CLKINT
77 port map(Clock,clk);
78
79 DEFPLL: IF simu = 0 generate
80 PLL : entity work.PLL0
81 port map(
82 POWERDOWN => '1',
83 CLKA => clk,
84 LOCK => RaZ,
85 GLA => SCLKint,
86 GLB => clk80
87 );
88 end generate;
89
90
91 SIMPLL: IF simu = 1 generate
92 PLL : entity work.PLL0Sim
93 port map(
94 POWERDOWN => '1',
95 CLKA => clk,
96 LOCK => RaZ,
97 GLA => SCLKint,
98 GLB => clk80
99 );
100 end generate;
101
102
103 USB2: entity work.FX2_WithFIFO
104 generic map(apa3)
105 port map(
106 clk => clk,
107 if_clk => if_clk,
108 reset => rstn,
109 flagb => flagb,
110 slwr => slwr,
111 slrd => slrd,
112 pktend => pktend,
113 sloe => sloe,
114 fdbusw => fdbusw,
115 fifoadr => fifoadr,
116 FULL => USBfull,
117 Write => USBwe,
118 Data => USB_DATA
119
120 );
121
122
123 rstn <= reset and RaZ;
124
125 process(clk,rstn)
126 begin
127 if rstn = '0' then
128 USB_DATA <= (others => '0');
129 USBwe <= '0';
130 elsif clk'event and clk = '1' then
131 if USBfull = '0' then
132 USB_DATA <= std_logic_vector(unsigned(USB_DATA) + 1 );
133 USBwe <= '1';
134 else
135 USBwe <= '0';
136 end if;
137 end if;
138 end process;
139
140 end ar_TOP_EGSE2;
141
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1 -- FIFO_pipeline.vhd
2 ------------------------------------------------------------------------------
3 -- This file is a part of the LPP VHDL IP LIBRARY
4 -- Copyright (C) 2009 - 2012, Laboratory of Plasmas Physic - CNRS
5 --
6 -- This program is free software; you can redistribute it and/or modify
7 -- it under the terms of the GNU General Public License as published by
8 -- the Free Software Foundation; either version 3 of the License, or
9 -- (at your option) any later version.
10 --
11 -- This program is distributed in the hope that it will be useful,
12 -- but WITHOUT ANY WARRANTY; without even the implied warranty of
13 -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 -- GNU General Public License for more details.
15 --
16 -- You should have received a copy of the GNU General Public License
17 -- along with this program; if not, write to the Free Software
18 -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 ------------------------------------------------------------------------------
20 -- Author : Alexis Jeandet
21 -- Mail : alexis.jeandet@member.fsf.org
22 ------------------------------------------------------------------------------
23 library IEEE;
24 use IEEE.std_logic_1164.all;
25 use IEEE.numeric_std.all;
26 library lpp;
27 use lpp.lpp_memory.all;
28 use lpp.iir_filter.all;
29 library techmap;
30 use techmap.gencomp.all;
31
32 entity FIFO_pipeline is
33 generic(
34 tech : integer := 0;
35 Mem_use : integer := use_RAM;
36 fifoCount : integer range 2 to 32 := 8;
37 DataSz : integer range 1 to 32 := 8;
38 abits : integer range 2 to 12 := 8
39 );
40 port(
41 rstn : in std_logic;
42 ReUse : in std_logic;
43 rclk : in std_logic;
44 ren : in std_logic;
45 rdata : out std_logic_vector(DataSz-1 downto 0);
46 empty : out std_logic;
47 raddr : out std_logic_vector(abits-1 downto 0);
48 wclk : in std_logic;
49 wen : in std_logic;
50 wdata : in std_logic_vector(DataSz-1 downto 0);
51 full : out std_logic;
52 waddr : out std_logic_vector(abits-1 downto 0)
53 );
54 end entity;
55
56 architecture Ar_FIFO_pipeline of FIFO_pipeline is
57
58 type FX2State is (idle);
59
60 Signal DATA0 : std_logic_vector(DataSz-1 downto 0);
61 Signal FULL_REN0,WEN_EMPTY0 : std_logic;
62
63 begin
64
65
66 FIFO0: lpp_fifo
67 generic map(
68 tech => tech,
69 Mem_use => Mem_use,
70 Enable_ReUse => '0',
71 DataSz => DataSz,
72 abits => abits
73 )
74 port map(
75 rstn => rstn,
76 ReUse => '0',
77 rclk => rclk,
78 ren => FULL_REN0,
79 rdata => DATA0,
80 empty => WEN_EMPTY0,
81 raddr => open,
82 wclk => wclk,
83 wen => wen,
84 wdata => wdata,
85 full => full,
86 waddr => open
87 );
88
89 FIFO1: lpp_fifo
90 generic map(
91 tech => tech,
92 Mem_use => Mem_use,
93 Enable_ReUse => '0',
94 DataSz => DataSz,
95 abits => abits
96 )
97 port map(
98 rstn => rstn,
99 ReUse => '0',
100 rclk => rclk,
101 ren => ren,
102 rdata => rdata,
103 empty => empty,
104 raddr => open,
105 wclk => wclk,
106 wen => WEN_EMPTY0,
107 wdata => DATA0,
108 full => FULL_REN0,
109 waddr => open
110 );
111
112 end ar_FIFO_pipeline;
113
114
115
@@ -1,6 +1,6
1 GRLIB=../..
1 GRLIB=../..
2 VHDLIB=../..
2 VHDLIB=../..
3 TOP=top
3 TOP=TOP_EGSE2
4 BOARD=GSE_ICI
4 BOARD=GSE_ICI
5 include $(GRLIB)/boards/$(BOARD)/Makefile.inc
5 include $(GRLIB)/boards/$(BOARD)/Makefile.inc
6 DEVICE=$(PART)-$(PACKAGE)$(SPEED)
6 DEVICE=$(PART)-$(PACKAGE)$(SPEED)
@@ -9,7 +9,7 QSF=$(GRLIB)/boards/$(BOARD)/$(TOP).qsf
9 EFFORT=high
9 EFFORT=high
10 XSTOPT=
10 XSTOPT=
11 SYNPOPT="set_option -pipe 0; set_option -retiming 0; set_option -write_apr_constraint 0"
11 SYNPOPT="set_option -pipe 0; set_option -retiming 0; set_option -write_apr_constraint 0"
12 VHDLSYNFILES=config.vhd ahbrom.vhd leon3mp.vhd
12 VHDLSYNFILES=config.vhd EGSE_ICI.vhd
13 VHDLSIMFILES=testbench.vhd
13 VHDLSIMFILES=testbench.vhd
14 SIMTOP=testbench
14 SIMTOP=testbench
15 SDCFILE=$(GRLIB)/boards/$(BOARD)/synplify.sdc
15 SDCFILE=$(GRLIB)/boards/$(BOARD)/synplify.sdc
@@ -20,9 +20,10 CLEAN=soft-clean
20
20
21 TECHLIBS = proasic3
21 TECHLIBS = proasic3
22 LIBSKIP = core1553bbc core1553brm core1553brt gr1553 corePCIF \
22 LIBSKIP = core1553bbc core1553brm core1553brt gr1553 corePCIF \
23 tmtc openchip hynix ihp gleichmann micron usbhc
23 tmtc openchip hynix ihp gleichmann micron usbhc spw fmf gsi eth spansion esa
24 DIRSKIP = b1553 pcif leon2 leon2ft crypto satcan ddr usb ata i2c \
24 DIRSKIP = b1553 pcif leon2 leon2ft crypto satcan ddr usb ata i2c \
25 pci grusbhc haps slink ascs pwm coremp7 spi ac97
25 pci grusbhc haps slink ascs pwm coremp7 spi ac97 spacewire leon3 leon3ft sparc can greth net gr1553b lpp_waveform \
26 lpp_dma
26
27
27 FILESKIP = i2cmst.vhd
28 FILESKIP = i2cmst.vhd
28
29
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@@ -7,380 +7,314
7 # timing analyzer and USE_TIMEQUEST_TIMING_ANALYZER defaults to "ON"
7 # timing analyzer and USE_TIMEQUEST_TIMING_ANALYZER defaults to "ON"
8 # set_global_assignment -name USE_TIMEQUEST_TIMING_ANALYZER "OFF"
8 # set_global_assignment -name USE_TIMEQUEST_TIMING_ANALYZER "OFF"
9
9
10 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/grlib/stdlib/version.vhd -library grlib
10 set_global_assignment -name VHDL_FILE ../../lib/grlib/stdlib/version.vhd -library grlib
11 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/grlib/stdlib/config.vhd -library grlib
11 set_global_assignment -name VHDL_FILE ../../lib/grlib/stdlib/config.vhd -library grlib
12 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/grlib/stdlib/stdlib.vhd -library grlib
12 set_global_assignment -name VHDL_FILE ../../lib/grlib/stdlib/stdlib.vhd -library grlib
13 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/grlib/sparc/sparc.vhd -library grlib
13 set_global_assignment -name VHDL_FILE ../../lib/grlib/modgen/multlib.vhd -library grlib
14 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/grlib/modgen/multlib.vhd -library grlib
14 set_global_assignment -name VHDL_FILE ../../lib/grlib/modgen/leaves.vhd -library grlib
15 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/grlib/modgen/leaves.vhd -library grlib
15 set_global_assignment -name VHDL_FILE ../../lib/grlib/amba/amba.vhd -library grlib
16 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/grlib/amba/amba.vhd -library grlib
16 set_global_assignment -name VHDL_FILE ../../lib/grlib/amba/devices.vhd -library grlib
17 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/grlib/amba/devices.vhd -library grlib
17 set_global_assignment -name VHDL_FILE ../../lib/grlib/amba/defmst.vhd -library grlib
18 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/grlib/amba/defmst.vhd -library grlib
18 set_global_assignment -name VHDL_FILE ../../lib/grlib/amba/apbctrl.vhd -library grlib
19 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/grlib/amba/apbctrl.vhd -library grlib
19 set_global_assignment -name VHDL_FILE ../../lib/grlib/amba/ahbctrl.vhd -library grlib
20 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/grlib/amba/ahbctrl.vhd -library grlib
20 set_global_assignment -name VHDL_FILE ../../lib/grlib/amba/dma2ahb_pkg.vhd -library grlib
21 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/grlib/amba/dma2ahb_pkg.vhd -library grlib
21 set_global_assignment -name VHDL_FILE ../../lib/grlib/amba/dma2ahb.vhd -library grlib
22 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/grlib/amba/dma2ahb.vhd -library grlib
22 set_global_assignment -name VHDL_FILE ../../lib/techmap/gencomp/gencomp.vhd -library techmap
23 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/techmap/gencomp/gencomp.vhd -library techmap
23 set_global_assignment -name VHDL_FILE ../../lib/techmap/gencomp/netcomp.vhd -library techmap
24 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/techmap/gencomp/netcomp.vhd -library techmap
24 set_global_assignment -name VHDL_FILE ../../lib/techmap/inferred/memory_inferred.vhd -library techmap
25 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/techmap/inferred/memory_inferred.vhd -library techmap
25 set_global_assignment -name VHDL_FILE ../../lib/techmap/inferred/ddr_inferred.vhd -library techmap
26 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/techmap/inferred/ddr_inferred.vhd -library techmap
26 set_global_assignment -name VHDL_FILE ../../lib/techmap/inferred/mul_inferred.vhd -library techmap
27 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/techmap/inferred/mul_inferred.vhd -library techmap
27 set_global_assignment -name VHDL_FILE ../../lib/techmap/inferred/ddr_phy_inferred.vhd -library techmap
28 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/techmap/inferred/ddr_phy_inferred.vhd -library techmap
28 set_global_assignment -name VHDL_FILE ../../lib/techmap/maps/allclkgen.vhd -library techmap
29 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/techmap/maps/allclkgen.vhd -library techmap
29 set_global_assignment -name VHDL_FILE ../../lib/techmap/maps/allddr.vhd -library techmap
30 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/techmap/maps/allddr.vhd -library techmap
30 set_global_assignment -name VHDL_FILE ../../lib/techmap/maps/allmem.vhd -library techmap
31 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/techmap/maps/allmem.vhd -library techmap
31 set_global_assignment -name VHDL_FILE ../../lib/techmap/maps/allmul.vhd -library techmap
32 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/techmap/maps/allmul.vhd -library techmap
32 set_global_assignment -name VHDL_FILE ../../lib/techmap/maps/allpads.vhd -library techmap
33 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/techmap/maps/allpads.vhd -library techmap
33 set_global_assignment -name VHDL_FILE ../../lib/techmap/maps/alltap.vhd -library techmap
34 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/techmap/maps/alltap.vhd -library techmap
34 set_global_assignment -name VHDL_FILE ../../lib/techmap/maps/clkgen.vhd -library techmap
35 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/techmap/maps/clkgen.vhd -library techmap
35 set_global_assignment -name VHDL_FILE ../../lib/techmap/maps/clkmux.vhd -library techmap
36 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/techmap/maps/clkmux.vhd -library techmap
36 set_global_assignment -name VHDL_FILE ../../lib/techmap/maps/clkand.vhd -library techmap
37 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/techmap/maps/clkand.vhd -library techmap
37 set_global_assignment -name VHDL_FILE ../../lib/techmap/maps/ddr_ireg.vhd -library techmap
38 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/techmap/maps/ddr_ireg.vhd -library techmap
38 set_global_assignment -name VHDL_FILE ../../lib/techmap/maps/ddr_oreg.vhd -library techmap
39 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/techmap/maps/ddr_oreg.vhd -library techmap
39 set_global_assignment -name VHDL_FILE ../../lib/techmap/maps/ddrphy.vhd -library techmap
40 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/techmap/maps/ddrphy.vhd -library techmap
40 set_global_assignment -name VHDL_FILE ../../lib/techmap/maps/syncram.vhd -library techmap
41 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/techmap/maps/syncram.vhd -library techmap
41 set_global_assignment -name VHDL_FILE ../../lib/techmap/maps/syncram64.vhd -library techmap
42 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/techmap/maps/syncram64.vhd -library techmap
42 set_global_assignment -name VHDL_FILE ../../lib/techmap/maps/syncram_2p.vhd -library techmap
43 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/techmap/maps/syncram_2p.vhd -library techmap
43 set_global_assignment -name VHDL_FILE ../../lib/techmap/maps/syncram_dp.vhd -library techmap
44 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/techmap/maps/syncram_dp.vhd -library techmap
44 set_global_assignment -name VHDL_FILE ../../lib/techmap/maps/syncfifo.vhd -library techmap
45 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/techmap/maps/syncfifo.vhd -library techmap
45 set_global_assignment -name VHDL_FILE ../../lib/techmap/maps/regfile_3p.vhd -library techmap
46 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/techmap/maps/regfile_3p.vhd -library techmap
46 set_global_assignment -name VHDL_FILE ../../lib/techmap/maps/tap.vhd -library techmap
47 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/techmap/maps/tap.vhd -library techmap
47 set_global_assignment -name VHDL_FILE ../../lib/techmap/maps/techbuf.vhd -library techmap
48 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/techmap/maps/techbuf.vhd -library techmap
48 set_global_assignment -name VHDL_FILE ../../lib/techmap/maps/nandtree.vhd -library techmap
49 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/techmap/maps/nandtree.vhd -library techmap
49 set_global_assignment -name VHDL_FILE ../../lib/techmap/maps/clkpad.vhd -library techmap
50 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/techmap/maps/clkpad.vhd -library techmap
50 set_global_assignment -name VHDL_FILE ../../lib/techmap/maps/clkpad_ds.vhd -library techmap
51 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/techmap/maps/clkpad_ds.vhd -library techmap
51 set_global_assignment -name VHDL_FILE ../../lib/techmap/maps/inpad.vhd -library techmap
52 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/techmap/maps/inpad.vhd -library techmap
52 set_global_assignment -name VHDL_FILE ../../lib/techmap/maps/inpad_ds.vhd -library techmap
53 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/techmap/maps/inpad_ds.vhd -library techmap
53 set_global_assignment -name VHDL_FILE ../../lib/techmap/maps/iodpad.vhd -library techmap
54 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/techmap/maps/iodpad.vhd -library techmap
54 set_global_assignment -name VHDL_FILE ../../lib/techmap/maps/iopad.vhd -library techmap
55 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/techmap/maps/iopad.vhd -library techmap
55 set_global_assignment -name VHDL_FILE ../../lib/techmap/maps/iopad_ds.vhd -library techmap
56 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/techmap/maps/iopad_ds.vhd -library techmap
56 set_global_assignment -name VHDL_FILE ../../lib/techmap/maps/lvds_combo.vhd -library techmap
57 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/techmap/maps/lvds_combo.vhd -library techmap
57 set_global_assignment -name VHDL_FILE ../../lib/techmap/maps/odpad.vhd -library techmap
58 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/techmap/maps/odpad.vhd -library techmap
58 set_global_assignment -name VHDL_FILE ../../lib/techmap/maps/outpad.vhd -library techmap
59 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/techmap/maps/outpad.vhd -library techmap
59 set_global_assignment -name VHDL_FILE ../../lib/techmap/maps/outpad_ds.vhd -library techmap
60 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/techmap/maps/outpad_ds.vhd -library techmap
60 set_global_assignment -name VHDL_FILE ../../lib/techmap/maps/toutpad.vhd -library techmap
61 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/techmap/maps/toutpad.vhd -library techmap
61 set_global_assignment -name VHDL_FILE ../../lib/techmap/maps/skew_outpad.vhd -library techmap
62 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/techmap/maps/skew_outpad.vhd -library techmap
62 set_global_assignment -name VHDL_FILE ../../lib/techmap/maps/grspwc_net.vhd -library techmap
63 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/techmap/maps/grspwc_net.vhd -library techmap
63 set_global_assignment -name VHDL_FILE ../../lib/techmap/maps/grspwc2_net.vhd -library techmap
64 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/techmap/maps/grspwc2_net.vhd -library techmap
64 set_global_assignment -name VHDL_FILE ../../lib/techmap/maps/grlfpw_net.vhd -library techmap
65 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/techmap/maps/grlfpw_net.vhd -library techmap
65 set_global_assignment -name VHDL_FILE ../../lib/techmap/maps/grfpw_net.vhd -library techmap
66 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/techmap/maps/grfpw_net.vhd -library techmap
66 set_global_assignment -name VHDL_FILE ../../lib/techmap/maps/leon4_net.vhd -library techmap
67 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/techmap/maps/leon4_net.vhd -library techmap
67 set_global_assignment -name VHDL_FILE ../../lib/techmap/maps/mul_61x61.vhd -library techmap
68 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/techmap/maps/mul_61x61.vhd -library techmap
68 set_global_assignment -name VHDL_FILE ../../lib/techmap/maps/cpu_disas_net.vhd -library techmap
69 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/techmap/maps/cpu_disas_net.vhd -library techmap
69 set_global_assignment -name VHDL_FILE ../../lib/techmap/maps/grusbhc_net.vhd -library techmap
70 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/techmap/maps/grusbhc_net.vhd -library techmap
70 set_global_assignment -name VHDL_FILE ../../lib/techmap/maps/ringosc.vhd -library techmap
71 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/techmap/maps/ringosc.vhd -library techmap
71 set_global_assignment -name VHDL_FILE ../../lib/techmap/maps/ssrctrl_net.vhd -library techmap
72 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/techmap/maps/ssrctrl_net.vhd -library techmap
72 set_global_assignment -name VHDL_FILE ../../lib/techmap/maps/system_monitor.vhd -library techmap
73 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/techmap/maps/system_monitor.vhd -library techmap
73 set_global_assignment -name VHDL_FILE ../../lib/techmap/maps/grgates.vhd -library techmap
74 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/techmap/maps/grgates.vhd -library techmap
74 set_global_assignment -name VHDL_FILE ../../lib/techmap/maps/inpad_ddr.vhd -library techmap
75 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/techmap/maps/inpad_ddr.vhd -library techmap
75 set_global_assignment -name VHDL_FILE ../../lib/techmap/maps/outpad_ddr.vhd -library techmap
76 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/techmap/maps/outpad_ddr.vhd -library techmap
76 set_global_assignment -name VHDL_FILE ../../lib/techmap/maps/iopad_ddr.vhd -library techmap
77 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/techmap/maps/iopad_ddr.vhd -library techmap
77 set_global_assignment -name VHDL_FILE ../../lib/techmap/maps/syncram128bw.vhd -library techmap
78 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/techmap/maps/syncram128bw.vhd -library techmap
78 set_global_assignment -name VHDL_FILE ../../lib/techmap/maps/syncram128.vhd -library techmap
79 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/techmap/maps/syncram128.vhd -library techmap
79 set_global_assignment -name VHDL_FILE ../../lib/techmap/maps/syncram156bw.vhd -library techmap
80 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/techmap/maps/syncram156bw.vhd -library techmap
80 set_global_assignment -name VHDL_FILE ../../lib/techmap/maps/techmult.vhd -library techmap
81 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/techmap/maps/techmult.vhd -library techmap
81 set_global_assignment -name VHDL_FILE ../../lib/techmap/maps/spictrl_net.vhd -library techmap
82 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/techmap/maps/spictrl_net.vhd -library techmap
82 set_global_assignment -name VHDL_FILE ../../lib/techmap/maps/scanreg.vhd -library techmap
83 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/techmap/maps/scanreg.vhd -library techmap
83 set_global_assignment -name VHDL_FILE ../../lib/opencores/occomp/occomp.vhd -library opencores
84 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/spw/comp/spwcomp.vhd -library spw
84 set_global_assignment -name VHDL_FILE ../../lib/gaisler/arith/arith.vhd -library gaisler
85 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/spw/wrapper/grspw_gen.vhd -library spw
85 set_global_assignment -name VHDL_FILE ../../lib/gaisler/arith/mul32.vhd -library gaisler
86 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/spw/wrapper/grspw2_gen.vhd -library spw
86 set_global_assignment -name VHDL_FILE ../../lib/gaisler/arith/div32.vhd -library gaisler
87 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/eth/comp/ethcomp.vhd -library eth
87 set_global_assignment -name VHDL_FILE ../../lib/gaisler/memctrl/memctrl.vhd -library gaisler
88 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/eth/core/greth_pkg.vhd -library eth
88 set_global_assignment -name VHDL_FILE ../../lib/gaisler/memctrl/sdctrl.vhd -library gaisler
89 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/eth/core/eth_rstgen.vhd -library eth
89 set_global_assignment -name VHDL_FILE ../../lib/gaisler/memctrl/sdctrl64.vhd -library gaisler
90 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/eth/core/eth_edcl_ahb_mst.vhd -library eth
90 set_global_assignment -name VHDL_FILE ../../lib/gaisler/memctrl/sdmctrl.vhd -library gaisler
91 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/eth/core/eth_ahb_mst.vhd -library eth
91 set_global_assignment -name VHDL_FILE ../../lib/gaisler/memctrl/srctrl.vhd -library gaisler
92 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/eth/core/greth_tx.vhd -library eth
92 set_global_assignment -name VHDL_FILE ../../lib/gaisler/memctrl/spimctrl.vhd -library gaisler
93 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/eth/core/greth_rx.vhd -library eth
93 set_global_assignment -name VHDL_FILE ../../lib/gaisler/misc/misc.vhd -library gaisler
94 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/eth/core/grethc.vhd -library eth
94 set_global_assignment -name VHDL_FILE ../../lib/gaisler/misc/rstgen.vhd -library gaisler
95 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/eth/wrapper/greth_gen.vhd -library eth
95 set_global_assignment -name VHDL_FILE ../../lib/gaisler/misc/gptimer.vhd -library gaisler
96 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/eth/wrapper/greth_gbit_gen.vhd -library eth
96 set_global_assignment -name VHDL_FILE ../../lib/gaisler/misc/ahbram.vhd -library gaisler
97 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/opencores/occomp/occomp.vhd -library opencores
97 set_global_assignment -name VHDL_FILE ../../lib/gaisler/misc/ahbdpram.vhd -library gaisler
98 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/opencores/can/cancomp.vhd -library opencores
98 set_global_assignment -name VHDL_FILE ../../lib/gaisler/misc/ahbtrace.vhd -library gaisler
99 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/opencores/can/can_top.vhd -library opencores
99 set_global_assignment -name VHDL_FILE ../../lib/gaisler/misc/ahbtrace_mb.vhd -library gaisler
100 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/gaisler/arith/arith.vhd -library gaisler
100 set_global_assignment -name VHDL_FILE ../../lib/gaisler/misc/ahbtrace_mmb.vhd -library gaisler
101 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/gaisler/arith/mul32.vhd -library gaisler
101 set_global_assignment -name VHDL_FILE ../../lib/gaisler/misc/ahbmst.vhd -library gaisler
102 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/gaisler/arith/div32.vhd -library gaisler
102 set_global_assignment -name VHDL_FILE ../../lib/gaisler/misc/grgpio.vhd -library gaisler
103 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/gaisler/memctrl/memctrl.vhd -library gaisler
103 set_global_assignment -name VHDL_FILE ../../lib/gaisler/misc/ahbstat.vhd -library gaisler
104 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/gaisler/memctrl/sdctrl.vhd -library gaisler
104 set_global_assignment -name VHDL_FILE ../../lib/gaisler/misc/logan.vhd -library gaisler
105 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/gaisler/memctrl/sdctrl64.vhd -library gaisler
105 set_global_assignment -name VHDL_FILE ../../lib/gaisler/misc/apbps2.vhd -library gaisler
106 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/gaisler/memctrl/sdmctrl.vhd -library gaisler
106 set_global_assignment -name VHDL_FILE ../../lib/gaisler/misc/charrom_package.vhd -library gaisler
107 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/gaisler/memctrl/srctrl.vhd -library gaisler
107 set_global_assignment -name VHDL_FILE ../../lib/gaisler/misc/charrom.vhd -library gaisler
108 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/gaisler/memctrl/spimctrl.vhd -library gaisler
108 set_global_assignment -name VHDL_FILE ../../lib/gaisler/misc/apbvga.vhd -library gaisler
109 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/gaisler/leon3/leon3.vhd -library gaisler
109 set_global_assignment -name VHDL_FILE ../../lib/gaisler/misc/svgactrl.vhd -library gaisler
110 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/gaisler/leon3/mmuconfig.vhd -library gaisler
110 set_global_assignment -name VHDL_FILE ../../lib/gaisler/misc/i2cmst_gen.vhd -library gaisler
111 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/gaisler/leon3/mmuiface.vhd -library gaisler
111 set_global_assignment -name VHDL_FILE ../../lib/gaisler/misc/spictrlx.vhd -library gaisler
112 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/gaisler/leon3/libmmu.vhd -library gaisler
112 set_global_assignment -name VHDL_FILE ../../lib/gaisler/misc/spictrl.vhd -library gaisler
113 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/gaisler/leon3/libiu.vhd -library gaisler
113 set_global_assignment -name VHDL_FILE ../../lib/gaisler/misc/i2cslv.vhd -library gaisler
114 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/gaisler/leon3/libcache.vhd -library gaisler
114 set_global_assignment -name VHDL_FILE ../../lib/gaisler/misc/wild.vhd -library gaisler
115 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/gaisler/leon3/libproc3.vhd -library gaisler
115 set_global_assignment -name VHDL_FILE ../../lib/gaisler/misc/wild2ahb.vhd -library gaisler
116 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/gaisler/leon3/cachemem.vhd -library gaisler
116 set_global_assignment -name VHDL_FILE ../../lib/gaisler/misc/grsysmon.vhd -library gaisler
117 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/gaisler/leon3/mmu_icache.vhd -library gaisler
117 set_global_assignment -name VHDL_FILE ../../lib/gaisler/misc/gracectrl.vhd -library gaisler
118 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/gaisler/leon3/mmu_dcache.vhd -library gaisler
118 set_global_assignment -name VHDL_FILE ../../lib/gaisler/misc/grgpreg.vhd -library gaisler
119 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/gaisler/leon3/mmu_acache.vhd -library gaisler
119 set_global_assignment -name VHDL_FILE ../../lib/gaisler/misc/ahbmst2.vhd -library gaisler
120 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/gaisler/leon3/mmutlbcam.vhd -library gaisler
120 set_global_assignment -name VHDL_FILE ../../lib/gaisler/misc/ahb_mst_iface.vhd -library gaisler
121 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/gaisler/leon3/mmulrue.vhd -library gaisler
121 set_global_assignment -name VHDL_FILE ../../lib/gaisler/net/net.vhd -library gaisler
122 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/gaisler/leon3/mmulru.vhd -library gaisler
122 set_global_assignment -name VHDL_FILE ../../lib/gaisler/uart/uart.vhd -library gaisler
123 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/gaisler/leon3/mmutlb.vhd -library gaisler
123 set_global_assignment -name VHDL_FILE ../../lib/gaisler/uart/libdcom.vhd -library gaisler
124 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/gaisler/leon3/mmutw.vhd -library gaisler
124 set_global_assignment -name VHDL_FILE ../../lib/gaisler/uart/apbuart.vhd -library gaisler
125 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/gaisler/leon3/mmu.vhd -library gaisler
125 set_global_assignment -name VHDL_FILE ../../lib/gaisler/uart/dcom.vhd -library gaisler
126 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/gaisler/leon3/mmu_cache.vhd -library gaisler
126 set_global_assignment -name VHDL_FILE ../../lib/gaisler/uart/dcom_uart.vhd -library gaisler
127 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/gaisler/leon3/cpu_disasx.vhd -library gaisler
127 set_global_assignment -name VHDL_FILE ../../lib/gaisler/uart/ahbuart.vhd -library gaisler
128 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/gaisler/leon3/iu3.vhd -library gaisler
128 set_global_assignment -name VHDL_FILE ../../lib/gaisler/jtag/jtag.vhd -library gaisler
129 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/gaisler/leon3/grfpwx.vhd -library gaisler
129 set_global_assignment -name VHDL_FILE ../../lib/gaisler/jtag/libjtagcom.vhd -library gaisler
130 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/gaisler/leon3/mfpwx.vhd -library gaisler
130 set_global_assignment -name VHDL_FILE ../../lib/gaisler/jtag/jtagcom.vhd -library gaisler
131 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/gaisler/leon3/grlfpwx.vhd -library gaisler
131 set_global_assignment -name VHDL_FILE ../../lib/gaisler/jtag/ahbjtag.vhd -library gaisler
132 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/gaisler/leon3/tbufmem.vhd -library gaisler
132 set_global_assignment -name VHDL_FILE ../../lib/gaisler/jtag/ahbjtag_bsd.vhd -library gaisler
133 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/gaisler/leon3/dsu3x.vhd -library gaisler
133 set_global_assignment -name VHDL_FILE ../../lib/gaisler/jtag/bscanregs.vhd -library gaisler
134 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/gaisler/leon3/dsu3.vhd -library gaisler
134 set_global_assignment -name VHDL_FILE ../../lib/gaisler/jtag/bscanregsbd.vhd -library gaisler
135 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/gaisler/leon3/proc3.vhd -library gaisler
135 set_global_assignment -name VHDL_FILE ../../lib/gaisler/gr1553b/gr1553b_pkg.vhd -library gaisler
136 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/gaisler/leon3/leon3s.vhd -library gaisler
136 set_global_assignment -name VHDL_FILE ../../lib/../../VHD_Lib/lib/lpp/./amba_lcd_16x2_ctrlr/FRAME_CLK.vhd -library lpp
137 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/gaisler/leon3/leon3cg.vhd -library gaisler
137 set_global_assignment -name VHDL_FILE ../../lib/../../VHD_Lib/lib/lpp/./amba_lcd_16x2_ctrlr/LCD_16x2_CFG.vhd -library lpp
138 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/gaisler/leon3/irqmp.vhd -library gaisler
138 set_global_assignment -name VHDL_FILE ../../lib/../../VHD_Lib/lib/lpp/./amba_lcd_16x2_ctrlr/LCD_16x2_DRVR.vhd -library lpp
139 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/gaisler/leon3/grfpwxsh.vhd -library gaisler
139 set_global_assignment -name VHDL_FILE ../../lib/../../VHD_Lib/lib/lpp/./amba_lcd_16x2_ctrlr/LCD_16x2_ENGINE.vhd -library lpp
140 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/gaisler/leon3/grfpushwx.vhd -library gaisler
140 set_global_assignment -name VHDL_FILE ../../lib/../../VHD_Lib/lib/lpp/./amba_lcd_16x2_ctrlr/LCD_2x16_DRIVER.vhd -library lpp
141 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/gaisler/leon3/leon3sh.vhd -library gaisler
141 set_global_assignment -name VHDL_FILE ../../lib/../../VHD_Lib/lib/lpp/./amba_lcd_16x2_ctrlr/LCD_CLK_GENERATOR.vhd -library lpp
142 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/gaisler/leon3ft/leon3ft.vhd -library gaisler
142 set_global_assignment -name VHDL_FILE ../../lib/../../VHD_Lib/lib/lpp/./amba_lcd_16x2_ctrlr/Top_LCD.vhd -library lpp
143 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/gaisler/can/can.vhd -library gaisler
143 set_global_assignment -name VHDL_FILE ../../lib/../../VHD_Lib/lib/lpp/./amba_lcd_16x2_ctrlr/amba_lcd_16x2_ctrlr.vhd -library lpp
144 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/gaisler/can/can_mod.vhd -library gaisler
144 set_global_assignment -name VHDL_FILE ../../lib/../../VHD_Lib/lib/lpp/./amba_lcd_16x2_ctrlr/apb_lcd_ctrlr.vhd -library lpp
145 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/gaisler/can/can_oc.vhd -library gaisler
145 set_global_assignment -name VHDL_FILE ../../lib/../../VHD_Lib/lib/lpp/./dsp/iir_filter/APB_IIR_CEL.vhd -library lpp
146 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/gaisler/can/can_mc.vhd -library gaisler
146 set_global_assignment -name VHDL_FILE ../../lib/../../VHD_Lib/lib/lpp/./dsp/iir_filter/APB_IIR_Filter.vhd -library lpp
147 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/gaisler/can/canmux.vhd -library gaisler
147 set_global_assignment -name VHDL_FILE ../../lib/../../VHD_Lib/lib/lpp/./dsp/iir_filter/FILTER.vhd -library lpp
148 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/gaisler/can/can_rd.vhd -library gaisler
148 set_global_assignment -name VHDL_FILE ../../lib/../../VHD_Lib/lib/lpp/./dsp/iir_filter/FILTER_RAM_CTRLR.vhd -library lpp
149 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/gaisler/misc/misc.vhd -library gaisler
149 set_global_assignment -name VHDL_FILE ../../lib/../../VHD_Lib/lib/lpp/./dsp/iir_filter/FILTERcfg.vhd -library lpp
150 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/gaisler/misc/rstgen.vhd -library gaisler
150 set_global_assignment -name VHDL_FILE ../../lib/../../VHD_Lib/lib/lpp/./dsp/iir_filter/FilterCTRLR.vhd -library lpp
151 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/gaisler/misc/gptimer.vhd -library gaisler
151 set_global_assignment -name VHDL_FILE ../../lib/../../VHD_Lib/lib/lpp/./dsp/iir_filter/IIR_CEL_CTRLR.vhd -library lpp
152 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/gaisler/misc/ahbram.vhd -library gaisler
152 set_global_assignment -name VHDL_FILE ../../lib/../../VHD_Lib/lib/lpp/./dsp/iir_filter/IIR_CEL_CTRLR_v2.vhd -library lpp
153 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/gaisler/misc/ahbdpram.vhd -library gaisler
153 set_global_assignment -name VHDL_FILE ../../lib/../../VHD_Lib/lib/lpp/./dsp/iir_filter/IIR_CEL_CTRLR_v2_CONTROL.vhd -library lpp
154 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/gaisler/misc/ahbtrace.vhd -library gaisler
154 set_global_assignment -name VHDL_FILE ../../lib/../../VHD_Lib/lib/lpp/./dsp/iir_filter/IIR_CEL_CTRLR_v2_DATAFLOW.vhd -library lpp
155 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/gaisler/misc/ahbtrace_mb.vhd -library gaisler
155 set_global_assignment -name VHDL_FILE ../../lib/../../VHD_Lib/lib/lpp/./dsp/iir_filter/IIR_CEL_FILTER.vhd -library lpp
156 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/gaisler/misc/ahbtrace_mmb.vhd -library gaisler
156 set_global_assignment -name VHDL_FILE ../../lib/../../VHD_Lib/lib/lpp/./dsp/iir_filter/RAM.vhd -library lpp
157 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/gaisler/misc/ahbmst.vhd -library gaisler
157 set_global_assignment -name VHDL_FILE ../../lib/../../VHD_Lib/lib/lpp/./dsp/iir_filter/RAM_CEL.vhd -library lpp
158 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/gaisler/misc/grgpio.vhd -library gaisler
158 set_global_assignment -name VHDL_FILE ../../lib/../../VHD_Lib/lib/lpp/./dsp/iir_filter/RAM_CEL_N.vhd -library lpp
159 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/gaisler/misc/ahbstat.vhd -library gaisler
159 set_global_assignment -name VHDL_FILE ../../lib/../../VHD_Lib/lib/lpp/./dsp/iir_filter/RAM_CTRLR2.vhd -library lpp
160 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/gaisler/misc/logan.vhd -library gaisler
160 set_global_assignment -name VHDL_FILE ../../lib/../../VHD_Lib/lib/lpp/./dsp/iir_filter/RAM_CTRLR_v2.vhd -library lpp
161 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/gaisler/misc/apbps2.vhd -library gaisler
161 set_global_assignment -name VHDL_FILE ../../lib/../../VHD_Lib/lib/lpp/./dsp/iir_filter/Top_Filtre_IIR.vhd -library lpp
162 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/gaisler/misc/charrom_package.vhd -library gaisler
162 set_global_assignment -name VHDL_FILE ../../lib/../../VHD_Lib/lib/lpp/./dsp/iir_filter/Top_IIR.vhd -library lpp
163 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/gaisler/misc/charrom.vhd -library gaisler
163 set_global_assignment -name VHDL_FILE ../../lib/../../VHD_Lib/lib/lpp/./dsp/iir_filter/iir_filter.vhd -library lpp
164 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/gaisler/misc/apbvga.vhd -library gaisler
164 set_global_assignment -name VHDL_FILE ../../lib/../../VHD_Lib/lib/lpp/./dsp/lpp_downsampling/Downsampling.vhd -library lpp
165 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/gaisler/misc/svgactrl.vhd -library gaisler
165 set_global_assignment -name VHDL_FILE ../../lib/../../VHD_Lib/lib/lpp/./dsp/lpp_fft/APB_FFT.vhd -library lpp
166 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/gaisler/misc/i2cmst_gen.vhd -library gaisler
166 set_global_assignment -name VHDL_FILE ../../lib/../../VHD_Lib/lib/lpp/./dsp/lpp_fft/APB_FFT_half.vhd -library lpp
167 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/gaisler/misc/spictrlx.vhd -library gaisler
167 set_global_assignment -name VHDL_FILE ../../lib/../../VHD_Lib/lib/lpp/./dsp/lpp_fft/Driver_FFT.vhd -library lpp
168 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/gaisler/misc/spictrl.vhd -library gaisler
168 set_global_assignment -name VHDL_FILE ../../lib/../../VHD_Lib/lib/lpp/./dsp/lpp_fft/FFT.vhd -library lpp
169 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/gaisler/misc/i2cslv.vhd -library gaisler
169 set_global_assignment -name VHDL_FILE ../../lib/../../VHD_Lib/lib/lpp/./dsp/lpp_fft/FFT.vhd.bak -library lpp
170 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/gaisler/misc/wild.vhd -library gaisler
170 set_global_assignment -name VHDL_FILE ../../lib/../../VHD_Lib/lib/lpp/./dsp/lpp_fft/FFTamont.vhd -library lpp
171 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/gaisler/misc/wild2ahb.vhd -library gaisler
171 set_global_assignment -name VHDL_FILE ../../lib/../../VHD_Lib/lib/lpp/./dsp/lpp_fft/FFTaval.vhd -library lpp
172 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/gaisler/misc/grsysmon.vhd -library gaisler
172 set_global_assignment -name VHDL_FILE ../../lib/../../VHD_Lib/lib/lpp/./dsp/lpp_fft/Flag_Extremum.vhd -library lpp
173 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/gaisler/misc/gracectrl.vhd -library gaisler
173 set_global_assignment -name VHDL_FILE ../../lib/../../VHD_Lib/lib/lpp/./dsp/lpp_fft/Flag_Extremum.vhd.bak -library lpp
174 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/gaisler/misc/grgpreg.vhd -library gaisler
174 set_global_assignment -name VHDL_FILE ../../lib/../../VHD_Lib/lib/lpp/./dsp/lpp_fft/Linker_FFT.vhd -library lpp
175 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/gaisler/misc/ahbmst2.vhd -library gaisler
175 set_global_assignment -name VHDL_FILE ../../lib/../../VHD_Lib/lib/lpp/./dsp/lpp_fft/lpp_fft.vhd -library lpp
176 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/gaisler/misc/ahb_mst_iface.vhd -library gaisler
176 set_global_assignment -name VHDL_FILE ../../lib/../../VHD_Lib/lib/lpp/./general_purpose/ADDRcntr.vhd -library lpp
177 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/gaisler/net/net.vhd -library gaisler
177 set_global_assignment -name VHDL_FILE ../../lib/../../VHD_Lib/lib/lpp/./general_purpose/ALU.vhd -library lpp
178 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/gaisler/uart/uart.vhd -library gaisler
178 set_global_assignment -name VHDL_FILE ../../lib/../../VHD_Lib/lib/lpp/./general_purpose/Adder.vhd -library lpp
179 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/gaisler/uart/libdcom.vhd -library gaisler
179 set_global_assignment -name VHDL_FILE ../../lib/../../VHD_Lib/lib/lpp/./general_purpose/Clk_Divider2.vhd -library lpp
180 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/gaisler/uart/apbuart.vhd -library gaisler
180 set_global_assignment -name VHDL_FILE ../../lib/../../VHD_Lib/lib/lpp/./general_purpose/Clk_divider.vhd -library lpp
181 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/gaisler/uart/dcom.vhd -library gaisler
181 set_global_assignment -name VHDL_FILE ../../lib/../../VHD_Lib/lib/lpp/./general_purpose/MAC.vhd -library lpp
182 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/gaisler/uart/dcom_uart.vhd -library gaisler
182 set_global_assignment -name VHDL_FILE ../../lib/../../VHD_Lib/lib/lpp/./general_purpose/MAC_CONTROLER.vhd -library lpp
183 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/gaisler/uart/ahbuart.vhd -library gaisler
183 set_global_assignment -name VHDL_FILE ../../lib/../../VHD_Lib/lib/lpp/./general_purpose/MAC_MUX.vhd -library lpp
184 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/gaisler/jtag/jtag.vhd -library gaisler
184 set_global_assignment -name VHDL_FILE ../../lib/../../VHD_Lib/lib/lpp/./general_purpose/MAC_MUX2.vhd -library lpp
185 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/gaisler/jtag/libjtagcom.vhd -library gaisler
185 set_global_assignment -name VHDL_FILE ../../lib/../../VHD_Lib/lib/lpp/./general_purpose/MAC_REG.vhd -library lpp
186 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/gaisler/jtag/jtagcom.vhd -library gaisler
186 set_global_assignment -name VHDL_FILE ../../lib/../../VHD_Lib/lib/lpp/./general_purpose/MUX2.vhd -library lpp
187 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/gaisler/jtag/ahbjtag.vhd -library gaisler
187 set_global_assignment -name VHDL_FILE ../../lib/../../VHD_Lib/lib/lpp/./general_purpose/MUXN.vhd -library lpp
188 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/gaisler/jtag/ahbjtag_bsd.vhd -library gaisler
188 set_global_assignment -name VHDL_FILE ../../lib/../../VHD_Lib/lib/lpp/./general_purpose/Multiplier.vhd -library lpp
189 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/gaisler/jtag/bscanregs.vhd -library gaisler
189 set_global_assignment -name VHDL_FILE ../../lib/../../VHD_Lib/lib/lpp/./general_purpose/REG.vhd -library lpp
190 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/gaisler/jtag/bscanregsbd.vhd -library gaisler
190 set_global_assignment -name VHDL_FILE ../../lib/../../VHD_Lib/lib/lpp/./general_purpose/SYNC_FF.vhd -library lpp
191 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/gaisler/greth/ethernet_mac.vhd -library gaisler
191 set_global_assignment -name VHDL_FILE ../../lib/../../VHD_Lib/lib/lpp/./general_purpose/Shifter.vhd -library lpp
192 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/gaisler/greth/greth.vhd -library gaisler
192 set_global_assignment -name VHDL_FILE ../../lib/../../VHD_Lib/lib/lpp/./general_purpose/TwoComplementer.vhd -library lpp
193 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/gaisler/greth/greth_mb.vhd -library gaisler
193 set_global_assignment -name VHDL_FILE ../../lib/../../VHD_Lib/lib/lpp/./general_purpose/general_purpose.vhd -library lpp
194 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/gaisler/greth/greth_gbit.vhd -library gaisler
194 set_global_assignment -name VHDL_FILE ../../lib/../../VHD_Lib/lib/lpp/./general_purpose/lpp_AMR/APB_AMR.vhd -library lpp
195 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/gaisler/greth/greth_gbit_mb.vhd -library gaisler
195 set_global_assignment -name VHDL_FILE ../../lib/../../VHD_Lib/lib/lpp/./general_purpose/lpp_AMR/Clock_multi.vhd -library lpp
196 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/gaisler/greth/grethm.vhd -library gaisler
196 set_global_assignment -name VHDL_FILE ../../lib/../../VHD_Lib/lib/lpp/./general_purpose/lpp_AMR/Dephaseur.vhd -library lpp
197 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/gaisler/spacewire/spacewire.vhd -library gaisler
197 set_global_assignment -name VHDL_FILE ../../lib/../../VHD_Lib/lib/lpp/./general_purpose/lpp_AMR/Gene_Rz.vhd -library lpp
198 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/gaisler/spacewire/grspw.vhd -library gaisler
198 set_global_assignment -name VHDL_FILE ../../lib/../../VHD_Lib/lib/lpp/./general_purpose/lpp_AMR/bclk_reg.vhd -library lpp
199 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/gaisler/spacewire/grspw2.vhd -library gaisler
199 set_global_assignment -name VHDL_FILE ../../lib/../../VHD_Lib/lib/lpp/./general_purpose/lpp_AMR/lpp_AMR.vhd -library lpp
200 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/gaisler/spacewire/grspwm.vhd -library gaisler
200 set_global_assignment -name VHDL_FILE ../../lib/../../VHD_Lib/lib/lpp/./general_purpose/lpp_balise/APB_Balise.vhd -library lpp
201 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/gaisler/gr1553b/gr1553b_pkg.vhd -library gaisler
201 set_global_assignment -name VHDL_FILE ../../lib/../../VHD_Lib/lib/lpp/./general_purpose/lpp_balise/lpp_balise.vhd -library lpp
202 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/esa/memoryctrl/memoryctrl.vhd -library esa
202 set_global_assignment -name VHDL_FILE ../../lib/../../VHD_Lib/lib/lpp/./general_purpose/lpp_delay/APB_Delay.vhd -library lpp
203 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/esa/memoryctrl/mctrl.vhd -library esa
203 set_global_assignment -name VHDL_FILE ../../lib/../../VHD_Lib/lib/lpp/./general_purpose/lpp_delay/TimerDelay.vhd -library lpp
204 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/../../VHD_Lib/lib/lpp/./amba_lcd_16x2_ctrlr/FRAME_CLK.vhd -library lpp
204 set_global_assignment -name VHDL_FILE ../../lib/../../VHD_Lib/lib/lpp/./general_purpose/lpp_delay/lpp_delay.vhd -library lpp
205 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/../../VHD_Lib/lib/lpp/./amba_lcd_16x2_ctrlr/LCD_16x2_CFG.vhd -library lpp
205 set_global_assignment -name VHDL_FILE ../../lib/../../VHD_Lib/lib/lpp/./lfr_time_management/apb_lfr_time_management.vhd -library lpp
206 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/../../VHD_Lib/lib/lpp/./amba_lcd_16x2_ctrlr/LCD_16x2_DRVR.vhd -library lpp
206 set_global_assignment -name VHDL_FILE ../../lib/../../VHD_Lib/lib/lpp/./lfr_time_management/lfr_time_management.vhd -library lpp
207 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/../../VHD_Lib/lib/lpp/./amba_lcd_16x2_ctrlr/LCD_16x2_ENGINE.vhd -library lpp
207 set_global_assignment -name VHDL_FILE ../../lib/../../VHD_Lib/lib/lpp/./lfr_time_management/lpp_lfr_time_management.vhd -library lpp
208 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/../../VHD_Lib/lib/lpp/./amba_lcd_16x2_ctrlr/LCD_2x16_DRIVER.vhd -library lpp
208 set_global_assignment -name VHDL_FILE ../../lib/../../VHD_Lib/lib/lpp/./lpp_ad_Conv/AD7688_drvr.vhd -library lpp
209 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/../../VHD_Lib/lib/lpp/./amba_lcd_16x2_ctrlr/LCD_CLK_GENERATOR.vhd -library lpp
209 set_global_assignment -name VHDL_FILE ../../lib/../../VHD_Lib/lib/lpp/./lpp_ad_Conv/AD7688_drvr_sync.vhd -library lpp
210 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/../../VHD_Lib/lib/lpp/./amba_lcd_16x2_ctrlr/Top_LCD.vhd -library lpp
210 set_global_assignment -name VHDL_FILE ../../lib/../../VHD_Lib/lib/lpp/./lpp_ad_Conv/AD7688_spi_if.vhd -library lpp
211 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/../../VHD_Lib/lib/lpp/./amba_lcd_16x2_ctrlr/amba_lcd_16x2_ctrlr.vhd -library lpp
211 set_global_assignment -name VHDL_FILE ../../lib/../../VHD_Lib/lib/lpp/./lpp_ad_Conv/ADS1274_drvr.vhd -library lpp
212 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/../../VHD_Lib/lib/lpp/./amba_lcd_16x2_ctrlr/apb_lcd_ctrlr.vhd -library lpp
212 set_global_assignment -name VHDL_FILE ../../lib/../../VHD_Lib/lib/lpp/./lpp_ad_Conv/ADS1278_drvr.vhd -library lpp
213 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/../../VHD_Lib/lib/lpp/./dsp/iir_filter/APB_IIR_CEL.vhd -library lpp
213 set_global_assignment -name VHDL_FILE ../../lib/../../VHD_Lib/lib/lpp/./lpp_ad_Conv/ADS7886_drvr.vhd -library lpp
214 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/../../VHD_Lib/lib/lpp/./dsp/iir_filter/APB_IIR_Filter.vhd -library lpp
214 set_global_assignment -name VHDL_FILE ../../lib/../../VHD_Lib/lib/lpp/./lpp_ad_Conv/RHF1401.vhd -library lpp
215 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/../../VHD_Lib/lib/lpp/./dsp/iir_filter/FILTER.vhd -library lpp
215 set_global_assignment -name VHDL_FILE ../../lib/../../VHD_Lib/lib/lpp/./lpp_ad_Conv/WriteGen_ADC.vhd -library lpp
216 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/../../VHD_Lib/lib/lpp/./dsp/iir_filter/FILTER_RAM_CTRLR.vhd -library lpp
216 set_global_assignment -name VHDL_FILE ../../lib/../../VHD_Lib/lib/lpp/./lpp_ad_Conv/dual_ADS1278_drvr.vhd -library lpp
217 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/../../VHD_Lib/lib/lpp/./dsp/iir_filter/FILTERcfg.vhd -library lpp
217 set_global_assignment -name VHDL_FILE ../../lib/../../VHD_Lib/lib/lpp/./lpp_ad_Conv/lpp_ad_Conv.vhd -library lpp
218 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/../../VHD_Lib/lib/lpp/./dsp/iir_filter/FilterCTRLR.vhd -library lpp
218 set_global_assignment -name VHDL_FILE ../../lib/../../VHD_Lib/lib/lpp/./lpp_ad_Conv/lpp_apb_ad_conv.vhd -library lpp
219 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/../../VHD_Lib/lib/lpp/./dsp/iir_filter/IIR_CEL_CTRLR.vhd -library lpp
219 set_global_assignment -name VHDL_FILE ../../lib/../../VHD_Lib/lib/lpp/./lpp_ad_Conv/top_ad_conv.vhd -library lpp
220 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/../../VHD_Lib/lib/lpp/./dsp/iir_filter/IIR_CEL_CTRLR_v2.vhd -library lpp
220 set_global_assignment -name VHDL_FILE ../../lib/../../VHD_Lib/lib/lpp/./lpp_ad_Conv/top_ad_conv_RHF1401.vhd -library lpp
221 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/../../VHD_Lib/lib/lpp/./dsp/iir_filter/IIR_CEL_CTRLR_v2_CONTROL.vhd -library lpp
221 set_global_assignment -name VHDL_FILE ../../lib/../../VHD_Lib/lib/lpp/./lpp_amba/APB_MULTI_DIODE.vhd -library lpp
222 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/../../VHD_Lib/lib/lpp/./dsp/iir_filter/IIR_CEL_CTRLR_v2_DATAFLOW.vhd -library lpp
222 set_global_assignment -name VHDL_FILE ../../lib/../../VHD_Lib/lib/lpp/./lpp_amba/APB_SIMPLE_DIODE.vhd -library lpp
223 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/../../VHD_Lib/lib/lpp/./dsp/iir_filter/IIR_CEL_FILTER.vhd -library lpp
223 set_global_assignment -name VHDL_FILE ../../lib/../../VHD_Lib/lib/lpp/./lpp_amba/apb_devices_list.vhd -library lpp
224 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/../../VHD_Lib/lib/lpp/./dsp/iir_filter/RAM.vhd -library lpp
224 set_global_assignment -name VHDL_FILE ../../lib/../../VHD_Lib/lib/lpp/./lpp_amba/lpp_amba.vhd -library lpp
225 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/../../VHD_Lib/lib/lpp/./dsp/iir_filter/RAM_CEL.vhd -library lpp
225 set_global_assignment -name VHDL_FILE ../../lib/../../VHD_Lib/lib/lpp/./lpp_bootloader/bootrom.vhd -library lpp
226 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/../../VHD_Lib/lib/lpp/./dsp/iir_filter/RAM_CEL_N.vhd -library lpp
226 set_global_assignment -name VHDL_FILE ../../lib/../../VHD_Lib/lib/lpp/./lpp_bootloader/lpp_bootloader.vhd -library lpp
227 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/../../VHD_Lib/lib/lpp/./dsp/iir_filter/RAM_CTRLR2.vhd -library lpp
227 set_global_assignment -name VHDL_FILE ../../lib/../../VHD_Lib/lib/lpp/./lpp_bootloader/lpp_bootloader_pkg.vhd -library lpp
228 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/../../VHD_Lib/lib/lpp/./dsp/iir_filter/RAM_CTRLR_v2.vhd -library lpp
228 set_global_assignment -name VHDL_FILE ../../lib/../../VHD_Lib/lib/lpp/./lpp_cna/APB_CNA.vhd -library lpp
229 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/../../VHD_Lib/lib/lpp/./dsp/iir_filter/Top_Filtre_IIR.vhd -library lpp
229 set_global_assignment -name VHDL_FILE ../../lib/../../VHD_Lib/lib/lpp/./lpp_cna/CNA_TabloC.vhd -library lpp
230 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/../../VHD_Lib/lib/lpp/./dsp/iir_filter/Top_IIR.vhd -library lpp
230 set_global_assignment -name VHDL_FILE ../../lib/../../VHD_Lib/lib/lpp/./lpp_cna/Convertisseur_config.vhd -library lpp
231 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/../../VHD_Lib/lib/lpp/./dsp/iir_filter/iir_filter.vhd -library lpp
231 set_global_assignment -name VHDL_FILE ../../lib/../../VHD_Lib/lib/lpp/./lpp_cna/Gene_SYNC.vhd -library lpp
232 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/../../VHD_Lib/lib/lpp/./dsp/lpp_downsampling/Downsampling.vhd -library lpp
232 set_global_assignment -name VHDL_FILE ../../lib/../../VHD_Lib/lib/lpp/./lpp_cna/Serialize.vhd -library lpp
233 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/../../VHD_Lib/lib/lpp/./dsp/lpp_fft/APB_FFT.vhd -library lpp
233 set_global_assignment -name VHDL_FILE ../../lib/../../VHD_Lib/lib/lpp/./lpp_cna/Systeme_Clock.vhd -library lpp
234 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/../../VHD_Lib/lib/lpp/./dsp/lpp_fft/APB_FFT_half.vhd -library lpp
234 set_global_assignment -name VHDL_FILE ../../lib/../../VHD_Lib/lib/lpp/./lpp_cna/lpp_cna.vhd -library lpp
235 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/../../VHD_Lib/lib/lpp/./dsp/lpp_fft/Driver_FFT.vhd -library lpp
235 set_global_assignment -name VHDL_FILE ../../lib/../../VHD_Lib/lib/lpp/./lpp_demux/DEMUX.vhd -library lpp
236 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/../../VHD_Lib/lib/lpp/./dsp/lpp_fft/FFT.vhd -library lpp
236 set_global_assignment -name VHDL_FILE ../../lib/../../VHD_Lib/lib/lpp/./lpp_demux/lpp_demux.vhd -library lpp
237 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/../../VHD_Lib/lib/lpp/./dsp/lpp_fft/FFT.vhd.bak -library lpp
237 set_global_assignment -name VHDL_FILE ../../lib/../../VHD_Lib/lib/lpp/./lpp_dma/fifo_latency_correction.vhd -library lpp
238 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/../../VHD_Lib/lib/lpp/./dsp/lpp_fft/FFTamont.vhd -library lpp
238 set_global_assignment -name VHDL_FILE ../../lib/../../VHD_Lib/lib/lpp/./lpp_dma/lpp_dma.vhd -library lpp
239 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/../../VHD_Lib/lib/lpp/./dsp/lpp_fft/FFTaval.vhd -library lpp
239 set_global_assignment -name VHDL_FILE ../../lib/../../VHD_Lib/lib/lpp/./lpp_dma/lpp_dma_apbreg.vhd -library lpp
240 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/../../VHD_Lib/lib/lpp/./dsp/lpp_fft/Flag_Extremum.vhd -library lpp
240 set_global_assignment -name VHDL_FILE ../../lib/../../VHD_Lib/lib/lpp/./lpp_dma/lpp_dma_fsm.vhd -library lpp
241 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/../../VHD_Lib/lib/lpp/./dsp/lpp_fft/Flag_Extremum.vhd.bak -library lpp
241 set_global_assignment -name VHDL_FILE ../../lib/../../VHD_Lib/lib/lpp/./lpp_dma/lpp_dma_ip.vhd -library lpp
242 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/../../VHD_Lib/lib/lpp/./dsp/lpp_fft/Linker_FFT.vhd -library lpp
242 set_global_assignment -name VHDL_FILE ../../lib/../../VHD_Lib/lib/lpp/./lpp_dma/lpp_dma_pkg.vhd -library lpp
243 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/../../VHD_Lib/lib/lpp/./dsp/lpp_fft/lpp_fft.vhd -library lpp
243 set_global_assignment -name VHDL_FILE ../../lib/../../VHD_Lib/lib/lpp/./lpp_dma/lpp_dma_send_16word.vhd -library lpp
244 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/../../VHD_Lib/lib/lpp/./general_purpose/ADDRcntr.vhd -library lpp
244 set_global_assignment -name VHDL_FILE ../../lib/../../VHD_Lib/lib/lpp/./lpp_dma/lpp_dma_send_1word.vhd -library lpp
245 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/../../VHD_Lib/lib/lpp/./general_purpose/ALU.vhd -library lpp
245 set_global_assignment -name VHDL_FILE ../../lib/../../VHD_Lib/lib/lpp/./lpp_Header/HeaderBuilder.vhd -library lpp
246 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/../../VHD_Lib/lib/lpp/./general_purpose/Adder.vhd -library lpp
246 set_global_assignment -name VHDL_FILE ../../lib/../../VHD_Lib/lib/lpp/./lpp_Header/lpp_Header.vhd -library lpp
247 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/../../VHD_Lib/lib/lpp/./general_purpose/Clk_Divider2.vhd -library lpp
247 set_global_assignment -name VHDL_FILE ../../lib/../../VHD_Lib/lib/lpp/./lpp_matrix/ALU_Driver.vhd -library lpp
248 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/../../VHD_Lib/lib/lpp/./general_purpose/Clk_divider.vhd -library lpp
248 set_global_assignment -name VHDL_FILE ../../lib/../../VHD_Lib/lib/lpp/./lpp_matrix/ALU_Driver.vhd.bak -library lpp
249 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/../../VHD_Lib/lib/lpp/./general_purpose/MAC.vhd -library lpp
249 set_global_assignment -name VHDL_FILE ../../lib/../../VHD_Lib/lib/lpp/./lpp_matrix/APB_Matrix.vhd -library lpp
250 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/../../VHD_Lib/lib/lpp/./general_purpose/MAC_CONTROLER.vhd -library lpp
250 set_global_assignment -name VHDL_FILE ../../lib/../../VHD_Lib/lib/lpp/./lpp_matrix/Dispatch.vhd -library lpp
251 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/../../VHD_Lib/lib/lpp/./general_purpose/MAC_MUX.vhd -library lpp
251 set_global_assignment -name VHDL_FILE ../../lib/../../VHD_Lib/lib/lpp/./lpp_matrix/DriveInputs.vhd -library lpp
252 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/../../VHD_Lib/lib/lpp/./general_purpose/MAC_MUX2.vhd -library lpp
252 set_global_assignment -name VHDL_FILE ../../lib/../../VHD_Lib/lib/lpp/./lpp_matrix/GetResult.vhd -library lpp
253 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/../../VHD_Lib/lib/lpp/./general_purpose/MAC_REG.vhd -library lpp
253 set_global_assignment -name VHDL_FILE ../../lib/../../VHD_Lib/lib/lpp/./lpp_matrix/MatriceSpectrale.vhd -library lpp
254 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/../../VHD_Lib/lib/lpp/./general_purpose/MUX2.vhd -library lpp
254 set_global_assignment -name VHDL_FILE ../../lib/../../VHD_Lib/lib/lpp/./lpp_matrix/MatriceSpectrale.vhd.bak -library lpp
255 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/../../VHD_Lib/lib/lpp/./general_purpose/MUXN.vhd -library lpp
255 set_global_assignment -name VHDL_FILE ../../lib/../../VHD_Lib/lib/lpp/./lpp_matrix/Matrix.vhd -library lpp
256 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/../../VHD_Lib/lib/lpp/./general_purpose/Multiplier.vhd -library lpp
256 set_global_assignment -name VHDL_FILE ../../lib/../../VHD_Lib/lib/lpp/./lpp_matrix/ReUse_CTRLR.vhd -library lpp
257 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/../../VHD_Lib/lib/lpp/./general_purpose/REG.vhd -library lpp
257 set_global_assignment -name VHDL_FILE ../../lib/../../VHD_Lib/lib/lpp/./lpp_matrix/SpectralMatrix.vhd -library lpp
258 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/../../VHD_Lib/lib/lpp/./general_purpose/SYNC_FF.vhd -library lpp
258 set_global_assignment -name VHDL_FILE ../../lib/../../VHD_Lib/lib/lpp/./lpp_matrix/SpectralMatrix.vhd.bak -library lpp
259 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/../../VHD_Lib/lib/lpp/./general_purpose/Shifter.vhd -library lpp
259 set_global_assignment -name VHDL_FILE ../../lib/../../VHD_Lib/lib/lpp/./lpp_matrix/Starter.vhd -library lpp
260 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/../../VHD_Lib/lib/lpp/./general_purpose/TwoComplementer.vhd -library lpp
260 set_global_assignment -name VHDL_FILE ../../lib/../../VHD_Lib/lib/lpp/./lpp_matrix/TopMatrix_PDR.vhd -library lpp
261 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/../../VHD_Lib/lib/lpp/./general_purpose/general_purpose.vhd -library lpp
261 set_global_assignment -name VHDL_FILE ../../lib/../../VHD_Lib/lib/lpp/./lpp_matrix/TopSpecMatrix.vhd -library lpp
262 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/../../VHD_Lib/lib/lpp/./general_purpose/lpp_AMR/APB_AMR.vhd -library lpp
262 set_global_assignment -name VHDL_FILE ../../lib/../../VHD_Lib/lib/lpp/./lpp_matrix/Top_MatrixSpec.vhd -library lpp
263 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/../../VHD_Lib/lib/lpp/./general_purpose/lpp_AMR/Clock_multi.vhd -library lpp
263 set_global_assignment -name VHDL_FILE ../../lib/../../VHD_Lib/lib/lpp/./lpp_matrix/lpp_matrix.vhd -library lpp
264 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/../../VHD_Lib/lib/lpp/./general_purpose/lpp_AMR/Dephaseur.vhd -library lpp
264 set_global_assignment -name VHDL_FILE ../../lib/../../VHD_Lib/lib/lpp/./lpp_memory/APB_FIFO.vhd -library lpp
265 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/../../VHD_Lib/lib/lpp/./general_purpose/lpp_AMR/Gene_Rz.vhd -library lpp
265 set_global_assignment -name VHDL_FILE ../../lib/../../VHD_Lib/lib/lpp/./lpp_memory/APB_FIFO.vhd.bak -library lpp
266 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/../../VHD_Lib/lib/lpp/./general_purpose/lpp_AMR/bclk_reg.vhd -library lpp
266 set_global_assignment -name VHDL_FILE ../../lib/../../VHD_Lib/lib/lpp/./lpp_memory/FIFO_pipeline.vhd -library lpp
267 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/../../VHD_Lib/lib/lpp/./general_purpose/lpp_AMR/lpp_AMR.vhd -library lpp
267 set_global_assignment -name VHDL_FILE ../../lib/../../VHD_Lib/lib/lpp/./lpp_memory/FillFifo.vhd -library lpp
268 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/../../VHD_Lib/lib/lpp/./general_purpose/lpp_balise/APB_Balise.vhd -library lpp
268 set_global_assignment -name VHDL_FILE ../../lib/../../VHD_Lib/lib/lpp/./lpp_memory/SSRAM_plugin.vhd -library lpp
269 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/../../VHD_Lib/lib/lpp/./general_purpose/lpp_balise/lpp_balise.vhd -library lpp
269 set_global_assignment -name VHDL_FILE ../../lib/../../VHD_Lib/lib/lpp/./lpp_memory/SSRAM_plugin_vsim.vhd -library lpp
270 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/../../VHD_Lib/lib/lpp/./general_purpose/lpp_delay/APB_Delay.vhd -library lpp
270 set_global_assignment -name VHDL_FILE ../../lib/../../VHD_Lib/lib/lpp/./lpp_memory/lppFIFOxN.vhd -library lpp
271 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/../../VHD_Lib/lib/lpp/./general_purpose/lpp_delay/TimerDelay.vhd -library lpp
271 set_global_assignment -name VHDL_FILE ../../lib/../../VHD_Lib/lib/lpp/./lpp_memory/lppFIFOxN.vhd.bak -library lpp
272 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/../../VHD_Lib/lib/lpp/./general_purpose/lpp_delay/lpp_delay.vhd -library lpp
272 set_global_assignment -name VHDL_FILE ../../lib/../../VHD_Lib/lib/lpp/./lpp_memory/lpp_FIFO.vhd -library lpp
273 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/../../VHD_Lib/lib/lpp/./lfr_time_management/apb_lfr_time_management.vhd -library lpp
273 set_global_assignment -name VHDL_FILE ../../lib/../../VHD_Lib/lib/lpp/./lpp_memory/lpp_memory.vhd -library lpp
274 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/../../VHD_Lib/lib/lpp/./lfr_time_management/lfr_time_management.vhd -library lpp
274 set_global_assignment -name VHDL_FILE ../../lib/../../VHD_Lib/lib/lpp/./lpp_memory/lpp_memory.vhd.bak -library lpp
275 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/../../VHD_Lib/lib/lpp/./lfr_time_management/lpp_lfr_time_management.vhd -library lpp
275 set_global_assignment -name VHDL_FILE ../../lib/../../VHD_Lib/lib/lpp/./lpp_top_lfr/lpp_lfr.vhd -library lpp
276 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/../../VHD_Lib/lib/lpp/./lpp_ad_Conv/AD7688_drvr.vhd -library lpp
276 set_global_assignment -name VHDL_FILE ../../lib/../../VHD_Lib/lib/lpp/./lpp_top_lfr/lpp_lfr_apbreg.vhd -library lpp
277 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/../../VHD_Lib/lib/lpp/./lpp_ad_Conv/AD7688_drvr_sync.vhd -library lpp
277 set_global_assignment -name VHDL_FILE ../../lib/../../VHD_Lib/lib/lpp/./lpp_top_lfr/lpp_lfr_filter.vhd -library lpp
278 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/../../VHD_Lib/lib/lpp/./lpp_ad_Conv/AD7688_spi_if.vhd -library lpp
278 set_global_assignment -name VHDL_FILE ../../lib/../../VHD_Lib/lib/lpp/./lpp_top_lfr/lpp_lfr_ms.vhd -library lpp
279 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/../../VHD_Lib/lib/lpp/./lpp_ad_Conv/ADS1274_drvr.vhd -library lpp
279 set_global_assignment -name VHDL_FILE ../../lib/../../VHD_Lib/lib/lpp/./lpp_top_lfr/lpp_lfr_pkg.vhd -library lpp
280 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/../../VHD_Lib/lib/lpp/./lpp_ad_Conv/ADS1278_drvr.vhd -library lpp
280 set_global_assignment -name VHDL_FILE ../../lib/../../VHD_Lib/lib/lpp/./lpp_top_lfr/lpp_top_acq.vhd -library lpp
281 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/../../VHD_Lib/lib/lpp/./lpp_ad_Conv/ADS7886_drvr.vhd -library lpp
281 set_global_assignment -name VHDL_FILE ../../lib/../../VHD_Lib/lib/lpp/./lpp_top_lfr/lpp_top_acq.vhd.bak -library lpp
282 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/../../VHD_Lib/lib/lpp/./lpp_ad_Conv/RHF1401.vhd -library lpp
282 set_global_assignment -name VHDL_FILE ../../lib/../../VHD_Lib/lib/lpp/./lpp_top_lfr/lpp_top_apbreg.vhd -library lpp
283 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/../../VHD_Lib/lib/lpp/./lpp_ad_Conv/WriteGen_ADC.vhd -library lpp
283 set_global_assignment -name VHDL_FILE ../../lib/../../VHD_Lib/lib/lpp/./lpp_top_lfr/lpp_top_lfr.vhd -library lpp
284 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/../../VHD_Lib/lib/lpp/./lpp_ad_Conv/dual_ADS1278_drvr.vhd -library lpp
284 set_global_assignment -name VHDL_FILE ../../lib/../../VHD_Lib/lib/lpp/./lpp_top_lfr/lpp_top_lfr_pkg.vhd -library lpp
285 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/../../VHD_Lib/lib/lpp/./lpp_ad_Conv/lpp_ad_Conv.vhd -library lpp
285 set_global_assignment -name VHDL_FILE ../../lib/../../VHD_Lib/lib/lpp/./lpp_top_lfr/lpp_top_lfr_pkg.vhd.bak -library lpp
286 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/../../VHD_Lib/lib/lpp/./lpp_ad_Conv/lpp_apb_ad_conv.vhd -library lpp
286 set_global_assignment -name VHDL_FILE ../../lib/../../VHD_Lib/lib/lpp/./lpp_top_lfr/lpp_top_lfr_wf_picker.vhd -library lpp
287 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/../../VHD_Lib/lib/lpp/./lpp_ad_Conv/top_ad_conv.vhd -library lpp
287 set_global_assignment -name VHDL_FILE ../../lib/../../VHD_Lib/lib/lpp/./lpp_top_lfr/lpp_top_lfr_wf_picker_ip.vhd -library lpp
288 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/../../VHD_Lib/lib/lpp/./lpp_ad_Conv/top_ad_conv_RHF1401.vhd -library lpp
288 set_global_assignment -name VHDL_FILE ../../lib/../../VHD_Lib/lib/lpp/./lpp_top_lfr/lpp_top_lfr_wf_picker_ip_whitout_filter.vhd -library lpp
289 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/../../VHD_Lib/lib/lpp/./lpp_amba/APB_MULTI_DIODE.vhd -library lpp
289 set_global_assignment -name VHDL_FILE ../../lib/../../VHD_Lib/lib/lpp/./lpp_top_lfr/top_wf_picker.vhd -library lpp
290 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/../../VHD_Lib/lib/lpp/./lpp_amba/APB_SIMPLE_DIODE.vhd -library lpp
290 set_global_assignment -name VHDL_FILE ../../lib/../../VHD_Lib/lib/lpp/./lpp_uart/APB_UART.vhd -library lpp
291 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/../../VHD_Lib/lib/lpp/./lpp_amba/apb_devices_list.vhd -library lpp
291 set_global_assignment -name VHDL_FILE ../../lib/../../VHD_Lib/lib/lpp/./lpp_uart/BaudGen.vhd -library lpp
292 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/../../VHD_Lib/lib/lpp/./lpp_amba/lpp_amba.vhd -library lpp
292 set_global_assignment -name VHDL_FILE ../../lib/../../VHD_Lib/lib/lpp/./lpp_uart/Shift_REG.vhd -library lpp
293 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/../../VHD_Lib/lib/lpp/./lpp_bootloader/bootrom.vhd -library lpp
293 set_global_assignment -name VHDL_FILE ../../lib/../../VHD_Lib/lib/lpp/./lpp_uart/UART.vhd -library lpp
294 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/../../VHD_Lib/lib/lpp/./lpp_bootloader/lpp_bootloader.vhd -library lpp
294 set_global_assignment -name VHDL_FILE ../../lib/../../VHD_Lib/lib/lpp/./lpp_uart/lpp_uart.vhd -library lpp
295 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/../../VHD_Lib/lib/lpp/./lpp_bootloader/lpp_bootloader_pkg.vhd -library lpp
295 set_global_assignment -name VHDL_FILE ../../lib/../../VHD_Lib/lib/lpp/./lpp_usb/APB_USB.vhd -library lpp
296 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/../../VHD_Lib/lib/lpp/./lpp_cna/APB_CNA.vhd -library lpp
296 set_global_assignment -name VHDL_FILE ../../lib/../../VHD_Lib/lib/lpp/./lpp_usb/FX2_Driver.vhd -library lpp
297 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/../../VHD_Lib/lib/lpp/./lpp_cna/CNA_TabloC.vhd -library lpp
297 set_global_assignment -name VHDL_FILE ../../lib/../../VHD_Lib/lib/lpp/./lpp_usb/FX2_WithFIFO.vhd -library lpp
298 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/../../VHD_Lib/lib/lpp/./lpp_cna/Convertisseur_config.vhd -library lpp
298 set_global_assignment -name VHDL_FILE ../../lib/../../VHD_Lib/lib/lpp/./lpp_usb/RWbuf.vhd -library lpp
299 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/../../VHD_Lib/lib/lpp/./lpp_cna/Gene_SYNC.vhd -library lpp
299 set_global_assignment -name VHDL_FILE ../../lib/../../VHD_Lib/lib/lpp/./lpp_usb/lpp_usb.vhd -library lpp
300 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/../../VHD_Lib/lib/lpp/./lpp_cna/Serialize.vhd -library lpp
300 set_global_assignment -name VHDL_FILE ../../lib/../../VHD_Lib/lib/lpp/./lpp_waveform/lpp_waveform.vhd -library lpp
301 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/../../VHD_Lib/lib/lpp/./lpp_cna/Systeme_Clock.vhd -library lpp
301 set_global_assignment -name VHDL_FILE ../../lib/../../VHD_Lib/lib/lpp/./lpp_waveform/lpp_waveform_burst.vhd -library lpp
302 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/../../VHD_Lib/lib/lpp/./lpp_cna/lpp_cna.vhd -library lpp
302 set_global_assignment -name VHDL_FILE ../../lib/../../VHD_Lib/lib/lpp/./lpp_waveform/lpp_waveform_dma.vhd -library lpp
303 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/../../VHD_Lib/lib/lpp/./lpp_demux/DEMUX.vhd -library lpp
303 set_global_assignment -name VHDL_FILE ../../lib/../../VHD_Lib/lib/lpp/./lpp_waveform/lpp_waveform_dma_genvalid.vhd -library lpp
304 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/../../VHD_Lib/lib/lpp/./lpp_demux/lpp_demux.vhd -library lpp
304 set_global_assignment -name VHDL_FILE ../../lib/../../VHD_Lib/lib/lpp/./lpp_waveform/lpp_waveform_dma_selectaddress.vhd -library lpp
305 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/../../VHD_Lib/lib/lpp/./lpp_dma/fifo_latency_correction.vhd -library lpp
305 set_global_assignment -name VHDL_FILE ../../lib/../../VHD_Lib/lib/lpp/./lpp_waveform/lpp_waveform_dma_send_Nword.vhd -library lpp
306 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/../../VHD_Lib/lib/lpp/./lpp_dma/lpp_dma.vhd -library lpp
306 set_global_assignment -name VHDL_FILE ../../lib/../../VHD_Lib/lib/lpp/./lpp_waveform/lpp_waveform_fifo.vhd -library lpp
307 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/../../VHD_Lib/lib/lpp/./lpp_dma/lpp_dma_apbreg.vhd -library lpp
307 set_global_assignment -name VHDL_FILE ../../lib/../../VHD_Lib/lib/lpp/./lpp_waveform/lpp_waveform_fifo_arbiter.vhd -library lpp
308 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/../../VHD_Lib/lib/lpp/./lpp_dma/lpp_dma_fsm.vhd -library lpp
308 set_global_assignment -name VHDL_FILE ../../lib/../../VHD_Lib/lib/lpp/./lpp_waveform/lpp_waveform_fifo_ctrl.vhd -library lpp
309 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/../../VHD_Lib/lib/lpp/./lpp_dma/lpp_dma_ip.vhd -library lpp
309 set_global_assignment -name VHDL_FILE ../../lib/../../VHD_Lib/lib/lpp/./lpp_waveform/lpp_waveform_pkg.vhd -library lpp
310 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/../../VHD_Lib/lib/lpp/./lpp_dma/lpp_dma_pkg.vhd -library lpp
310 set_global_assignment -name VHDL_FILE ../../lib/../../VHD_Lib/lib/lpp/./lpp_waveform/lpp_waveform_snapshot.vhd -library lpp
311 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/../../VHD_Lib/lib/lpp/./lpp_dma/lpp_dma_send_16word.vhd -library lpp
311 set_global_assignment -name VHDL_FILE ../../lib/../../VHD_Lib/lib/lpp/./lpp_waveform/lpp_waveform_snapshot_controler.vhd -library lpp
312 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/../../VHD_Lib/lib/lpp/./lpp_dma/lpp_dma_send_1word.vhd -library lpp
312 set_global_assignment -name VHDL_FILE ../../lib/../../VHD_Lib/lib/lpp/./lpp_waveform/lpp_waveform_valid_ack.vhd -library lpp
313 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/../../VHD_Lib/lib/lpp/./lpp_Header/HeaderBuilder.vhd -library lpp
313 set_global_assignment -name VHDL_FILE ../../lib/../../VHD_Lib/lib/lpp/./Rocket_PCM_Encoder/MinF_Cntr.vhd -library lpp
314 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/../../VHD_Lib/lib/lpp/./lpp_Header/lpp_Header.vhd -library lpp
314 set_global_assignment -name VHDL_FILE ../../lib/../../VHD_Lib/lib/lpp/./Rocket_PCM_Encoder/Rocket_PCM_Encoder.vhd -library lpp
315 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/../../VHD_Lib/lib/lpp/./lpp_matrix/ALU_Driver.vhd -library lpp
315 set_global_assignment -name VHDL_FILE ../../lib/../../VHD_Lib/lib/lpp/./Rocket_PCM_Encoder/Serial_Driver.vhd -library lpp
316 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/../../VHD_Lib/lib/lpp/./lpp_matrix/ALU_Driver.vhd.bak -library lpp
316 set_global_assignment -name VHDL_FILE ../../lib/../../VHD_Lib/lib/lpp/./Rocket_PCM_Encoder/Serial_Driver_Multiplexor.vhd -library lpp
317 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/../../VHD_Lib/lib/lpp/./lpp_matrix/APB_Matrix.vhd -library lpp
317 set_global_assignment -name VHDL_FILE ../../lib/../../VHD_Lib/lib/lpp/./Rocket_PCM_Encoder/Word_Cntr.vhd -library lpp
318 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/../../VHD_Lib/lib/lpp/./lpp_matrix/Dispatch.vhd -library lpp
319 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/../../VHD_Lib/lib/lpp/./lpp_matrix/DriveInputs.vhd -library lpp
320 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/../../VHD_Lib/lib/lpp/./lpp_matrix/GetResult.vhd -library lpp
321 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/../../VHD_Lib/lib/lpp/./lpp_matrix/MatriceSpectrale.vhd -library lpp
322 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/../../VHD_Lib/lib/lpp/./lpp_matrix/MatriceSpectrale.vhd.bak -library lpp
323 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/../../VHD_Lib/lib/lpp/./lpp_matrix/Matrix.vhd -library lpp
324 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/../../VHD_Lib/lib/lpp/./lpp_matrix/ReUse_CTRLR.vhd -library lpp
325 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/../../VHD_Lib/lib/lpp/./lpp_matrix/SpectralMatrix.vhd -library lpp
326 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/../../VHD_Lib/lib/lpp/./lpp_matrix/SpectralMatrix.vhd.bak -library lpp
327 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/../../VHD_Lib/lib/lpp/./lpp_matrix/Starter.vhd -library lpp
328 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/../../VHD_Lib/lib/lpp/./lpp_matrix/TopMatrix_PDR.vhd -library lpp
329 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/../../VHD_Lib/lib/lpp/./lpp_matrix/TopSpecMatrix.vhd -library lpp
330 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/../../VHD_Lib/lib/lpp/./lpp_matrix/Top_MatrixSpec.vhd -library lpp
331 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/../../VHD_Lib/lib/lpp/./lpp_matrix/lpp_matrix.vhd -library lpp
332 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/../../VHD_Lib/lib/lpp/./lpp_memory/APB_FIFO.vhd -library lpp
333 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/../../VHD_Lib/lib/lpp/./lpp_memory/APB_FIFO.vhd.bak -library lpp
334 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/../../VHD_Lib/lib/lpp/./lpp_memory/FillFifo.vhd -library lpp
335 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/../../VHD_Lib/lib/lpp/./lpp_memory/SSRAM_plugin.vhd -library lpp
336 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/../../VHD_Lib/lib/lpp/./lpp_memory/SSRAM_plugin_vsim.vhd -library lpp
337 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/../../VHD_Lib/lib/lpp/./lpp_memory/lppFIFOxN.vhd -library lpp
338 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/../../VHD_Lib/lib/lpp/./lpp_memory/lppFIFOxN.vhd.bak -library lpp
339 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/../../VHD_Lib/lib/lpp/./lpp_memory/lpp_FIFO.vhd -library lpp
340 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/../../VHD_Lib/lib/lpp/./lpp_memory/lpp_memory.vhd -library lpp
341 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/../../VHD_Lib/lib/lpp/./lpp_memory/lpp_memory.vhd.bak -library lpp
342 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/../../VHD_Lib/lib/lpp/./lpp_top_lfr/lpp_lfr.vhd -library lpp
343 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/../../VHD_Lib/lib/lpp/./lpp_top_lfr/lpp_lfr_apbreg.vhd -library lpp
344 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/../../VHD_Lib/lib/lpp/./lpp_top_lfr/lpp_lfr_filter.vhd -library lpp
345 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/../../VHD_Lib/lib/lpp/./lpp_top_lfr/lpp_lfr_ms.vhd -library lpp
346 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/../../VHD_Lib/lib/lpp/./lpp_top_lfr/lpp_lfr_pkg.vhd -library lpp
347 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/../../VHD_Lib/lib/lpp/./lpp_top_lfr/lpp_top_acq.vhd -library lpp
348 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/../../VHD_Lib/lib/lpp/./lpp_top_lfr/lpp_top_acq.vhd.bak -library lpp
349 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/../../VHD_Lib/lib/lpp/./lpp_top_lfr/lpp_top_apbreg.vhd -library lpp
350 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/../../VHD_Lib/lib/lpp/./lpp_top_lfr/lpp_top_lfr.vhd -library lpp
351 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/../../VHD_Lib/lib/lpp/./lpp_top_lfr/lpp_top_lfr_pkg.vhd -library lpp
352 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/../../VHD_Lib/lib/lpp/./lpp_top_lfr/lpp_top_lfr_pkg.vhd.bak -library lpp
353 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/../../VHD_Lib/lib/lpp/./lpp_top_lfr/lpp_top_lfr_wf_picker.vhd -library lpp
354 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/../../VHD_Lib/lib/lpp/./lpp_top_lfr/lpp_top_lfr_wf_picker_ip.vhd -library lpp
355 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/../../VHD_Lib/lib/lpp/./lpp_top_lfr/lpp_top_lfr_wf_picker_ip_whitout_filter.vhd -library lpp
356 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/../../VHD_Lib/lib/lpp/./lpp_top_lfr/top_wf_picker.vhd -library lpp
357 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/../../VHD_Lib/lib/lpp/./lpp_uart/APB_UART.vhd -library lpp
358 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/../../VHD_Lib/lib/lpp/./lpp_uart/BaudGen.vhd -library lpp
359 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/../../VHD_Lib/lib/lpp/./lpp_uart/Shift_REG.vhd -library lpp
360 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/../../VHD_Lib/lib/lpp/./lpp_uart/UART.vhd -library lpp
361 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/../../VHD_Lib/lib/lpp/./lpp_uart/lpp_uart.vhd -library lpp
362 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/../../VHD_Lib/lib/lpp/./lpp_usb/APB_USB.vhd -library lpp
363 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/../../VHD_Lib/lib/lpp/./lpp_usb/FX2_Driver.vhd -library lpp
364 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/../../VHD_Lib/lib/lpp/./lpp_usb/RWbuf.vhd -library lpp
365 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/../../VHD_Lib/lib/lpp/./lpp_usb/lpp_usb.vhd -library lpp
366 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/../../VHD_Lib/lib/lpp/./lpp_waveform/lpp_waveform.vhd -library lpp
367 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/../../VHD_Lib/lib/lpp/./lpp_waveform/lpp_waveform_burst.vhd -library lpp
368 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/../../VHD_Lib/lib/lpp/./lpp_waveform/lpp_waveform_dma.vhd -library lpp
369 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/../../VHD_Lib/lib/lpp/./lpp_waveform/lpp_waveform_dma_genvalid.vhd -library lpp
370 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/../../VHD_Lib/lib/lpp/./lpp_waveform/lpp_waveform_dma_selectaddress.vhd -library lpp
371 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/../../VHD_Lib/lib/lpp/./lpp_waveform/lpp_waveform_dma_send_Nword.vhd -library lpp
372 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/../../VHD_Lib/lib/lpp/./lpp_waveform/lpp_waveform_fifo.vhd -library lpp
373 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/../../VHD_Lib/lib/lpp/./lpp_waveform/lpp_waveform_fifo_arbiter.vhd -library lpp
374 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/../../VHD_Lib/lib/lpp/./lpp_waveform/lpp_waveform_fifo_ctrl.vhd -library lpp
375 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/../../VHD_Lib/lib/lpp/./lpp_waveform/lpp_waveform_pkg.vhd -library lpp
376 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/../../VHD_Lib/lib/lpp/./lpp_waveform/lpp_waveform_snapshot.vhd -library lpp
377 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/../../VHD_Lib/lib/lpp/./lpp_waveform/lpp_waveform_snapshot_controler.vhd -library lpp
378 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/../../VHD_Lib/lib/lpp/./lpp_waveform/lpp_waveform_valid_ack.vhd -library lpp
379 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/../../VHD_Lib/lib/lpp/./Rocket_PCM_Encoder/MinF_Cntr.vhd -library lpp
380 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/../../VHD_Lib/lib/lpp/./Rocket_PCM_Encoder/Rocket_PCM_Encoder.vhd -library lpp
381 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/../../VHD_Lib/lib/lpp/./Rocket_PCM_Encoder/Serial_Driver.vhd -library lpp
382 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/../../VHD_Lib/lib/lpp/./Rocket_PCM_Encoder/Serial_Driver_Multiplexor.vhd -library lpp
383 set_global_assignment -name VHDL_FILE C:/opt/grlib-gpl-1.1.0-b4108/lib/../../VHD_Lib/lib/lpp/./Rocket_PCM_Encoder/Word_Cntr.vhd -library lpp
384 set_global_assignment -name VHDL_FILE config.vhd
318 set_global_assignment -name VHDL_FILE config.vhd
385 set_global_assignment -name VHDL_FILE ahbrom.vhd
319 set_global_assignment -name VHDL_FILE ahbrom.vhd
386 set_global_assignment -name VHDL_FILE leon3mp.vhd
320 set_global_assignment -name VHDL_FILE leon3mp.vhd
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@@ -14,2056 +14,1682
14 <version xil_pn:ise_version="11.1" xil_pn:schema_version="2"/>
14 <version xil_pn:ise_version="11.1" xil_pn:schema_version="2"/>
15
15
16 <files>
16 <files>
17 <file xil_pn:name="C:/opt/grlib-gpl-1.1.0-b4108/boards/GSE_ICI/top.ucf" xil_pn:type="FILE_UCF">
17 <file xil_pn:name="../../boards/GSE_ICI/top.ucf" xil_pn:type="FILE_UCF">
18 <association xil_pn:name="Implementation"/>
18 <association xil_pn:name="Implementation"/>
19 </file>
19 </file>
20 <file xil_pn:name="C:/opt/grlib-gpl-1.1.0-b4108/lib/grlib/stdlib/version.vhd" xil_pn:type="FILE_VHDL">
20 <file xil_pn:name="../../lib/grlib/stdlib/version.vhd" xil_pn:type="FILE_VHDL">
21 <association xil_pn:name="BehavioralSimulation"/>
21 <association xil_pn:name="BehavioralSimulation"/>
22 <association xil_pn:name="Implementation"/>
22 <association xil_pn:name="Implementation"/>
23 <library xil_pn:name="grlib"/>
23 <library xil_pn:name="grlib"/>
24 </file>
24 </file>
25 <file xil_pn:name="C:/opt/grlib-gpl-1.1.0-b4108/lib/grlib/stdlib/config.vhd" xil_pn:type="FILE_VHDL">
25 <file xil_pn:name="../../lib/grlib/stdlib/config.vhd" xil_pn:type="FILE_VHDL">
26 <association xil_pn:name="BehavioralSimulation"/>
26 <association xil_pn:name="BehavioralSimulation"/>
27 <association xil_pn:name="Implementation"/>
27 <association xil_pn:name="Implementation"/>
28 <library xil_pn:name="grlib"/>
28 <library xil_pn:name="grlib"/>
29 </file>
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1967 <file xil_pn:name="C:/opt/grlib-gpl-1.1.0-b4108/lib/../../VHD_Lib/lib/lpp/./lpp_waveform/lpp_waveform_dma_genvalid.vhd" xil_pn:type="FILE_VHDL">
1598 <file xil_pn:name="../../lib/../../VHD_Lib/lib/lpp/./lpp_waveform/lpp_waveform_dma_selectaddress.vhd" xil_pn:type="FILE_VHDL">
1968 <association xil_pn:name="BehavioralSimulation"/>
1599 <association xil_pn:name="BehavioralSimulation"/>
1969 <association xil_pn:name="Implementation"/>
1600 <association xil_pn:name="Implementation"/>
1970 <library xil_pn:name="lpp"/>
1601 <library xil_pn:name="lpp"/>
1971 </file>
1602 </file>
1972 <file xil_pn:name="C:/opt/grlib-gpl-1.1.0-b4108/lib/../../VHD_Lib/lib/lpp/./lpp_waveform/lpp_waveform_dma_selectaddress.vhd" xil_pn:type="FILE_VHDL">
1603 <file xil_pn:name="../../lib/../../VHD_Lib/lib/lpp/./lpp_waveform/lpp_waveform_dma_send_Nword.vhd" xil_pn:type="FILE_VHDL">
1973 <association xil_pn:name="BehavioralSimulation"/>
1604 <association xil_pn:name="BehavioralSimulation"/>
1974 <association xil_pn:name="Implementation"/>
1605 <association xil_pn:name="Implementation"/>
1975 <library xil_pn:name="lpp"/>
1606 <library xil_pn:name="lpp"/>
1976 </file>
1607 </file>
1977 <file xil_pn:name="C:/opt/grlib-gpl-1.1.0-b4108/lib/../../VHD_Lib/lib/lpp/./lpp_waveform/lpp_waveform_dma_send_Nword.vhd" xil_pn:type="FILE_VHDL">
1608 <file xil_pn:name="../../lib/../../VHD_Lib/lib/lpp/./lpp_waveform/lpp_waveform_fifo.vhd" xil_pn:type="FILE_VHDL">
1978 <association xil_pn:name="BehavioralSimulation"/>
1609 <association xil_pn:name="BehavioralSimulation"/>
1979 <association xil_pn:name="Implementation"/>
1610 <association xil_pn:name="Implementation"/>
1980 <library xil_pn:name="lpp"/>
1611 <library xil_pn:name="lpp"/>
1981 </file>
1612 </file>
1982 <file xil_pn:name="C:/opt/grlib-gpl-1.1.0-b4108/lib/../../VHD_Lib/lib/lpp/./lpp_waveform/lpp_waveform_fifo.vhd" xil_pn:type="FILE_VHDL">
1613 <file xil_pn:name="../../lib/../../VHD_Lib/lib/lpp/./lpp_waveform/lpp_waveform_fifo_arbiter.vhd" xil_pn:type="FILE_VHDL">
1983 <association xil_pn:name="BehavioralSimulation"/>
1614 <association xil_pn:name="BehavioralSimulation"/>
1984 <association xil_pn:name="Implementation"/>
1615 <association xil_pn:name="Implementation"/>
1985 <library xil_pn:name="lpp"/>
1616 <library xil_pn:name="lpp"/>
1986 </file>
1617 </file>
1987 <file xil_pn:name="C:/opt/grlib-gpl-1.1.0-b4108/lib/../../VHD_Lib/lib/lpp/./lpp_waveform/lpp_waveform_fifo_arbiter.vhd" xil_pn:type="FILE_VHDL">
1618 <file xil_pn:name="../../lib/../../VHD_Lib/lib/lpp/./lpp_waveform/lpp_waveform_fifo_ctrl.vhd" xil_pn:type="FILE_VHDL">
1988 <association xil_pn:name="BehavioralSimulation"/>
1619 <association xil_pn:name="BehavioralSimulation"/>
1989 <association xil_pn:name="Implementation"/>
1620 <association xil_pn:name="Implementation"/>
1990 <library xil_pn:name="lpp"/>
1621 <library xil_pn:name="lpp"/>
1991 </file>
1622 </file>
1992 <file xil_pn:name="C:/opt/grlib-gpl-1.1.0-b4108/lib/../../VHD_Lib/lib/lpp/./lpp_waveform/lpp_waveform_fifo_ctrl.vhd" xil_pn:type="FILE_VHDL">
1623 <file xil_pn:name="../../lib/../../VHD_Lib/lib/lpp/./lpp_waveform/lpp_waveform_pkg.vhd" xil_pn:type="FILE_VHDL">
1993 <association xil_pn:name="BehavioralSimulation"/>
1624 <association xil_pn:name="BehavioralSimulation"/>
1994 <association xil_pn:name="Implementation"/>
1625 <association xil_pn:name="Implementation"/>
1995 <library xil_pn:name="lpp"/>
1626 <library xil_pn:name="lpp"/>
1996 </file>
1627 </file>
1997 <file xil_pn:name="C:/opt/grlib-gpl-1.1.0-b4108/lib/../../VHD_Lib/lib/lpp/./lpp_waveform/lpp_waveform_pkg.vhd" xil_pn:type="FILE_VHDL">
1628 <file xil_pn:name="../../lib/../../VHD_Lib/lib/lpp/./lpp_waveform/lpp_waveform_snapshot.vhd" xil_pn:type="FILE_VHDL">
1998 <association xil_pn:name="BehavioralSimulation"/>
1629 <association xil_pn:name="BehavioralSimulation"/>
1999 <association xil_pn:name="Implementation"/>
1630 <association xil_pn:name="Implementation"/>
2000 <library xil_pn:name="lpp"/>
1631 <library xil_pn:name="lpp"/>
2001 </file>
1632 </file>
2002 <file xil_pn:name="C:/opt/grlib-gpl-1.1.0-b4108/lib/../../VHD_Lib/lib/lpp/./lpp_waveform/lpp_waveform_snapshot.vhd" xil_pn:type="FILE_VHDL">
1633 <file xil_pn:name="../../lib/../../VHD_Lib/lib/lpp/./lpp_waveform/lpp_waveform_snapshot_controler.vhd" xil_pn:type="FILE_VHDL">
2003 <association xil_pn:name="BehavioralSimulation"/>
1634 <association xil_pn:name="BehavioralSimulation"/>
2004 <association xil_pn:name="Implementation"/>
1635 <association xil_pn:name="Implementation"/>
2005 <library xil_pn:name="lpp"/>
1636 <library xil_pn:name="lpp"/>
2006 </file>
1637 </file>
2007 <file xil_pn:name="C:/opt/grlib-gpl-1.1.0-b4108/lib/../../VHD_Lib/lib/lpp/./lpp_waveform/lpp_waveform_snapshot_controler.vhd" xil_pn:type="FILE_VHDL">
1638 <file xil_pn:name="../../lib/../../VHD_Lib/lib/lpp/./lpp_waveform/lpp_waveform_valid_ack.vhd" xil_pn:type="FILE_VHDL">
2008 <association xil_pn:name="BehavioralSimulation"/>
1639 <association xil_pn:name="BehavioralSimulation"/>
2009 <association xil_pn:name="Implementation"/>
1640 <association xil_pn:name="Implementation"/>
2010 <library xil_pn:name="lpp"/>
1641 <library xil_pn:name="lpp"/>
2011 </file>
1642 </file>
2012 <file xil_pn:name="C:/opt/grlib-gpl-1.1.0-b4108/lib/../../VHD_Lib/lib/lpp/./lpp_waveform/lpp_waveform_valid_ack.vhd" xil_pn:type="FILE_VHDL">
1643 <file xil_pn:name="../../lib/../../VHD_Lib/lib/lpp/./Rocket_PCM_Encoder/MinF_Cntr.vhd" xil_pn:type="FILE_VHDL">
2013 <association xil_pn:name="BehavioralSimulation"/>
1644 <association xil_pn:name="BehavioralSimulation"/>
2014 <association xil_pn:name="Implementation"/>
1645 <association xil_pn:name="Implementation"/>
2015 <library xil_pn:name="lpp"/>
1646 <library xil_pn:name="lpp"/>
2016 </file>
1647 </file>
2017 <file xil_pn:name="C:/opt/grlib-gpl-1.1.0-b4108/lib/../../VHD_Lib/lib/lpp/./Rocket_PCM_Encoder/MinF_Cntr.vhd" xil_pn:type="FILE_VHDL">
1648 <file xil_pn:name="../../lib/../../VHD_Lib/lib/lpp/./Rocket_PCM_Encoder/Rocket_PCM_Encoder.vhd" xil_pn:type="FILE_VHDL">
2018 <association xil_pn:name="BehavioralSimulation"/>
1649 <association xil_pn:name="BehavioralSimulation"/>
2019 <association xil_pn:name="Implementation"/>
1650 <association xil_pn:name="Implementation"/>
2020 <library xil_pn:name="lpp"/>
1651 <library xil_pn:name="lpp"/>
2021 </file>
1652 </file>
2022 <file xil_pn:name="C:/opt/grlib-gpl-1.1.0-b4108/lib/../../VHD_Lib/lib/lpp/./Rocket_PCM_Encoder/Rocket_PCM_Encoder.vhd" xil_pn:type="FILE_VHDL">
1653 <file xil_pn:name="../../lib/../../VHD_Lib/lib/lpp/./Rocket_PCM_Encoder/Serial_Driver.vhd" xil_pn:type="FILE_VHDL">
2023 <association xil_pn:name="BehavioralSimulation"/>
1654 <association xil_pn:name="BehavioralSimulation"/>
2024 <association xil_pn:name="Implementation"/>
1655 <association xil_pn:name="Implementation"/>
2025 <library xil_pn:name="lpp"/>
1656 <library xil_pn:name="lpp"/>
2026 </file>
1657 </file>
2027 <file xil_pn:name="C:/opt/grlib-gpl-1.1.0-b4108/lib/../../VHD_Lib/lib/lpp/./Rocket_PCM_Encoder/Serial_Driver.vhd" xil_pn:type="FILE_VHDL">
1658 <file xil_pn:name="../../lib/../../VHD_Lib/lib/lpp/./Rocket_PCM_Encoder/Serial_Driver_Multiplexor.vhd" xil_pn:type="FILE_VHDL">
2028 <association xil_pn:name="BehavioralSimulation"/>
1659 <association xil_pn:name="BehavioralSimulation"/>
2029 <association xil_pn:name="Implementation"/>
1660 <association xil_pn:name="Implementation"/>
2030 <library xil_pn:name="lpp"/>
1661 <library xil_pn:name="lpp"/>
2031 </file>
1662 </file>
2032 <file xil_pn:name="C:/opt/grlib-gpl-1.1.0-b4108/lib/../../VHD_Lib/lib/lpp/./Rocket_PCM_Encoder/Serial_Driver_Multiplexor.vhd" xil_pn:type="FILE_VHDL">
1663 <file xil_pn:name="../../lib/../../VHD_Lib/lib/lpp/./Rocket_PCM_Encoder/Word_Cntr.vhd" xil_pn:type="FILE_VHDL">
2033 <association xil_pn:name="BehavioralSimulation"/>
2034 <association xil_pn:name="Implementation"/>
2035 <library xil_pn:name="lpp"/>
2036 </file>
2037 <file xil_pn:name="C:/opt/grlib-gpl-1.1.0-b4108/lib/../../VHD_Lib/lib/lpp/./Rocket_PCM_Encoder/Word_Cntr.vhd" xil_pn:type="FILE_VHDL">
2038 <association xil_pn:name="BehavioralSimulation"/>
1664 <association xil_pn:name="BehavioralSimulation"/>
2039 <association xil_pn:name="Implementation"/>
1665 <association xil_pn:name="Implementation"/>
2040 <library xil_pn:name="lpp"/>
1666 <library xil_pn:name="lpp"/>
2041 </file>
1667 </file>
2042 <file xil_pn:name="C:/opt/grlib-gpl-1.1.0-b4108/lib/cypress/ssram/components.vhd" xil_pn:type="FILE_VHDL">
1668 <file xil_pn:name="../../lib/cypress/ssram/components.vhd" xil_pn:type="FILE_VHDL">
2043 <association xil_pn:name="BehavioralSimulation"/>
1669 <association xil_pn:name="BehavioralSimulation"/>
2044 <library xil_pn:name="cypress"/>
1670 <library xil_pn:name="cypress"/>
2045 </file>
1671 </file>
2046 <file xil_pn:name="C:/opt/grlib-gpl-1.1.0-b4108/lib/cypress/ssram/package_utility.vhd" xil_pn:type="FILE_VHDL">
1672 <file xil_pn:name="../../lib/cypress/ssram/package_utility.vhd" xil_pn:type="FILE_VHDL">
2047 <association xil_pn:name="BehavioralSimulation"/>
1673 <association xil_pn:name="BehavioralSimulation"/>
2048 <library xil_pn:name="cypress"/>
1674 <library xil_pn:name="cypress"/>
2049 </file>
1675 </file>
2050 <file xil_pn:name="C:/opt/grlib-gpl-1.1.0-b4108/lib/cypress/ssram/cy7c1354b.vhd" xil_pn:type="FILE_VHDL">
1676 <file xil_pn:name="../../lib/cypress/ssram/cy7c1354b.vhd" xil_pn:type="FILE_VHDL">
2051 <association xil_pn:name="BehavioralSimulation"/>
1677 <association xil_pn:name="BehavioralSimulation"/>
2052 <library xil_pn:name="cypress"/>
1678 <library xil_pn:name="cypress"/>
2053 </file>
1679 </file>
2054 <file xil_pn:name="C:/opt/grlib-gpl-1.1.0-b4108/lib/cypress/ssram/cy7c1380d.vhd" xil_pn:type="FILE_VHDL">
1680 <file xil_pn:name="../../lib/cypress/ssram/cy7c1380d.vhd" xil_pn:type="FILE_VHDL">
2055 <association xil_pn:name="BehavioralSimulation"/>
1681 <association xil_pn:name="BehavioralSimulation"/>
2056 <library xil_pn:name="cypress"/>
1682 <library xil_pn:name="cypress"/>
2057 </file>
1683 </file>
2058 <file xil_pn:name="C:/opt/grlib-gpl-1.1.0-b4108/lib/work/debug/debug.vhd" xil_pn:type="FILE_VHDL">
1684 <file xil_pn:name="../../lib/work/debug/debug.vhd" xil_pn:type="FILE_VHDL">
2059 <association xil_pn:name="BehavioralSimulation"/>
1685 <association xil_pn:name="BehavioralSimulation"/>
2060 <library xil_pn:name="work"/>
1686 <library xil_pn:name="work"/>
2061 </file>
1687 </file>
2062 <file xil_pn:name="C:/opt/grlib-gpl-1.1.0-b4108/lib/work/debug/grtestmod.vhd" xil_pn:type="FILE_VHDL">
1688 <file xil_pn:name="../../lib/work/debug/grtestmod.vhd" xil_pn:type="FILE_VHDL">
2063 <association xil_pn:name="BehavioralSimulation"/>
1689 <association xil_pn:name="BehavioralSimulation"/>
2064 <library xil_pn:name="work"/>
1690 <library xil_pn:name="work"/>
2065 </file>
1691 </file>
2066 <file xil_pn:name="C:/opt/grlib-gpl-1.1.0-b4108/lib/work/debug/cpu_disas.vhd" xil_pn:type="FILE_VHDL">
1692 <file xil_pn:name="../../lib/work/debug/cpu_disas.vhd" xil_pn:type="FILE_VHDL">
2067 <association xil_pn:name="BehavioralSimulation"/>
1693 <association xil_pn:name="BehavioralSimulation"/>
2068 <library xil_pn:name="work"/>
1694 <library xil_pn:name="work"/>
2069 </file>
1695 </file>
@@ -2096,7 +1722,7
2096 <property xil_pn:name="FSM Encoding Algorithm" xil_pn:value="None"/>
1722 <property xil_pn:name="FSM Encoding Algorithm" xil_pn:value="None"/>
2097 <property xil_pn:name="Implementation Top" xil_pn:value="Architecture|top|rtl"/>
1723 <property xil_pn:name="Implementation Top" xil_pn:value="Architecture|top|rtl"/>
2098 <property xil_pn:name="Implementation Top Instance Path" xil_pn:value="/top"/>
1724 <property xil_pn:name="Implementation Top Instance Path" xil_pn:value="/top"/>
2099 <property xil_pn:name="Macro Search Path" xil_pn:value="C:/opt/grlib-gpl-1.1.0-b4108/netlists/xilinx/PROASIC3"/>
1725 <property xil_pn:name="Macro Search Path" xil_pn:value="../../netlists/xilinx/PROASIC3"/>
2100 <property xil_pn:name="Other Map Command Line Options" xil_pn:value=""/>
1726 <property xil_pn:name="Other Map Command Line Options" xil_pn:value=""/>
2101 <property xil_pn:name="Other XST Command Line Options" xil_pn:value=""/>
1727 <property xil_pn:name="Other XST Command Line Options" xil_pn:value=""/>
2102 <property xil_pn:name="Place &amp; Route Effort Level (Overall)" xil_pn:value="high"/>
1728 <property xil_pn:name="Place &amp; Route Effort Level (Overall)" xil_pn:value="high"/>
@@ -2121,14 +1747,8
2121 <library xil_pn:name="dware"/>
1747 <library xil_pn:name="dware"/>
2122 <library xil_pn:name="synplify"/>
1748 <library xil_pn:name="synplify"/>
2123 <library xil_pn:name="techmap"/>
1749 <library xil_pn:name="techmap"/>
2124 <library xil_pn:name="spw"/>
2125 <library xil_pn:name="eth"/>
2126 <library xil_pn:name="opencores"/>
1750 <library xil_pn:name="opencores"/>
2127 <library xil_pn:name="gaisler"/>
1751 <library xil_pn:name="gaisler"/>
2128 <library xil_pn:name="esa"/>
2129 <library xil_pn:name="fmf"/>
2130 <library xil_pn:name="spansion"/>
2131 <library xil_pn:name="gsi"/>
2132 <library xil_pn:name="lpp"/>
1752 <library xil_pn:name="lpp"/>
2133 <library xil_pn:name="cypress"/>
1753 <library xil_pn:name="cypress"/>
2134 <library xil_pn:name="work"/>
1754 <library xil_pn:name="work"/>
@@ -72,6 +72,29 generic (
72 );
72 );
73 end component;
73 end component;
74
74
75 component FIFO_pipeline is
76 generic(
77 tech : integer := 0;
78 Mem_use : integer := use_RAM;
79 fifoCount : integer range 2 to 32 := 8;
80 DataSz : integer range 1 to 32 := 8;
81 abits : integer range 2 to 12 := 8
82 );
83 port(
84 rstn : in std_logic;
85 ReUse : in std_logic;
86 rclk : in std_logic;
87 ren : in std_logic;
88 rdata : out std_logic_vector(DataSz-1 downto 0);
89 empty : out std_logic;
90 raddr : out std_logic_vector(abits-1 downto 0);
91 wclk : in std_logic;
92 wen : in std_logic;
93 wdata : in std_logic_vector(DataSz-1 downto 0);
94 full : out std_logic;
95 waddr : out std_logic_vector(abits-1 downto 0)
96 );
97 end component;
75
98
76 component lpp_fifo is
99 component lpp_fifo is
77 generic(
100 generic(
@@ -1,5 +1,6
1 APB_FIFO.vhd
1 APB_FIFO.vhd
2 APB_FIFO.vhd.bak
2 APB_FIFO.vhd.bak
3 FIFO_pipeline.vhd
3 FillFifo.vhd
4 FillFifo.vhd
4 SSRAM_plugin.vhd
5 SSRAM_plugin.vhd
5 SSRAM_plugin_vsim.vhd
6 SSRAM_plugin_vsim.vhd
@@ -53,7 +53,7 end component;
53 component FX2_WithFIFO is
53 component FX2_WithFIFO is
54 generic(
54 generic(
55 tech : integer := 0;
55 tech : integer := 0;
56 Mem_use : integer := use_RAM;
56 Mem_use : integer := 0;
57 Enable_ReUse : std_logic := '0'
57 Enable_ReUse : std_logic := '0'
58 );
58 );
59 port(
59 port(
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