HG_REPOSITORIES/LPP/INSTRUMENTATION/USERS/PELLION/VHD_Lib Files · designs/EGSE_ICI/smartgen/smartgen.aws

Added simple FX2LP driver to write in endpoint 6 in 8 bit mode.

Alexis Jeandet - - Load All Authors

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<?xml version="1.0" encoding="UTF-8" standalone="no" ?><workspace xmlns="http://actel.com/sweng/afi"><name>smartgen</name><netlistFormat>VHDL</netlistFormat><reports><resource select="T"/></reports><subproject libero="T"/><hdltype>VHDL</hdltype><device die="IT10X10M3" family="ProASIC3E" package="pq208"/><componentInstances/><SmartGen version="8.0"/></workspace>

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