HG_REPOSITORIES/LPP/INSTRUMENTATION/USERS/PELLION/VHD_Lib Files · designs/EGSE_ICI/simulation/modelsim.ini.sav

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HG_REPOSITORIES » LPP » INSTRUMENTATION » USERS » PELLION » VHD_Lib

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Clone from http://pc-instru.lpp.polytechnique.fr:5000/VHD_Lib

Added simple FX2LP driver to write in endpoint 6 in 8 bit mode.

Alexis Jeandet - - Load All Authors

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/ designs / EGSE_ICI / simulation / modelsim.ini.sav

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				[Library]
				others = $MODEL_TECH/../modelsim.ini

				proasic3e = C:/Actel/Libero_v9.1/Designer/lib/modelsim/precompiled/vhdl/proasic3e


				syncad_vhdl_lib = C:\Actel\Libero_v9.1\Designer/lib/actel/syncad_vhdl_lib

				[vcom]
				VHDL93 = 1

				[vsim]
				IterationLimit = 5000

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