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Added lfr_output_save module in lpp_sim lib :...
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r688:c0c43c9d60f1 tip Simu-LFR-FM draft
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1 LIBRARY ieee;
2 USE ieee.std_logic_1164.ALL;
3 USE ieee.numeric_std.ALL;
4
5 LIBRARY std;
6 USE std.textio.ALL;
7
8 ENTITY lfr_output_save IS
9 GENERIC(
10 FNAME : STRING := "output.txt"
11 );
12 PORT(
13 end_of_simu : IN STD_LOGIC;
14 timestamp : IN integer;
15
16 -- DAC --------------------------------------------------------------------
17 DAC_SDO : in STD_LOGIC;
18 DAC_SCK : in STD_LOGIC;
19 DAC_SYNC : in STD_LOGIC;
20 DAC_CAL_EN : in STD_LOGIC;
21 -- BIAS_FAIL --------------------------------------------------------------
22 bias_fail_sw : in STD_LOGIC
23 );
24 END lfr_output_save;
25
26 ARCHITECTURE beh OF lfr_output_save IS
27
28 FILE output_file : TEXT OPEN write_mode IS FNAME;
29
30 SIGNAL CAL_VALUE_data_v : STD_LOGIC_VECTOR(15 DOWNTO 0) := (OTHERS => '0');
31 SIGNAL CAL_VALUE_valid_v : STD_LOGIC_VECTOR(16 DOWNTO 0) := (OTHERS => '0');
32
33 SIGNAL CAL_VALUE_data : STD_LOGIC_VECTOR(15 DOWNTO 0);
34
35 BEGIN
36
37 -----------------------------------------------------------------------------
38 -- Data orginization in the output file :
39 -----------------------------------------------------------------------------
40 -- Exemple of output.txt file :
41 -- TIME CAL_VALUE CAL_ENABLE BIAS_FAIL_VALUE
42 -- TIME CAL_VALUE CAL_ENABLE BIAS_FAIL_VALUE
43 -----------------------------------------------------------------------------
44 -- TIME : integer. Current time (in ns)
45 -- others : integer(0 to 255). Current value.
46 -----------------------------------------------------------------------------
47
48
49
50 -----------------------------------------------------------------------------
51 -- DAC : SPI to Parralel
52 PROCESS (DAC_SCK) IS
53 BEGIN -- PROCESS
54 IF DAC_SCK'event AND DAC_SCK = '1' THEN -- rising clock edge
55 CAL_VALUE_valid_v(0) <= '0';
56 CAL_VALUE_valid_v(16 DOWNTO 1) <= CAL_VALUE_valid_v(15 DOWNTO 0);
57 IF DAC_SYNC = '1' THEN
58 CAL_VALUE_valid_v(0) <= '1';
59 END IF;
60 CAL_VALUE_data_v(15 DOWNTO 0) <= CAL_VALUE_data_v(14 DOWNTO 0) & DAC_SDO;
61 END IF;
62 END PROCESS;
63
64 CAL_VALUE_data <= CAL_VALUE_data_v WHEN CAL_VALUE_valid_v(16) = '1';
65 -----------------------------------------------------------------------------
66
67
68
69 -----------------------------------------------------------------------------
70 --
71 PROCESS(end_of_simu, CAL_VALUE_data, DAC_CAL_EN, bias_fail_sw)
72 VARIABLE line_var : LINE;
73 BEGIN
74 IF end_of_simu = '1' THEN
75 file_close(output_file);
76 ELSE
77 write(line_var, INTEGER'IMAGE(timestamp));
78 write(line_var," " & INTEGER'IMAGE(to_integer(UNSIGNED(CAL_VALUE_data))));
79 write(line_var," " & STD_LOGIC'IMAGE(DAC_CAL_EN));
80 write(line_var," " & STD_LOGIC'IMAGE(bias_fail_sw));
81 writeline(output_file, line_var);
82 END IF;
83 END PROCESS;
84
85 END beh;
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1 VHDLIB=../..
2 SCRIPTSDIR=$(VHDLIB)/scripts/
3 GRLIB := $(shell sh $(VHDLIB)/scripts/lpp_relpath.sh)
4 TOP=testbench
5 BOARD=LFR-FM
6 include $(VHDLIB)/boards/$(BOARD)/Makefile_RTAX.inc
7 DEVICE=$(PART)-$(PACKAGE)$(SPEED)
8 UCF=
9 QSF=
10 EFFORT=high
11 XSTOPT=
12 SYNPOPT=
13 VHDLSYNFILES=
14 VHDLSIMFILES= tb.vhd
15 SIMTOP=testbench
16 CLEAN=soft-clean
17
18 TECHLIBS = axcelerator
19
20
21 LIBSKIP = tmtc openchip hynix cypress ihp usbhc fmf gsi spansion eth micron
22
23 DIRSKIP = leon2 leon2ft crypto usb satcan ddr greth grusbhc \
24 leon4 leon4v0 l2cache iommu slink ascs pwm net spi can \
25 ./amba_lcd_16x2_ctrlr \
26 ./general_purpose/lpp_AMR \
27 ./general_purpose/lpp_balise \
28 ./general_purpose/lpp_delay \
29 ./lpp_bootloader \
30 ./lpp_uart \
31 ./lpp_usb \
32 ./lpp_debug_lfr \
33 ./dsp/lpp_fft
34
35 FILESKIP = i2cmst.vhd \
36 APB_MULTI_DIODE.vhd \
37 APB_MULTI_DIODE.vhd \
38 Top_MatrixSpec.vhd \
39 APB_FFT.vhd \
40 lpp_lfr_sim_pkg.vhd
41
42 include $(GRLIB)/bin/Makefile
43 include $(GRLIB)/software/leon3/Makefile
44 ################## project specific targets ##########################
45 distclean:myclean
46
47 myclean:
48 rm -f input.txt output_fx.txt *.log
49 rm -rf ./2016*
50
51 test: | ghdl ghdl-run archivate
52
53
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1 10 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
2 110 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 0
3 110 2 3 4 5 6 7 8 9 10 11 12 13 14 15 0 1
4 110 3 4 5 6 7 8 9 10 11 12 13 14 15 0 1 2
5 110 4 5 6 7 8 9 10 11 12 13 14 15 0 1 2 3
6 110 5 6 7 8 9 10 11 12 13 14 15 0 1 2 3 4
7 110 6 7 8 9 10 11 12 13 14 15 0 1 2 3 4 5
8 110 7 8 9 10 11 12 13 14 15 0 1 2 3 4 5 6
9 110 8 9 10 11 12 13 14 15 0 1 2 3 4 5 6 7
10 110 9 10 11 12 13 14 15 0 1 2 3 4 5 6 7 8
11 110 10 11 12 13 14 15 0 1 2 3 4 5 6 7 8 9
12 110 11 12 13 14 15 0 1 2 3 4 5 6 7 8 9 10
13 110 12 13 14 15 0 1 2 3 4 5 6 7 8 9 10 11
14 110 13 14 15 0 1 2 3 4 5 6 7 8 9 10 11 12
15 110 14 15 0 1 2 3 4 5 6 7 8 9 10 11 12 13
16 110 15 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14
17 110 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
18 110 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 0
19 110 2 3 4 5 6 7 8 9 10 11 12 13 14 15 0 1
20 110 3 4 5 6 7 8 9 10 11 12 13 14 15 0 1 2
21 110 4 5 6 7 8 9 10 11 12 13 14 15 0 1 2 3
22 110 5 6 7 8 9 10 11 12 13 14 15 0 1 2 3 4
23 110 6 7 8 9 10 11 12 13 14 15 0 1 2 3 4 5
24 110 7 8 9 10 11 12 13 14 15 0 1 2 3 4 5 6
25 110 8 9 10 11 12 13 14 15 0 1 2 3 4 5 6 7
26 110 9 10 11 12 13 14 15 0 1 2 3 4 5 6 7 8
27 110 10 11 12 13 14 15 0 1 2 3 4 5 6 7 8 9
28 110 11 12 13 14 15 0 1 2 3 4 5 6 7 8 9 10
29 110 12 13 14 15 0 1 2 3 4 5 6 7 8 9 10 11
30 110 13 14 15 0 1 2 3 4 5 6 7 8 9 10 11 12
31 110 14 15 0 1 2 3 4 5 6 7 8 9 10 11 12 13
32 110 15 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14
33 110 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
34 110 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 0
35 110 2 3 4 5 6 7 8 9 10 11 12 13 14 15 0 1
36 110 3 4 5 6 7 8 9 10 11 12 13 14 15 0 1 2
37 110 4 5 6 7 8 9 10 11 12 13 14 15 0 1 2 3
38 110 5 6 7 8 9 10 11 12 13 14 15 0 1 2 3 4
39 110 6 7 8 9 10 11 12 13 14 15 0 1 2 3 4 5
40 110 7 8 9 10 11 12 13 14 15 0 1 2 3 4 5 6
41 110 8 9 10 11 12 13 14 15 0 1 2 3 4 5 6 7
42 110 9 10 11 12 13 14 15 0 1 2 3 4 5 6 7 8
43 110 10 11 12 13 14 15 0 1 2 3 4 5 6 7 8 9
44 110 11 12 13 14 15 0 1 2 3 4 5 6 7 8 9 10
45 110 12 13 14 15 0 1 2 3 4 5 6 7 8 9 10 11
46 110 13 14 15 0 1 2 3 4 5 6 7 8 9 10 11 12
47 110 14 15 0 1 2 3 4 5 6 7 8 9 10 11 12 13
48 110 15 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14
49 110 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
50 110 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 0
51 110 2 3 4 5 6 7 8 9 10 11 12 13 14 15 0 1
52 110 3 4 5 6 7 8 9 10 11 12 13 14 15 0 1 2
53 110 4 5 6 7 8 9 10 11 12 13 14 15 0 1 2 3
54 110 5 6 7 8 9 10 11 12 13 14 15 0 1 2 3 4
55 110 6 7 8 9 10 11 12 13 14 15 0 1 2 3 4 5
56 110 7 8 9 10 11 12 13 14 15 0 1 2 3 4 5 6
57 110 8 9 10 11 12 13 14 15 0 1 2 3 4 5 6 7
58 110 9 10 11 12 13 14 15 0 1 2 3 4 5 6 7 8
59 110 10 11 12 13 14 15 0 1 2 3 4 5 6 7 8 9
60 110 11 12 13 14 15 0 1 2 3 4 5 6 7 8 9 10
61 110 12 13 14 15 0 1 2 3 4 5 6 7 8 9 10 11
62 110 13 14 15 0 1 2 3 4 5 6 7 8 9 10 11 12
63 110 14 15 0 1 2 3 4 5 6 7 8 9 10 11 12 13
64 110 15 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14
65 110 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
66 110 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 0
67 110 2 3 4 5 6 7 8 9 10 11 12 13 14 15 0 1
68 110 3 4 5 6 7 8 9 10 11 12 13 14 15 0 1 2
69 110 4 5 6 7 8 9 10 11 12 13 14 15 0 1 2 3
70 110 5 6 7 8 9 10 11 12 13 14 15 0 1 2 3 4
71 110 6 7 8 9 10 11 12 13 14 15 0 1 2 3 4 5
72 110 7 8 9 10 11 12 13 14 15 0 1 2 3 4 5 6
73 110 8 9 10 11 12 13 14 15 0 1 2 3 4 5 6 7
74 110 9 10 11 12 13 14 15 0 1 2 3 4 5 6 7 8
75 110 10 11 12 13 14 15 0 1 2 3 4 5 6 7 8 9
76 110 11 12 13 14 15 0 1 2 3 4 5 6 7 8 9 10
77 110 12 13 14 15 0 1 2 3 4 5 6 7 8 9 10 11
78 110 13 14 15 0 1 2 3 4 5 6 7 8 9 10 11 12
79 110 14 15 0 1 2 3 4 5 6 7 8 9 10 11 12 13
80 110 15 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14
81 110 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
82 110 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 0
83 110 2 3 4 5 6 7 8 9 10 11 12 13 14 15 0 1
84 110 3 4 5 6 7 8 9 10 11 12 13 14 15 0 1 2
85 110 4 5 6 7 8 9 10 11 12 13 14 15 0 1 2 3
86 110 5 6 7 8 9 10 11 12 13 14 15 0 1 2 3 4
87 110 6 7 8 9 10 11 12 13 14 15 0 1 2 3 4 5
88 110 7 8 9 10 11 12 13 14 15 0 1 2 3 4 5 6
89 110 8 9 10 11 12 13 14 15 0 1 2 3 4 5 6 7
90 110 9 10 11 12 13 14 15 0 1 2 3 4 5 6 7 8
91 110 10 11 12 13 14 15 0 1 2 3 4 5 6 7 8 9
92 110 11 12 13 14 15 0 1 2 3 4 5 6 7 8 9 10
93 110 12 13 14 15 0 1 2 3 4 5 6 7 8 9 10 11
94 110 13 14 15 0 1 2 3 4 5 6 7 8 9 10 11 12
95 110 14 15 0 1 2 3 4 5 6 7 8 9 10 11 12 13
96 110 15 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14
97 110 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
98 110 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 0
99 110 2 3 4 5 6 7 8 9 10 11 12 13 14 15 0 1
100 110 3 4 5 6 7 8 9 10 11 12 13 14 15 0 1 2
101 110 4 5 6 7 8 9 10 11 12 13 14 15 0 1 2 3
102 110 5 6 7 8 9 10 11 12 13 14 15 0 1 2 3 4
103 110 6 7 8 9 10 11 12 13 14 15 0 1 2 3 4 5
104 110 7 8 9 10 11 12 13 14 15 0 1 2 3 4 5 6
105 110 8 9 10 11 12 13 14 15 0 1 2 3 4 5 6 7
106 110 9 10 11 12 13 14 15 0 1 2 3 4 5 6 7 8
107 110 10 11 12 13 14 15 0 1 2 3 4 5 6 7 8 9
108 110 11 12 13 14 15 0 1 2 3 4 5 6 7 8 9 10
109 110 12 13 14 15 0 1 2 3 4 5 6 7 8 9 10 11
110 110 13 14 15 0 1 2 3 4 5 6 7 8 9 10 11 12
111 110 14 15 0 1 2 3 4 5 6 7 8 9 10 11 12 13
112 110 15 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14
113 110 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
114 110 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 0
115 110 2 3 4 5 6 7 8 9 10 11 12 13 14 15 0 1
116 110 3 4 5 6 7 8 9 10 11 12 13 14 15 0 1 2
117 110 4 5 6 7 8 9 10 11 12 13 14 15 0 1 2 3
118 110 5 6 7 8 9 10 11 12 13 14 15 0 1 2 3 4
119 110 6 7 8 9 10 11 12 13 14 15 0 1 2 3 4 5
120 110 7 8 9 10 11 12 13 14 15 0 1 2 3 4 5 6
121 110 8 9 10 11 12 13 14 15 0 1 2 3 4 5 6 7
122 110 9 10 11 12 13 14 15 0 1 2 3 4 5 6 7 8
123 110 10 11 12 13 14 15 0 1 2 3 4 5 6 7 8 9
124 110 11 12 13 14 15 0 1 2 3 4 5 6 7 8 9 10
125 110 12 13 14 15 0 1 2 3 4 5 6 7 8 9 10 11
126 110 13 14 15 0 1 2 3 4 5 6 7 8 9 10 11 12
127 110 14 15 0 1 2 3 4 5 6 7 8 9 10 11 12 13
128 110 15 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14
129 110 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
130 110 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 0
131 110 2 3 4 5 6 7 8 9 10 11 12 13 14 15 0 1
132 110 3 4 5 6 7 8 9 10 11 12 13 14 15 0 1 2
133 110 4 5 6 7 8 9 10 11 12 13 14 15 0 1 2 3
134 110 5 6 7 8 9 10 11 12 13 14 15 0 1 2 3 4
135 110 6 7 8 9 10 11 12 13 14 15 0 1 2 3 4 5
136 110 7 8 9 10 11 12 13 14 15 0 1 2 3 4 5 6
137 110 8 9 10 11 12 13 14 15 0 1 2 3 4 5 6 7
138 110 9 10 11 12 13 14 15 0 1 2 3 4 5 6 7 8
139 110 10 11 12 13 14 15 0 1 2 3 4 5 6 7 8 9
140 110 11 12 13 14 15 0 1 2 3 4 5 6 7 8 9 10
141 110 12 13 14 15 0 1 2 3 4 5 6 7 8 9 10 11
142 110 13 14 15 0 1 2 3 4 5 6 7 8 9 10 11 12
143 110 14 15 0 1 2 3 4 5 6 7 8 9 10 11 12 13
144 110 15 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14
145 110 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
146 110 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 0
147 110 2 3 4 5 6 7 8 9 10 11 12 13 14 15 0 1
148 110 3 4 5 6 7 8 9 10 11 12 13 14 15 0 1 2
149 110 4 5 6 7 8 9 10 11 12 13 14 15 0 1 2 3
150 110 5 6 7 8 9 10 11 12 13 14 15 0 1 2 3 4
151 110 6 7 8 9 10 11 12 13 14 15 0 1 2 3 4 5
152 110 7 8 9 10 11 12 13 14 15 0 1 2 3 4 5 6
153 110 8 9 10 11 12 13 14 15 0 1 2 3 4 5 6 7
154 110 9 10 11 12 13 14 15 0 1 2 3 4 5 6 7 8
155 110 10 11 12 13 14 15 0 1 2 3 4 5 6 7 8 9
156 110 11 12 13 14 15 0 1 2 3 4 5 6 7 8 9 10
157 110 12 13 14 15 0 1 2 3 4 5 6 7 8 9 10 11
158 110 13 14 15 0 1 2 3 4 5 6 7 8 9 10 11 12
159 110 14 15 0 1 2 3 4 5 6 7 8 9 10 11 12 13
160 110 15 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14
161 110 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
162 110 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 0
163 110 2 3 4 5 6 7 8 9 10 11 12 13 14 15 0 1
164 110 3 4 5 6 7 8 9 10 11 12 13 14 15 0 1 2
165 110 4 5 6 7 8 9 10 11 12 13 14 15 0 1 2 3
166 110 5 6 7 8 9 10 11 12 13 14 15 0 1 2 3 4
167 110 6 7 8 9 10 11 12 13 14 15 0 1 2 3 4 5
168 110 7 8 9 10 11 12 13 14 15 0 1 2 3 4 5 6
169 110 8 9 10 11 12 13 14 15 0 1 2 3 4 5 6 7
170 110 9 10 11 12 13 14 15 0 1 2 3 4 5 6 7 8
171 110 10 11 12 13 14 15 0 1 2 3 4 5 6 7 8 9
172 110 11 12 13 14 15 0 1 2 3 4 5 6 7 8 9 10
173 110 12 13 14 15 0 1 2 3 4 5 6 7 8 9 10 11
174 110 13 14 15 0 1 2 3 4 5 6 7 8 9 10 11 12
175 110 14 15 0 1 2 3 4 5 6 7 8 9 10 11 12 13
176 110 15 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14
177 110 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
178 110 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 0
179 110 2 3 4 5 6 7 8 9 10 11 12 13 14 15 0 1
180 110 3 4 5 6 7 8 9 10 11 12 13 14 15 0 1 2
181 110 4 5 6 7 8 9 10 11 12 13 14 15 0 1 2 3
182 110 5 6 7 8 9 10 11 12 13 14 15 0 1 2 3 4
183 110 6 7 8 9 10 11 12 13 14 15 0 1 2 3 4 5
184 110 7 8 9 10 11 12 13 14 15 0 1 2 3 4 5 6
185 110 8 9 10 11 12 13 14 15 0 1 2 3 4 5 6 7
186 110 9 10 11 12 13 14 15 0 1 2 3 4 5 6 7 8
187 110 10 11 12 13 14 15 0 1 2 3 4 5 6 7 8 9
188 110 11 12 13 14 15 0 1 2 3 4 5 6 7 8 9 10
189 110 12 13 14 15 0 1 2 3 4 5 6 7 8 9 10 11
190 110 13 14 15 0 1 2 3 4 5 6 7 8 9 10 11 12
191 110 14 15 0 1 2 3 4 5 6 7 8 9 10 11 12 13
192 110 15 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14
193 110 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
194 110 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 0
195 110 2 3 4 5 6 7 8 9 10 11 12 13 14 15 0 1
196 110 3 4 5 6 7 8 9 10 11 12 13 14 15 0 1 2
197 110 4 5 6 7 8 9 10 11 12 13 14 15 0 1 2 3
198 110 5 6 7 8 9 10 11 12 13 14 15 0 1 2 3 4
199 110 6 7 8 9 10 11 12 13 14 15 0 1 2 3 4 5
200 110 7 8 9 10 11 12 13 14 15 0 1 2 3 4 5 6
201 110 8 9 10 11 12 13 14 15 0 1 2 3 4 5 6 7
202 110 9 10 11 12 13 14 15 0 1 2 3 4 5 6 7 8
203 110 10 11 12 13 14 15 0 1 2 3 4 5 6 7 8 9
204 110 11 12 13 14 15 0 1 2 3 4 5 6 7 8 9 10
205 110 12 13 14 15 0 1 2 3 4 5 6 7 8 9 10 11
206 110 13 14 15 0 1 2 3 4 5 6 7 8 9 10 11 12
207 110 14 15 0 1 2 3 4 5 6 7 8 9 10 11 12 13
208 110 15 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14
209 110 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
210 110 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 0
211 110 2 3 4 5 6 7 8 9 10 11 12 13 14 15 0 1
212 110 3 4 5 6 7 8 9 10 11 12 13 14 15 0 1 2
213 110 4 5 6 7 8 9 10 11 12 13 14 15 0 1 2 3
214 110 5 6 7 8 9 10 11 12 13 14 15 0 1 2 3 4
215 110 6 7 8 9 10 11 12 13 14 15 0 1 2 3 4 5
216 110 7 8 9 10 11 12 13 14 15 0 1 2 3 4 5 6
217 110 8 9 10 11 12 13 14 15 0 1 2 3 4 5 6 7
218 110 9 10 11 12 13 14 15 0 1 2 3 4 5 6 7 8
219 110 10 11 12 13 14 15 0 1 2 3 4 5 6 7 8 9
220 110 11 12 13 14 15 0 1 2 3 4 5 6 7 8 9 10
221 110 12 13 14 15 0 1 2 3 4 5 6 7 8 9 10 11
222 110 13 14 15 0 1 2 3 4 5 6 7 8 9 10 11 12
223 110 14 15 0 1 2 3 4 5 6 7 8 9 10 11 12 13
224 110 15 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14
225 110 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
226 110 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 0
227 110 2 3 4 5 6 7 8 9 10 11 12 13 14 15 0 1
228 110 3 4 5 6 7 8 9 10 11 12 13 14 15 0 1 2
229 110 4 5 6 7 8 9 10 11 12 13 14 15 0 1 2 3
230 110 5 6 7 8 9 10 11 12 13 14 15 0 1 2 3 4
231 110 6 7 8 9 10 11 12 13 14 15 0 1 2 3 4 5
232 110 7 8 9 10 11 12 13 14 15 0 1 2 3 4 5 6
233 110 8 9 10 11 12 13 14 15 0 1 2 3 4 5 6 7
234 110 9 10 11 12 13 14 15 0 1 2 3 4 5 6 7 8
235 110 10 11 12 13 14 15 0 1 2 3 4 5 6 7 8 9
236 110 11 12 13 14 15 0 1 2 3 4 5 6 7 8 9 10
237 110 12 13 14 15 0 1 2 3 4 5 6 7 8 9 10 11
238 110 13 14 15 0 1 2 3 4 5 6 7 8 9 10 11 12
239 110 14 15 0 1 2 3 4 5 6 7 8 9 10 11 12 13
240 110 15 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14
241 110 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
242 110 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 0
243 110 2 3 4 5 6 7 8 9 10 11 12 13 14 15 0 1
244 110 3 4 5 6 7 8 9 10 11 12 13 14 15 0 1 2
245 110 4 5 6 7 8 9 10 11 12 13 14 15 0 1 2 3
246 110 5 6 7 8 9 10 11 12 13 14 15 0 1 2 3 4
247 110 6 7 8 9 10 11 12 13 14 15 0 1 2 3 4 5
248 110 7 8 9 10 11 12 13 14 15 0 1 2 3 4 5 6
249 110 8 9 10 11 12 13 14 15 0 1 2 3 4 5 6 7
250 110 9 10 11 12 13 14 15 0 1 2 3 4 5 6 7 8
251 110 10 11 12 13 14 15 0 1 2 3 4 5 6 7 8 9
252 110 11 12 13 14 15 0 1 2 3 4 5 6 7 8 9 10
253 110 12 13 14 15 0 1 2 3 4 5 6 7 8 9 10 11
254 110 13 14 15 0 1 2 3 4 5 6 7 8 9 10 11 12
255 110 14 15 0 1 2 3 4 5 6 7 8 9 10 11 12 13
256 110 15 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14
257 110 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
258 110 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 0
259 110 2 3 4 5 6 7 8 9 10 11 12 13 14 15 0 1
260 110 3 4 5 6 7 8 9 10 11 12 13 14 15 0 1 2
261 110 4 5 6 7 8 9 10 11 12 13 14 15 0 1 2 3
262 110 5 6 7 8 9 10 11 12 13 14 15 0 1 2 3 4
263 110 6 7 8 9 10 11 12 13 14 15 0 1 2 3 4 5
264 110 7 8 9 10 11 12 13 14 15 0 1 2 3 4 5 6
265 110 8 9 10 11 12 13 14 15 0 1 2 3 4 5 6 7
266 110 9 10 11 12 13 14 15 0 1 2 3 4 5 6 7 8
267 110 10 11 12 13 14 15 0 1 2 3 4 5 6 7 8 9
268 110 11 12 13 14 15 0 1 2 3 4 5 6 7 8 9 10
269 110 12 13 14 15 0 1 2 3 4 5 6 7 8 9 10 11
270 110 13 14 15 0 1 2 3 4 5 6 7 8 9 10 11 12
271 110 14 15 0 1 2 3 4 5 6 7 8 9 10 11 12 13
272 110 15 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14
273 110 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
274 110 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 0
275 110 2 3 4 5 6 7 8 9 10 11 12 13 14 15 0 1
276 110 3 4 5 6 7 8 9 10 11 12 13 14 15 0 1 2
277 110 4 5 6 7 8 9 10 11 12 13 14 15 0 1 2 3
278 110 5 6 7 8 9 10 11 12 13 14 15 0 1 2 3 4
279 110 6 7 8 9 10 11 12 13 14 15 0 1 2 3 4 5
280 110 7 8 9 10 11 12 13 14 15 0 1 2 3 4 5 6
281 110 8 9 10 11 12 13 14 15 0 1 2 3 4 5 6 7
282 110 9 10 11 12 13 14 15 0 1 2 3 4 5 6 7 8
283 110 10 11 12 13 14 15 0 1 2 3 4 5 6 7 8 9
284 110 11 12 13 14 15 0 1 2 3 4 5 6 7 8 9 10
285 110 12 13 14 15 0 1 2 3 4 5 6 7 8 9 10 11
286 110 13 14 15 0 1 2 3 4 5 6 7 8 9 10 11 12
287 110 14 15 0 1 2 3 4 5 6 7 8 9 10 11 12 13
288 110 15 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14
289 110 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
290 110 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 0
291 110 2 3 4 5 6 7 8 9 10 11 12 13 14 15 0 1
292 110 3 4 5 6 7 8 9 10 11 12 13 14 15 0 1 2
293 110 4 5 6 7 8 9 10 11 12 13 14 15 0 1 2 3
294 110 5 6 7 8 9 10 11 12 13 14 15 0 1 2 3 4
295 110 6 7 8 9 10 11 12 13 14 15 0 1 2 3 4 5
296 110 7 8 9 10 11 12 13 14 15 0 1 2 3 4 5 6
297 110 8 9 10 11 12 13 14 15 0 1 2 3 4 5 6 7
298 110 9 10 11 12 13 14 15 0 1 2 3 4 5 6 7 8
299 110 10 11 12 13 14 15 0 1 2 3 4 5 6 7 8 9
300 110 11 12 13 14 15 0 1 2 3 4 5 6 7 8 9 10
301 110 12 13 14 15 0 1 2 3 4 5 6 7 8 9 10 11
302 110 13 14 15 0 1 2 3 4 5 6 7 8 9 10 11 12
303 110 14 15 0 1 2 3 4 5 6 7 8 9 10 11 12 13
304 110 15 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14
305 110 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
306 110 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 0
307 110 2 3 4 5 6 7 8 9 10 11 12 13 14 15 0 1
308 110 3 4 5 6 7 8 9 10 11 12 13 14 15 0 1 2
309 110 4 5 6 7 8 9 10 11 12 13 14 15 0 1 2 3
310 110 5 6 7 8 9 10 11 12 13 14 15 0 1 2 3 4
311 110 6 7 8 9 10 11 12 13 14 15 0 1 2 3 4 5
312 110 7 8 9 10 11 12 13 14 15 0 1 2 3 4 5 6
313 110 8 9 10 11 12 13 14 15 0 1 2 3 4 5 6 7
314 110 9 10 11 12 13 14 15 0 1 2 3 4 5 6 7 8
315 110 10 11 12 13 14 15 0 1 2 3 4 5 6 7 8 9
316 110 11 12 13 14 15 0 1 2 3 4 5 6 7 8 9 10
317 110 12 13 14 15 0 1 2 3 4 5 6 7 8 9 10 11
318 110 13 14 15 0 1 2 3 4 5 6 7 8 9 10 11 12
319 110 14 15 0 1 2 3 4 5 6 7 8 9 10 11 12 13
320 110 15 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14
321 110 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
322 110 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 0
323 110 2 3 4 5 6 7 8 9 10 11 12 13 14 15 0 1
324 110 3 4 5 6 7 8 9 10 11 12 13 14 15 0 1 2
325 110 4 5 6 7 8 9 10 11 12 13 14 15 0 1 2 3
326 110 5 6 7 8 9 10 11 12 13 14 15 0 1 2 3 4
327 110 6 7 8 9 10 11 12 13 14 15 0 1 2 3 4 5
328 110 7 8 9 10 11 12 13 14 15 0 1 2 3 4 5 6
329 110 8 9 10 11 12 13 14 15 0 1 2 3 4 5 6 7
330 110 9 10 11 12 13 14 15 0 1 2 3 4 5 6 7 8
331 110 10 11 12 13 14 15 0 1 2 3 4 5 6 7 8 9
332 110 11 12 13 14 15 0 1 2 3 4 5 6 7 8 9 10
333 110 12 13 14 15 0 1 2 3 4 5 6 7 8 9 10 11
334 110 13 14 15 0 1 2 3 4 5 6 7 8 9 10 11 12
335 110 14 15 0 1 2 3 4 5 6 7 8 9 10 11 12 13
336 110 15 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14
337 110 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
338 110 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 0
339 110 2 3 4 5 6 7 8 9 10 11 12 13 14 15 0 1
340 110 3 4 5 6 7 8 9 10 11 12 13 14 15 0 1 2
341 110 4 5 6 7 8 9 10 11 12 13 14 15 0 1 2 3
342 110 5 6 7 8 9 10 11 12 13 14 15 0 1 2 3 4
343 110 6 7 8 9 10 11 12 13 14 15 0 1 2 3 4 5
344 110 7 8 9 10 11 12 13 14 15 0 1 2 3 4 5 6
345 110 8 9 10 11 12 13 14 15 0 1 2 3 4 5 6 7
346 110 9 10 11 12 13 14 15 0 1 2 3 4 5 6 7 8
347 110 10 11 12 13 14 15 0 1 2 3 4 5 6 7 8 9
348 110 11 12 13 14 15 0 1 2 3 4 5 6 7 8 9 10
349 110 12 13 14 15 0 1 2 3 4 5 6 7 8 9 10 11
350 110 13 14 15 0 1 2 3 4 5 6 7 8 9 10 11 12
351 110 14 15 0 1 2 3 4 5 6 7 8 9 10 11 12 13
352 110 15 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14
353 110 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
354 110 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 0
355 110 2 3 4 5 6 7 8 9 10 11 12 13 14 15 0 1
356 110 3 4 5 6 7 8 9 10 11 12 13 14 15 0 1 2
357 110 4 5 6 7 8 9 10 11 12 13 14 15 0 1 2 3
358 110 5 6 7 8 9 10 11 12 13 14 15 0 1 2 3 4
359 110 6 7 8 9 10 11 12 13 14 15 0 1 2 3 4 5
360 110 7 8 9 10 11 12 13 14 15 0 1 2 3 4 5 6
361 110 8 9 10 11 12 13 14 15 0 1 2 3 4 5 6 7
362 110 9 10 11 12 13 14 15 0 1 2 3 4 5 6 7 8
363 110 10 11 12 13 14 15 0 1 2 3 4 5 6 7 8 9
364 110 11 12 13 14 15 0 1 2 3 4 5 6 7 8 9 10
365 110 12 13 14 15 0 1 2 3 4 5 6 7 8 9 10 11
366 110 13 14 15 0 1 2 3 4 5 6 7 8 9 10 11 12
367 110 14 15 0 1 2 3 4 5 6 7 8 9 10 11 12 13
368 110 15 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14
369 110 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
370 110 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 0
371 110 2 3 4 5 6 7 8 9 10 11 12 13 14 15 0 1
372 110 3 4 5 6 7 8 9 10 11 12 13 14 15 0 1 2
373 110 4 5 6 7 8 9 10 11 12 13 14 15 0 1 2 3
374 110 5 6 7 8 9 10 11 12 13 14 15 0 1 2 3 4
375 110 6 7 8 9 10 11 12 13 14 15 0 1 2 3 4 5
376 110 7 8 9 10 11 12 13 14 15 0 1 2 3 4 5 6
377 110 8 9 10 11 12 13 14 15 0 1 2 3 4 5 6 7
378 110 9 10 11 12 13 14 15 0 1 2 3 4 5 6 7 8
379 110 10 11 12 13 14 15 0 1 2 3 4 5 6 7 8 9
380 110 11 12 13 14 15 0 1 2 3 4 5 6 7 8 9 10
381 110 12 13 14 15 0 1 2 3 4 5 6 7 8 9 10 11
382 110 13 14 15 0 1 2 3 4 5 6 7 8 9 10 11 12
383 110 14 15 0 1 2 3 4 5 6 7 8 9 10 11 12 13
384 110 15 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14
385 110 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
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@@ -0,0 +1,25
1 0 0 'U' 'U'
2 6340 3 'U' 'U'
3 10140 3 '0' 'U'
4 11140 3 '0' '0'
5 16340 6 '0' '0'
6 26340 9 '0' '0'
7 36340 12 '0' '0'
8 46340 15 '0' '0'
9 56340 18 '0' '0'
10 66340 21 '0' '0'
11 76340 24 '0' '0'
12 86340 27 '0' '0'
13 96340 30 '0' '0'
14 106340 33 '0' '0'
15 111140 33 '1' '0'
16 112140 33 '1' '1'
17 116340 36 '1' '1'
18 126340 39 '1' '1'
19 136340 42 '1' '1'
20 146340 45 '1' '1'
21 156340 48 '1' '1'
22 166340 51 '1' '1'
23 176340 54 '1' '1'
24 186340 57 '1' '1'
25 196340 60 '1' '1'
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@@ -0,0 +1,150
1
2 LIBRARY ieee;
3 USE ieee.std_logic_1164.ALL;
4 USE ieee.numeric_std.ALL;
5 USE IEEE.std_logic_signed.ALL;
6 USE IEEE.MATH_real.ALL;
7
8 LIBRARY techmap;
9 USE techmap.gencomp.ALL;
10
11 LIBRARY std;
12 USE std.textio.ALL;
13
14 LIBRARY opencores;
15 USE opencores.spwpkg.ALL;
16 USE opencores.spwambapkg.ALL;
17
18 LIBRARY lpp;
19 USE lpp.lpp_sim_pkg.ALL;
20 USE lpp.lpp_cna.ALL;
21
22 ENTITY testbench IS
23 END;
24
25 ARCHITECTURE behav OF testbench IS
26
27 SIGNAL TSTAMP : INTEGER := 0;
28
29 SIGNAL clk_25 : STD_LOGIC := '0';
30 SIGNAL rstn_25 : STD_LOGIC;
31
32 SIGNAL end_of_simu : STD_LOGIC := '0';
33
34 SIGNAL DATA : STD_LOGIC_VECTOR(15 DOWNTO 0) := (OTHERS => '0');
35 SIGNAL SMP_CLK : STD_LOGIC := '1';
36
37 SIGNAL DAC_SYNC : STD_LOGIC;
38 SIGNAL DAC_DOUT : STD_LOGIC;
39 SIGNAL DAC_SCLK : STD_LOGIC;
40
41 SIGNAL CAL_VALUE_data_v : STD_LOGIC_VECTOR(15 DOWNTO 0) := (OTHERS => '0');
42 SIGNAL CAL_VALUE_valid_v : STD_LOGIC_VECTOR(16 DOWNTO 0) := (OTHERS => '0');
43
44 SIGNAL CAL_VALUE_data : STD_LOGIC_VECTOR(15 DOWNTO 0);
45 SIGNAL CAL_VALUE_valid : STD_LOGIC;
46
47 SIGNAL DAC_CAL_EN : STD_LOGIC;
48 SIGNAL bias_fail_sw : STD_LOGIC;
49
50 BEGIN
51
52 -----------------------------------------------------------------------------
53 -- SIM GLOBAL RUN
54 -----------------------------------------------------------------------------
55 PROCESS IS
56 BEGIN -- PROCESS
57 WAIT FOR 200 us;
58 end_of_simu <= '1';
59 WAIT;
60 END PROCESS;
61
62 -----------------------------------------------------------------------------
63 -- CLOCK and RESET
64 -----------------------------------------------------------------------------
65 PROCESS
66 BEGIN -- PROCESS
67 WAIT UNTIL clk_25 = '1';
68 rstn_25 <= '0';
69 WAIT UNTIL clk_25 = '1';
70 WAIT UNTIL clk_25 = '1';
71 WAIT UNTIL clk_25 = '1';
72 rstn_25 <= '1';
73
74 WAIT FOR 10 us;
75 DAC_CAL_EN <= '0';
76
77 WAIT FOR 1 us;
78 bias_fail_sw <= '0';
79
80 WAIT FOR 100 us;
81 DAC_CAL_EN <= '1';
82
83 WAIT FOR 1 us;
84 bias_fail_sw <= '1';
85
86
87 WAIT UNTIL end_of_simu = '1';
88 WAIT FOR 10 ps;
89 ASSERT false REPORT "end of test" SEVERITY note;
90 -- Wait forever; this will finish the simulation.
91 WAIT;
92 END PROCESS;
93 -----------------------------------------------------------------------------
94 clk_25_gen : PROCESS
95 BEGIN
96 IF end_of_simu /= '1' THEN
97 clk_25 <= NOT clk_25;
98 TSTAMP <= TSTAMP+20;
99 WAIT FOR 20 ns;
100 ELSE
101 WAIT FOR 20 ps;
102 ASSERT false REPORT "end of test" SEVERITY note;
103 WAIT;
104 END IF;
105 END PROCESS;
106 -----------------------------------------------------------------------------
107
108 clk_SMP_gen : PROCESS
109 BEGIN
110 IF end_of_simu /= '1' THEN
111 SMP_CLK <= NOT SMP_CLK;
112 IF SMP_CLK = '0' THEN
113 DATA <= DATA + 3;
114 END IF;
115 WAIT FOR 5000101 ps;
116 ELSE
117 WAIT FOR 20 ps;
118 ASSERT false REPORT "end of test" SEVERITY note;
119 WAIT;
120 END IF;
121 END PROCESS;
122
123 SPI_DAC_DRIVER_1: SPI_DAC_DRIVER
124 GENERIC MAP (
125 datawidth => 16,
126 MSBFIRST => 1)
127 PORT MAP (
128 clk => clk_25,
129 rstn => rstn_25,
130
131 DATA => DATA,
132 SMP_CLK => SMP_CLK,
133
134 SYNC => DAC_SYNC,
135 DOUT => DAC_DOUT,
136 SCLK => DAC_SCLK);
137
138 lfr_output_save_1: lfr_output_save
139 GENERIC MAP (
140 FNAME => "lfr_output.txt")
141 PORT MAP (
142 end_of_simu => end_of_simu,
143 timestamp => TSTAMP,
144 DAC_SDO => DAC_DOUT,
145 DAC_SCK => DAC_SCLK,
146 DAC_SYNC => DAC_SYNC,
147 DAC_CAL_EN => DAC_CAL_EN,
148 bias_fail_sw => bias_fail_sw);
149
150 END;
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@@ -139,6 +139,19 PACKAGE lpp_sim_pkg IS
139 error_hksel : OUT STD_LOGIC);
139 error_hksel : OUT STD_LOGIC);
140 END COMPONENT lfr_input_gen;
140 END COMPONENT lfr_input_gen;
141
141
142 COMPONENT lfr_output_save IS
143 GENERIC (
144 FNAME : STRING);
145 PORT (
146 end_of_simu : IN STD_LOGIC;
147 timestamp : IN integer;
148 DAC_SDO : in STD_LOGIC;
149 DAC_SCK : in STD_LOGIC;
150 DAC_SYNC : in STD_LOGIC;
151 DAC_CAL_EN : in STD_LOGIC;
152 bias_fail_sw : in STD_LOGIC);
153 END COMPONENT lfr_output_save;
154
142 END lpp_sim_pkg;
155 END lpp_sim_pkg;
143
156
144 PACKAGE BODY lpp_sim_pkg IS
157 PACKAGE BODY lpp_sim_pkg IS
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@@ -6,3 +6,4 lpp_lfr_sim_pkg.vhd
6 spw_sender.vhd
6 spw_sender.vhd
7 spw_receiver.vhd
7 spw_receiver.vhd
8 lfr_input_gen.vhd
8 lfr_input_gen.vhd
9 lfr_output_save.vhd
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