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LIBRARY ieee;
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USE ieee.std_logic_1164.ALL;
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USE ieee.numeric_std.ALL;
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LIBRARY std;
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USE std.textio.ALL;
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ENTITY lfr_output_save IS
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GENERIC(
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FNAME : STRING := "output.txt"
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);
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PORT(
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end_of_simu : IN STD_LOGIC;
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timestamp : IN integer;
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-- DAC --------------------------------------------------------------------
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DAC_SDO : in STD_LOGIC;
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DAC_SCK : in STD_LOGIC;
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DAC_SYNC : in STD_LOGIC;
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DAC_CAL_EN : in STD_LOGIC;
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-- BIAS_FAIL --------------------------------------------------------------
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bias_fail_sw : in STD_LOGIC
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);
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END lfr_output_save;
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ARCHITECTURE beh OF lfr_output_save IS
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FILE output_file : TEXT OPEN write_mode IS FNAME;
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SIGNAL CAL_VALUE_data_v : STD_LOGIC_VECTOR(15 DOWNTO 0) := (OTHERS => '0');
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SIGNAL CAL_VALUE_valid_v : STD_LOGIC_VECTOR(16 DOWNTO 0) := (OTHERS => '0');
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SIGNAL CAL_VALUE_data : STD_LOGIC_VECTOR(15 DOWNTO 0);
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BEGIN
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-----------------------------------------------------------------------------
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-- Data orginization in the output file :
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-----------------------------------------------------------------------------
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-- Exemple of output.txt file :
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-- TIME CAL_VALUE CAL_ENABLE BIAS_FAIL_VALUE
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-- TIME CAL_VALUE CAL_ENABLE BIAS_FAIL_VALUE
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-----------------------------------------------------------------------------
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-- TIME : integer. Current time (in ns)
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-- others : integer(0 to 255). Current value.
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-----------------------------------------------------------------------------
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-----------------------------------------------------------------------------
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-- DAC : SPI to Parralel
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PROCESS (DAC_SCK) IS
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BEGIN -- PROCESS
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IF DAC_SCK'event AND DAC_SCK = '1' THEN -- rising clock edge
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CAL_VALUE_valid_v(0) <= '0';
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CAL_VALUE_valid_v(16 DOWNTO 1) <= CAL_VALUE_valid_v(15 DOWNTO 0);
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IF DAC_SYNC = '1' THEN
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CAL_VALUE_valid_v(0) <= '1';
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END IF;
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CAL_VALUE_data_v(15 DOWNTO 0) <= CAL_VALUE_data_v(14 DOWNTO 0) & DAC_SDO;
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END IF;
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END PROCESS;
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CAL_VALUE_data <= CAL_VALUE_data_v WHEN CAL_VALUE_valid_v(16) = '1';
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-----------------------------------------------------------------------------
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-----------------------------------------------------------------------------
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--
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PROCESS(end_of_simu, CAL_VALUE_data, DAC_CAL_EN, bias_fail_sw)
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VARIABLE line_var : LINE;
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BEGIN
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IF end_of_simu = '1' THEN
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file_close(output_file);
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ELSE
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write(line_var, INTEGER'IMAGE(timestamp));
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write(line_var," " & INTEGER'IMAGE(to_integer(UNSIGNED(CAL_VALUE_data))));
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write(line_var," " & STD_LOGIC'IMAGE(DAC_CAL_EN));
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write(line_var," " & STD_LOGIC'IMAGE(bias_fail_sw));
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writeline(output_file, line_var);
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END IF;
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END PROCESS;
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END beh;
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