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1 /*------------------------------------------------------------------------------
2 -- This file is a part of the LPP VHDL IP LIBRARY
3 -- Copyright (C) 2009 - 2010, Laboratory of Plasmas Physic - CNRS
4 --
5 -- This program is free software; you can redistribute it and/or modify
6 -- it under the terms of the GNU General Public License as published by
7 -- the Free Software Foundation; either version 3 of the License, or
8 -- (at your option) any later version.
9 --
10 -- This program is distributed in the hope that it will be useful,
11 -- but WITHOUT ANY WARRANTY; without even the implied warranty of
12 -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 -- GNU General Public License for more details.
14 --
15 -- You should have received a copy of the GNU General Public License
16 -- along with this program; if not, write to the Free Software
17 -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 -------------------------------------------------------------------------------*/
19 #include "apb_lcd_driver.h"
20 #include "lpp_apb_functions.h"
21 #include "lpp_apb_functions.h"
22 #include <stdio.h>
23
24 int lcdbusy(lcd_device* lcd)
25 {
26 return (!(lcd->cfg_reg&readyFlag)==readyFlag);
27 }
28
29
30 lcd_device* lcdopen(int count)
31 {
32 lcd_device* dev;
33 dev = (lcd_device*) apbgetdevice(LPP_LCD_CTRLR,VENDOR_LPP,count);
34 return dev;
35 //* scan APB bus an return the count(th) lcd controler */
36
37 }
38
39
40
41 lcd_err lcdsendcmd(lcd_device* lcd,int cmd)
42 {
43 lcd_err err;
44 err = lcd_error_no_error;
45 if (lcd!=NULL)
46 {
47 while(lcdbusy(lcd));
48 lcd->cfg_reg = cmd;
49 return err;
50 }
51 else
52 {
53 err = lcd_error_not_openned ;
54 return err;
55 }
56 }
57
58
59
60 lcd_err lcdsetchar(lcd_device* lcd,int position,const char value)
61 {
62 lcd_err err;
63 err = lcd_error_no_error;
64 return err;
65 }
66
67
68
69 lcd_err lcdprint(lcd_device* lcd,int position,const char* value)
70 {
71 lcd_err err;
72 err = lcd_error_no_error;
73 if (lcd!=NULL)
74 {
75 int i = position;
76 int n = 0;
77 while(value[n]!= '\0' && i<lcdCharCnt)
78 {
79 if(value[n] == '\n')
80 {
81 i=40;n++;
82 }
83 lcd->Frame_buff[i++] = value[n++];
84 }
85 return err;
86 }
87 else
88 {
89 err = lcd_error_not_openned ;
90 return err;
91 }
92 }
93
94
95
96 lcd_err lcdclear(lcd_device* lcd)
97 {
98 lcd_err err;
99 err = lcd_error_no_error;
100 if (lcd!=NULL)
101 {
102 int i=0;
103 for(i=0;i<lcdCharCnt;i++)
104 {
105 lcd->Frame_buff[i] = ' ';
106 }
107 return err;
108 }
109 err = lcd_error_not_openned ;
110 return err;
111 }
112
113
114
115
@@ -0,0 +1,95
1 /*------------------------------------------------------------------------------
2 -- This file is a part of the LPP VHDL IP LIBRARY
3 -- Copyright (C) 2009 - 2010, Laboratory of Plasmas Physic - CNRS
4 --
5 -- This program is free software; you can redistribute it and/or modify
6 -- it under the terms of the GNU General Public License as published by
7 -- the Free Software Foundation; either version 3 of the License, or
8 -- (at your option) any later version.
9 --
10 -- This program is distributed in the hope that it will be useful,
11 -- but WITHOUT ANY WARRANTY; without even the implied warranty of
12 -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 -- GNU General Public License for more details.
14 --
15 -- You should have received a copy of the GNU General Public License
16 -- along with this program; if not, write to the Free Software
17 -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 -------------------------------------------------------------------------------*/
19 #ifndef APB_LCD_DRIVER_H
20 #define APB_LCD_DRIVER_H
21
22 #define readyFlag 1024
23 #define lcdCharCnt 80
24
25
26 /** @todo implemente some shift functions */
27
28
29 /*===================================================
30 T Y P E S D E F
31 ====================================================*/
32
33
34
35 /** error type used for most of lcd functions */
36 typedef int lcd_err;
37
38 /** lcd error ennum for higher abstraction level when error decoding */
39 enum lcd_error
40 {
41 lcd_error_no_error, /**< no error append while function execution */
42 lcd_error_not_ready, /**< the lcd isn't available*/
43 lcd_error_not_openned, /**< the device guiven to the function isn't opened*/
44 lcd_error_too_long /**< the string guiven to the lcd is bigger than the lcd frame buffer memory */
45 };
46
47
48 /** for each command sended to the lcd driver a time should be guiven according to the lcd datasheet */
49 enum lcd_CMD_time
50 {
51 lcd_4us = 0x0FF,
52 lcd_100us = 0x1FF,
53 lcd_4ms = 0x2FF,
54 lcd_20ms = 0x3FF
55 };
56
57 /** list of availiable lcd commands use whith an AND mask whith cmd time */
58 enum lcd_CMD
59 {
60 CursorON = 0xF0E,
61 CursorOFF = 0xF0C
62 };
63
64 /** structure representing the lcd registers */
65 struct lcd_driver
66 {
67 int cfg_reg; /**< Configuration register composed of Ready flag [10], CMD time Value [9:8], CMD to send [7:0]*/
68 int Frame_buff[lcdCharCnt]; /**< Frame Buffer space each address corresponds to a char on the lcd screen */
69 };
70
71 typedef struct lcd_driver lcd_device;
72
73 /*===================================================
74 F U N C T I O N S
75 ====================================================*/
76
77 /** says if the lcd is busy */
78 int lcdbusy(lcd_device * lcd);
79
80 /** Opens and returns the counth lcd found on APB bus else NULL */
81 lcd_device* lcdopen(int count);
82
83 /** Sends a command to the given device, don't forget to guive the time of the cmd */
84 lcd_err lcdsendcmd(lcd_device* lcd,int cmd);
85
86 /** Sets a char on the given device at given position */
87 lcd_err lcdsetchar(lcd_device* lcd,int position,const char value);
88
89 /** Prints a message on the given device at given position, "\n" is understood but for others use sprintf before */
90 lcd_err lcdprint(lcd_device* lcd,int position,const char* value);
91
92 /** Writes space character on each adress of the lcd screen */
93 lcd_err lcdclear(lcd_device* lcd);
94
95 #endif
@@ -0,0 +1,76
1 /*------------------------------------------------------------------------------
2 -- This file is a part of the LPP VHDL IP LIBRARY
3 -- Copyright (C) 2009 - 2010, Laboratory of Plasmas Physic - CNRS
4 --
5 -- This program is free software; you can redistribute it and/or modify
6 -- it under the terms of the GNU General Public License as published by
7 -- the Free Software Foundation; either version 3 of the License, or
8 -- (at your option) any later version.
9 --
10 -- This program is distributed in the hope that it will be useful,
11 -- but WITHOUT ANY WARRANTY; without even the implied warranty of
12 -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 -- GNU General Public License for more details.
14 --
15 -- You should have received a copy of the GNU General Public License
16 -- along with this program; if not, write to the Free Software
17 -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 -------------------------------------------------------------------------------*/
19 #include "stdio.h"
20 #include "lpp_apb_functions.h"
21 #include "apb_lcd_driver.h"
22
23
24 int main()
25 {
26 lcd_device* lcd0;
27 struct apbdevinfo lcd0info;
28 lcd0 = lcdopen(0);
29 char message[lcdCharCnt+1];
30 if(lcd0!= NULL)
31 {
32 apbgetdeviceinfofromid(LPP_LCD_CTRLR,VENDOR_LPP,0,&lcd0info);
33 printf("find lcd device @ %8x\n",(int)lcd0);
34 apbprintdeviceinfo(lcd0info);
35 }
36
37 printf("hello\n");
38 lcdclear(lcd0);
39 int d=0;
40 while(d!=10)
41 {
42 scanf("%d",&d);
43 switch(d)
44 {
45 case 0:
46 lcdsendcmd(lcd0,CursorOFF&lcd_100us);
47 printf("cursor OFF \n");
48 sprintf(message,"cursor OFF %d",d);
49 lcdprint(lcd0,0,message);
50 break;
51 case 1:
52 lcdsendcmd(lcd0,CursorON&lcd_100us);
53 printf("cursor ON \n");
54 sprintf(message,"cursor ON %d ",d);
55 lcdprint(lcd0,0,message);
56 break;
57 case 2:
58 sprintf(message,"Test line 2_%d\nline2",d);
59 lcdprint(lcd0,0,message);
60 break;
61 case 3:
62 apbprintdeviceslist();
63 break;
64 case 10:
65 sprintf(message,"QUIT %d ",d);
66 lcdprint(lcd0,0,message);
67 return 0;
68 break;
69 default:
70 sprintf(message,"Not a CMD %d ",d);
71 lcdprint(lcd0,0,message);
72 break;
73 }
74 }
75 return 0;
76 }
@@ -0,0 +1,119
1 /*------------------------------------------------------------------------------
2 -- This file is a part of the LPP VHDL IP LIBRARY
3 -- Copyright (C) 2009 - 2010, Laboratory of Plasmas Physic - CNRS
4 --
5 -- This program is free software; you can redistribute it and/or modify
6 -- it under the terms of the GNU General Public License as published by
7 -- the Free Software Foundation; either version 3 of the License, or
8 -- (at your option) any later version.
9 --
10 -- This program is distributed in the hope that it will be useful,
11 -- but WITHOUT ANY WARRANTY; without even the implied warranty of
12 -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 -- GNU General Public License for more details.
14 --
15 -- You should have received a copy of the GNU General Public License
16 -- along with this program; if not, write to the Free Software
17 -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 -------------------------------------------------------------------------------*/
19 #include "lpp_apb_functions.h"
20 #include <stdio.h>
21
22
23
24 int* apbgetdevice(int PID,int VID,int count)
25 {
26 struct apbPnPreg* dev = (struct apbPnPreg*)(APB_TBL_HEAD + sizeof(struct apbPnPreg));
27 int id;
28 id = (PID<<12) | (VID<<24);
29 while(dev != (struct apbPnPreg*)(APB_TBL_HEAD|0xFFF))
30 {
31 if((dev->idReg & 0xFFFFF000) == id)
32 {
33 if(count == 0)
34 {
35 return (int*) (APB_BASE_ADDRS | (dev->bar&0xFFF00000)>>12);
36 }
37 count-=1;
38 }
39 dev += 1;
40 }
41 return NULL;
42 }
43
44
45 void apbgetdeviceinfofromdevptr(const struct apbPnPreg* dev,struct apbdevinfo* devinfo)
46 {
47
48 devinfo->productID = (dev->idReg>>12) & 0xFFF;
49 devinfo->vendorID = (dev->idReg>>24) & 0xFF;
50 devinfo->address = ((dev->bar>>12) & 0xFFF00)|APB_BASE_ADDRS;
51 devinfo->irq = dev->idReg & 0x1F;
52 devinfo->mask = (dev->bar>>4)&0xFFF;
53 devinfo->version = (dev->idReg>>5)&0x1F;
54 }
55
56 void apbgetdeviceinfofromid(int PID,int VID,int count,struct apbdevinfo* devinfo)
57 {
58 struct apbPnPreg* dev = (struct apbPnPreg*)(APB_TBL_HEAD + sizeof(struct apbPnPreg));
59 int id;
60 id = (PID<<12) | (VID<<24);
61 while(dev != (struct apbPnPreg*)(APB_TBL_HEAD|0xFFF))
62 {
63 if((dev->idReg & 0xFFFFF000) == id)
64 {
65 if(count == 0)
66 {
67 devinfo->productID = PID;
68 devinfo->vendorID = VID;
69 devinfo->address = ((dev->bar>>12) & 0xFFF00)|APB_BASE_ADDRS;
70 devinfo->irq = dev->idReg & 0x1F;
71 devinfo->mask = (dev->bar>>4)&0xFFF;
72 devinfo->version = (dev->idReg>>5)&0x1F;
73 return;
74 }
75 count-=1;
76 }
77 dev += 1;
78 }
79 }
80
81
82
83 void apbprintdeviceinfo(struct apbdevinfo devinfo)
84 {
85 printf("Vendor ID = 0x%x\n",devinfo.vendorID);
86 printf("Product ID = 0x%x\n",devinfo.productID);
87 printf("Device address = 0x%x\n",devinfo.address);
88 printf("Device Irq = %d\n",devinfo.irq);
89 printf("Device mask = 0x%x\n",devinfo.mask);
90 printf("Device Version = %d\n",devinfo.version);
91 }
92
93
94 void apbprintdeviceslist()
95 {
96 struct apbdevinfo devinfo;
97 struct apbPnPreg* dev = (struct apbPnPreg*)(APB_TBL_HEAD );//+ sizeof(struct apbPnPreg));
98 int i =0;
99 int fisrtBAR;
100 while((dev->idReg == 0) && (i<APB_MAX_DEVICES))
101 {
102 dev += 1;
103 i+=1;
104 }
105 fisrtBAR = dev->bar;
106 for(i=i;i<APB_MAX_DEVICES;i++)
107 {
108 if((dev->idReg != 0 ))
109 {
110 apbgetdeviceinfofromdevptr(dev,&devinfo);
111 printf("\n\n======= new device found========\n");
112 apbprintdeviceinfo(devinfo);
113 }
114 dev += 1;
115 if(dev->bar == fisrtBAR)
116 break;
117 }
118 }
119
@@ -0,0 +1,65
1 /*------------------------------------------------------------------------------
2 -- This file is a part of the LPP VHDL IP LIBRARY
3 -- Copyright (C) 2009 - 2010, Laboratory of Plasmas Physic - CNRS
4 --
5 -- This program is free software; you can redistribute it and/or modify
6 -- it under the terms of the GNU General Public License as published by
7 -- the Free Software Foundation; either version 3 of the License, or
8 -- (at your option) any later version.
9 --
10 -- This program is distributed in the hope that it will be useful,
11 -- but WITHOUT ANY WARRANTY; without even the implied warranty of
12 -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 -- GNU General Public License for more details.
14 --
15 -- You should have received a copy of the GNU General Public License
16 -- along with this program; if not, write to the Free Software
17 -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 -------------------------------------------------------------------------------*/
19 #ifndef LPP_APB_FUNCTIONS_H
20 #define LPP_APB_FUNCTIONS_H
21
22 #define APB_TBL_HEAD 0x800FF000
23 #define APB_BASE_ADDRS 0x80000000
24 #define APB_MAX_DEVICES 256
25
26 #define VENDOR_LPP 0x19
27
28 #define ROCKET_TM 0x001
29 #define otherCore 0x002
30 #define LPP_SIMPLE_DIODE 0x003
31 #define LPP_MULTI_DIODE 0x004
32 #define LPP_LCD_CTRLR 0x005
33
34 /** @todo implemente a descriptor structure for any APB device */
35
36
37 /** Structure representing a device descriptor register on Grlib's AHB2APB brige with plug and play feature */
38 struct apbPnPreg
39 {
40 int idReg; /**< id register composed of Vendor ID [31:24], Device ID [23:12], CT [11:10], Version [9:5], IRQ [4:0] */
41 int bar; /**< Bank Address Register composed of Device's ADDRESS [31:20], MASK [14:4], TYPE [3:0] */
42 };
43
44 struct apbdevinfo
45 {
46 int vendorID;
47 int productID;
48 int version;
49 int irq;
50 int address;
51 int mask;
52 };
53
54 /** This Function scans APB devices table and returns counth device according to VID and PID */
55 int* apbgetdevice(int PID,int VID,int count);
56 /** This Function scans APB devices table and returns counth device informations according VID and PID */
57 void apbgetdeviceinfofromid(int PID,int VID,int count,struct apbdevinfo* devinfo);
58
59 void apbgetdeviceinfofromdevptr(const struct apbPnPreg* dev,struct apbdevinfo* devinfo);
60
61
62 void apbprintdeviceinfo(struct apbdevinfo devinfo);
63
64 void apbprintdeviceslist();
65 #endif // LPP_APB_FUNCTIONS_H
@@ -0,0 +1,64
1 ------------------------------------------------------------------------------
2 -- This file is a part of the LPP VHDL IP LIBRARY
3 -- Copyright (C) 2009 - 2010, Laboratory of Plasmas Physic - CNRS
4 --
5 -- This program is free software; you can redistribute it and/or modify
6 -- it under the terms of the GNU General Public License as published by
7 -- the Free Software Foundation; either version 3 of the License, or
8 -- (at your option) any later version.
9 --
10 -- This program is distributed in the hope that it will be useful,
11 -- but WITHOUT ANY WARRANTY; without even the implied warranty of
12 -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 -- GNU General Public License for more details.
14 --
15 -- You should have received a copy of the GNU General Public License
16 -- along with this program; if not, write to the Free Software
17 -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 -------------------------------------------------------------------------------
19 library IEEE;
20 use IEEE.STD_LOGIC_1164.ALL;
21
22
23 entity Clk_divider is
24 generic(OSC_freqHz : integer := 50000000;
25 TargetFreq_Hz : integer := 50000);
26 Port ( clk : in STD_LOGIC;
27 reset : in STD_LOGIC;
28 clk_divided : out STD_LOGIC);
29 end Clk_divider;
30
31 architecture ar_Clk_divider of Clk_divider is
32
33 Constant clk_TRIGER : integer := (OSC_freqHz/(2*TargetFreq_Hz))+1;
34
35
36 signal cpt1 : integer;
37
38 signal clk_int : std_logic := '0';
39
40
41 begin
42
43 clk_divided <= clk_int;
44
45
46 process(reset,clk)
47 begin
48 if reset = '0' then
49 cpt1 <= 0;
50 clk_int <= '0';
51 elsif clk'event and clk = '1' then
52 if cpt1 = clk_TRIGER then
53 clk_int <= not clk_int;
54 cpt1 <= 0;
55 else
56 cpt1 <= cpt1 + 1;
57 end if;
58 end if;
59 end process;
60
61
62 end ar_Clk_divider;
63
64
@@ -0,0 +1,54
1 ------------------------------------------------------------------------------
2 -- This file is a part of the LPP VHDL IP LIBRARY
3 -- Copyright (C) 2009 - 2010, Laboratory of Plasmas Physic - CNRS
4 --
5 -- This program is free software; you can redistribute it and/or modify
6 -- it under the terms of the GNU General Public License as published by
7 -- the Free Software Foundation; either version 3 of the License, or
8 -- (at your option) any later version.
9 --
10 -- This program is distributed in the hope that it will be useful,
11 -- but WITHOUT ANY WARRANTY; without even the implied warranty of
12 -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 -- GNU General Public License for more details.
14 --
15 -- You should have received a copy of the GNU General Public License
16 -- along with this program; if not, write to the Free Software
17 -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 -------------------------------------------------------------------------------
19 library IEEE;
20 use IEEE.STD_LOGIC_1164.ALL;
21
22
23
24 entity AD7688_drvr is
25 generic(ChanelCount : integer;
26 clkkHz : integer);
27 Port ( clk : in STD_LOGIC;
28 reset : in STD_LOGIC;
29 smplClk: in STD_LOGIC;
30 smpout : out Samples_out(ChanelCount-1 downto 0);
31 AD_in : in AD7688_in(ChanelCount-1 downto 0);
32 AD_out : out AD7688_out);
33 end AD7688_drvr;
34
35 architecture ar_AD7688_drvr of AD7688_drvr is
36
37 constant convTrigger : integer:= clkkHz*1.6/1000; --tconv = 1.6µs
38
39 signal i : integer range 0 to convTrigger :=0;
40
41 begin
42
43 sckgen: process(clk,reset)
44 begin
45 if reset = '0' then
46 i <= 0;
47 AD_out.CNV <= '0';
48 elsif clk'event and clk = '1' then
49 end if;
50 end process;
51
52
53 end ar_AD7688_drvr;
54
@@ -0,0 +1,59
1 ------------------------------------------------------------------------------
2 -- This file is a part of the LPP VHDL IP LIBRARY
3 -- Copyright (C) 2009 - 2010, Laboratory of Plasmas Physic - CNRS
4 --
5 -- This program is free software; you can redistribute it and/or modify
6 -- it under the terms of the GNU General Public License as published by
7 -- the Free Software Foundation; either version 3 of the License, or
8 -- (at your option) any later version.
9 --
10 -- This program is distributed in the hope that it will be useful,
11 -- but WITHOUT ANY WARRANTY; without even the implied warranty of
12 -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 -- GNU General Public License for more details.
14 --
15 -- You should have received a copy of the GNU General Public License
16 -- along with this program; if not, write to the Free Software
17 -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 -------------------------------------------------------------------------------
19 library IEEE;
20 use IEEE.STD_LOGIC_1164.all;
21
22
23
24 package lpp_ad_conv is
25
26
27 type AD7688_out is
28 record
29 CNV : std_logic;
30 SCK : std_logic;
31 end record;
32
33 type AD7688_in_element is
34 record
35 SDI : std_logic;
36 end record;
37
38 type AD7688_in is array(natural range <>) of AD7688_in_element;
39
40 type Samples_out is array(natural range <>) of std_logic_vector(15 downto 0);
41
42 component AD7688_drvr is
43 generic(ChanelCount : integer;
44 clkkHz : integer);
45 Port ( clk : in STD_LOGIC;
46 reset : in STD_LOGIC;
47 smplClk: in STD_LOGIC;
48 smpout : out Samples_out(ChanelCount-1 downto 0);
49 AD_in : in AD7688_in(ChanelCount-1 downto 0);
50 AD_out : out AD7688_out);
51 end component;
52
53
54
55
56
57 end lpp_ad_conv;
58
59
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1 GNU GENERAL PUBLIC LICENSE
2 Version 3, 29 June 2007
3
4 Copyright (C) 2007 Free Software Foundation, Inc. <http://fsf.org/>
5 Everyone is permitted to copy and distribute verbatim copies
6 of this license document, but changing it is not allowed.
7
8 Preamble
9
10 The GNU General Public License is a free, copyleft license for
11 software and other kinds of works.
12
13 The licenses for most software and other practical works are designed
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16 share and change all versions of a program--to make sure it remains free
17 software for all its users. We, the Free Software Foundation, use the
18 GNU General Public License for most of our software; it applies also to
19 any other work released this way by its authors. You can apply it to
20 your programs, too.
21
22 When we speak of free software, we are referring to freedom, not
23 price. Our General Public Licenses are designed to make sure that you
24 have the freedom to distribute copies of free software (and charge for
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27 free programs, and that you know you can do these things.
28
29 To protect your rights, we need to prevent others from denying you
30 these rights or asking you to surrender the rights. Therefore, you have
31 certain responsibilities if you distribute copies of the software, or if
32 you modify it: responsibilities to respect the freedom of others.
33
34 For example, if you distribute copies of such a program, whether
35 gratis or for a fee, you must pass on to the recipients the same
36 freedoms that you received. You must make sure that they, too, receive
37 or can get the source code. And you must show them these terms so they
38 know their rights.
39
40 Developers that use the GNU GPL protect your rights with two steps:
41 (1) assert copyright on the software, and (2) offer you this License
42 giving you legal permission to copy, distribute and/or modify it.
43
44 For the developers' and authors' protection, the GPL clearly explains
45 that there is no warranty for this free software. For both users' and
46 authors' sake, the GPL requires that modified versions be marked as
47 changed, so that their problems will not be attributed erroneously to
48 authors of previous versions.
49
50 Some devices are designed to deny users access to install or run
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54 pattern of such abuse occurs in the area of products for individuals to
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60
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62 States should not allow patents to restrict development and use of
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66 patents cannot be used to render the program non-free.
67
68 The precise terms and conditions for copying, distribution and
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70
71 TERMS AND CONDITIONS
72
73 0. Definitions.
74
75 "This License" refers to version 3 of the GNU General Public License.
76
77 "Copyright" also means copyright-like laws that apply to other kinds of
78 works, such as semiconductor masks.
79
80 "The Program" refers to any copyrightable work licensed under this
81 License. Each licensee is addressed as "you". "Licensees" and
82 "recipients" may be individuals or organizations.
83
84 To "modify" a work means to copy from or adapt all or part of the work
85 in a fashion requiring copyright permission, other than the making of an
86 exact copy. The resulting work is called a "modified version" of the
87 earlier work or a work "based on" the earlier work.
88
89 A "covered work" means either the unmodified Program or a work based
90 on the Program.
91
92 To "propagate" a work means to do anything with it that, without
93 permission, would make you directly or secondarily liable for
94 infringement under applicable copyright law, except executing it on a
95 computer or modifying a private copy. Propagation includes copying,
96 distribution (with or without modification), making available to the
97 public, and in some countries other activities as well.
98
99 To "convey" a work means any kind of propagation that enables other
100 parties to make or receive copies. Mere interaction with a user through
101 a computer network, with no transfer of a copy, is not conveying.
102
103 An interactive user interface displays "Appropriate Legal Notices"
104 to the extent that it includes a convenient and prominently visible
105 feature that (1) displays an appropriate copyright notice, and (2)
106 tells the user that there is no warranty for the work (except to the
107 extent that warranties are provided), that licensees may convey the
108 work under this License, and how to view a copy of this License. If
109 the interface presents a list of user commands or options, such as a
110 menu, a prominent item in the list meets this criterion.
111
112 1. Source Code.
113
114 The "source code" for a work means the preferred form of the work
115 for making modifications to it. "Object code" means any non-source
116 form of a work.
117
118 A "Standard Interface" means an interface that either is an official
119 standard defined by a recognized standards body, or, in the case of
120 interfaces specified for a particular programming language, one that
121 is widely used among developers working in that language.
122
123 The "System Libraries" of an executable work include anything, other
124 than the work as a whole, that (a) is included in the normal form of
125 packaging a Major Component, but which is not part of that Major
126 Component, and (b) serves only to enable use of the work with that
127 Major Component, or to implement a Standard Interface for which an
128 implementation is available to the public in source code form. A
129 "Major Component", in this context, means a major essential component
130 (kernel, window system, and so on) of the specific operating system
131 (if any) on which the executable work runs, or a compiler used to
132 produce the work, or an object code interpreter used to run it.
133
134 The "Corresponding Source" for a work in object code form means all
135 the source code needed to generate, install, and (for an executable
136 work) run the object code and to modify the work, including scripts to
137 control those activities. However, it does not include the work's
138 System Libraries, or general-purpose tools or generally available free
139 programs which are used unmodified in performing those activities but
140 which are not part of the work. For example, Corresponding Source
141 includes interface definition files associated with source files for
142 the work, and the source code for shared libraries and dynamically
143 linked subprograms that the work is specifically designed to require,
144 such as by intimate data communication or control flow between those
145 subprograms and other parts of the work.
146
147 The Corresponding Source need not include anything that users
148 can regenerate automatically from other parts of the Corresponding
149 Source.
150
151 The Corresponding Source for a work in source code form is that
152 same work.
153
154 2. Basic Permissions.
155
156 All rights granted under this License are granted for the term of
157 copyright on the Program, and are irrevocable provided the stated
158 conditions are met. This License explicitly affirms your unlimited
159 permission to run the unmodified Program. The output from running a
160 covered work is covered by this License only if the output, given its
161 content, constitutes a covered work. This License acknowledges your
162 rights of fair use or other equivalent, as provided by copyright law.
163
164 You may make, run and propagate covered works that you do not
165 convey, without conditions so long as your license otherwise remains
166 in force. You may convey covered works to others for the sole purpose
167 of having them make modifications exclusively for you, or provide you
168 with facilities for running those works, provided that you comply with
169 the terms of this License in conveying all material for which you do
170 not control copyright. Those thus making or running the covered works
171 for you must do so exclusively on your behalf, under your direction
172 and control, on terms that prohibit them from making any copies of
173 your copyrighted material outside their relationship with you.
174
175 Conveying under any other circumstances is permitted solely under
176 the conditions stated below. Sublicensing is not allowed; section 10
177 makes it unnecessary.
178
179 3. Protecting Users' Legal Rights From Anti-Circumvention Law.
180
181 No covered work shall be deemed part of an effective technological
182 measure under any applicable law fulfilling obligations under article
183 11 of the WIPO copyright treaty adopted on 20 December 1996, or
184 similar laws prohibiting or restricting circumvention of such
185 measures.
186
187 When you convey a covered work, you waive any legal power to forbid
188 circumvention of technological measures to the extent such circumvention
189 is effected by exercising rights under this License with respect to
190 the covered work, and you disclaim any intention to limit operation or
191 modification of the work as a means of enforcing, against the work's
192 users, your or third parties' legal rights to forbid circumvention of
193 technological measures.
194
195 4. Conveying Verbatim Copies.
196
197 You may convey verbatim copies of the Program's source code as you
198 receive it, in any medium, provided that you conspicuously and
199 appropriately publish on each copy an appropriate copyright notice;
200 keep intact all notices stating that this License and any
201 non-permissive terms added in accord with section 7 apply to the code;
202 keep intact all notices of the absence of any warranty; and give all
203 recipients a copy of this License along with the Program.
204
205 You may charge any price or no price for each copy that you convey,
206 and you may offer support or warranty protection for a fee.
207
208 5. Conveying Modified Source Versions.
209
210 You may convey a work based on the Program, or the modifications to
211 produce it from the Program, in the form of source code under the
212 terms of section 4, provided that you also meet all of these conditions:
213
214 a) The work must carry prominent notices stating that you modified
215 it, and giving a relevant date.
216
217 b) The work must carry prominent notices stating that it is
218 released under this License and any conditions added under section
219 7. This requirement modifies the requirement in section 4 to
220 "keep intact all notices".
221
222 c) You must license the entire work, as a whole, under this
223 License to anyone who comes into possession of a copy. This
224 License will therefore apply, along with any applicable section 7
225 additional terms, to the whole of the work, and all its parts,
226 regardless of how they are packaged. This License gives no
227 permission to license the work in any other way, but it does not
228 invalidate such permission if you have separately received it.
229
230 d) If the work has interactive user interfaces, each must display
231 Appropriate Legal Notices; however, if the Program has interactive
232 interfaces that do not display Appropriate Legal Notices, your
233 work need not make them do so.
234
235 A compilation of a covered work with other separate and independent
236 works, which are not by their nature extensions of the covered work,
237 and which are not combined with it such as to form a larger program,
238 in or on a volume of a storage or distribution medium, is called an
239 "aggregate" if the compilation and its resulting copyright are not
240 used to limit the access or legal rights of the compilation's users
241 beyond what the individual works permit. Inclusion of a covered work
242 in an aggregate does not cause this License to apply to the other
243 parts of the aggregate.
244
245 6. Conveying Non-Source Forms.
246
247 You may convey a covered work in object code form under the terms
248 of sections 4 and 5, provided that you also convey the
249 machine-readable Corresponding Source under the terms of this License,
250 in one of these ways:
251
252 a) Convey the object code in, or embodied in, a physical product
253 (including a physical distribution medium), accompanied by the
254 Corresponding Source fixed on a durable physical medium
255 customarily used for software interchange.
256
257 b) Convey the object code in, or embodied in, a physical product
258 (including a physical distribution medium), accompanied by a
259 written offer, valid for at least three years and valid for as
260 long as you offer spare parts or customer support for that product
261 model, to give anyone who possesses the object code either (1) a
262 copy of the Corresponding Source for all the software in the
263 product that is covered by this License, on a durable physical
264 medium customarily used for software interchange, for a price no
265 more than your reasonable cost of physically performing this
266 conveying of source, or (2) access to copy the
267 Corresponding Source from a network server at no charge.
268
269 c) Convey individual copies of the object code with a copy of the
270 written offer to provide the Corresponding Source. This
271 alternative is allowed only occasionally and noncommercially, and
272 only if you received the object code with such an offer, in accord
273 with subsection 6b.
274
275 d) Convey the object code by offering access from a designated
276 place (gratis or for a charge), and offer equivalent access to the
277 Corresponding Source in the same way through the same place at no
278 further charge. You need not require recipients to copy the
279 Corresponding Source along with the object code. If the place to
280 copy the object code is a network server, the Corresponding Source
281 may be on a different server (operated by you or a third party)
282 that supports equivalent copying facilities, provided you maintain
283 clear directions next to the object code saying where to find the
284 Corresponding Source. Regardless of what server hosts the
285 Corresponding Source, you remain obligated to ensure that it is
286 available for as long as needed to satisfy these requirements.
287
288 e) Convey the object code using peer-to-peer transmission, provided
289 you inform other peers where the object code and Corresponding
290 Source of the work are being offered to the general public at no
291 charge under subsection 6d.
292
293 A separable portion of the object code, whose source code is excluded
294 from the Corresponding Source as a System Library, need not be
295 included in conveying the object code work.
296
297 A "User Product" is either (1) a "consumer product", which means any
298 tangible personal property which is normally used for personal, family,
299 or household purposes, or (2) anything designed or sold for incorporation
300 into a dwelling. In determining whether a product is a consumer product,
301 doubtful cases shall be resolved in favor of coverage. For a particular
302 product received by a particular user, "normally used" refers to a
303 typical or common use of that class of product, regardless of the status
304 of the particular user or of the way in which the particular user
305 actually uses, or expects or is expected to use, the product. A product
306 is a consumer product regardless of whether the product has substantial
307 commercial, industrial or non-consumer uses, unless such uses represent
308 the only significant mode of use of the product.
309
310 "Installation Information" for a User Product means any methods,
311 procedures, authorization keys, or other information required to install
312 and execute modified versions of a covered work in that User Product from
313 a modified version of its Corresponding Source. The information must
314 suffice to ensure that the continued functioning of the modified object
315 code is in no case prevented or interfered with solely because
316 modification has been made.
317
318 If you convey an object code work under this section in, or with, or
319 specifically for use in, a User Product, and the conveying occurs as
320 part of a transaction in which the right of possession and use of the
321 User Product is transferred to the recipient in perpetuity or for a
322 fixed term (regardless of how the transaction is characterized), the
323 Corresponding Source conveyed under this section must be accompanied
324 by the Installation Information. But this requirement does not apply
325 if neither you nor any third party retains the ability to install
326 modified object code on the User Product (for example, the work has
327 been installed in ROM).
328
329 The requirement to provide Installation Information does not include a
330 requirement to continue to provide support service, warranty, or updates
331 for a work that has been modified or installed by the recipient, or for
332 the User Product in which it has been modified or installed. Access to a
333 network may be denied when the modification itself materially and
334 adversely affects the operation of the network or violates the rules and
335 protocols for communication across the network.
336
337 Corresponding Source conveyed, and Installation Information provided,
338 in accord with this section must be in a format that is publicly
339 documented (and with an implementation available to the public in
340 source code form), and must require no special password or key for
341 unpacking, reading or copying.
342
343 7. Additional Terms.
344
345 "Additional permissions" are terms that supplement the terms of this
346 License by making exceptions from one or more of its conditions.
347 Additional permissions that are applicable to the entire Program shall
348 be treated as though they were included in this License, to the extent
349 that they are valid under applicable law. If additional permissions
350 apply only to part of the Program, that part may be used separately
351 under those permissions, but the entire Program remains governed by
352 this License without regard to the additional permissions.
353
354 When you convey a copy of a covered work, you may at your option
355 remove any additional permissions from that copy, or from any part of
356 it. (Additional permissions may be written to require their own
357 removal in certain cases when you modify the work.) You may place
358 additional permissions on material, added by you to a covered work,
359 for which you have or can give appropriate copyright permission.
360
361 Notwithstanding any other provision of this License, for material you
362 add to a covered work, you may (if authorized by the copyright holders of
363 that material) supplement the terms of this License with terms:
364
365 a) Disclaiming warranty or limiting liability differently from the
366 terms of sections 15 and 16 of this License; or
367
368 b) Requiring preservation of specified reasonable legal notices or
369 author attributions in that material or in the Appropriate Legal
370 Notices displayed by works containing it; or
371
372 c) Prohibiting misrepresentation of the origin of that material, or
373 requiring that modified versions of such material be marked in
374 reasonable ways as different from the original version; or
375
376 d) Limiting the use for publicity purposes of names of licensors or
377 authors of the material; or
378
379 e) Declining to grant rights under trademark law for use of some
380 trade names, trademarks, or service marks; or
381
382 f) Requiring indemnification of licensors and authors of that
383 material by anyone who conveys the material (or modified versions of
384 it) with contractual assumptions of liability to the recipient, for
385 any liability that these contractual assumptions directly impose on
386 those licensors and authors.
387
388 All other non-permissive additional terms are considered "further
389 restrictions" within the meaning of section 10. If the Program as you
390 received it, or any part of it, contains a notice stating that it is
391 governed by this License along with a term that is a further
392 restriction, you may remove that term. If a license document contains
393 a further restriction but permits relicensing or conveying under this
394 License, you may add to a covered work material governed by the terms
395 of that license document, provided that the further restriction does
396 not survive such relicensing or conveying.
397
398 If you add terms to a covered work in accord with this section, you
399 must place, in the relevant source files, a statement of the
400 additional terms that apply to those files, or a notice indicating
401 where to find the applicable terms.
402
403 Additional terms, permissive or non-permissive, may be stated in the
404 form of a separately written license, or stated as exceptions;
405 the above requirements apply either way.
406
407 8. Termination.
408
409 You may not propagate or modify a covered work except as expressly
410 provided under this License. Any attempt otherwise to propagate or
411 modify it is void, and will automatically terminate your rights under
412 this License (including any patent licenses granted under the third
413 paragraph of section 11).
414
415 However, if you cease all violation of this License, then your
416 license from a particular copyright holder is reinstated (a)
417 provisionally, unless and until the copyright holder explicitly and
418 finally terminates your license, and (b) permanently, if the copyright
419 holder fails to notify you of the violation by some reasonable means
420 prior to 60 days after the cessation.
421
422 Moreover, your license from a particular copyright holder is
423 reinstated permanently if the copyright holder notifies you of the
424 violation by some reasonable means, this is the first time you have
425 received notice of violation of this License (for any work) from that
426 copyright holder, and you cure the violation prior to 30 days after
427 your receipt of the notice.
428
429 Termination of your rights under this section does not terminate the
430 licenses of parties who have received copies or rights from you under
431 this License. If your rights have been terminated and not permanently
432 reinstated, you do not qualify to receive new licenses for the same
433 material under section 10.
434
435 9. Acceptance Not Required for Having Copies.
436
437 You are not required to accept this License in order to receive or
438 run a copy of the Program. Ancillary propagation of a covered work
439 occurring solely as a consequence of using peer-to-peer transmission
440 to receive a copy likewise does not require acceptance. However,
441 nothing other than this License grants you permission to propagate or
442 modify any covered work. These actions infringe copyright if you do
443 not accept this License. Therefore, by modifying or propagating a
444 covered work, you indicate your acceptance of this License to do so.
445
446 10. Automatic Licensing of Downstream Recipients.
447
448 Each time you convey a covered work, the recipient automatically
449 receives a license from the original licensors, to run, modify and
450 propagate that work, subject to this License. You are not responsible
451 for enforcing compliance by third parties with this License.
452
453 An "entity transaction" is a transaction transferring control of an
454 organization, or substantially all assets of one, or subdividing an
455 organization, or merging organizations. If propagation of a covered
456 work results from an entity transaction, each party to that
457 transaction who receives a copy of the work also receives whatever
458 licenses to the work the party's predecessor in interest had or could
459 give under the previous paragraph, plus a right to possession of the
460 Corresponding Source of the work from the predecessor in interest, if
461 the predecessor has it or can get it with reasonable efforts.
462
463 You may not impose any further restrictions on the exercise of the
464 rights granted or affirmed under this License. For example, you may
465 not impose a license fee, royalty, or other charge for exercise of
466 rights granted under this License, and you may not initiate litigation
467 (including a cross-claim or counterclaim in a lawsuit) alleging that
468 any patent claim is infringed by making, using, selling, offering for
469 sale, or importing the Program or any portion of it.
470
471 11. Patents.
472
473 A "contributor" is a copyright holder who authorizes use under this
474 License of the Program or a work on which the Program is based. The
475 work thus licensed is called the contributor's "contributor version".
476
477 A contributor's "essential patent claims" are all patent claims
478 owned or controlled by the contributor, whether already acquired or
479 hereafter acquired, that would be infringed by some manner, permitted
480 by this License, of making, using, or selling its contributor version,
481 but do not include claims that would be infringed only as a
482 consequence of further modification of the contributor version. For
483 purposes of this definition, "control" includes the right to grant
484 patent sublicenses in a manner consistent with the requirements of
485 this License.
486
487 Each contributor grants you a non-exclusive, worldwide, royalty-free
488 patent license under the contributor's essential patent claims, to
489 make, use, sell, offer for sale, import and otherwise run, modify and
490 propagate the contents of its contributor version.
491
492 In the following three paragraphs, a "patent license" is any express
493 agreement or commitment, however denominated, not to enforce a patent
494 (such as an express permission to practice a patent or covenant not to
495 sue for patent infringement). To "grant" such a patent license to a
496 party means to make such an agreement or commitment not to enforce a
497 patent against the party.
498
499 If you convey a covered work, knowingly relying on a patent license,
500 and the Corresponding Source of the work is not available for anyone
501 to copy, free of charge and under the terms of this License, through a
502 publicly available network server or other readily accessible means,
503 then you must either (1) cause the Corresponding Source to be so
504 available, or (2) arrange to deprive yourself of the benefit of the
505 patent license for this particular work, or (3) arrange, in a manner
506 consistent with the requirements of this License, to extend the patent
507 license to downstream recipients. "Knowingly relying" means you have
508 actual knowledge that, but for the patent license, your conveying the
509 covered work in a country, or your recipient's use of the covered work
510 in a country, would infringe one or more identifiable patents in that
511 country that you have reason to believe are valid.
512
513 If, pursuant to or in connection with a single transaction or
514 arrangement, you convey, or propagate by procuring conveyance of, a
515 covered work, and grant a patent license to some of the parties
516 receiving the covered work authorizing them to use, propagate, modify
517 or convey a specific copy of the covered work, then the patent license
518 you grant is automatically extended to all recipients of the covered
519 work and works based on it.
520
521 A patent license is "discriminatory" if it does not include within
522 the scope of its coverage, prohibits the exercise of, or is
523 conditioned on the non-exercise of one or more of the rights that are
524 specifically granted under this License. You may not convey a covered
525 work if you are a party to an arrangement with a third party that is
526 in the business of distributing software, under which you make payment
527 to the third party based on the extent of your activity of conveying
528 the work, and under which the third party grants, to any of the
529 parties who would receive the covered work from you, a discriminatory
530 patent license (a) in connection with copies of the covered work
531 conveyed by you (or copies made from those copies), or (b) primarily
532 for and in connection with specific products or compilations that
533 contain the covered work, unless you entered into that arrangement,
534 or that patent license was granted, prior to 28 March 2007.
535
536 Nothing in this License shall be construed as excluding or limiting
537 any implied license or other defenses to infringement that may
538 otherwise be available to you under applicable patent law.
539
540 12. No Surrender of Others' Freedom.
541
542 If conditions are imposed on you (whether by court order, agreement or
543 otherwise) that contradict the conditions of this License, they do not
544 excuse you from the conditions of this License. If you cannot convey a
545 covered work so as to satisfy simultaneously your obligations under this
546 License and any other pertinent obligations, then as a consequence you may
547 not convey it at all. For example, if you agree to terms that obligate you
548 to collect a royalty for further conveying from those to whom you convey
549 the Program, the only way you could satisfy both those terms and this
550 License would be to refrain entirely from conveying the Program.
551
552 13. Use with the GNU Affero General Public License.
553
554 Notwithstanding any other provision of this License, you have
555 permission to link or combine any covered work with a work licensed
556 under version 3 of the GNU Affero General Public License into a single
557 combined work, and to convey the resulting work. The terms of this
558 License will continue to apply to the part which is the covered work,
559 but the special requirements of the GNU Affero General Public License,
560 section 13, concerning interaction through a network will apply to the
561 combination as such.
562
563 14. Revised Versions of this License.
564
565 The Free Software Foundation may publish revised and/or new versions of
566 the GNU General Public License from time to time. Such new versions will
567 be similar in spirit to the present version, but may differ in detail to
568 address new problems or concerns.
569
570 Each version is given a distinguishing version number. If the
571 Program specifies that a certain numbered version of the GNU General
572 Public License "or any later version" applies to it, you have the
573 option of following the terms and conditions either of that numbered
574 version or of any later version published by the Free Software
575 Foundation. If the Program does not specify a version number of the
576 GNU General Public License, you may choose any version ever published
577 by the Free Software Foundation.
578
579 If the Program specifies that a proxy can decide which future
580 versions of the GNU General Public License can be used, that proxy's
581 public statement of acceptance of a version permanently authorizes you
582 to choose that version for the Program.
583
584 Later license versions may give you additional or different
585 permissions. However, no additional obligations are imposed on any
586 author or copyright holder as a result of your choosing to follow a
587 later version.
588
589 15. Disclaimer of Warranty.
590
591 THERE IS NO WARRANTY FOR THE PROGRAM, TO THE EXTENT PERMITTED BY
592 APPLICABLE LAW. EXCEPT WHEN OTHERWISE STATED IN WRITING THE COPYRIGHT
593 HOLDERS AND/OR OTHER PARTIES PROVIDE THE PROGRAM "AS IS" WITHOUT WARRANTY
594 OF ANY KIND, EITHER EXPRESSED OR IMPLIED, INCLUDING, BUT NOT LIMITED TO,
595 THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
596 PURPOSE. THE ENTIRE RISK AS TO THE QUALITY AND PERFORMANCE OF THE PROGRAM
597 IS WITH YOU. SHOULD THE PROGRAM PROVE DEFECTIVE, YOU ASSUME THE COST OF
598 ALL NECESSARY SERVICING, REPAIR OR CORRECTION.
599
600 16. Limitation of Liability.
601
602 IN NO EVENT UNLESS REQUIRED BY APPLICABLE LAW OR AGREED TO IN WRITING
603 WILL ANY COPYRIGHT HOLDER, OR ANY OTHER PARTY WHO MODIFIES AND/OR CONVEYS
604 THE PROGRAM AS PERMITTED ABOVE, BE LIABLE TO YOU FOR DAMAGES, INCLUDING ANY
605 GENERAL, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES ARISING OUT OF THE
606 USE OR INABILITY TO USE THE PROGRAM (INCLUDING BUT NOT LIMITED TO LOSS OF
607 DATA OR DATA BEING RENDERED INACCURATE OR LOSSES SUSTAINED BY YOU OR THIRD
608 PARTIES OR A FAILURE OF THE PROGRAM TO OPERATE WITH ANY OTHER PROGRAMS),
609 EVEN IF SUCH HOLDER OR OTHER PARTY HAS BEEN ADVISED OF THE POSSIBILITY OF
610 SUCH DAMAGES.
611
612 17. Interpretation of Sections 15 and 16.
613
614 If the disclaimer of warranty and limitation of liability provided
615 above cannot be given local legal effect according to their terms,
616 reviewing courts shall apply local law that most closely approximates
617 an absolute waiver of all civil liability in connection with the
618 Program, unless a warranty or assumption of liability accompanies a
619 copy of the Program in return for a fee.
620
621 END OF TERMS AND CONDITIONS
622
623 How to Apply These Terms to Your New Programs
624
625 If you develop a new program, and you want it to be of the greatest
626 possible use to the public, the best way to achieve this is to make it
627 free software which everyone can redistribute and change under these terms.
628
629 To do so, attach the following notices to the program. It is safest
630 to attach them to the start of each source file to most effectively
631 state the exclusion of warranty; and each file should have at least
632 the "copyright" line and a pointer to where the full notice is found.
633
634 <one line to give the program's name and a brief idea of what it does.>
635 Copyright (C) <year> <name of author>
636
637 This program is free software: you can redistribute it and/or modify
638 it under the terms of the GNU General Public License as published by
639 the Free Software Foundation, either version 3 of the License, or
640 (at your option) any later version.
641
642 This program is distributed in the hope that it will be useful,
643 but WITHOUT ANY WARRANTY; without even the implied warranty of
644 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
645 GNU General Public License for more details.
646
647 You should have received a copy of the GNU General Public License
648 along with this program. If not, see <http://www.gnu.org/licenses/>.
649
650 Also add information on how to contact you by electronic and paper mail.
651
652 If the program does terminal interaction, make it output a short
653 notice like this when it starts in an interactive mode:
654
655 <program> Copyright (C) <year> <name of author>
656 This program comes with ABSOLUTELY NO WARRANTY; for details type `show w'.
657 This is free software, and you are welcome to redistribute it
658 under certain conditions; type `show c' for details.
659
660 The hypothetical commands `show w' and `show c' should show the appropriate
661 parts of the General Public License. Of course, your program's commands
662 might be different; for a GUI interface, you would use an "about box".
663
664 You should also get your employer (if you work as a programmer) or school,
665 if any, to sign a "copyright disclaimer" for the program, if necessary.
666 For more information on this, and how to apply and follow the GNU GPL, see
667 <http://www.gnu.org/licenses/>.
668
669 The GNU General Public License does not permit incorporating your program
670 into proprietary programs. If your program is a subroutine library, you
671 may consider it more useful to permit linking proprietary applications with
672 the library. If this is what you want to do, use the GNU Lesser General
673 Public License instead of this License. But first, please read
674 <http://www.gnu.org/philosophy/why-not-lgpl.html>.
@@ -0,0 +1,18
1 /*------------------------------------------------------------------------------
2 -- This file is a part of the LPP VHDL IP LIBRARY
3 -- Copyright (C) 2009 - 2010, Laboratory of Plasmas Physic - CNRS
4 --
5 -- This program is free software; you can redistribute it and/or modify
6 -- it under the terms of the GNU General Public License as published by
7 -- the Free Software Foundation; either version 3 of the License, or
8 -- (at your option) any later version.
9 --
10 -- This program is distributed in the hope that it will be useful,
11 -- but WITHOUT ANY WARRANTY; without even the implied warranty of
12 -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 -- GNU General Public License for more details.
14 --
15 -- You should have received a copy of the GNU General Public License
16 -- along with this program; if not, write to the Free Software
17 -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 -------------------------------------------------------------------------------*/
@@ -0,0 +1,18
1 /*------------------------------------------------------------------------------
2 -- This file is a part of the LPP VHDL IP LIBRARY
3 -- Copyright (C) 2009 - 2010, Laboratory of Plasmas Physic - CNRS
4 --
5 -- This program is free software; you can redistribute it and/or modify
6 -- it under the terms of the GNU General Public License as published by
7 -- the Free Software Foundation; either version 3 of the License, or
8 -- (at your option) any later version.
9 --
10 -- This program is distributed in the hope that it will be useful,
11 -- but WITHOUT ANY WARRANTY; without even the implied warranty of
12 -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 -- GNU General Public License for more details.
14 --
15 -- You should have received a copy of the GNU General Public License
16 -- along with this program; if not, write to the Free Software
17 -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 -------------------------------------------------------------------------------*/
@@ -0,0 +1,18
1 ------------------------------------------------------------------------------
2 -- This file is a part of the LPP VHDL IP LIBRARY
3 -- Copyright (C) 2009 - 2010, Laboratory of Plasmas Physic - CNRS
4 --
5 -- This program is free software; you can redistribute it and/or modify
6 -- it under the terms of the GNU General Public License as published by
7 -- the Free Software Foundation; either version 3 of the License, or
8 -- (at your option) any later version.
9 --
10 -- This program is distributed in the hope that it will be useful,
11 -- but WITHOUT ANY WARRANTY; without even the implied warranty of
12 -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 -- GNU General Public License for more details.
14 --
15 -- You should have received a copy of the GNU General Public License
16 -- along with this program; if not, write to the Free Software
17 -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 -------------------------------------------------------------------------------
@@ -0,0 +1,33
1 echo "======================================================================================="
2 echo "---------------------------------------------------------------------------------------"
3 echo " PDF Doc generator "
4 echo " Copyright (C) 2010 Laboratory of Plasmas Physic. "
5 echo "======================================================================================="
6 echo '----------------------------------------------------------------------------------------
7 This file is a part of the LPP VHDL IP LIBRARY
8 Copyright (C) 2010, Laboratory of Plasmas Physic - CNRS
9
10 This program is free software; you can redistribute it and/or modify
11 it under the terms of the GNU General Public License as published by
12 the Free Software Foundation; either version 3 of the License, or
13 (at your option) any later version.
14
15 This program is distributed in the hope that it will be useful,
16 but WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 GNU General Public License for more details.
19
20 You should have received a copy of the GNU General Public License
21 along with this program; if not, write to the Free Software
22 Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
23 ----------------------------------------------------------------------------------------'
24 echo
25 echo
26 echo
27
28
29
30
31 cd doc/latex
32 make
33 cp refman.pdf ../../VHD_lib.pdf
@@ -24,9 +24,14 help:
24 24 @echo
25 25
26 26 allGPL:
27 sh $(SCRIPTSDIR)/GPL_Patcher.sh -R
27 @echo "Scanning VHDL files ..."
28 sh $(SCRIPTSDIR)/GPL_Patcher.sh -R vhd lib
29 @echo "Scanning C files ..."
30 sh $(SCRIPTSDIR)/GPL_Patcher.sh -R c LPP_drivers
31 @echo "Scanning H files ..."
32 sh $(SCRIPTSDIR)/GPL_Patcher.sh -R h LPP_drivers
28 33
29 init: allGPL
34 init:
30 35 sh $(SCRIPTSDIR)/vhdlsynPatcher.sh
31 36 sh $(SCRIPTSDIR)/makeDirs.sh lib/lpp
32 37
@@ -45,6 +50,5 Patched-dist: Patch-GRLIB
45 50 doc:
46 51 doxygen lib/lpp/Doxyfile
47 52
48 pdf:
49 make lib/lpp/doc/latex
50 cp lib/lpp/doc/latex/refman.pdf lib/lpp/doc/VHD_lib.pdf
53 pdf: doc
54 sh $(SCRIPTSDIR)/doc.sh
@@ -1,6 +1,3
1
2
3
4 1 -----------------------------------------------------------------------------
5 2 -- LEON3 Demonstration design test bench configuration
6 3 -- Copyright (C) 2009 Aeroflex Gaisler
@@ -4,7 +4,7
4 4 --
5 5 -- This program is free software; you can redistribute it and/or modify
6 6 -- it under the terms of the GNU General Public License as published by
7 -- the Free Software Foundation; either version 2 of the License, or
7 -- the Free Software Foundation; either version 3 of the License, or
8 8 -- (at your option) any later version.
9 9 --
10 10 -- This program is distributed in the hope that it will be useful,
@@ -16,25 +16,6
16 16 -- along with this program; if not, write to the Free Software
17 17 -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 18 -------------------------------------------------------------------------------
19 ----------------------------------------------------------------------------------
20 -- Company:
21 -- Engineer:
22 --
23 -- Create Date: 09:21:03 10/19/2010
24 -- Design Name:
25 -- Module Name: FRAME_CLK_GEN - Behavioral
26 -- Project Name:
27 -- Target Devices:
28 -- Tool versions:
29 -- Description:
30 --
31 -- Dependencies:
32 --
33 -- Revision:
34 -- Revision 0.01 - File Created
35 -- Additional Comments:
36 --
37 ----------------------------------------------------------------------------------
38 19 library IEEE;
39 20 use IEEE.STD_LOGIC_1164.ALL;
40 21 use IEEE.NUMERIC_STD.ALL;
@@ -4,7 +4,7
4 4 --
5 5 -- This program is free software; you can redistribute it and/or modify
6 6 -- it under the terms of the GNU General Public License as published by
7 -- the Free Software Foundation; either version 2 of the License, or
7 -- the Free Software Foundation; either version 3 of the License, or
8 8 -- (at your option) any later version.
9 9 --
10 10 -- This program is distributed in the hope that it will be useful,
@@ -16,12 +16,6
16 16 -- along with this program; if not, write to the Free Software
17 17 -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 18 -------------------------------------------------------------------------------
19 -- Package File Template
20 --
21 -- Purpose: This package defines supplemental types, subtypes,
22 -- constants, and functions
23
24
25 19 library IEEE;
26 20 use IEEE.STD_LOGIC_1164.all;
27 21 library lpp;
@@ -1,10 +1,10
1 ------------------------------------------------------------------------------
1 ------------------------------------------------------------------------------
2 2 -- This file is a part of the LPP VHDL IP LIBRARY
3 3 -- Copyright (C) 2009 - 2010, Laboratory of Plasmas Physic - CNRS
4 4 --
5 5 -- This program is free software; you can redistribute it and/or modify
6 6 -- it under the terms of the GNU General Public License as published by
7 -- the Free Software Foundation; either version 2 of the License, or
7 -- the Free Software Foundation; either version 3 of the License, or
8 8 -- (at your option) any later version.
9 9 --
10 10 -- This program is distributed in the hope that it will be useful,
@@ -16,25 +16,6
16 16 -- along with this program; if not, write to the Free Software
17 17 -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 18 -------------------------------------------------------------------------------
19 ----------------------------------------------------------------------------------
20 -- Company:
21 -- Engineer:
22 --
23 -- Create Date: 10:09:57 10/13/2010
24 -- Design Name:
25 -- Module Name: LCD_2x16_DRIVER - Behavioral
26 -- Project Name:
27 -- Target Devices:
28 -- Tool versions:
29 -- Description:
30 --
31 -- Dependencies:
32 --
33 -- Revision:
34 -- Revision 0.01 - File Created
35 -- Additional Comments:
36 --
37 ----------------------------------------------------------------------------------
38 19
39 20 ---TDODO => Clean Enable pulse FSM
40 21 library IEEE;
@@ -4,7 +4,7
4 4 --
5 5 -- This program is free software; you can redistribute it and/or modify
6 6 -- it under the terms of the GNU General Public License as published by
7 -- the Free Software Foundation; either version 2 of the License, or
7 -- the Free Software Foundation; either version 3 of the License, or
8 8 -- (at your option) any later version.
9 9 --
10 10 -- This program is distributed in the hope that it will be useful,
@@ -16,25 +16,6
16 16 -- along with this program; if not, write to the Free Software
17 17 -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 18 -------------------------------------------------------------------------------
19 ----------------------------------------------------------------------------------
20 -- Company:
21 -- Engineer:
22 --
23 -- Create Date: 08:32:21 10/19/2010
24 -- Design Name:
25 -- Module Name: LCD_16x2_ENGINE - Behavioral
26 -- Project Name:
27 -- Target Devices:
28 -- Tool versions:
29 -- Description:
30 --
31 -- Dependencies:
32 --
33 -- Revision:
34 -- Revision 0.01 - File Created
35 -- Additional Comments:
36 --
37 ----------------------------------------------------------------------------------
38 19 library IEEE;
39 20 use IEEE.STD_LOGIC_1164.ALL;
40 21 use IEEE.NUMERIC_STD.ALL;
@@ -4,7 +4,7
4 4 --
5 5 -- This program is free software; you can redistribute it and/or modify
6 6 -- it under the terms of the GNU General Public License as published by
7 -- the Free Software Foundation; either version 2 of the License, or
7 -- the Free Software Foundation; either version 3 of the License, or
8 8 -- (at your option) any later version.
9 9 --
10 10 -- This program is distributed in the hope that it will be useful,
@@ -16,25 +16,6
16 16 -- along with this program; if not, write to the Free Software
17 17 -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 18 -------------------------------------------------------------------------------
19 ----------------------------------------------------------------------------------
20 -- Company:
21 -- Engineer:
22 --
23 -- Create Date: 10:09:57 10/13/2010
24 -- Design Name:
25 -- Module Name: LCD_2x16_DRIVER - Behavioral
26 -- Project Name:
27 -- Target Devices:
28 -- Tool versions:
29 -- Description:
30 --
31 -- Dependencies:
32 --
33 -- Revision:
34 -- Revision 0.01 - File Created
35 -- Additional Comments:
36 --
37 ----------------------------------------------------------------------------------
38 19 library IEEE;
39 20 use IEEE.STD_LOGIC_1164.ALL;
40 21 use IEEE.NUMERIC_STD.all;
@@ -4,7 +4,7
4 4 --
5 5 -- This program is free software; you can redistribute it and/or modify
6 6 -- it under the terms of the GNU General Public License as published by
7 -- the Free Software Foundation; either version 2 of the License, or
7 -- the Free Software Foundation; either version 3 of the License, or
8 8 -- (at your option) any later version.
9 9 --
10 10 -- This program is distributed in the hope that it will be useful,
@@ -16,25 +16,6
16 16 -- along with this program; if not, write to the Free Software
17 17 -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 18 -------------------------------------------------------------------------------
19 ----------------------------------------------------------------------------------
20 -- Company:
21 -- Engineer:
22 --
23 -- Create Date: 08:52:25 10/18/2010
24 -- Design Name:
25 -- Module Name: LCD_CLK_GENERATOR - Behavioral
26 -- Project Name:
27 -- Target Devices:
28 -- Tool versions:
29 -- Description:
30 --
31 -- Dependencies:
32 --
33 -- Revision:
34 -- Revision 0.01 - File Created
35 -- Additional Comments:
36 --
37 ----------------------------------------------------------------------------------
38 19 library IEEE;
39 20 use IEEE.STD_LOGIC_1164.ALL;
40 21 use IEEE.NUMERIC_STD.ALL;
@@ -16,25 +16,7
16 16 -- along with this program; if not, write to the Free Software
17 17 -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 18 -------------------------------------------------------------------------------
19 ----------------------------------------------------------------------------------
20 -- Company:
21 -- Engineer:
22 --
23 -- Create Date: 08:44:41 10/14/2010
24 -- Design Name:
25 -- Module Name: Top_LCD - Behavioral
26 -- Project Name:
27 -- Target Devices:
28 -- Tool versions:
29 -- Description:
30 --
31 -- Dependencies:
32 --
33 -- Revision:
34 -- Revision 0.01 - File Created
35 -- Additional Comments:
36 --
37 ----------------------------------------------------------------------------------
19 ------------------------------------------------------------------------------
38 20 library IEEE;
39 21 use IEEE.STD_LOGIC_1164.ALL;
40 22
@@ -4,7 +4,7
4 4 --
5 5 -- This program is free software; you can redistribute it and/or modify
6 6 -- it under the terms of the GNU General Public License as published by
7 -- the Free Software Foundation; either version 2 of the License, or
7 -- the Free Software Foundation; either version 3 of the License, or
8 8 -- (at your option) any later version.
9 9 --
10 10 -- This program is distributed in the hope that it will be useful,
@@ -16,12 +16,11
16 16 -- along with this program; if not, write to the Free Software
17 17 -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 18 -------------------------------------------------------------------------------
19
20 19 library ieee;
21 20 use ieee.std_logic_1164.all;
22 library grlib;
23 use grlib.amba.all;
24 use grlib.stdlib.all;
21 library grlib;
22 use grlib.amba.all;
23 use grlib.stdlib.all;
25 24 use grlib.devices.all;
26 25
27 26
@@ -143,17 +142,17 end component;
143 142
144 143
145 144 component apb_lcd_ctrlr is
146 generic (
147 pindex : integer := 0;
148 paddr : integer := 0;
149 pmask : integer := 16#fff#;
150 pirq : integer := 0;
151 abits : integer := 8);
152 port (
153 rst : in std_ulogic;
154 clk : in std_ulogic;
155 apbi : in apb_slv_in_type;
156 apbo : out apb_slv_out_type;
145 generic (
146 pindex : integer := 0;
147 paddr : integer := 0;
148 pmask : integer := 16#fff#;
149 pirq : integer := 0;
150 abits : integer := 8);
151 port (
152 rst : in std_ulogic;
153 clk : in std_ulogic;
154 apbi : in apb_slv_in_type;
155 apbo : out apb_slv_out_type;
157 156 LCD_data : out STD_LOGIC_VECTOR (7 downto 0);
158 157 LCD_RS : out STD_LOGIC;
159 158 LCD_RW : out STD_LOGIC;
@@ -161,7 +160,7 component apb_lcd_ctrlr is
161 160 LCD_RET : out STD_LOGIC;
162 161 LCD_CS1 : out STD_LOGIC;
163 162 LCD_CS2 : out STD_LOGIC;
164 SF_CE0 : out std_logic
163 SF_CE0 : out std_logic
165 164 );
166 165 end component;
167 166
@@ -4,7 +4,7
4 4 --
5 5 -- This program is free software; you can redistribute it and/or modify
6 6 -- it under the terms of the GNU General Public License as published by
7 -- the Free Software Foundation; either version 2 of the License, or
7 -- the Free Software Foundation; either version 3 of the License, or
8 8 -- (at your option) any later version.
9 9 --
10 10 -- This program is distributed in the hope that it will be useful,
@@ -16,31 +16,12
16 16 -- along with this program; if not, write to the Free Software
17 17 -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 18 -------------------------------------------------------------------------------
19 ----------------------------------------------------------------------------------
20 -- Company:
21 -- Engineer:
22 --
23 -- Create Date: 08:44:41 10/14/2010
24 -- Design Name:
25 -- Module Name: Top_LCD - Behavioral
26 -- Project Name:
27 -- Target Devices:
28 -- Tool versions:
29 -- Description:
30 --
31 -- Dependencies:
32 --
33 -- Revision:
34 -- Revision 0.01 - File Created
35 -- Additional Comments:
36 --
37 ----------------------------------------------------------------------------------
38 19 library IEEE;
39 20 use IEEE.STD_LOGIC_1164.ALL;
40 21 use ieee.numeric_std.all;
41 library grlib;
42 use grlib.amba.all;
43 use grlib.stdlib.all;
22 library grlib;
23 use grlib.amba.all;
24 use grlib.stdlib.all;
44 25 use grlib.devices.all;
45 26 library lpp;
46 27 use lpp.amba_lcd_16x2_ctrlr.all;
@@ -48,17 +29,17 use lpp.LCD_16x2_CFG.all;
48 29 use lpp.lpp_amba.all;
49 30
50 31 entity apb_lcd_ctrlr is
51 generic (
52 pindex : integer := 0;
53 paddr : integer := 0;
54 pmask : integer := 16#fff#;
55 pirq : integer := 0;
56 abits : integer := 8);
57 port (
58 rst : in std_ulogic;
59 clk : in std_ulogic;
60 apbi : in apb_slv_in_type;
61 apbo : out apb_slv_out_type;
32 generic (
33 pindex : integer := 0;
34 paddr : integer := 0;
35 pmask : integer := 16#fff#;
36 pirq : integer := 0;
37 abits : integer := 8);
38 port (
39 rst : in std_ulogic;
40 clk : in std_ulogic;
41 apbi : in apb_slv_in_type;
42 apbo : out apb_slv_out_type;
62 43 LCD_data : out STD_LOGIC_VECTOR (7 downto 0);
63 44 LCD_RS : out STD_LOGIC;
64 45 LCD_RW : out STD_LOGIC;
@@ -66,7 +47,7 entity apb_lcd_ctrlr is
66 47 LCD_RET : out STD_LOGIC;
67 48 LCD_CS1 : out STD_LOGIC;
68 49 LCD_CS2 : out STD_LOGIC;
69 SF_CE0 : out std_logic
50 SF_CE0 : out std_logic
70 51 );
71 52 end apb_lcd_ctrlr;
72 53
@@ -80,27 +61,27 signal LCD_CTRL : LCD_DRVR_CTRL_BUSS;
80 61
81 62
82 63
83 constant REVISION : integer := 1;
84
85 constant pconfig : apb_config_type := (
86 0 => ahb_device_reg (VENDOR_LPP, LPP_LCD_CTRLR, 0, REVISION, 0),
87 1 => apb_iobar(paddr, pmask));
88
89
64 constant REVISION : integer := 1;
65
66 constant pconfig : apb_config_type := (
67 0 => ahb_device_reg (VENDOR_LPP, LPP_LCD_CTRLR, 0, REVISION, 0),
68 1 => apb_iobar(paddr, pmask));
69
70
90 71 --type FRM_Buff_El is std_logic_vector(31 downto 0);
91 72 type FRM_Buff_Reg is array(lcd_space_size-1 downto 0) of std_logic_vector(31 downto 0);
92 73
93
94 type LCD_ctrlr_Reg is record
95 CTRL_Reg : std_logic_vector(31 downto 0);
96 FRAME_BUFF : FRM_Buff_Reg;
97 end record;
98
99 signal r : LCD_ctrlr_Reg;
74
75 type LCD_ctrlr_Reg is record
76 CTRL_Reg : std_logic_vector(31 downto 0);
77 FRAME_BUFF : FRM_Buff_Reg;
78 end record;
100 79
101 signal Rdata : std_logic_vector(31 downto 0);
102
103 begin
80 signal r : LCD_ctrlr_Reg;
81
82 signal Rdata : std_logic_vector(31 downto 0);
83
84 begin
104 85
105 86 LCD_data <= LCD_CTRL.LCD_DATA;
106 87 LCD_RS <= LCD_CTRL.LCD_RS;
@@ -121,54 +102,54 r.CTRL_Reg(10) <= Ready;
121 102
122 103 Driver0 : LCD_16x2_ENGINE
123 104 generic map(50000)
124 Port map(clk,rst,FramBUFF,CMD,Exec,Ready,LCD_CTRL);
105 Port map(clk,rst,FramBUFF,CMD,Exec,Ready,LCD_CTRL);
125 106
126 107 FRM_BF : for i in 0 to lcd_space_size-1 generate
127 108 FramBUFF(i) <= r.FRAME_BUFF(i)(7 downto 0);
128 end generate;
109 end generate;
110
129 111
130
131 process(rst,clk)
132 begin
133 if rst = '0' then
112 process(rst,clk)
113 begin
114 if rst = '0' then
134 115 r.CTRL_Reg(9 downto 0) <= (others => '0');
135 Exec <= '0';
136 elsif clk'event and clk = '1' then
137
138 --APB Write OP
139 if (apbi.psel(pindex) and apbi.penable and apbi.pwrite) = '1' then
140 case apbi.paddr(7 downto 2) is
141 when "000000" =>
116 Exec <= '0';
117 elsif clk'event and clk = '1' then
118
119 --APB Write OP
120 if (apbi.psel(pindex) and apbi.penable and apbi.pwrite) = '1' then
121 case apbi.paddr(7 downto 2) is
122 when "000000" =>
142 123 r.CTRL_Reg(9 downto 0) <= apbi.pwdata(9 downto 0);
143 Exec <= '1';
144 when others =>
124 Exec <= '1';
125 when others =>
145 126 writeC: for i in 1 to lcd_space_size loop
146 127 if TO_INTEGER(unsigned(apbi.paddr(abits-1 downto 2))) =i then
147 128 r.FRAME_BUFF(i-1) <= apbi.pwdata;
148 129 end if;
149 130 Exec <= '0';
150 end loop;
131 end loop;
151 132 end case;
152 133 else
153 Exec <= '0';
154 end if;
155
156 --APB READ OP
157 if (apbi.psel(pindex) and (not apbi.pwrite)) = '1' then
158 case apbi.paddr(7 downto 2) is
159 when "000000" =>
160 Rdata <= r.CTRL_Reg;
161 when others =>
134 Exec <= '0';
135 end if;
136
137 --APB READ OP
138 if (apbi.psel(pindex) and (not apbi.pwrite)) = '1' then
139 case apbi.paddr(7 downto 2) is
140 when "000000" =>
141 Rdata <= r.CTRL_Reg;
142 when others =>
162 143 readC: for i in 1 to lcd_space_size loop
163 144 if TO_INTEGER(unsigned(apbi.paddr(abits-1 downto 2))) =i then
164 145 Rdata(7 downto 0) <= r.FRAME_BUFF(i-1)(7 downto 0);
165 146 end if;
166 end loop;
167 end case;
168 end if;
169
170 end if;
171 apbo.pconfig <= pconfig;
147 end loop;
148 end case;
149 end if;
150
151 end if;
152 apbo.pconfig <= pconfig;
172 153 end process;
173 154
174 155 apbo.prdata <= Rdata when apbi.penable = '1' ;
@@ -1,4 +1,7
1 1 ./general_purpose
2 ./lpp_ad_Conv
3 ./lpp_CNA_amba
4 ./lpp_uart
2 5 ./lpp_amba
3 6 ./dsp/iir_filter
4 7 ./amba_lcd_16x2_ctrlr
@@ -4,7 +4,7
4 4 --
5 5 -- This program is free software; you can redistribute it and/or modify
6 6 -- it under the terms of the GNU General Public License as published by
7 -- the Free Software Foundation; either version 2 of the License, or
7 -- the Free Software Foundation; either version 3 of the License, or
8 8 -- (at your option) any later version.
9 9 --
10 10 -- This program is distributed in the hope that it will be useful,
@@ -16,7 +16,6
16 16 -- along with this program; if not, write to the Free Software
17 17 -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 18 -------------------------------------------------------------------------------
19 -- APB_IIR_CEL.vhd
20 19 library ieee;
21 20 use ieee.std_logic_1164.all;
22 21 use ieee.numeric_std.all;
@@ -4,7 +4,7
4 4 --
5 5 -- This program is free software; you can redistribute it and/or modify
6 6 -- it under the terms of the GNU General Public License as published by
7 -- the Free Software Foundation; either version 2 of the License, or
7 -- the Free Software Foundation; either version 3 of the License, or
8 8 -- (at your option) any later version.
9 9 --
10 10 -- This program is distributed in the hope that it will be useful,
@@ -16,87 +16,86
16 16 -- along with this program; if not, write to the Free Software
17 17 -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 18 -------------------------------------------------------------------------------
19 -- FILTER.vhd
20 library IEEE;
21 use IEEE.numeric_std.all;
22 use IEEE.std_logic_1164.all;
23 library lpp;
24 use lpp.iir_filter.all;
25 use lpp.FILTERcfg.all;
26 use lpp.general_purpose.all;
27 --Maximum filter speed(smps/s) = Fclk/(Nchanels*Ncoefs)
28 --exemple 26MHz sys clock and 6 chanels @ 110ksmps/s
29 --Ncoefs = 26 000 000 /(6 * 110 000) = 39 coefs
30
31 entity FILTER is
32 port(
33
34 reset : in std_logic;
35 clk : in std_logic;
36 sample_clk : in std_logic;
37 Sample_IN : in std_logic_vector(Smpl_SZ*ChanelsCNT-1 downto 0);
38 Sample_OUT : out std_logic_vector(Smpl_SZ*ChanelsCNT-1 downto 0)
39 );
40 end entity;
41
42
43
44
45
46 architecture ar_FILTER of FILTER is
47
48
49
50
51 signal ALU_ctrl : std_logic_vector(3 downto 0);
52 signal Sample : std_logic_vector(Smpl_SZ-1 downto 0);
53 signal Coef : std_logic_vector(Coef_SZ-1 downto 0);
54 signal ALU_OUT : std_logic_vector(Smpl_SZ+Coef_SZ-1 downto 0);
55
56 begin
57
58 --==============================================================
59 --=========================A L U================================
60 --==============================================================
61 ALU1 : entity ALU
62 generic map(
63 Arith_en => 1,
64 Logic_en => 0,
65 Input_SZ_1 => Smpl_SZ,
66 Input_SZ_2 => Coef_SZ
67
68 )
69 port map(
70 clk => clk,
71 reset => reset,
72 ctrl => ALU_ctrl,
73 OP1 => Sample,
74 OP2 => Coef,
75 RES => ALU_OUT
76 );
77 --==============================================================
78
79 --==============================================================
80 --===============F I L T E R C O N T R O L E R================
81 --==============================================================
82 filterctrlr1 : FilterCTRLR
83 port map(
84 reset => reset,
85 clk => clk,
86 sample_clk => sample_clk,
87 ALU_Ctrl => ALU_ctrl,
88 sample_in => sample_Tbl,
89 coef => Coef,
90 sample => Sample
91 );
92 --==============================================================
93
94 chanelCut : for i in 0 to ChanelsCNT-1 generate
95 sample_Tbl(i) <= Sample_IN((i+1)*Smpl_SZ-1 downto i*Smpl_SZ);
96 end generate;
97
98
99
100
101 end ar_FILTER;
102
19 library IEEE;
20 use IEEE.numeric_std.all;
21 use IEEE.std_logic_1164.all;
22 library lpp;
23 use lpp.iir_filter.all;
24 use lpp.FILTERcfg.all;
25 use lpp.general_purpose.all;
26 --Maximum filter speed(smps/s) = Fclk/(Nchanels*Ncoefs)
27 --exemple 26MHz sys clock and 6 chanels @ 110ksmps/s
28 --Ncoefs = 26 000 000 /(6 * 110 000) = 39 coefs
29
30 entity FILTER is
31 port(
32
33 reset : in std_logic;
34 clk : in std_logic;
35 sample_clk : in std_logic;
36 Sample_IN : in std_logic_vector(Smpl_SZ*ChanelsCNT-1 downto 0);
37 Sample_OUT : out std_logic_vector(Smpl_SZ*ChanelsCNT-1 downto 0)
38 );
39 end entity;
40
41
42
43
44
45 architecture ar_FILTER of FILTER is
46
47
48
49
50 signal ALU_ctrl : std_logic_vector(3 downto 0);
51 signal Sample : std_logic_vector(Smpl_SZ-1 downto 0);
52 signal Coef : std_logic_vector(Coef_SZ-1 downto 0);
53 signal ALU_OUT : std_logic_vector(Smpl_SZ+Coef_SZ-1 downto 0);
54
55 begin
56
57 --==============================================================
58 --=========================A L U================================
59 --==============================================================
60 ALU1 : entity ALU
61 generic map(
62 Arith_en => 1,
63 Logic_en => 0,
64 Input_SZ_1 => Smpl_SZ,
65 Input_SZ_2 => Coef_SZ
66
67 )
68 port map(
69 clk => clk,
70 reset => reset,
71 ctrl => ALU_ctrl,
72 OP1 => Sample,
73 OP2 => Coef,
74 RES => ALU_OUT
75 );
76 --==============================================================
77
78 --==============================================================
79 --===============F I L T E R C O N T R O L E R================
80 --==============================================================
81 filterctrlr1 : FilterCTRLR
82 port map(
83 reset => reset,
84 clk => clk,
85 sample_clk => sample_clk,
86 ALU_Ctrl => ALU_ctrl,
87 sample_in => sample_Tbl,
88 coef => Coef,
89 sample => Sample
90 );
91 --==============================================================
92
93 chanelCut : for i in 0 to ChanelsCNT-1 generate
94 sample_Tbl(i) <= Sample_IN((i+1)*Smpl_SZ-1 downto i*Smpl_SZ);
95 end generate;
96
97
98
99
100 end ar_FILTER;
101
@@ -4,7 +4,7
4 4 --
5 5 -- This program is free software; you can redistribute it and/or modify
6 6 -- it under the terms of the GNU General Public License as published by
7 -- the Free Software Foundation; either version 2 of the License, or
7 -- the Free Software Foundation; either version 3 of the License, or
8 8 -- (at your option) any later version.
9 9 --
10 10 -- This program is distributed in the hope that it will be useful,
@@ -16,7 +16,6
16 16 -- along with this program; if not, write to the Free Software
17 17 -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 18 -------------------------------------------------------------------------------
19 -- FILTER_RAM_CTRLR.vhd
20 19 library IEEE;
21 20 use IEEE.numeric_std.all;
22 21 use IEEE.std_logic_1164.all;
@@ -4,7 +4,7
4 4 --
5 5 -- This program is free software; you can redistribute it and/or modify
6 6 -- it under the terms of the GNU General Public License as published by
7 -- the Free Software Foundation; either version 2 of the License, or
7 -- the Free Software Foundation; either version 3 of the License, or
8 8 -- (at your option) any later version.
9 9 --
10 10 -- This program is distributed in the hope that it will be useful,
@@ -16,7 +16,6
16 16 -- along with this program; if not, write to the Free Software
17 17 -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 18 -------------------------------------------------------------------------------
19 -- FILTERcfg.vhd
20 19 library IEEE;
21 20 use IEEE.numeric_std.all;
22 21 use IEEE.std_logic_1164.all;
@@ -4,7 +4,7
4 4 --
5 5 -- This program is free software; you can redistribute it and/or modify
6 6 -- it under the terms of the GNU General Public License as published by
7 -- the Free Software Foundation; either version 2 of the License, or
7 -- the Free Software Foundation; either version 3 of the License, or
8 8 -- (at your option) any later version.
9 9 --
10 10 -- This program is distributed in the hope that it will be useful,
@@ -16,7 +16,6
16 16 -- along with this program; if not, write to the Free Software
17 17 -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 18 -------------------------------------------------------------------------------
19 -- FilterCTRLR.vhd
20 19 library IEEE;
21 20 use IEEE.numeric_std.all;
22 21 use IEEE.std_logic_1164.all;
@@ -4,7 +4,7
4 4 --
5 5 -- This program is free software; you can redistribute it and/or modify
6 6 -- it under the terms of the GNU General Public License as published by
7 -- the Free Software Foundation; either version 2 of the License, or
7 -- the Free Software Foundation; either version 3 of the License, or
8 8 -- (at your option) any later version.
9 9 --
10 10 -- This program is distributed in the hope that it will be useful,
@@ -16,7 +16,10
16 16 -- along with this program; if not, write to the Free Software
17 17 -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 18 -------------------------------------------------------------------------------
19 -- IIR_CEL_CTRLR.vhd
19 ------------------------------------------------------------------------------
20 -- This file is a part of the LPP VHDL IP LIBRARY
21 -- Copyright (C) 2009 - 2010, Laboratory of Plasmas Physic - CNRS
22 --
20 23 library IEEE;
21 24 use IEEE.numeric_std.all;
22 25 use IEEE.std_logic_1164.all;
@@ -4,7 +4,7
4 4 --
5 5 -- This program is free software; you can redistribute it and/or modify
6 6 -- it under the terms of the GNU General Public License as published by
7 -- the Free Software Foundation; either version 2 of the License, or
7 -- the Free Software Foundation; either version 3 of the License, or
8 8 -- (at your option) any later version.
9 9 --
10 10 -- This program is distributed in the hope that it will be useful,
@@ -16,75 +16,73
16 16 -- along with this program; if not, write to the Free Software
17 17 -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 18 -------------------------------------------------------------------------------
19 -- IIR_CEL_FILTER.vhd
20
21 library IEEE;
22 use IEEE.numeric_std.all;
23 use IEEE.std_logic_1164.all;
24 library lpp;
25 use lpp.iir_filter.all;
26 use lpp.FILTERcfg.all;
27 use lpp.general_purpose.all;
28
29 --TODO am�liorer la gestion de la RAM et de la flexibilit� du filtre
30
31 entity IIR_CEL_FILTER is
32 generic(Sample_SZ : integer := 16);
33 port(
34 reset : in std_logic;
35 clk : in std_logic;
36 sample_clk : in std_logic;
37 regs_in : in in_IIR_CEL_reg;
38 regs_out : in out_IIR_CEL_reg;
39 sample_in : in samplT;
40 sample_out : out samplT
41
42 );
43 end IIR_CEL_FILTER;
44
45
46
47
48 architecture ar_IIR_CEL_FILTER of IIR_CEL_FILTER is
49
50 signal virg_pos : integer;
51 begin
52
53 virg_pos <= to_integer(unsigned(regs_in.virgPos));
54
55
56 CTRLR : IIR_CEL_CTRLR
57 generic map (Sample_SZ => Sample_SZ)
58 port map(
59 reset => reset,
60 clk => clk,
61 sample_clk => sample_clk,
62 sample_in => sample_in,
63 sample_out => sample_out,
64 virg_pos => virg_pos,
65 coefs => regs_in.coefsTB
66 );
67
68
69
70
71
72 end ar_IIR_CEL_FILTER;
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
19 library IEEE;
20 use IEEE.numeric_std.all;
21 use IEEE.std_logic_1164.all;
22 library lpp;
23 use lpp.iir_filter.all;
24 use lpp.FILTERcfg.all;
25 use lpp.general_purpose.all;
26
27 --TODO am�liorer la gestion de la RAM et de la flexibilit� du filtre
28
29 entity IIR_CEL_FILTER is
30 generic(Sample_SZ : integer := 16);
31 port(
32 reset : in std_logic;
33 clk : in std_logic;
34 sample_clk : in std_logic;
35 regs_in : in in_IIR_CEL_reg;
36 regs_out : in out_IIR_CEL_reg;
37 sample_in : in samplT;
38 sample_out : out samplT
39
40 );
41 end IIR_CEL_FILTER;
42
43
44
45
46 architecture ar_IIR_CEL_FILTER of IIR_CEL_FILTER is
47
48 signal virg_pos : integer;
49 begin
50
51 virg_pos <= to_integer(unsigned(regs_in.virgPos));
52
53
54 CTRLR : IIR_CEL_CTRLR
55 generic map (Sample_SZ => Sample_SZ)
56 port map(
57 reset => reset,
58 clk => clk,
59 sample_clk => sample_clk,
60 sample_in => sample_in,
61 sample_out => sample_out,
62 virg_pos => virg_pos,
63 coefs => regs_in.coefsTB
64 );
65
66
67
68
69
70 end ar_IIR_CEL_FILTER;
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
@@ -4,7 +4,7
4 4 --
5 5 -- This program is free software; you can redistribute it and/or modify
6 6 -- it under the terms of the GNU General Public License as published by
7 -- the Free Software Foundation; either version 2 of the License, or
7 -- the Free Software Foundation; either version 3 of the License, or
8 8 -- (at your option) any later version.
9 9 --
10 10 -- This program is distributed in the hope that it will be useful,
@@ -16,7 +16,6
16 16 -- along with this program; if not, write to the Free Software
17 17 -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 18 -------------------------------------------------------------------------------
19 -- RAM.vhd
20 19 library ieee;
21 20 use ieee.std_logic_1164.all;
22 21 use IEEE.numeric_std.all;
@@ -4,7 +4,7
4 4 --
5 5 -- This program is free software; you can redistribute it and/or modify
6 6 -- it under the terms of the GNU General Public License as published by
7 -- the Free Software Foundation; either version 2 of the License, or
7 -- the Free Software Foundation; either version 3 of the License, or
8 8 -- (at your option) any later version.
9 9 --
10 10 -- This program is distributed in the hope that it will be useful,
@@ -16,7 +16,6
16 16 -- along with this program; if not, write to the Free Software
17 17 -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 18 -------------------------------------------------------------------------------
19 -- RAM_CEL.vhd
20 19 library ieee;
21 20 use ieee.std_logic_1164.all;
22 21 use IEEE.numeric_std.all;
@@ -4,7 +4,7
4 4 --
5 5 -- This program is free software; you can redistribute it and/or modify
6 6 -- it under the terms of the GNU General Public License as published by
7 -- the Free Software Foundation; either version 2 of the License, or
7 -- the Free Software Foundation; either version 3 of the License, or
8 8 -- (at your option) any later version.
9 9 --
10 10 -- This program is distributed in the hope that it will be useful,
@@ -16,7 +16,6
16 16 -- along with this program; if not, write to the Free Software
17 17 -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 18 -------------------------------------------------------------------------------
19 -- RAM_CTRLR2.vhd
20 19 library IEEE;
21 20 use IEEE.numeric_std.all;
22 21 use IEEE.std_logic_1164.all;
@@ -4,7 +4,7
4 4 --
5 5 -- This program is free software; you can redistribute it and/or modify
6 6 -- it under the terms of the GNU General Public License as published by
7 -- the Free Software Foundation; either version 2 of the License, or
7 -- the Free Software Foundation; either version 3 of the License, or
8 8 -- (at your option) any later version.
9 9 --
10 10 -- This program is distributed in the hope that it will be useful,
@@ -16,99 +16,98
16 16 -- along with this program; if not, write to the Free Software
17 17 -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 18 -------------------------------------------------------------------------------
19 -- TestbenshMAC.vhd
20 19 library IEEE;
21 20 use IEEE.numeric_std.all;
22 use IEEE.std_logic_1164.all;
23
24
25
26 entity TestbenshMAC is
27 end TestbenshMAC;
28
29
30
31
32 architecture ar_TestbenshMAC of TestbenshMAC is
33
34
35
36 constant OP1sz : integer := 16;
37 constant OP2sz : integer := 12;
38 --IDLE =00 MAC =01 MULT =10 ADD =11
39 constant IDLE : std_logic_vector(1 downto 0) := "00";
40 constant MAC : std_logic_vector(1 downto 0) := "01";
41 constant MULT : std_logic_vector(1 downto 0) := "10";
42 constant ADD : std_logic_vector(1 downto 0) := "11";
43
44 signal clk : std_logic:='0';
45 signal reset : std_logic:='0';
46 signal clrMAC : std_logic:='0';
47 signal MAC_MUL_ADD : std_logic_vector(1 downto 0):=IDLE;
48 signal Operand1 : std_logic_vector(OP1sz-1 downto 0):=(others => '0');
49 signal Operand2 : std_logic_vector(OP2sz-1 downto 0):=(others => '0');
50 signal Resultat : std_logic_vector(OP1sz+OP2sz-1 downto 0);
51
52
53
54
55 begin
56
57
58 MAC1 : entity LPP_IIR_FILTER.MAC
59 generic map(
60 Input_SZ_A => OP1sz,
61 Input_SZ_B => OP2sz
62
63 )
64 port map(
65 clk => clk,
66 reset => reset,
67 clr_MAC => clrMAC,
68 MAC_MUL_ADD => MAC_MUL_ADD,
69 OP1 => Operand1,
70 OP2 => Operand2,
71 RES => Resultat
72 );
73
74 clk <= not clk after 25 ns;
75
76 process
77 begin
78 wait for 40 ns;
79 reset <= '1';
80 wait for 11 ns;
81 Operand1 <= X"0001";
82 Operand2 <= X"001";
83 MAC_MUL_ADD <= ADD;
84 wait for 50 ns;
85 Operand1 <= X"0001";
86 Operand2 <= X"100";
87 wait for 50 ns;
88 Operand1 <= X"0001";
89 Operand2 <= X"001";
90 MAC_MUL_ADD <= MULT;
91 wait for 50 ns;
92 Operand1 <= X"0002";
93 Operand2 <= X"002";
94 wait for 50 ns;
95 clrMAC <= '1';
96 wait for 50 ns;
97 clrMAC <= '0';
98 Operand1 <= X"0001";
99 Operand2 <= X"003";
100 MAC_MUL_ADD <= MAC;
101 wait;
102 end process;
103 end ar_TestbenshMAC;
104
105
106
107
108
109
110
111
112
113
114
21 use IEEE.std_logic_1164.all;
22
23
24
25 entity TestbenshMAC is
26 end TestbenshMAC;
27
28
29
30
31 architecture ar_TestbenshMAC of TestbenshMAC is
32
33
34
35 constant OP1sz : integer := 16;
36 constant OP2sz : integer := 12;
37 --IDLE =00 MAC =01 MULT =10 ADD =11
38 constant IDLE : std_logic_vector(1 downto 0) := "00";
39 constant MAC : std_logic_vector(1 downto 0) := "01";
40 constant MULT : std_logic_vector(1 downto 0) := "10";
41 constant ADD : std_logic_vector(1 downto 0) := "11";
42
43 signal clk : std_logic:='0';
44 signal reset : std_logic:='0';
45 signal clrMAC : std_logic:='0';
46 signal MAC_MUL_ADD : std_logic_vector(1 downto 0):=IDLE;
47 signal Operand1 : std_logic_vector(OP1sz-1 downto 0):=(others => '0');
48 signal Operand2 : std_logic_vector(OP2sz-1 downto 0):=(others => '0');
49 signal Resultat : std_logic_vector(OP1sz+OP2sz-1 downto 0);
50
51
52
53
54 begin
55
56
57 MAC1 : entity LPP_IIR_FILTER.MAC
58 generic map(
59 Input_SZ_A => OP1sz,
60 Input_SZ_B => OP2sz
61
62 )
63 port map(
64 clk => clk,
65 reset => reset,
66 clr_MAC => clrMAC,
67 MAC_MUL_ADD => MAC_MUL_ADD,
68 OP1 => Operand1,
69 OP2 => Operand2,
70 RES => Resultat
71 );
72
73 clk <= not clk after 25 ns;
74
75 process
76 begin
77 wait for 40 ns;
78 reset <= '1';
79 wait for 11 ns;
80 Operand1 <= X"0001";
81 Operand2 <= X"001";
82 MAC_MUL_ADD <= ADD;
83 wait for 50 ns;
84 Operand1 <= X"0001";
85 Operand2 <= X"100";
86 wait for 50 ns;
87 Operand1 <= X"0001";
88 Operand2 <= X"001";
89 MAC_MUL_ADD <= MULT;
90 wait for 50 ns;
91 Operand1 <= X"0002";
92 Operand2 <= X"002";
93 wait for 50 ns;
94 clrMAC <= '1';
95 wait for 50 ns;
96 clrMAC <= '0';
97 Operand1 <= X"0001";
98 Operand2 <= X"003";
99 MAC_MUL_ADD <= MAC;
100 wait;
101 end process;
102 end ar_TestbenshMAC;
103
104
105
106
107
108
109
110
111
112
113
@@ -4,7 +4,7
4 4 --
5 5 -- This program is free software; you can redistribute it and/or modify
6 6 -- it under the terms of the GNU General Public License as published by
7 -- the Free Software Foundation; either version 2 of the License, or
7 -- the Free Software Foundation; either version 3 of the License, or
8 8 -- (at your option) any later version.
9 9 --
10 10 -- This program is distributed in the hope that it will be useful,
@@ -16,4 +16,3
16 16 -- along with this program; if not, write to the Free Software
17 17 -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 18 -------------------------------------------------------------------------------
19 -- Top_Filtre_IIR.vhd No newline at end of file
@@ -4,7 +4,7
4 4 --
5 5 -- This program is free software; you can redistribute it and/or modify
6 6 -- it under the terms of the GNU General Public License as published by
7 -- the Free Software Foundation; either version 2 of the License, or
7 -- the Free Software Foundation; either version 3 of the License, or
8 8 -- (at your option) any later version.
9 9 --
10 10 -- This program is distributed in the hope that it will be useful,
@@ -16,6 +16,7
16 16 -- along with this program; if not, write to the Free Software
17 17 -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 18 -------------------------------------------------------------------------------
19 ------------------------------------------------------------------------------
19 20 library ieee;
20 21 use ieee.std_logic_1164.all;
21 22 library grlib;
@@ -4,7 +4,7
4 4 --
5 5 -- This program is free software; you can redistribute it and/or modify
6 6 -- it under the terms of the GNU General Public License as published by
7 -- the Free Software Foundation; either version 2 of the License, or
7 -- the Free Software Foundation; either version 3 of the License, or
8 8 -- (at your option) any later version.
9 9 --
10 10 -- This program is distributed in the hope that it will be useful,
@@ -16,7 +16,6
16 16 -- along with this program; if not, write to the Free Software
17 17 -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 18 -------------------------------------------------------------------------------
19 -- ADDRcntr.vhd
20 19 library IEEE;
21 20 use IEEE.numeric_std.all;
22 21 use IEEE.std_logic_1164.all;
@@ -4,7 +4,7
4 4 --
5 5 -- This program is free software; you can redistribute it and/or modify
6 6 -- it under the terms of the GNU General Public License as published by
7 -- the Free Software Foundation; either version 2 of the License, or
7 -- the Free Software Foundation; either version 3 of the License, or
8 8 -- (at your option) any later version.
9 9 --
10 10 -- This program is distributed in the hope that it will be useful,
@@ -16,7 +16,9
16 16 -- along with this program; if not, write to the Free Software
17 17 -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 18 -------------------------------------------------------------------------------
19 -- ALU.vhd
19 ------------------------------------------------------------------------------
20 -- This file is a part of the LPP VHDL IP LIBRARY
21 -- Copyright (C) 2009 - 2010, Laboratory of Plasmas Physic - CNRS
20 22 library IEEE;
21 23 use IEEE.numeric_std.all;
22 24 use IEEE.std_logic_1164.all;
@@ -4,7 +4,7
4 4 --
5 5 -- This program is free software; you can redistribute it and/or modify
6 6 -- it under the terms of the GNU General Public License as published by
7 -- the Free Software Foundation; either version 2 of the License, or
7 -- the Free Software Foundation; either version 3 of the License, or
8 8 -- (at your option) any later version.
9 9 --
10 10 -- This program is distributed in the hope that it will be useful,
@@ -16,7 +16,6
16 16 -- along with this program; if not, write to the Free Software
17 17 -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 18 -------------------------------------------------------------------------------
19 -- Adder.vhd
20 19 library IEEE;
21 20 use IEEE.numeric_std.all;
22 21 use IEEE.std_logic_1164.all;
@@ -3,20 +3,6
3 3 -- Copyright (C) 2009 - 2010, Laboratory of Plasmas Physic - CNRS
4 4 --
5 5 -- This program is free software; you can redistribute it and/or modify
6 -- it under the terms of the GNU General Public License as published by
7 -- the Free Software Foundation; either version 2 of the License, or
8 -- (at your option) any later version.
9 --
10 -- This program is distributed in the hope that it will be useful,
11 -- but WITHOUT ANY WARRANTY; without even the implied warranty of
12 -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 -- GNU General Public License for more details.
14 --
15 -- You should have received a copy of the GNU General Public License
16 -- along with this program; if not, write to the Free Software
17 -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 -------------------------------------------------------------------------------
19 -- MAC.vhd
20 6 library IEEE;
21 7 use IEEE.numeric_std.all;
22 8 use IEEE.std_logic_1164.all;
@@ -4,7 +4,7
4 4 --
5 5 -- This program is free software; you can redistribute it and/or modify
6 6 -- it under the terms of the GNU General Public License as published by
7 -- the Free Software Foundation; either version 2 of the License, or
7 -- the Free Software Foundation; either version 3 of the License, or
8 8 -- (at your option) any later version.
9 9 --
10 10 -- This program is distributed in the hope that it will be useful,
@@ -16,7 +16,7
16 16 -- along with this program; if not, write to the Free Software
17 17 -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 18 -------------------------------------------------------------------------------
19 -- MAC_CONTROLER.vhd
19 ------------------------------------------------------------------------------
20 20 library IEEE;
21 21 use IEEE.numeric_std.all;
22 22 use IEEE.std_logic_1164.all;
@@ -4,7 +4,7
4 4 --
5 5 -- This program is free software; you can redistribute it and/or modify
6 6 -- it under the terms of the GNU General Public License as published by
7 -- the Free Software Foundation; either version 2 of the License, or
7 -- the Free Software Foundation; either version 3 of the License, or
8 8 -- (at your option) any later version.
9 9 --
10 10 -- This program is distributed in the hope that it will be useful,
@@ -16,7 +16,6
16 16 -- along with this program; if not, write to the Free Software
17 17 -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 18 -------------------------------------------------------------------------------
19 -- MAC_MUX.vhd
20 19 library IEEE;
21 20 use IEEE.numeric_std.all;
22 21 use IEEE.std_logic_1164.all;
@@ -4,7 +4,7
4 4 --
5 5 -- This program is free software; you can redistribute it and/or modify
6 6 -- it under the terms of the GNU General Public License as published by
7 -- the Free Software Foundation; either version 2 of the License, or
7 -- the Free Software Foundation; either version 3 of the License, or
8 8 -- (at your option) any later version.
9 9 --
10 10 -- This program is distributed in the hope that it will be useful,
@@ -16,7 +16,6
16 16 -- along with this program; if not, write to the Free Software
17 17 -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 18 -------------------------------------------------------------------------------
19 -- MAC_MUX2.vhd
20 19 library IEEE;
21 20 use IEEE.numeric_std.all;
22 21 use IEEE.std_logic_1164.all;
@@ -4,7 +4,7
4 4 --
5 5 -- This program is free software; you can redistribute it and/or modify
6 6 -- it under the terms of the GNU General Public License as published by
7 -- the Free Software Foundation; either version 2 of the License, or
7 -- the Free Software Foundation; either version 3 of the License, or
8 8 -- (at your option) any later version.
9 9 --
10 10 -- This program is distributed in the hope that it will be useful,
@@ -16,7 +16,6
16 16 -- along with this program; if not, write to the Free Software
17 17 -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 18 -------------------------------------------------------------------------------
19 -- MAC_REG.vhd
20 19 library IEEE;
21 20 use IEEE.numeric_std.all;
22 21 use IEEE.std_logic_1164.all;
@@ -4,7 +4,7
4 4 --
5 5 -- This program is free software; you can redistribute it and/or modify
6 6 -- it under the terms of the GNU General Public License as published by
7 -- the Free Software Foundation; either version 2 of the License, or
7 -- the Free Software Foundation; either version 3 of the License, or
8 8 -- (at your option) any later version.
9 9 --
10 10 -- This program is distributed in the hope that it will be useful,
@@ -16,7 +16,6
16 16 -- along with this program; if not, write to the Free Software
17 17 -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 18 -------------------------------------------------------------------------------
19 -- MUX2.vhd
20 19 library IEEE;
21 20 use IEEE.numeric_std.all;
22 21 use IEEE.std_logic_1164.all;
@@ -4,7 +4,7
4 4 --
5 5 -- This program is free software; you can redistribute it and/or modify
6 6 -- it under the terms of the GNU General Public License as published by
7 -- the Free Software Foundation; either version 2 of the License, or
7 -- the Free Software Foundation; either version 3 of the License, or
8 8 -- (at your option) any later version.
9 9 --
10 10 -- This program is distributed in the hope that it will be useful,
@@ -16,7 +16,6
16 16 -- along with this program; if not, write to the Free Software
17 17 -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 18 -------------------------------------------------------------------------------
19 -- Multiplier.vhd
20 19 library IEEE;
21 20 use IEEE.numeric_std.all;
22 21 use IEEE.std_logic_1164.all;
@@ -4,7 +4,7
4 4 --
5 5 -- This program is free software; you can redistribute it and/or modify
6 6 -- it under the terms of the GNU General Public License as published by
7 -- the Free Software Foundation; either version 2 of the License, or
7 -- the Free Software Foundation; either version 3 of the License, or
8 8 -- (at your option) any later version.
9 9 --
10 10 -- This program is distributed in the hope that it will be useful,
@@ -16,7 +16,6
16 16 -- along with this program; if not, write to the Free Software
17 17 -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 18 -------------------------------------------------------------------------------
19 -- REG.vhd
20 19 library IEEE;
21 20 use IEEE.numeric_std.all;
22 21 use IEEE.std_logic_1164.all;
@@ -4,7 +4,7
4 4 --
5 5 -- This program is free software; you can redistribute it and/or modify
6 6 -- it under the terms of the GNU General Public License as published by
7 -- the Free Software Foundation; either version 2 of the License, or
7 -- the Free Software Foundation; either version 3 of the License, or
8 8 -- (at your option) any later version.
9 9 --
10 10 -- This program is distributed in the hope that it will be useful,
@@ -16,7 +16,6
16 16 -- along with this program; if not, write to the Free Software
17 17 -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 18 -------------------------------------------------------------------------------
19 -- Shifter.vhd
20 19 library IEEE;
21 20 use IEEE.numeric_std.all;
22 21 use IEEE.std_logic_1164.all;
@@ -4,7 +4,7
4 4 --
5 5 -- This program is free software; you can redistribute it and/or modify
6 6 -- it under the terms of the GNU General Public License as published by
7 -- the Free Software Foundation; either version 2 of the License, or
7 -- the Free Software Foundation; either version 3 of the License, or
8 8 -- (at your option) any later version.
9 9 --
10 10 -- This program is distributed in the hope that it will be useful,
@@ -16,121 +16,120
16 16 -- along with this program; if not, write to the Free Software
17 17 -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 18 -------------------------------------------------------------------------------
19 -- TestbenshALU.vhd
20 19 library IEEE;
21 20 use IEEE.numeric_std.all;
22 use IEEE.std_logic_1164.all;
23
24
25
26 entity TestbenshALU is
27 end TestbenshALU;
28
29
30
31
32 architecture ar_TestbenshALU of TestbenshALU is
33
34
35
36 constant OP1sz : integer := 16;
37 constant OP2sz : integer := 12;
38 --IDLE =00 MAC =01 MULT =10 ADD =11
39 constant IDLE : std_logic_vector(3 downto 0) := "0000";
40 constant MAC : std_logic_vector(3 downto 0) := "0001";
41 constant MULT : std_logic_vector(3 downto 0) := "0010";
42 constant ADD : std_logic_vector(3 downto 0) := "0011";
43 constant clr_mac : std_logic_vector(3 downto 0) := "0100";
44
45 signal clk : std_logic:='0';
46 signal reset : std_logic:='0';
47 signal ctrl : std_logic_vector(3 downto 0):=IDLE;
48 signal Operand1 : std_logic_vector(OP1sz-1 downto 0):=(others => '0');
49 signal Operand2 : std_logic_vector(OP2sz-1 downto 0):=(others => '0');
50 signal Resultat : std_logic_vector(OP1sz+OP2sz-1 downto 0);
51
52
53
54
55 begin
56
57 ALU1 : entity LPP_IIR_FILTER.ALU
58 generic map(
59 Arith_en => 1,
60 Logic_en => 0,
61 Input_SZ_1 => OP1sz,
62 Input_SZ_2 => OP2sz
63
64 )
65 port map(
66 clk => clk,
67 reset => reset,
68 ctrl => ctrl,
69 OP1 => Operand1,
70 OP2 => Operand2,
71 RES => Resultat
72 );
73
74
75
76
77 clk <= not clk after 25 ns;
78
79 process
80 begin
81 wait for 40 ns;
82 reset <= '1';
83 wait for 11 ns;
84 Operand1 <= X"0001";
85 Operand2 <= X"001";
86 ctrl <= ADD;
87 wait for 50 ns;
88 Operand1 <= X"0001";
89 Operand2 <= X"100";
90 wait for 50 ns;
91 Operand1 <= X"0001";
92 Operand2 <= X"001";
93 ctrl <= MULT;
94 wait for 50 ns;
95 Operand1 <= X"0002";
96 Operand2 <= X"002";
97 wait for 50 ns;
98 ctrl <= clr_mac;
99 wait for 50 ns;
100 Operand1 <= X"0001";
101 Operand2 <= X"003";
102 ctrl <= MAC;
103 wait for 50 ns;
104 Operand1 <= X"0001";
105 Operand2 <= X"001";
106 wait for 50 ns;
107 Operand1 <= X"0011";
108 Operand2 <= X"003";
109 wait for 50 ns;
110 Operand1 <= X"1001";
111 Operand2 <= X"003";
112 wait for 50 ns;
113 Operand1 <= X"0001";
114 Operand2 <= X"000";
115 wait for 50 ns;
116 Operand1 <= X"0001";
117 Operand2 <= X"003";
118 wait for 50 ns;
119 Operand1 <= X"0101";
120 Operand2 <= X"053";
121 wait for 50 ns;
122 ctrl <= clr_mac;
123 wait;
124 end process;
125 end ar_TestbenshALU;
126
127
128
129
130
131
132
133
134
135
136
21 use IEEE.std_logic_1164.all;
22
23
24
25 entity TestbenshALU is
26 end TestbenshALU;
27
28
29
30
31 architecture ar_TestbenshALU of TestbenshALU is
32
33
34
35 constant OP1sz : integer := 16;
36 constant OP2sz : integer := 12;
37 --IDLE =00 MAC =01 MULT =10 ADD =11
38 constant IDLE : std_logic_vector(3 downto 0) := "0000";
39 constant MAC : std_logic_vector(3 downto 0) := "0001";
40 constant MULT : std_logic_vector(3 downto 0) := "0010";
41 constant ADD : std_logic_vector(3 downto 0) := "0011";
42 constant clr_mac : std_logic_vector(3 downto 0) := "0100";
43
44 signal clk : std_logic:='0';
45 signal reset : std_logic:='0';
46 signal ctrl : std_logic_vector(3 downto 0):=IDLE;
47 signal Operand1 : std_logic_vector(OP1sz-1 downto 0):=(others => '0');
48 signal Operand2 : std_logic_vector(OP2sz-1 downto 0):=(others => '0');
49 signal Resultat : std_logic_vector(OP1sz+OP2sz-1 downto 0);
50
51
52
53
54 begin
55
56 ALU1 : entity LPP_IIR_FILTER.ALU
57 generic map(
58 Arith_en => 1,
59 Logic_en => 0,
60 Input_SZ_1 => OP1sz,
61 Input_SZ_2 => OP2sz
62
63 )
64 port map(
65 clk => clk,
66 reset => reset,
67 ctrl => ctrl,
68 OP1 => Operand1,
69 OP2 => Operand2,
70 RES => Resultat
71 );
72
73
74
75
76 clk <= not clk after 25 ns;
77
78 process
79 begin
80 wait for 40 ns;
81 reset <= '1';
82 wait for 11 ns;
83 Operand1 <= X"0001";
84 Operand2 <= X"001";
85 ctrl <= ADD;
86 wait for 50 ns;
87 Operand1 <= X"0001";
88 Operand2 <= X"100";
89 wait for 50 ns;
90 Operand1 <= X"0001";
91 Operand2 <= X"001";
92 ctrl <= MULT;
93 wait for 50 ns;
94 Operand1 <= X"0002";
95 Operand2 <= X"002";
96 wait for 50 ns;
97 ctrl <= clr_mac;
98 wait for 50 ns;
99 Operand1 <= X"0001";
100 Operand2 <= X"003";
101 ctrl <= MAC;
102 wait for 50 ns;
103 Operand1 <= X"0001";
104 Operand2 <= X"001";
105 wait for 50 ns;
106 Operand1 <= X"0011";
107 Operand2 <= X"003";
108 wait for 50 ns;
109 Operand1 <= X"1001";
110 Operand2 <= X"003";
111 wait for 50 ns;
112 Operand1 <= X"0001";
113 Operand2 <= X"000";
114 wait for 50 ns;
115 Operand1 <= X"0001";
116 Operand2 <= X"003";
117 wait for 50 ns;
118 Operand1 <= X"0101";
119 Operand2 <= X"053";
120 wait for 50 ns;
121 ctrl <= clr_mac;
122 wait;
123 end process;
124 end ar_TestbenshALU;
125
126
127
128
129
130
131
132
133
134
135
@@ -4,7 +4,7
4 4 --
5 5 -- This program is free software; you can redistribute it and/or modify
6 6 -- it under the terms of the GNU General Public License as published by
7 -- the Free Software Foundation; either version 2 of the License, or
7 -- the Free Software Foundation; either version 3 of the License, or
8 8 -- (at your option) any later version.
9 9 --
10 10 -- This program is distributed in the hope that it will be useful,
@@ -16,7 +16,6
16 16 -- along with this program; if not, write to the Free Software
17 17 -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 18 -------------------------------------------------------------------------------
19
20 19 library ieee;
21 20 use ieee.std_logic_1164.all;
22 21
@@ -24,6 +23,20 use ieee.std_logic_1164.all;
24 23
25 24 package general_purpose is
26 25
26
27
28 component Clk_divider is
29 generic(OSC_freqHz : integer := 50000000;
30 TargetFreq_Hz : integer := 50000);
31 Port ( clk : in STD_LOGIC;
32 reset : in STD_LOGIC;
33 clk_divided : out STD_LOGIC);
34 end component;
35
36
37
38
39
27 40 component Adder is
28 41 generic(
29 42 Input_SZ_A : integer := 16;
@@ -1,6 +1,7
1 1 Adder.vhd
2 2 ADDRcntr.vhd
3 3 ALU.vhd
4 Clk_divider.vhd
4 5 general_purpose.vhd
5 6 MAC_CONTROLER.vhd
6 7 MAC_MUX2.vhd
@@ -1,126 +1,118
1 ------------------------------------------------------------------------------
2 -- This file is a part of the LPP VHDL IP LIBRARY
3 -- Copyright (C) 2009 - 2010, Laboratory of Plasmas Physic - CNRS
4 --
5 -- This program is free software; you can redistribute it and/or modify
6 -- it under the terms of the GNU General Public License as published by
7 -- the Free Software Foundation; either version 2 of the License, or
8 -- (at your option) any later version.
9 --
10 -- This program is distributed in the hope that it will be useful,
11 -- but WITHOUT ANY WARRANTY; without even the implied warranty of
12 -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 -- GNU General Public License for more details.
14 --
15 -- You should have received a copy of the GNU General Public License
16 -- along with this program; if not, write to the Free Software
17 -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 -------------------------------------------------------------------------------
19 -- APB_CNA.vhd
20
21 library ieee;
22 use ieee.std_logic_1164.all;
23 library grlib;
24 use grlib.amba.all;
25 use grlib.stdlib.all;
26 use grlib.devices.all;
27 library lpp;
28 use lpp.lpp_CNA_amba.all;
29
30
31 entity APB_CNA is
32 generic (
33 pindex : integer := 0;
34 paddr : integer := 0;
35 pmask : integer := 16#fff#;
36 pirq : integer := 0;
37 abits : integer := 8);
38 port (
39 clk : in std_logic;
40 rst : in std_logic;
41 apbi : in apb_slv_in_type;
42 apbo : out apb_slv_out_type;
43 SYNC : out std_logic;
44 SCLK : out std_logic;
45 DATA : out std_logic
46 );
47 end APB_CNA;
48
49
50 architecture ar_APB_CNA of APB_CNA is
51
52 constant REVISION : integer := 1;
53
54 constant pconfig : apb_config_type := (
55 0 => ahb_device_reg (VENDOR_LPP, LPP_CNA, 0, REVISION, 0),
56 1 => apb_iobar(paddr, pmask));
57
58 signal flag_nw : std_logic;
59 signal bp : std_logic;
60 signal Rz : std_logic;
61 signal flag_sd : std_logic;
62 signal Rdata : std_logic_vector(31 downto 0);
63
64 type CNA_ctrlr_Reg is record
65 CNA_Cfg : std_logic_vector(3 downto 0);
66 CNA_Data : std_logic_vector(15 downto 0);
67 end record;
68
69 signal Rec : CNA_ctrlr_Reg;
70 --signal ConfigREG : std_logic_vector(3 downto 0);
71 --signal DataREG : std_logic_vector(15 downto 0);
72
73 begin
74
75 bp <= Rec.CNA_Cfg(0);
76 flag_nw <= Rec.CNA_Cfg(1);
77 Rec.CNA_Cfg(2) <= flag_sd;
78 Rec.CNA_Cfg(3) <= Rz;
79
80
81
82 CONVERTER : entity Work.CNA_TabloC
83 port map(clk,rst,flag_nw,bp,Rec.CNA_Data,SYNC,SCLK,Rz,flag_sd,Data);
84
85
86
87 process(rst,clk)
88 begin
89 if(rst='0')then
90 Rec.CNA_Data <= (others => '0');
91
92 elsif(clk'event and clk='1')then
93
94
95 --APB Write OP
96 if (apbi.psel(pindex) and apbi.penable and apbi.pwrite) = '1' then
97 case apbi.paddr(abits-1 downto 2) is
98 when "000000" =>
99 Rec.CNA_Cfg(1 downto 0) <= apbi.pwdata(1 downto 0);
100 when "000001" =>
101 Rec.CNA_Data <= apbi.pwdata(15 downto 0);
102 when others =>
103 null;
104 end case;
105 end if;
106
107 --APB READ OP
108 if (apbi.psel(pindex) and (not apbi.pwrite)) = '1' then
109 case apbi.paddr(abits-1 downto 2) is
110 when "000000" =>
111 Rdata(31 downto 4) <= X"ABCDEF5";
112 Rdata(3 downto 0) <= Rec.CNA_Cfg;
113 when "000001" =>
114 Rdata(31 downto 16) <= X"FD18";
115 Rdata(15 downto 0) <= Rec.CNA_Data;
116 when others =>
117 Rdata <= (others => '0');
118 end case;
119 end if;
120
121 end if;
122 apbo.pconfig <= pconfig;
123 end process;
124
125 apbo.prdata <= Rdata when apbi.penable = '1';
126 end ar_APB_CNA; No newline at end of file
1 ------------------------------------------------------------------------------
2 -- This file is a part of the LPP VHDL IP LIBRARY
3 -- Copyright (C) 2009 - 2010, Laboratory of Plasmas Physic - CNRS
4 --
5 -- This program is free software; you can redistribute it and/or modify
6 -- it under the terms of the GNU General Public License as published by
7 -- the Free Software Foundation; either version 2 of the License, or
8 -- (at your option) any later version.
9 --
10 -- This program is distributed in the hope that it will be useful,
11 -- but WITHOUT ANY WARRANTY; without even the implied warranty of
12 -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 library ieee;
14 use ieee.std_logic_1164.all;
15 library grlib;
16 use grlib.amba.all;
17 use grlib.stdlib.all;
18 use grlib.devices.all;
19 library lpp;
20 use lpp.lpp_CNA_amba.all;
21
22
23 entity APB_CNA is
24 generic (
25 pindex : integer := 0;
26 paddr : integer := 0;
27 pmask : integer := 16#fff#;
28 pirq : integer := 0;
29 abits : integer := 8);
30 port (
31 clk : in std_logic;
32 rst : in std_logic;
33 apbi : in apb_slv_in_type;
34 apbo : out apb_slv_out_type;
35 SYNC : out std_logic;
36 SCLK : out std_logic;
37 DATA : out std_logic
38 );
39 end APB_CNA;
40
41
42 architecture ar_APB_CNA of APB_CNA is
43
44 constant REVISION : integer := 1;
45
46 constant pconfig : apb_config_type := (
47 0 => ahb_device_reg (VENDOR_LPP, LPP_CNA, 0, REVISION, 0),
48 1 => apb_iobar(paddr, pmask));
49
50 signal flag_nw : std_logic;
51 signal bp : std_logic;
52 signal Rz : std_logic;
53 signal flag_sd : std_logic;
54 signal Rdata : std_logic_vector(31 downto 0);
55
56 type CNA_ctrlr_Reg is record
57 CNA_Cfg : std_logic_vector(3 downto 0);
58 CNA_Data : std_logic_vector(15 downto 0);
59 end record;
60
61 signal Rec : CNA_ctrlr_Reg;
62 --signal ConfigREG : std_logic_vector(3 downto 0);
63 --signal DataREG : std_logic_vector(15 downto 0);
64
65 begin
66
67 bp <= Rec.CNA_Cfg(0);
68 flag_nw <= Rec.CNA_Cfg(1);
69 Rec.CNA_Cfg(2) <= flag_sd;
70 Rec.CNA_Cfg(3) <= Rz;
71
72
73
74 CONVERTER : entity Work.CNA_TabloC
75 port map(clk,rst,flag_nw,bp,Rec.CNA_Data,SYNC,SCLK,Rz,flag_sd,Data);
76
77
78
79 process(rst,clk)
80 begin
81 if(rst='0')then
82 Rec.CNA_Data <= (others => '0');
83
84 elsif(clk'event and clk='1')then
85
86
87 --APB Write OP
88 if (apbi.psel(pindex) and apbi.penable and apbi.pwrite) = '1' then
89 case apbi.paddr(abits-1 downto 2) is
90 when "000000" =>
91 Rec.CNA_Cfg(1 downto 0) <= apbi.pwdata(1 downto 0);
92 when "000001" =>
93 Rec.CNA_Data <= apbi.pwdata(15 downto 0);
94 when others =>
95 null;
96 end case;
97 end if;
98
99 --APB READ OP
100 if (apbi.psel(pindex) and (not apbi.pwrite)) = '1' then
101 case apbi.paddr(abits-1 downto 2) is
102 when "000000" =>
103 Rdata(31 downto 4) <= X"ABCDEF5";
104 Rdata(3 downto 0) <= Rec.CNA_Cfg;
105 when "000001" =>
106 Rdata(31 downto 16) <= X"FD18";
107 Rdata(15 downto 0) <= Rec.CNA_Data;
108 when others =>
109 Rdata <= (others => '0');
110 end case;
111 end if;
112
113 end if;
114 apbo.pconfig <= pconfig;
115 end process;
116
117 apbo.prdata <= Rdata when apbi.penable = '1';
118 end ar_APB_CNA;
@@ -1,71 +1,88
1 -- CNA_TabloC.vhd
2 library IEEE;
3 use IEEE.std_logic_1164.all;
4 use IEEE.numeric_std.all;
5 use work.Convertisseur_config.all;
6
7 entity CNA_TabloC is
8 port(
9 clock : in std_logic;
10 rst : in std_logic;
11 flag_nw : in std_logic;
12 bp : in std_logic;
13 Data_C : in std_logic_vector(15 downto 0);
14 SYNC : out std_logic;
15 SCLK : out std_logic;
16 Rz : out std_logic;
17 flag_sd : out std_logic;
18 Data : out std_logic
19 );
20 end CNA_TabloC;
21
22
23 architecture ar_CNA_TabloC of CNA_TabloC is
24
25 component CLKINT
26 port( A : in std_logic := 'U';
27 Y : out std_logic);
28 end component;
29
30 signal clk : std_logic;
31 --signal reset : std_logic;
32
33 signal raz : std_logic;
34 signal sys_clk : std_logic;
35 signal Data_int : std_logic_vector(15 downto 0);
36 signal OKAI_send : std_logic;
37
38 begin
39
40
41 CLKINT_0 : CLKINT
42 port map(A => clock, Y => clk);
43
44 CLKINT_1 : CLKINT
45 port map(A => rst, Y => raz);
46
47
48 SystemCLK : entity work.Clock_Serie
49 generic map (nb_serial)
50 port map (clk,raz,sys_clk);
51
52
53 Signal_sync : entity work.GeneSYNC_flag
54 port map (clk,raz,flag_nw,sys_clk,OKAI_send,SYNC);
55
56
57 Serial : entity work.serialize
58 port map (clk,raz,sys_clk,Data_int,OKAI_send,flag_sd,Data);
59
60
61 --raz <= not reset;
62 Rz <= raz;
63 SCLK <= not sys_clk;
64 --Data_Cvec <= std_logic_vector(to_unsigned(Data_C,12));
65 --Data_TOT <= "0001" & Data_Cvec;
66
67 with bp select
68 Data_int <= X"9555" when '1',
69 Data_C when others;
70
71 end ar_CNA_TabloC; No newline at end of file
1 ------------------------------------------------------------------------------
2 -- This file is a part of the LPP VHDL IP LIBRARY
3 -- Copyright (C) 2009 - 2010, Laboratory of Plasmas Physic - CNRS
4 --
5 -- This program is free software; you can redistribute it and/or modify
6 -- it under the terms of the GNU General Public License as published by
7 -- the Free Software Foundation; either version 3 of the License, or
8 -- (at your option) any later version.
9 --
10 -- This program is distributed in the hope that it will be useful,
11 -- but WITHOUT ANY WARRANTY; without even the implied warranty of
12 -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 -- GNU General Public License for more details.
14 --
15 -- You should have received a copy of the GNU General Public License
16 -- along with this program; if not, write to the Free Software
17 -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 -------------------------------------------------------------------------------
19 library IEEE;
20 use IEEE.std_logic_1164.all;
21 use IEEE.numeric_std.all;
22 use work.Convertisseur_config.all;
23
24 entity CNA_TabloC is
25 port(
26 clock : in std_logic;
27 rst : in std_logic;
28 flag_nw : in std_logic;
29 bp : in std_logic;
30 Data_C : in std_logic_vector(15 downto 0);
31 SYNC : out std_logic;
32 SCLK : out std_logic;
33 Rz : out std_logic;
34 flag_sd : out std_logic;
35 Data : out std_logic
36 );
37 end CNA_TabloC;
38
39
40 architecture ar_CNA_TabloC of CNA_TabloC is
41
42 component CLKINT
43 port( A : in std_logic := 'U';
44 Y : out std_logic);
45 end component;
46
47 signal clk : std_logic;
48 --signal reset : std_logic;
49
50 signal raz : std_logic;
51 signal sys_clk : std_logic;
52 signal Data_int : std_logic_vector(15 downto 0);
53 signal OKAI_send : std_logic;
54
55 begin
56
57
58 CLKINT_0 : CLKINT
59 port map(A => clock, Y => clk);
60
61 CLKINT_1 : CLKINT
62 port map(A => rst, Y => raz);
63
64
65 SystemCLK : entity work.Clock_Serie
66 generic map (nb_serial)
67 port map (clk,raz,sys_clk);
68
69
70 Signal_sync : entity work.GeneSYNC_flag
71 port map (clk,raz,flag_nw,sys_clk,OKAI_send,SYNC);
72
73
74 Serial : entity work.serialize
75 port map (clk,raz,sys_clk,Data_int,OKAI_send,flag_sd,Data);
76
77
78 --raz <= not reset;
79 Rz <= raz;
80 SCLK <= not sys_clk;
81 --Data_Cvec <= std_logic_vector(to_unsigned(Data_C,12));
82 --Data_TOT <= "0001" & Data_Cvec;
83
84 with bp select
85 Data_int <= X"9555" when '1',
86 Data_C when others;
87
88 end ar_CNA_TabloC;
@@ -1,24 +1,41
1 -- Convertisseur_config.vhd
2 library IEEE;
3 use IEEE.std_logic_1164.all;
4 use IEEE.numeric_std.all;
5
6 Package Convertisseur_config is
7
8
9 --===========================================================|
10 --================= Valeurs Sinus 1Khz ======================|
11 --===========================================================|
12 type Tbl is array(natural range <>) of std_logic_vector(11 downto 0);
13 constant Tablo : Tbl (0 to 49):= (X"800",X"901",X"9FD",X"AF2",X"BDB",X"CB4",X"D7A",X"E2A",X"EC1",X"F3D",X"F9C",X"FDC",X"FFC",X"FFC",X"FDC",X"F9C",X"F3D",X"EC1",X"E2A",X"D7A",X"CB4",X"BDB",X"AF2",X"9FD",X"901",X"800",X"6FF",X"603",X"50E",X"425",X"34C",X"286",X"1D6",X"13F",X"0C3",X"064",X"024",X"004",X"004",X"024",X"064",X"0C3",X"13F",X"1D6",X"286",X"34C",X"425",X"50E",X"603",X"6FF");
14
15 --constant Tablo : Tbl (0 to 49):= (X"C00",X"C80",X"CFF",X"D79",X"DED",X"E5A",X"EBD",X"F15",X"F61",X"F9F",X"FCE",X"FEE",X"FFE",X"FFE",X"FEE",X"FCE",X"F9F",X"F61",X"F15",X"EBD",X"E5A",X"DED",X"D79",X"CFF",X"C80",X"C00",X"B80",X"B01",X"A87",X"A13",X"9A6",X"943",X"8EB",X"89F",X"861",X"832",X"812",X"802",X"802",X"812",X"832",X"861",X"89F",X"8EB",X"943",X"9A6",X"A13",X"A87",X"B01",X"B80");
16
17
18 --===========================================================|
19 --============= Fr�quence de s�rialisation ==================|
20 --===========================================================|
21 constant Freq_serial : integer := 1_000_000;
22 constant nb_serial : integer := 40_000_000 / Freq_serial;
23
24 end; No newline at end of file
1 ------------------------------------------------------------------------------
2 -- This file is a part of the LPP VHDL IP LIBRARY
3 -- Copyright (C) 2009 - 2010, Laboratory of Plasmas Physic - CNRS
4 --
5 -- This program is free software; you can redistribute it and/or modify
6 -- it under the terms of the GNU General Public License as published by
7 -- the Free Software Foundation; either version 3 of the License, or
8 -- (at your option) any later version.
9 --
10 -- This program is distributed in the hope that it will be useful,
11 -- but WITHOUT ANY WARRANTY; without even the implied warranty of
12 -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 -- GNU General Public License for more details.
14 --
15 -- You should have received a copy of the GNU General Public License
16 -- along with this program; if not, write to the Free Software
17 -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 -------------------------------------------------------------------------------
19 library IEEE;
20 use IEEE.std_logic_1164.all;
21 use IEEE.numeric_std.all;
22
23 Package Convertisseur_config is
24
25
26 --===========================================================|
27 --================= Valeurs Sinus 1Khz ======================|
28 --===========================================================|
29 type Tbl is array(natural range <>) of std_logic_vector(11 downto 0);
30 constant Tablo : Tbl (0 to 49):= (X"800",X"901",X"9FD",X"AF2",X"BDB",X"CB4",X"D7A",X"E2A",X"EC1",X"F3D",X"F9C",X"FDC",X"FFC",X"FFC",X"FDC",X"F9C",X"F3D",X"EC1",X"E2A",X"D7A",X"CB4",X"BDB",X"AF2",X"9FD",X"901",X"800",X"6FF",X"603",X"50E",X"425",X"34C",X"286",X"1D6",X"13F",X"0C3",X"064",X"024",X"004",X"004",X"024",X"064",X"0C3",X"13F",X"1D6",X"286",X"34C",X"425",X"50E",X"603",X"6FF");
31
32 --constant Tablo : Tbl (0 to 49):= (X"C00",X"C80",X"CFF",X"D79",X"DED",X"E5A",X"EBD",X"F15",X"F61",X"F9F",X"FCE",X"FEE",X"FFE",X"FFE",X"FEE",X"FCE",X"F9F",X"F61",X"F15",X"EBD",X"E5A",X"DED",X"D79",X"CFF",X"C80",X"C00",X"B80",X"B01",X"A87",X"A13",X"9A6",X"943",X"8EB",X"89F",X"861",X"832",X"812",X"802",X"802",X"812",X"832",X"861",X"89F",X"8EB",X"943",X"9A6",X"A13",X"A87",X"B01",X"B80");
33
34
35 --===========================================================|
36 --============= Fr�quence de s�rialisation ==================|
37 --===========================================================|
38 constant Freq_serial : integer := 1_000_000;
39 constant nb_serial : integer := 40_000_000 / Freq_serial;
40
41 end;
@@ -1,94 +1,111
1 -- GeneSYNC_flag.vhd
2 library IEEE;
3 use IEEE.std_logic_1164.all;
4 use IEEE.numeric_std.all;
5
6 entity GeneSYNC_flag is
7
8 port(
9 clk,raz : in std_logic;
10 flag_nw : in std_logic;
11 Sysclk : in std_logic;
12 OKAI_send : out std_logic;
13 SYNC : out std_logic
14 );
15
16 end GeneSYNC_flag;
17
18
19 architecture ar_GeneSYNC_flag of GeneSYNC_flag is
20
21 signal Sysclk_reg : std_logic;
22 signal flag_nw_reg : std_logic;
23 signal count : integer;
24
1 ------------------------------------------------------------------------------
2 -- This file is a part of the LPP VHDL IP LIBRARY
3 -- Copyright (C) 2009 - 2010, Laboratory of Plasmas Physic - CNRS
4 --
5 -- This program is free software; you can redistribute it and/or modify
6 -- it under the terms of the GNU General Public License as published by
7 -- the Free Software Foundation; either version 3 of the License, or
8 -- (at your option) any later version.
9 --
10 -- This program is distributed in the hope that it will be useful,
11 -- but WITHOUT ANY WARRANTY; without even the implied warranty of
12 -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 -- GNU General Public License for more details.
14 --
15 -- You should have received a copy of the GNU General Public License
16 -- along with this program; if not, write to the Free Software
17 -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 -------------------------------------------------------------------------------
19 library IEEE;
20 use IEEE.std_logic_1164.all;
21 use IEEE.numeric_std.all;
22
23 entity GeneSYNC_flag is
24
25 port(
26 clk,raz : in std_logic;
27 flag_nw : in std_logic;
28 Sysclk : in std_logic;
29 OKAI_send : out std_logic;
30 SYNC : out std_logic
31 );
32
33 end GeneSYNC_flag;
34
35
36 architecture ar_GeneSYNC_flag of GeneSYNC_flag is
37
38 signal Sysclk_reg : std_logic;
39 signal flag_nw_reg : std_logic;
40 signal count : integer;
41
25 42 type etat is (e0,e1,e2,eX);
26 signal ect : etat;
27
28 begin
29 process (clk,raz)
30 begin
31 if(raz='0')then
32 SYNC <= '0';
33 Sysclk_reg <= '0';
34 flag_nw_reg <= '0';
35 count <= 14;
36 OKAI_send <= '0';
37 ect <= e0;
38
39 elsif(clk' event and clk='1')then
40 Sysclk_reg <= Sysclk;
41 flag_nw_reg <= flag_nw;
42
43 case ect is
44 when e0 =>
45 if(flag_nw_reg='0' and flag_nw='1')then
46 ect <= e1;
47 else
48 count <= 14;
49 ect <= e0;
50 end if;
51
52
53 when e1 =>
54 if(Sysclk_reg='1' and Sysclk='0')then
55 if(count=15)then
56 SYNC <= '1';
57 count <= count+1;
58 ect <= e2;
59 elsif(count=16)then
60 count <= 0;
61 OKAI_send <= '1';
62 ect <= eX;
63 else
64 count <= count+1;
65 OKAI_send <= '0';
66 ect <= e1;
67 end if;
68 end if;
69
70
71 when e2 =>
72 if(Sysclk_reg='0' and Sysclk='1')then
73 if(count=16)then
74 SYNC <= '0';
75 ect <= e1;
76 end if;
77 end if;
78
79 when eX =>
80 if(Sysclk_reg='0' and Sysclk='1')then
81 if(count=15)then
82 OKAI_send <= '0';
83 ect <= e0;
84 else
85 count <= count+1;
86 ect <= eX;
87 end if;
88 end if;
89
90 end case;
91 end if;
92
93 end process;
94 end ar_GeneSYNC_flag; No newline at end of file
43 signal ect : etat;
44
45 begin
46 process (clk,raz)
47 begin
48 if(raz='0')then
49 SYNC <= '0';
50 Sysclk_reg <= '0';
51 flag_nw_reg <= '0';
52 count <= 14;
53 OKAI_send <= '0';
54 ect <= e0;
55
56 elsif(clk' event and clk='1')then
57 Sysclk_reg <= Sysclk;
58 flag_nw_reg <= flag_nw;
59
60 case ect is
61 when e0 =>
62 if(flag_nw_reg='0' and flag_nw='1')then
63 ect <= e1;
64 else
65 count <= 14;
66 ect <= e0;
67 end if;
68
69
70 when e1 =>
71 if(Sysclk_reg='1' and Sysclk='0')then
72 if(count=15)then
73 SYNC <= '1';
74 count <= count+1;
75 ect <= e2;
76 elsif(count=16)then
77 count <= 0;
78 OKAI_send <= '1';
79 ect <= eX;
80 else
81 count <= count+1;
82 OKAI_send <= '0';
83 ect <= e1;
84 end if;
85 end if;
86
87
88 when e2 =>
89 if(Sysclk_reg='0' and Sysclk='1')then
90 if(count=16)then
91 SYNC <= '0';
92 ect <= e1;
93 end if;
94 end if;
95
96 when eX =>
97 if(Sysclk_reg='0' and Sysclk='1')then
98 if(count=15)then
99 OKAI_send <= '0';
100 ect <= e0;
101 else
102 count <= count+1;
103 ect <= eX;
104 end if;
105 end if;
106
107 end case;
108 end if;
109
110 end process;
111 end ar_GeneSYNC_flag;
@@ -1,4 +1,21
1 -- Serialize.vhd
1 ------------------------------------------------------------------------------
2 -- This file is a part of the LPP VHDL IP LIBRARY
3 -- Copyright (C) 2009 - 2010, Laboratory of Plasmas Physic - CNRS
4 --
5 -- This program is free software; you can redistribute it and/or modify
6 -- it under the terms of the GNU General Public License as published by
7 -- the Free Software Foundation; either version 3 of the License, or
8 -- (at your option) any later version.
9 --
10 -- This program is distributed in the hope that it will be useful,
11 -- but WITHOUT ANY WARRANTY; without even the implied warranty of
12 -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 -- GNU General Public License for more details.
14 --
15 -- You should have received a copy of the GNU General Public License
16 -- along with this program; if not, write to the Free Software
17 -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 -------------------------------------------------------------------------------
2 19 library IEEE;
3 20 use IEEE.numeric_std.all;
4 21 use IEEE.std_logic_1164.all;
@@ -8,8 +25,8 entity Serialize is
8 25 port(
9 26 clk,raz : in std_logic;
10 27 sclk : in std_logic;
11 vectin : in std_logic_vector(15 downto 0);
12 send : in std_logic;
28 vectin : in std_logic_vector(15 downto 0);
29 send : in std_logic;
13 30 sended : out std_logic;
14 31 Data : out std_logic);
15 32
@@ -21,40 +38,40 architecture ar_Serialize of Serialize i
21 38 type etat is (attente,serialize);
22 39 signal ect : etat;
23 40
24 signal vector_int : std_logic_vector(16 downto 0);
41 signal vector_int : std_logic_vector(16 downto 0);
25 42 signal vectin_reg : std_logic_vector(15 downto 0);
26 43 signal load : std_logic;
27 44 signal N : integer range 0 to 16;
28 signal CPT_ended : std_logic:='0';
45 signal CPT_ended : std_logic:='0';
29 46
30 47 begin
31 48 process(clk,raz)
32 49 begin
33 50 if(raz='0')then
34 ect <= attente;
51 ect <= attente;
35 52 vectin_reg <= (others=> '0');
36 load <= '0';
53 load <= '0';
37 54 sended <= '1';
38 55
39 elsif(clk'event and clk='1')then
56 elsif(clk'event and clk='1')then
40 57 vectin_reg <= vectin;
41 58
42 59 case ect is
43 60 when attente =>
44 if (send='1') then
45 sended <= '0';
46 load <= '1';
47 ect <= serialize;
48 else
61 if (send='1') then
62 sended <= '0';
63 load <= '1';
64 ect <= serialize;
65 else
49 66 ect <= attente;
50 67 end if;
51 68
52 when serialize =>
69 when serialize =>
53 70 load <= '0';
54 71 if(CPT_ended='1')then
55 ect <= attente;
72 ect <= attente;
56 73 sended <= '1';
57 end if;
74 end if;
58 75
59 76 end case;
60 77 end if;
@@ -76,7 +93,7 begin
76 93 end if;
77 94 end process;
78 95
79 CPT_ended <= '1' when N = 16 else '0';
96 CPT_ended <= '1' when N = 16 else '0';
80 97
81 98 with ect select
82 99 Data <= vector_int(16) when serialize,
@@ -1,41 +1,58
1 -- clock.vhd
2 library IEEE;
3 use IEEE.std_logic_1164.all;
4 use IEEE.numeric_std.all;
5
6
7 entity Clock_Serie is
8
9 generic(N :integer := 695);
10
11 port(
12 clk, raz : in std_logic ;
13 clock : out std_logic);
14
15 end Clock_Serie;
16
17
18 architecture ar_Clock_Serie of Clock_Serie is
19
20 signal clockint : std_logic;
21 signal countint : integer range 0 to N/2-1;
22
23 begin
24 process (clk,raz)
25 begin
26 if(raz = '0') then
27 countint <= 0;
28 clockint <= '0';
29 elsif (clk' event and clk='1') then
30 if (countint = N/2-1) then
31 countint <= 0;
32 clockint <= not clockint;
33 else
34 countint <= countint+1;
35 end if;
36 end if;
37 end process;
38
39 clock <= clockint;
40
41 end ar_Clock_Serie; No newline at end of file
1 ------------------------------------------------------------------------------
2 -- This file is a part of the LPP VHDL IP LIBRARY
3 -- Copyright (C) 2009 - 2010, Laboratory of Plasmas Physic - CNRS
4 --
5 -- This program is free software; you can redistribute it and/or modify
6 -- it under the terms of the GNU General Public License as published by
7 -- the Free Software Foundation; either version 3 of the License, or
8 -- (at your option) any later version.
9 --
10 -- This program is distributed in the hope that it will be useful,
11 -- but WITHOUT ANY WARRANTY; without even the implied warranty of
12 -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 -- GNU General Public License for more details.
14 --
15 -- You should have received a copy of the GNU General Public License
16 -- along with this program; if not, write to the Free Software
17 -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 -------------------------------------------------------------------------------
19 library IEEE;
20 use IEEE.std_logic_1164.all;
21 use IEEE.numeric_std.all;
22
23
24 entity Clock_Serie is
25
26 generic(N :integer := 695);
27
28 port(
29 clk, raz : in std_logic ;
30 clock : out std_logic);
31
32 end Clock_Serie;
33
34
35 architecture ar_Clock_Serie of Clock_Serie is
36
37 signal clockint : std_logic;
38 signal countint : integer range 0 to N/2-1;
39
40 begin
41 process (clk,raz)
42 begin
43 if(raz = '0') then
44 countint <= 0;
45 clockint <= '0';
46 elsif (clk' event and clk='1') then
47 if (countint = N/2-1) then
48 countint <= 0;
49 clockint <= not clockint;
50 else
51 countint <= countint+1;
52 end if;
53 end if;
54 end process;
55
56 clock <= clockint;
57
58 end ar_Clock_Serie;
@@ -4,7 +4,7
4 4 --
5 5 -- This program is free software; you can redistribute it and/or modify
6 6 -- it under the terms of the GNU General Public License as published by
7 -- the Free Software Foundation; either version 2 of the License, or
7 -- the Free Software Foundation; either version 3 of the License, or
8 8 -- (at your option) any later version.
9 9 --
10 10 -- This program is distributed in the hope that it will be useful,
@@ -16,7 +16,6
16 16 -- along with this program; if not, write to the Free Software
17 17 -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 18 -------------------------------------------------------------------------------
19
20 19 library ieee;
21 20 use ieee.std_logic_1164.all;
22 21 library grlib;
@@ -1,106 +1,104
1 ------------------------------------------------------------------------------
2 -- This file is a part of the LPP VHDL IP LIBRARY
3 -- Copyright (C) 2009 - 2010, Laboratory of Plasmas Physic - CNRS
4 --
5 -- This program is free software; you can redistribute it and/or modify
6 -- it under the terms of the GNU General Public License as published by
7 -- the Free Software Foundation; either version 2 of the License, or
8 -- (at your option) any later version.
9 --
10 -- This program is distributed in the hope that it will be useful,
11 -- but WITHOUT ANY WARRANTY; without even the implied warranty of
12 -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 -- GNU General Public License for more details.
14 --
15 -- You should have received a copy of the GNU General Public License
16 -- along with this program; if not, write to the Free Software
17 -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 -------------------------------------------------------------------------------
19 -- APB_MULTI_DIODE.vhd
20
21 library ieee;
22 use ieee.std_logic_1164.all;
23 --use ieee.numeric_std.all;
24 library grlib;
25 use grlib.amba.all;
26 use grlib.stdlib.all;
27 use grlib.devices.all;
28 library lpp;
29 use lpp.lpp_amba.all;
30
31
32 entity APB_MULTI_DIODE is
33 generic (
34 pindex : integer := 0;
35 paddr : integer := 0;
36 pmask : integer := 16#fff#;
37 pirq : integer := 0;
38 abits : integer := 8);
39 port (
40 rst : in std_ulogic;
41 clk : in std_ulogic;
42 apbi : in apb_slv_in_type;
43 apbo : out apb_slv_out_type;
44 LED : out std_logic_vector(2 downto 0)
45 );
46 end;
47
48
49 architecture AR_APB_MULTI_DIODE of APB_MULTI_DIODE is
50
51 constant REVISION : integer := 1;
52
53 constant pconfig : apb_config_type := (
54 0 => ahb_device_reg (VENDOR_LPP, LPP_MULTI_DIODE, 0, REVISION, 0),
55 1 => apb_iobar(paddr, pmask));
56
57
58
59 type LEDregs is record
60 DATAin : std_logic_vector(31 downto 0);
61 DATAout : std_logic_vector(31 downto 0);
62 end record;
63
64 signal r : LEDregs;
65
66
67 begin
68
69 r.DATAout <= r.DATAin xor X"FFFFFFFF";
70
71 process(rst,clk)
72 begin
73 if rst = '0' then
74 LED <= "000";
75 r.DATAin <= (others => '0');
76 apbo.prdata <= (others => '0');
77 elsif clk'event and clk = '1' then
78
79 LED <= r.DATAin(2 downto 0);
80
81 --APB Write OP
82 if (apbi.psel(pindex) and apbi.penable and apbi.pwrite) = '1' then
83 case apbi.paddr(abits-1 downto 2) is
84 when "000000" =>
85 r.DATAin <= apbi.pwdata;
86 when others =>
87 null;
88 end case;
89 end if;
90
91 --APB READ OP
92 if (apbi.psel(pindex) and apbi.penable and (not apbi.pwrite)) = '1' then
93 case apbi.paddr(abits-1 downto 2) is
94 when "000000" =>
95 apbo.prdata <= r.DATAin;
96 when others =>
97 apbo.prdata <= r.DATAout;
98 end case;
99 end if;
100
101 end if;
102 apbo.pconfig <= pconfig;
103 end process;
104
105
106 end ar_APB_MULTI_DIODE; No newline at end of file
1 ------------------------------------------------------------------------------
2 -- This file is a part of the LPP VHDL IP LIBRARY
3 -- Copyright (C) 2009 - 2010, Laboratory of Plasmas Physic - CNRS
4 --
5 -- This program is free software; you can redistribute it and/or modify
6 -- it under the terms of the GNU General Public License as published by
7 -- the Free Software Foundation; either version 3 of the License, or
8 -- (at your option) any later version.
9 --
10 -- This program is distributed in the hope that it will be useful,
11 -- but WITHOUT ANY WARRANTY; without even the implied warranty of
12 -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 -- GNU General Public License for more details.
14 --
15 -- You should have received a copy of the GNU General Public License
16 -- along with this program; if not, write to the Free Software
17 -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 -------------------------------------------------------------------------------
19 library ieee;
20 use ieee.std_logic_1164.all;
21 --use ieee.numeric_std.all;
22 library grlib;
23 use grlib.amba.all;
24 use grlib.stdlib.all;
25 use grlib.devices.all;
26 library lpp;
27 use lpp.lpp_amba.all;
28
29
30 entity APB_MULTI_DIODE is
31 generic (
32 pindex : integer := 0;
33 paddr : integer := 0;
34 pmask : integer := 16#fff#;
35 pirq : integer := 0;
36 abits : integer := 8);
37 port (
38 rst : in std_ulogic;
39 clk : in std_ulogic;
40 apbi : in apb_slv_in_type;
41 apbo : out apb_slv_out_type;
42 LED : out std_logic_vector(2 downto 0)
43 );
44 end;
45
46
47 architecture AR_APB_MULTI_DIODE of APB_MULTI_DIODE is
48
49 constant REVISION : integer := 1;
50
51 constant pconfig : apb_config_type := (
52 0 => ahb_device_reg (VENDOR_LPP, LPP_MULTI_DIODE, 0, REVISION, 0),
53 1 => apb_iobar(paddr, pmask));
54
55
56
57 type LEDregs is record
58 DATAin : std_logic_vector(31 downto 0);
59 DATAout : std_logic_vector(31 downto 0);
60 end record;
61
62 signal r : LEDregs;
63
64
65 begin
66
67 r.DATAout <= r.DATAin xor X"FFFFFFFF";
68
69 process(rst,clk)
70 begin
71 if rst = '0' then
72 LED <= "000";
73 r.DATAin <= (others => '0');
74 apbo.prdata <= (others => '0');
75 elsif clk'event and clk = '1' then
76
77 LED <= r.DATAin(2 downto 0);
78
79 --APB Write OP
80 if (apbi.psel(pindex) and apbi.penable and apbi.pwrite) = '1' then
81 case apbi.paddr(abits-1 downto 2) is
82 when "000000" =>
83 r.DATAin <= apbi.pwdata;
84 when others =>
85 null;
86 end case;
87 end if;
88
89 --APB READ OP
90 if (apbi.psel(pindex) and apbi.penable and (not apbi.pwrite)) = '1' then
91 case apbi.paddr(abits-1 downto 2) is
92 when "000000" =>
93 apbo.prdata <= r.DATAin;
94 when others =>
95 apbo.prdata <= r.DATAout;
96 end case;
97 end if;
98
99 end if;
100 apbo.pconfig <= pconfig;
101 end process;
102
103
104 end ar_APB_MULTI_DIODE;
@@ -1,129 +1,127
1 ------------------------------------------------------------------------------
2 -- This file is a part of the LPP VHDL IP LIBRARY
3 -- Copyright (C) 2009 - 2010, Laboratory of Plasmas Physic - CNRS
4 --
5 -- This program is free software; you can redistribute it and/or modify
6 -- it under the terms of the GNU General Public License as published by
7 -- the Free Software Foundation; either version 2 of the License, or
8 -- (at your option) any later version.
9 --
10 -- This program is distributed in the hope that it will be useful,
11 -- but WITHOUT ANY WARRANTY; without even the implied warranty of
12 -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 -- GNU General Public License for more details.
14 --
15 -- You should have received a copy of the GNU General Public License
16 -- along with this program; if not, write to the Free Software
17 -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 -------------------------------------------------------------------------------
19 -- APB_SIMPLE_DIODE.vhd
20
21 library ieee;
22 use ieee.std_logic_1164.all;
23 --use ieee.numeric_std.all;
24 library grlib;
25 use grlib.amba.all;
26 use grlib.stdlib.all;
27 use grlib.devices.all;
28 library lpp;
29 use lpp.lpp_amba.all;
30
31
32 entity APB_SIMPLE_DIODE is
33 generic (
34 pindex : integer := 0;
35 paddr : integer := 0;
36 pmask : integer := 16#fff#;
37 pirq : integer := 0;
38 abits : integer := 8);
39 port (
40 rst : in std_ulogic;
41 clk : in std_ulogic;
42 apbi : in apb_slv_in_type;
43 apbo : out apb_slv_out_type;
44 LED : out std_ulogic
45 );
46 end;
47
48
49 architecture AR_APB_SIMPLE_DIODE of APB_SIMPLE_DIODE is
50
51 constant REVISION : integer := 1;
52
53 constant pconfig : apb_config_type := (
54 0 => ahb_device_reg (VENDOR_LPP, LPP_SIMPLE_DIODE, 0, REVISION, 0),
55 1 => apb_iobar(paddr, pmask));
56
57
58
59 type LEDregs is record
60 DATAin : std_logic_vector(31 downto 0);
61 DATAout : std_logic_vector(31 downto 0);
62 end record;
63
64 signal r : LEDregs;
65
66
67 begin
68
69 r.DATAout <= r.DATAin xor X"FFFFFFFF";
70
71 process(rst,clk)
72 begin
73 if rst = '0' then
74 LED <= '0';
75 r.DATAin <= (others => '0');
76 apbo.prdata <= (others => '0');
77 elsif clk'event and clk = '1' then
78
79 LED <= r.DATAin(0);
80
81 --APB Write OP
82 if (apbi.psel(pindex) and apbi.penable and apbi.pwrite) = '1' then
83 case apbi.paddr(abits-1 downto 2) is
84 when "000000" =>
85 r.DATAin <= apbi.pwdata;
86 when others =>
87 null;
88 end case;
89 end if;
90
91 --APB READ OP
92 if (apbi.psel(pindex) and apbi.penable and (not apbi.pwrite)) = '1' then
93 case apbi.paddr(abits-1 downto 2) is
94 when "000000" =>
95 apbo.prdata <= r.DATAin;
96 when others =>
97 apbo.prdata <= r.DATAout;
98 end case;
99 end if;
100
101 end if;
102 apbo.pconfig <= pconfig;
103 end process;
104
105
106
107 -- pragma translate_off
108 -- bootmsg : report_version
109 -- generic map ("apbuart" & tost(pindex) &
110 -- ": Generic UART rev " & tost(REVISION) & ", fifo " & tost(fifosize) &
111 -- ", irq " & tost(pirq));
112 -- pragma translate_on
113
114
115
116 end ar_APB_SIMPLE_DIODE;
117
118
119
120
121
122
123
124
125
126
127
128
129
1 ------------------------------------------------------------------------------
2 -- This file is a part of the LPP VHDL IP LIBRARY
3 -- Copyright (C) 2009 - 2010, Laboratory of Plasmas Physic - CNRS
4 --
5 -- This program is free software; you can redistribute it and/or modify
6 -- it under the terms of the GNU General Public License as published by
7 -- the Free Software Foundation; either version 3 of the License, or
8 -- (at your option) any later version.
9 --
10 -- This program is distributed in the hope that it will be useful,
11 -- but WITHOUT ANY WARRANTY; without even the implied warranty of
12 -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 -- GNU General Public License for more details.
14 --
15 -- You should have received a copy of the GNU General Public License
16 -- along with this program; if not, write to the Free Software
17 -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 -------------------------------------------------------------------------------
19 library ieee;
20 use ieee.std_logic_1164.all;
21 --use ieee.numeric_std.all;
22 library grlib;
23 use grlib.amba.all;
24 use grlib.stdlib.all;
25 use grlib.devices.all;
26 library lpp;
27 use lpp.lpp_amba.all;
28
29
30 entity APB_SIMPLE_DIODE is
31 generic (
32 pindex : integer := 0;
33 paddr : integer := 0;
34 pmask : integer := 16#fff#;
35 pirq : integer := 0;
36 abits : integer := 8);
37 port (
38 rst : in std_ulogic;
39 clk : in std_ulogic;
40 apbi : in apb_slv_in_type;
41 apbo : out apb_slv_out_type;
42 LED : out std_ulogic
43 );
44 end;
45
46
47 architecture AR_APB_SIMPLE_DIODE of APB_SIMPLE_DIODE is
48
49 constant REVISION : integer := 1;
50
51 constant pconfig : apb_config_type := (
52 0 => ahb_device_reg (VENDOR_LPP, LPP_SIMPLE_DIODE, 0, REVISION, 0),
53 1 => apb_iobar(paddr, pmask));
54
55
56
57 type LEDregs is record
58 DATAin : std_logic_vector(31 downto 0);
59 DATAout : std_logic_vector(31 downto 0);
60 end record;
61
62 signal r : LEDregs;
63
64
65 begin
66
67 r.DATAout <= r.DATAin xor X"FFFFFFFF";
68
69 process(rst,clk)
70 begin
71 if rst = '0' then
72 LED <= '0';
73 r.DATAin <= (others => '0');
74 apbo.prdata <= (others => '0');
75 elsif clk'event and clk = '1' then
76
77 LED <= r.DATAin(0);
78
79 --APB Write OP
80 if (apbi.psel(pindex) and apbi.penable and apbi.pwrite) = '1' then
81 case apbi.paddr(abits-1 downto 2) is
82 when "000000" =>
83 r.DATAin <= apbi.pwdata;
84 when others =>
85 null;
86 end case;
87 end if;
88
89 --APB READ OP
90 if (apbi.psel(pindex) and apbi.penable and (not apbi.pwrite)) = '1' then
91 case apbi.paddr(abits-1 downto 2) is
92 when "000000" =>
93 apbo.prdata <= r.DATAin;
94 when others =>
95 apbo.prdata <= r.DATAout;
96 end case;
97 end if;
98
99 end if;
100 apbo.pconfig <= pconfig;
101 end process;
102
103
104
105 -- pragma translate_off
106 -- bootmsg : report_version
107 -- generic map ("apbuart" & tost(pindex) &
108 -- ": Generic UART rev " & tost(REVISION) & ", fifo " & tost(fifosize) &
109 -- ", irq " & tost(pirq));
110 -- pragma translate_on
111
112
113
114 end ar_APB_SIMPLE_DIODE;
115
116
117
118
119
120
121
122
123
124
125
126
127
@@ -4,7 +4,7
4 4 --
5 5 -- This program is free software; you can redistribute it and/or modify
6 6 -- it under the terms of the GNU General Public License as published by
7 -- the Free Software Foundation; either version 2 of the License, or
7 -- the Free Software Foundation; either version 3 of the License, or
8 8 -- (at your option) any later version.
9 9 --
10 10 -- This program is distributed in the hope that it will be useful,
@@ -16,7 +16,6
16 16 -- along with this program; if not, write to the Free Software
17 17 -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 18 -------------------------------------------------------------------------------
19
20 19 library ieee;
21 20 use ieee.std_logic_1164.all;
22 21 library grlib;
@@ -1,128 +1,126
1 ------------------------------------------------------------------------------
2 -- This file is a part of the LPP VHDL IP LIBRARY
3 -- Copyright (C) 2009 - 2010, Laboratory of Plasmas Physic - CNRS
4 --
5 -- This program is free software; you can redistribute it and/or modify
6 -- it under the terms of the GNU General Public License as published by
7 -- the Free Software Foundation; either version 2 of the License, or
8 -- (at your option) any later version.
9 --
10 -- This program is distributed in the hope that it will be useful,
11 -- but WITHOUT ANY WARRANTY; without even the implied warranty of
12 -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 -- GNU General Public License for more details.
14 --
15 -- You should have received a copy of the GNU General Public License
16 -- along with this program; if not, write to the Free Software
17 -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 -------------------------------------------------------------------------------
19 -- APB_UART.vhd
20
21 library ieee;
22 use ieee.std_logic_1164.all;
23 library grlib;
24 use grlib.amba.all;
25 use grlib.stdlib.all;
26 use grlib.devices.all;
27 library lpp;
28 use lpp.lpp_amba.all;
29 use lpp.lpp_uart.all;
30
31 entity APB_UART is
32 generic (
33 pindex : integer := 0;
34 paddr : integer := 0;
35 pmask : integer := 16#fff#;
36 pirq : integer := 0;
37 abits : integer := 8;
38 Data_sz : integer := 8);
39 port (
40 clk : in std_logic;
41 rst : in std_logic;
42 apbi : in apb_slv_in_type;
43 apbo : out apb_slv_out_type;
44 TXD : out std_logic;
45 RXD : in std_logic
46 );
47 end APB_UART;
48
49
50 architecture ar_APB_UART of APB_UART is
51
52 constant REVISION : integer := 1;
53
54 constant pconfig : apb_config_type := (
55 0 => ahb_device_reg (VENDOR_LPP, LPP_UART, 0, REVISION, 0),
56 1 => apb_iobar(paddr, pmask));
57
58 signal NwData : std_logic;
59 signal ACK : std_logic;
60 signal Capture : std_logic;
61 signal Send : std_logic;
62 signal Sended : std_logic;
63
64 type UART_ctrlr_Reg is record
65 UART_Cfg : std_logic_vector(4 downto 0);
66 UART_Wdata : std_logic_vector(7 downto 0);
67 UART_Rdata : std_logic_vector(7 downto 0);
68 UART_BTrig : std_logic_vector(11 downto 0);
69 end record;
70
71 signal Rec : UART_ctrlr_Reg;
72
73 begin
74
75 Capture <= Rec.UART_Cfg(0);
76 ACK <= Rec.UART_Cfg(1);
77 Send <= Rec.UART_Cfg(2);
78 Rec.UART_Cfg(3) <= Sended;
79 Rec.UART_Cfg(4) <= NwData;
80
81
82 COM0 : entity work.UART
83 generic map (Data_sz)
84 port map (clk,rst,TXD,RXD,Capture,NwData,ACK,Send,Sended,Rec.UART_BTrig,Rec.UART_Rdata,Rec.UART_Wdata);
85
86
87 process(rst,clk)
88 begin
89 if(rst='0')then
90 Rec.UART_Wdata <= (others => '0');
91 apbo.prdata <= (others => '0');
92
93 elsif(clk'event and clk='1')then
94
95
96 --APB Write OP
97 if (apbi.psel(pindex) and apbi.penable and apbi.pwrite) = '1' then
98 case apbi.paddr(abits-1 downto 2) is
99 when "000000" =>
100 Rec.UART_Cfg(2 downto 0) <= apbi.pwdata(2 downto 0);
101 when "000001" =>
102 Rec.UART_Wdata <= apbi.pwdata(7 downto 0);
103 when others =>
104 null;
105 end case;
106 end if;
107
108 --APB READ OP
109 if (apbi.psel(pindex) and apbi.penable and (not apbi.pwrite)) = '1' then
110 case apbi.paddr(abits-1 downto 2) is
111 when "000000" =>
112 apbo.prdata(31 downto 27) <= Rec.UART_Cfg;
113 apbo.prdata(26 downto 12) <= (others => '0');
114 apbo.prdata(11 downto 0) <= Rec.UART_BTrig;
115 when "000001" =>
116 apbo.prdata(7 downto 0) <= Rec.UART_Wdata;
117 when "000010" =>
118 apbo.prdata(7 downto 0) <= Rec.UART_Rdata;
119 when others =>
120 apbo.prdata <= (others => '0');
121 end case;
122 end if;
123
124 end if;
125 apbo.pconfig <= pconfig;
126 end process;
127
128 end ar_APB_UART; No newline at end of file
1 ------------------------------------------------------------------------------
2 -- This file is a part of the LPP VHDL IP LIBRARY
3 -- Copyright (C) 2009 - 2010, Laboratory of Plasmas Physic - CNRS
4 --
5 -- This program is free software; you can redistribute it and/or modify
6 -- it under the terms of the GNU General Public License as published by
7 -- the Free Software Foundation; either version 3 of the License, or
8 -- (at your option) any later version.
9 --
10 -- This program is distributed in the hope that it will be useful,
11 -- but WITHOUT ANY WARRANTY; without even the implied warranty of
12 -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 -- GNU General Public License for more details.
14 --
15 -- You should have received a copy of the GNU General Public License
16 -- along with this program; if not, write to the Free Software
17 -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 -------------------------------------------------------------------------------
19 library ieee;
20 use ieee.std_logic_1164.all;
21 library grlib;
22 use grlib.amba.all;
23 use grlib.stdlib.all;
24 use grlib.devices.all;
25 library lpp;
26 use lpp.lpp_amba.all;
27 use lpp.lpp_uart.all;
28
29 entity APB_UART is
30 generic (
31 pindex : integer := 0;
32 paddr : integer := 0;
33 pmask : integer := 16#fff#;
34 pirq : integer := 0;
35 abits : integer := 8;
36 Data_sz : integer := 8);
37 port (
38 clk : in std_logic;
39 rst : in std_logic;
40 apbi : in apb_slv_in_type;
41 apbo : out apb_slv_out_type;
42 TXD : out std_logic;
43 RXD : in std_logic
44 );
45 end APB_UART;
46
47
48 architecture ar_APB_UART of APB_UART is
49
50 constant REVISION : integer := 1;
51
52 constant pconfig : apb_config_type := (
53 0 => ahb_device_reg (VENDOR_LPP, LPP_UART, 0, REVISION, 0),
54 1 => apb_iobar(paddr, pmask));
55
56 signal NwData : std_logic;
57 signal ACK : std_logic;
58 signal Capture : std_logic;
59 signal Send : std_logic;
60 signal Sended : std_logic;
61
62 type UART_ctrlr_Reg is record
63 UART_Cfg : std_logic_vector(4 downto 0);
64 UART_Wdata : std_logic_vector(7 downto 0);
65 UART_Rdata : std_logic_vector(7 downto 0);
66 UART_BTrig : std_logic_vector(11 downto 0);
67 end record;
68
69 signal Rec : UART_ctrlr_Reg;
70
71 begin
72
73 Capture <= Rec.UART_Cfg(0);
74 ACK <= Rec.UART_Cfg(1);
75 Send <= Rec.UART_Cfg(2);
76 Rec.UART_Cfg(3) <= Sended;
77 Rec.UART_Cfg(4) <= NwData;
78
79
80 COM0 : entity work.UART
81 generic map (Data_sz)
82 port map (clk,rst,TXD,RXD,Capture,NwData,ACK,Send,Sended,Rec.UART_BTrig,Rec.UART_Rdata,Rec.UART_Wdata);
83
84
85 process(rst,clk)
86 begin
87 if(rst='0')then
88 Rec.UART_Wdata <= (others => '0');
89 apbo.prdata <= (others => '0');
90
91 elsif(clk'event and clk='1')then
92
93
94 --APB Write OP
95 if (apbi.psel(pindex) and apbi.penable and apbi.pwrite) = '1' then
96 case apbi.paddr(abits-1 downto 2) is
97 when "000000" =>
98 Rec.UART_Cfg(2 downto 0) <= apbi.pwdata(2 downto 0);
99 when "000001" =>
100 Rec.UART_Wdata <= apbi.pwdata(7 downto 0);
101 when others =>
102 null;
103 end case;
104 end if;
105
106 --APB READ OP
107 if (apbi.psel(pindex) and apbi.penable and (not apbi.pwrite)) = '1' then
108 case apbi.paddr(abits-1 downto 2) is
109 when "000000" =>
110 apbo.prdata(31 downto 27) <= Rec.UART_Cfg;
111 apbo.prdata(26 downto 12) <= (others => '0');
112 apbo.prdata(11 downto 0) <= Rec.UART_BTrig;
113 when "000001" =>
114 apbo.prdata(7 downto 0) <= Rec.UART_Wdata;
115 when "000010" =>
116 apbo.prdata(7 downto 0) <= Rec.UART_Rdata;
117 when others =>
118 apbo.prdata <= (others => '0');
119 end case;
120 end if;
121
122 end if;
123 apbo.pconfig <= pconfig;
124 end process;
125
126 end ar_APB_UART;
@@ -1,82 +1,99
1 -- BaudGen.vhd
2 library IEEE;
3 use IEEE.numeric_std.all;
4 use IEEE.std_logic_1164.all;
5
6 --! Generateur de Bauds
7
8 entity BaudGen is
9
10 port(
11 clk : in std_logic;
12 reset : in std_logic;
13 Capture : in std_logic;
14 Bclk : out std_logic;
15 RXD : in std_logic;
16 BTrigger : out std_logic_vector(11 downto 0)
17 );
18 end BaudGen;
19
20
21 architecture ar_BaudGen of BaudGen is
22 signal cpt : std_logic_vector(11 downto 0) := (others => '0');
23 signal errorFlag : std_logic;
24 signal triger : std_logic_vector(11 downto 0) := (others => '0');
25 signal RX_reg : std_logic:='1';
26
27 begin
28
29
30 BTrigger <= triger;
31
32
33 BaudGeneration:
34 process(clk,reset)
35 begin
36 if reset = '0' then
37 cpt <= (others => '0');
38 triger <= (others => '1');
39 errorFlag <= '0';
40 elsif clk'event and clk = '1'then
41 RX_reg <= RXD;
42 if capture = '1' then
43 cpt <= (others => '0');
44 triger <= (others => '1');
45 errorFlag <= '0';
46 else
47 if RX_reg /= RXD then
48 cpt <= (others => '0');
49 if cpt = std_logic_vector(TO_UNSIGNED(0,12)) then
50 errorFlag <= '1';
51 elsif errorFlag = '1' then
52 triger <= cpt;
53 errorFlag <= '0';
54 else
55 errorFlag <= '1';
56 end if;
57 else
58 if cpt = triger then
59 cpt <= (others => '0');
60 errorFlag <= '0';
61 else
62 cpt <= std_logic_vector(unsigned(cpt) + 1);
63 end if;
64 end if;
65 end if;
66 end if;
67 end process;
68
69
70 process(clk)
71 begin
72 if clk'event and clk = '1' then
73 if cpt = std_logic_vector(TO_UNSIGNED(0,12)) then
74 Bclk <= '0';
75 elsif cpt = '0' & triger(11 downto 1) then
76 Bclk <= '1';
77 end if;
78 end if;
79 end process;
80
81
82 end ar_BaudGen; No newline at end of file
1 ------------------------------------------------------------------------------
2 -- This file is a part of the LPP VHDL IP LIBRARY
3 -- Copyright (C) 2009 - 2010, Laboratory of Plasmas Physic - CNRS
4 --
5 -- This program is free software; you can redistribute it and/or modify
6 -- it under the terms of the GNU General Public License as published by
7 -- the Free Software Foundation; either version 3 of the License, or
8 -- (at your option) any later version.
9 --
10 -- This program is distributed in the hope that it will be useful,
11 -- but WITHOUT ANY WARRANTY; without even the implied warranty of
12 -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 -- GNU General Public License for more details.
14 --
15 -- You should have received a copy of the GNU General Public License
16 -- along with this program; if not, write to the Free Software
17 -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 -------------------------------------------------------------------------------
19 library IEEE;
20 use IEEE.numeric_std.all;
21 use IEEE.std_logic_1164.all;
22
23 --! Generateur de Bauds
24
25 entity BaudGen is
26
27 port(
28 clk : in std_logic;
29 reset : in std_logic;
30 Capture : in std_logic;
31 Bclk : out std_logic;
32 RXD : in std_logic;
33 BTrigger : out std_logic_vector(11 downto 0)
34 );
35 end BaudGen;
36
37
38 architecture ar_BaudGen of BaudGen is
39 signal cpt : std_logic_vector(11 downto 0) := (others => '0');
40 signal errorFlag : std_logic;
41 signal triger : std_logic_vector(11 downto 0) := (others => '0');
42 signal RX_reg : std_logic:='1';
43
44 begin
45
46
47 BTrigger <= triger;
48
49
50 BaudGeneration:
51 process(clk,reset)
52 begin
53 if reset = '0' then
54 cpt <= (others => '0');
55 triger <= (others => '1');
56 errorFlag <= '0';
57 elsif clk'event and clk = '1'then
58 RX_reg <= RXD;
59 if capture = '1' then
60 cpt <= (others => '0');
61 triger <= (others => '1');
62 errorFlag <= '0';
63 else
64 if RX_reg /= RXD then
65 cpt <= (others => '0');
66 if cpt = std_logic_vector(TO_UNSIGNED(0,12)) then
67 errorFlag <= '1';
68 elsif errorFlag = '1' then
69 triger <= cpt;
70 errorFlag <= '0';
71 else
72 errorFlag <= '1';
73 end if;
74 else
75 if cpt = triger then
76 cpt <= (others => '0');
77 errorFlag <= '0';
78 else
79 cpt <= std_logic_vector(unsigned(cpt) + 1);
80 end if;
81 end if;
82 end if;
83 end if;
84 end process;
85
86
87 process(clk)
88 begin
89 if clk'event and clk = '1' then
90 if cpt = std_logic_vector(TO_UNSIGNED(0,12)) then
91 Bclk <= '0';
92 elsif cpt = '0' & triger(11 downto 1) then
93 Bclk <= '1';
94 end if;
95 end if;
96 end process;
97
98
99 end ar_BaudGen;
@@ -1,94 +1,111
1 -- Shift_REG.vhd
2 library IEEE;
3 use IEEE.numeric_std.all;
4 use IEEE.std_logic_1164.all;
5
6 --! Gestion Reception/Transmission
7
8 entity Shift_REG is
9 generic(Data_sz : integer := 10);
10 port(
11 clk : in std_logic;
12 Sclk : in std_logic;
13 reset : in std_logic;
14 SIN : in std_logic;
15 SOUT : out std_logic;
16 Serialize : in std_logic;
17 Serialized : out std_logic;
18 D : in std_logic_vector(Data_sz-1 downto 0);
19 Q : out std_logic_vector(Data_sz-1 downto 0)
20
21 );
22 end entity;
23
24
25 architecture ar_Shift_REG of Shift_REG is
26
27 signal REG : std_logic_vector(Data_sz-1 downto 0);
28 signal Serialized_int : std_logic;
29 signal Serialize_reg : std_logic;
30 signal CptBits : std_logic_vector(Data_sz-1 downto 0);
31 constant CptBits_trig : std_logic_vector(Data_sz-1 downto 0) := (others => '1');
32 signal CptBits_flag : std_logic;
33 signal CptBits_flag_reg : std_logic;
34
35 begin
36
37 Serialized <= Serialized_int;
38 CptBits_flag <= '1' when CptBits = CptBits_trig else '0';
39
40 process(reset,clk)
41 begin
42 if reset = '0' then
43 Serialized_int <= '1';
44 CptBits_flag_reg <= '0';
45 Q <= (others => '0');
46 elsif clk'event and clk = '1' then
47 CptBits_flag_reg <= CptBits_flag;
48
49 if CptBits_flag = '1' and CptBits_flag_reg = '0' then
50 Serialized_int <= '1';
51 Q <= REG;
52 elsif Serialize = '1' then
53 Serialized_int <= '0';
54 end if;
55 end if;
56 end process;
57
58
59 process(reset,Sclk)
60 begin
61 if reset = '0' then
62 CptBits <= (others => '0');
63 REG <= (others => '0');
64 SOUT <= '1';
65 Serialize_reg <= '0';
66 elsif Sclk'event and Sclk = '1' then
67 Serialize_reg <= Serialized_int;
68 if (Serialized_int = '0' and Serialize_reg ='1') then
69 REG <= SIN & D(Data_sz-1 downto 1);
70 SOUT <= D(0);
71 elsif CptBits_flag ='1' then
72 REG <= SIN & D(Data_sz-1 downto 1);
73 SOUT <= D(0);
74 elsif Serialized_int = '0' then
75 REG <= SIN & REG(Data_sz-1 downto 1);
76 SOUT <= REG(0);
77 else
78 SOUT <= '1';
79 end if;
80 if Serialized_int = '0' then
81 if CptBits_flag = '1' then
82 CptBits <= (others => '0');
83 else
84 CptBits <= '1' & CptBits(Data_sz-1 downto 1);
85 end if;
86
87 else
88 CptBits <= (others => '0');
89 end if;
90
91 end if;
92 end process;
93
94 end ar_Shift_REG; No newline at end of file
1 ------------------------------------------------------------------------------
2 -- This file is a part of the LPP VHDL IP LIBRARY
3 -- Copyright (C) 2009 - 2010, Laboratory of Plasmas Physic - CNRS
4 --
5 -- This program is free software; you can redistribute it and/or modify
6 -- it under the terms of the GNU General Public License as published by
7 -- the Free Software Foundation; either version 3 of the License, or
8 -- (at your option) any later version.
9 --
10 -- This program is distributed in the hope that it will be useful,
11 -- but WITHOUT ANY WARRANTY; without even the implied warranty of
12 -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 -- GNU General Public License for more details.
14 --
15 -- You should have received a copy of the GNU General Public License
16 -- along with this program; if not, write to the Free Software
17 -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 -------------------------------------------------------------------------------
19 library IEEE;
20 use IEEE.numeric_std.all;
21 use IEEE.std_logic_1164.all;
22
23 --! Gestion Reception/Transmission
24
25 entity Shift_REG is
26 generic(Data_sz : integer := 10);
27 port(
28 clk : in std_logic;
29 Sclk : in std_logic;
30 reset : in std_logic;
31 SIN : in std_logic;
32 SOUT : out std_logic;
33 Serialize : in std_logic;
34 Serialized : out std_logic;
35 D : in std_logic_vector(Data_sz-1 downto 0);
36 Q : out std_logic_vector(Data_sz-1 downto 0)
37
38 );
39 end entity;
40
41
42 architecture ar_Shift_REG of Shift_REG is
43
44 signal REG : std_logic_vector(Data_sz-1 downto 0);
45 signal Serialized_int : std_logic;
46 signal Serialize_reg : std_logic;
47 signal CptBits : std_logic_vector(Data_sz-1 downto 0);
48 constant CptBits_trig : std_logic_vector(Data_sz-1 downto 0) := (others => '1');
49 signal CptBits_flag : std_logic;
50 signal CptBits_flag_reg : std_logic;
51
52 begin
53
54 Serialized <= Serialized_int;
55 CptBits_flag <= '1' when CptBits = CptBits_trig else '0';
56
57 process(reset,clk)
58 begin
59 if reset = '0' then
60 Serialized_int <= '1';
61 CptBits_flag_reg <= '0';
62 Q <= (others => '0');
63 elsif clk'event and clk = '1' then
64 CptBits_flag_reg <= CptBits_flag;
65
66 if CptBits_flag = '1' and CptBits_flag_reg = '0' then
67 Serialized_int <= '1';
68 Q <= REG;
69 elsif Serialize = '1' then
70 Serialized_int <= '0';
71 end if;
72 end if;
73 end process;
74
75
76 process(reset,Sclk)
77 begin
78 if reset = '0' then
79 CptBits <= (others => '0');
80 REG <= (others => '0');
81 SOUT <= '1';
82 Serialize_reg <= '0';
83 elsif Sclk'event and Sclk = '1' then
84 Serialize_reg <= Serialized_int;
85 if (Serialized_int = '0' and Serialize_reg ='1') then
86 REG <= SIN & D(Data_sz-1 downto 1);
87 SOUT <= D(0);
88 elsif CptBits_flag ='1' then
89 REG <= SIN & D(Data_sz-1 downto 1);
90 SOUT <= D(0);
91 elsif Serialized_int = '0' then
92 REG <= SIN & REG(Data_sz-1 downto 1);
93 SOUT <= REG(0);
94 else
95 SOUT <= '1';
96 end if;
97 if Serialized_int = '0' then
98 if CptBits_flag = '1' then
99 CptBits <= (others => '0');
100 else
101 CptBits <= '1' & CptBits(Data_sz-1 downto 1);
102 end if;
103
104 else
105 CptBits <= (others => '0');
106 end if;
107
108 end if;
109 end process;
110
111 end ar_Shift_REG;
@@ -1,81 +1,98
1 -- UART.vhd
2 library IEEE;
3 use IEEE.numeric_std.all;
4 use IEEE.std_logic_1164.all;
5 library lpp;
6 use lpp.lpp_uart.all;
7
8 --! Programme qui va gerer toute la communication entre le PC et le FPGA
9
10 entity UART is
11 generic(Data_sz : integer := 8); --! Constante de taille pour un mot de donnee
12 port(
13 clk : in std_logic; --! Horloge a 25Mhz du systeme
14 reset : in std_logic; --! Reset du systeme
15 TXD : out std_logic; --! Transmission, cote PC
16 RXD : in std_logic; --! Reception, cote PC
17 Capture : in std_logic; --! "Reset" cible pour le generateur de bauds, ici indissocie du reset global
18 NwDat : out std_logic; --! Flag, Nouvelle donnee presente
19 ACK : in std_logic; --! Flag, Reponse au flag precedent
20 Send : in std_logic; --! Flag, Demande d'envoi sur le bus
21 Sended : out std_logic; --! Flag, Envoi termine
22 BTrigger : out std_logic_vector(11 downto 0); --! Registre contenant la valeur du diviseur de frequence pour la transmission
23 RDATA : out std_logic_vector(Data_sz-1 downto 0); --! Mot de donnee en provenance de l'utilisateur
24 WDATA : in std_logic_vector(Data_sz-1 downto 0) --! Mot de donnee a transmettre a l'utilisateur
25 );
26 end entity;
27
28
29 --! @details Gestion de la Reception/Transmission donc de la Vectorisation/Serialisation
30 --! ainsi que la detection et le reglage de le frequence de transmission optimale sur le bus (Generateur de Bauds)
31 architecture ar_UART of UART is
32 signal Bclk : std_logic;
33
34 signal RDATA_int : std_logic_vector(Data_sz+1 downto 0);
35 signal WDATA_int : std_logic_vector(Data_sz+1 downto 0);
36
37 signal TXD_Dummy : std_logic;
38 signal NwDat_int : std_logic;
39 signal NwDat_int_reg : std_logic;
40 signal receive : std_logic;
41
42 begin
43
44
45 RDATA <= RDATA_int(8 downto 1);
46 WDATA_int <= '1' & WDATA & '0';
47
48 BaudGenerator : BaudGen
49 port map(clk,reset,Capture,Bclk,RXD,BTrigger);
50
51
52 RX_REG : Shift_REG
53 generic map(Data_sz+2)
54 port map(clk,Bclk,reset,RXD,TXD_Dummy,receive,NwDat_int,(others => '0'),RDATA_int);
55
56 TX_REG : Shift_REG
57 generic map(Data_sz+2)
58 port map(clk,Bclk,reset,'1',TXD,Send,Sended,WDATA_int);
59
60
61
62 process(clk,reset)
63 begin
64 if reset = '0' then
65 NwDat <= '0';
66 elsif clk'event and clk = '1' then
67 NwDat_int_reg <= NwDat_int;
68 if RXD = '1' and NwDat_int = '1' then
69 receive <= '0';
70 elsif RXD = '0' then
71 receive <= '1';
72 end if;
73 if NwDat_int_reg = '0' and NwDat_int = '1' then
74 NwDat <= '1';
75 elsif ack = '1' then
76 NwDat <= '0';
77 end if;
78 end if;
79 end process;
80
81 end ar_UART; No newline at end of file
1 ------------------------------------------------------------------------------
2 -- This file is a part of the LPP VHDL IP LIBRARY
3 -- Copyright (C) 2009 - 2010, Laboratory of Plasmas Physic - CNRS
4 --
5 -- This program is free software; you can redistribute it and/or modify
6 -- it under the terms of the GNU General Public License as published by
7 -- the Free Software Foundation; either version 3 of the License, or
8 -- (at your option) any later version.
9 --
10 -- This program is distributed in the hope that it will be useful,
11 -- but WITHOUT ANY WARRANTY; without even the implied warranty of
12 -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 -- GNU General Public License for more details.
14 --
15 -- You should have received a copy of the GNU General Public License
16 -- along with this program; if not, write to the Free Software
17 -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 -------------------------------------------------------------------------------
19 library IEEE;
20 use IEEE.numeric_std.all;
21 use IEEE.std_logic_1164.all;
22 library lpp;
23 use lpp.lpp_uart.all;
24
25 --! Programme qui va gerer toute la communication entre le PC et le FPGA
26
27 entity UART is
28 generic(Data_sz : integer := 8); --! Constante de taille pour un mot de donnee
29 port(
30 clk : in std_logic; --! Horloge a 25Mhz du systeme
31 reset : in std_logic; --! Reset du systeme
32 TXD : out std_logic; --! Transmission, cote PC
33 RXD : in std_logic; --! Reception, cote PC
34 Capture : in std_logic; --! "Reset" cible pour le generateur de bauds, ici indissocie du reset global
35 NwDat : out std_logic; --! Flag, Nouvelle donnee presente
36 ACK : in std_logic; --! Flag, Reponse au flag precedent
37 Send : in std_logic; --! Flag, Demande d'envoi sur le bus
38 Sended : out std_logic; --! Flag, Envoi termine
39 BTrigger : out std_logic_vector(11 downto 0); --! Registre contenant la valeur du diviseur de frequence pour la transmission
40 RDATA : out std_logic_vector(Data_sz-1 downto 0); --! Mot de donnee en provenance de l'utilisateur
41 WDATA : in std_logic_vector(Data_sz-1 downto 0) --! Mot de donnee a transmettre a l'utilisateur
42 );
43 end entity;
44
45
46 --! @details Gestion de la Reception/Transmission donc de la Vectorisation/Serialisation
47 --! ainsi que la detection et le reglage de le frequence de transmission optimale sur le bus (Generateur de Bauds)
48 architecture ar_UART of UART is
49 signal Bclk : std_logic;
50
51 signal RDATA_int : std_logic_vector(Data_sz+1 downto 0);
52 signal WDATA_int : std_logic_vector(Data_sz+1 downto 0);
53
54 signal TXD_Dummy : std_logic;
55 signal NwDat_int : std_logic;
56 signal NwDat_int_reg : std_logic;
57 signal receive : std_logic;
58
59 begin
60
61
62 RDATA <= RDATA_int(8 downto 1);
63 WDATA_int <= '1' & WDATA & '0';
64
65 BaudGenerator : BaudGen
66 port map(clk,reset,Capture,Bclk,RXD,BTrigger);
67
68
69 RX_REG : Shift_REG
70 generic map(Data_sz+2)
71 port map(clk,Bclk,reset,RXD,TXD_Dummy,receive,NwDat_int,(others => '0'),RDATA_int);
72
73 TX_REG : Shift_REG
74 generic map(Data_sz+2)
75 port map(clk,Bclk,reset,'1',TXD,Send,Sended,WDATA_int);
76
77
78
79 process(clk,reset)
80 begin
81 if reset = '0' then
82 NwDat <= '0';
83 elsif clk'event and clk = '1' then
84 NwDat_int_reg <= NwDat_int;
85 if RXD = '1' and NwDat_int = '1' then
86 receive <= '0';
87 elsif RXD = '0' then
88 receive <= '1';
89 end if;
90 if NwDat_int_reg = '0' and NwDat_int = '1' then
91 NwDat <= '1';
92 elsif ack = '1' then
93 NwDat <= '0';
94 end if;
95 end if;
96 end process;
97
98 end ar_UART;
@@ -1,79 +1,97
1 library ieee;
2 use ieee.std_logic_1164.all;
3 library grlib;
4 use grlib.amba.all;
5 -- pragma translate_off
6 use std.textio.all;
7 -- pragma translate_on
8 library lpp;
9 use lpp.lpp_amba.all;
10
11 package lpp_uart is
12
13 component UART is
14 generic(Data_sz : integer := 8); --! Constante de taille pour un mot de donnee
15 port(
16 clk : in std_logic; --! Horloge a 25Mhz du systeme
17 reset : in std_logic; --! Reset du systeme
18 TXD : out std_logic; --! Transmission, cote PC
19 RXD : in std_logic; --! Reception, cote PC
20 Capture : in std_logic; --! "Reset" cible pour le generateur de bauds, ici indissocie du reset global
21 NwDat : out std_logic; --! Flag, Nouvelle donnee presente
22 ACK : in std_logic; --! Flag, Reponse au flag precedent
23 Send : in std_logic; --! Flag, Demande d'envoi sur le bus
24 Sended : out std_logic; --! Flag, Envoi termine
25 BTrigger : out std_logic_vector(11 downto 0); --! Registre contenant la valeur du diviseur de frequence pour la transmission
26 RDATA : out std_logic_vector(Data_sz-1 downto 0); --! Mot de donnee en provenance de l'utilisateur
27 WDATA : in std_logic_vector(Data_sz-1 downto 0) --! Mot de donnee a transmettre a l'utilisateur
28 );
29 end component;
30
31
32 component Shift_REG is
33 generic(Data_sz : integer := 10);
34 port(
35 clk : in std_logic;
36 Sclk : in std_logic;
37 reset : in std_logic;
38 SIN : in std_logic;
39 SOUT : out std_logic;
40 Serialize : in std_logic;
41 Serialized : out std_logic;
42 D : in std_logic_vector(Data_sz-1 downto 0);
43 Q : out std_logic_vector(Data_sz-1 downto 0)
44
45 );
46 end component;
47
48
49 component BaudGen is
50 port(
51 clk : in std_logic;
52 reset : in std_logic;
53 Capture : in std_logic;
54 Bclk : out std_logic;
55 RXD : in std_logic;
56 BTrigger : out std_logic_vector(11 downto 0)
57 );
58 end component;
59
60 component APB_UART is
61 generic (
62 pindex : integer := 0;
63 paddr : integer := 0;
64 pmask : integer := 16#fff#;
65 pirq : integer := 0;
66 abits : integer := 8;
67 Data_sz : integer := 8);
68 port (
69 clk : in std_logic;
70 rst : in std_logic;
71 apbi : in apb_slv_in_type;
72 apbo : out apb_slv_out_type;
73 TXD : out std_logic;
74 RXD : in std_logic
75 );
76 end component;
77
78
79 end lpp_uart; No newline at end of file
1 ------------------------------------------------------------------------------
2 -- This file is a part of the LPP VHDL IP LIBRARY
3 -- Copyright (C) 2009 - 2010, Laboratory of Plasmas Physic - CNRS
4 --
5 -- This program is free software; you can redistribute it and/or modify
6 -- it under the terms of the GNU General Public License as published by
7 -- the Free Software Foundation; either version 3 of the License, or
8 -- (at your option) any later version.
9 --
10 -- This program is distributed in the hope that it will be useful,
11 -- but WITHOUT ANY WARRANTY; without even the implied warranty of
12 -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 -- GNU General Public License for more details.
14 --
15 -- You should have received a copy of the GNU General Public License
16 -- along with this program; if not, write to the Free Software
17 -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 -------------------------------------------------------------------------------
19 library ieee;
20 use ieee.std_logic_1164.all;
21 library grlib;
22 use grlib.amba.all;
23 -- pragma translate_off
24 use std.textio.all;
25 -- pragma translate_on
26 library lpp;
27 use lpp.lpp_amba.all;
28
29 package lpp_uart is
30
31 component UART is
32 generic(Data_sz : integer := 8); --! Constante de taille pour un mot de donnee
33 port(
34 clk : in std_logic; --! Horloge a 25Mhz du systeme
35 reset : in std_logic; --! Reset du systeme
36 TXD : out std_logic; --! Transmission, cote PC
37 RXD : in std_logic; --! Reception, cote PC
38 Capture : in std_logic; --! "Reset" cible pour le generateur de bauds, ici indissocie du reset global
39 NwDat : out std_logic; --! Flag, Nouvelle donnee presente
40 ACK : in std_logic; --! Flag, Reponse au flag precedent
41 Send : in std_logic; --! Flag, Demande d'envoi sur le bus
42 Sended : out std_logic; --! Flag, Envoi termine
43 BTrigger : out std_logic_vector(11 downto 0); --! Registre contenant la valeur du diviseur de frequence pour la transmission
44 RDATA : out std_logic_vector(Data_sz-1 downto 0); --! Mot de donnee en provenance de l'utilisateur
45 WDATA : in std_logic_vector(Data_sz-1 downto 0) --! Mot de donnee a transmettre a l'utilisateur
46 );
47 end component;
48
49
50 component Shift_REG is
51 generic(Data_sz : integer := 10);
52 port(
53 clk : in std_logic;
54 Sclk : in std_logic;
55 reset : in std_logic;
56 SIN : in std_logic;
57 SOUT : out std_logic;
58 Serialize : in std_logic;
59 Serialized : out std_logic;
60 D : in std_logic_vector(Data_sz-1 downto 0);
61 Q : out std_logic_vector(Data_sz-1 downto 0)
62
63 );
64 end component;
65
66
67 component BaudGen is
68 port(
69 clk : in std_logic;
70 reset : in std_logic;
71 Capture : in std_logic;
72 Bclk : out std_logic;
73 RXD : in std_logic;
74 BTrigger : out std_logic_vector(11 downto 0)
75 );
76 end component;
77
78 component APB_UART is
79 generic (
80 pindex : integer := 0;
81 paddr : integer := 0;
82 pmask : integer := 16#fff#;
83 pirq : integer := 0;
84 abits : integer := 8;
85 Data_sz : integer := 8);
86 port (
87 clk : in std_logic;
88 rst : in std_logic;
89 apbi : in apb_slv_in_type;
90 apbo : out apb_slv_out_type;
91 TXD : out std_logic;
92 RXD : in std_logic
93 );
94 end component;
95
96
97 end lpp_uart;
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@@ -1,622 +1,281
1 1 GNU GENERAL PUBLIC LICENSE
2 Version 3, 29 June 2007
2 Version 2, June 1991
3 3
4 Copyright (C) 2007 Free Software Foundation, Inc. <http://fsf.org/>
4 Copyright (C) 1989, 1991 Free Software Foundation, Inc.,
5 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
5 6 Everyone is permitted to copy and distribute verbatim copies
6 7 of this license document, but changing it is not allowed.
7 8
8 9 Preamble
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19 any other work released this way by its authors. You can apply it to
11 The licenses for most software are designed to take away your
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13 License is intended to guarantee your freedom to share and change free
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23 22 price. Our General Public Licenses are designed to make sure that you
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60 TERMS AND CONDITIONS FOR COPYING, DISTRIBUTION AND MODIFICATION
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79 1. You may copy and distribute verbatim copies of the Program's
80 source code as you receive it, in any medium, provided that you
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146 86
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150
151 The Corresponding Source for a work in source code form is that
152 same work.
153
154 2. Basic Permissions.
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103 c) If the modified program normally reads commands interactively
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114 These requirements apply to the modified work as a whole. If
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275 d) Convey the object code by offering access from a designated
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124 Thus, it is not the intent of this section to claim rights or contest
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293 A separable portion of the object code, whose source code is excluded
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129 In addition, mere aggregation of another work not based on the Program
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296 133
297 A "User Product" is either (1) a "consumer product", which means any
298 tangible personal property which is normally used for personal, family,
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310 "Installation Information" for a User Product means any methods,
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313 a modified version of its Corresponding Source. The information must
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316 modification has been made.
134 3. You may copy and distribute the Program (or a work based on it,
135 under Section 2) in object code or executable form under the terms of
136 Sections 1 and 2 above provided that you also do one of the following:
317 137
318 If you convey an object code work under this section in, or with, or
319 specifically for use in, a User Product, and the conveying occurs as
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343 7. Additional Terms.
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140 1 and 2 above on a medium customarily used for software interchange; or,
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345 "Additional permissions" are terms that supplement the terms of this
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347 Additional permissions that are applicable to the entire Program shall
348 be treated as though they were included in this License, to the extent
349 that they are valid under applicable law. If additional permissions
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351 under those permissions, but the entire Program remains governed by
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354 When you convey a copy of a covered work, you may at your option
355 remove any additional permissions from that copy, or from any part of
356 it. (Additional permissions may be written to require their own
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142 b) Accompany it with a written offer, valid for at least three
143 years, to give any third party, for a charge no more than your
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146 distributed under the terms of Sections 1 and 2 above on a medium
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361 Notwithstanding any other provision of this License, for material you
362 add to a covered work, you may (if authorized by the copyright holders of
363 that material) supplement the terms of this License with terms:
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149 c) Accompany it with the information you received as to the offer
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155 The source code for a work means the preferred form of the work for
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403 Additional terms, permissive or non-permissive, may be stated in the
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407 8. Termination.
408
409 You may not propagate or modify a covered work except as expressly
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422 Moreover, your license from a particular copyright holder is
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166 If distribution of executable or object code is made by offering
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428 171
429 Termination of your rights under this section does not terminate the
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434
435 9. Acceptance Not Required for Having Copies.
436
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440 to receive a copy likewise does not require acceptance. However,
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446 10. Automatic Licensing of Downstream Recipients.
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448 Each time you convey a covered work, the recipient automatically
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450 propagate that work, subject to this License. You are not responsible
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172 4. You may not copy, modify, sublicense, or distribute the Program
173 except as expressly provided under this License. Any attempt
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452 179
453 An "entity transaction" is a transaction transferring control of an
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180 5. You are not required to accept this License, since you have not
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463 You may not impose any further restrictions on the exercise of the
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471 11. Patents.
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473 A "contributor" is a copyright holder who authorizes use under this
474 License of the Program or a work on which the Program is based. The
475 work thus licensed is called the contributor's "contributor version".
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477 A contributor's "essential patent claims" are all patent claims
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485 195 this License.
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492 In the following three paragraphs, a "patent license" is any express
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210 If any portion of this section is held invalid or unenforceable under
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521 A patent license is "discriminatory" if it does not include within
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535
536 Nothing in this License shall be construed as excluding or limiting
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539
540 12. No Surrender of Others' Freedom.
215 It is not the purpose of this section to induce you to infringe any
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541 225
542 If conditions are imposed on you (whether by court order, agreement or
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552 13. Use with the GNU Affero General Public License.
226 This section is intended to make thoroughly clear what is believed to
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553 228
554 Notwithstanding any other provision of this License, you have
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229 8. If the distribution and/or use of the Program is restricted in
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562 236
563 14. Revised Versions of this License.
564
565 The Free Software Foundation may publish revised and/or new versions of
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570 Each version is given a distinguishing version number. If the
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242 Each version is given a distinguishing version number. If the Program
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578 249
579 If the Program specifies that a proxy can decide which future
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583 257
584 Later license versions may give you additional or different
585 permissions. However, no additional obligations are imposed on any
586 author or copyright holder as a result of your choosing to follow a
587 later version.
588
589 15. Disclaimer of Warranty.
258 NO WARRANTY
590 259
591 THERE IS NO WARRANTY FOR THE PROGRAM, TO THE EXTENT PERMITTED BY
592 APPLICABLE LAW. EXCEPT WHEN OTHERWISE STATED IN WRITING THE COPYRIGHT
593 HOLDERS AND/OR OTHER PARTIES PROVIDE THE PROGRAM "AS IS" WITHOUT WARRANTY
594 OF ANY KIND, EITHER EXPRESSED OR IMPLIED, INCLUDING, BUT NOT LIMITED TO,
595 THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
596 PURPOSE. THE ENTIRE RISK AS TO THE QUALITY AND PERFORMANCE OF THE PROGRAM
597 IS WITH YOU. SHOULD THE PROGRAM PROVE DEFECTIVE, YOU ASSUME THE COST OF
598 ALL NECESSARY SERVICING, REPAIR OR CORRECTION.
599
600 16. Limitation of Liability.
260 11. BECAUSE THE PROGRAM IS LICENSED FREE OF CHARGE, THERE IS NO WARRANTY
261 FOR THE PROGRAM, TO THE EXTENT PERMITTED BY APPLICABLE LAW. EXCEPT WHEN
262 OTHERWISE STATED IN WRITING THE COPYRIGHT HOLDERS AND/OR OTHER PARTIES
263 PROVIDE THE PROGRAM "AS IS" WITHOUT WARRANTY OF ANY KIND, EITHER EXPRESSED
264 OR IMPLIED, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
265 MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. THE ENTIRE RISK AS
266 TO THE QUALITY AND PERFORMANCE OF THE PROGRAM IS WITH YOU. SHOULD THE
267 PROGRAM PROVE DEFECTIVE, YOU ASSUME THE COST OF ALL NECESSARY SERVICING,
268 REPAIR OR CORRECTION.
601 269
602 IN NO EVENT UNLESS REQUIRED BY APPLICABLE LAW OR AGREED TO IN WRITING
603 WILL ANY COPYRIGHT HOLDER, OR ANY OTHER PARTY WHO MODIFIES AND/OR CONVEYS
604 THE PROGRAM AS PERMITTED ABOVE, BE LIABLE TO YOU FOR DAMAGES, INCLUDING ANY
605 GENERAL, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES ARISING OUT OF THE
606 USE OR INABILITY TO USE THE PROGRAM (INCLUDING BUT NOT LIMITED TO LOSS OF
607 DATA OR DATA BEING RENDERED INACCURATE OR LOSSES SUSTAINED BY YOU OR THIRD
608 PARTIES OR A FAILURE OF THE PROGRAM TO OPERATE WITH ANY OTHER PROGRAMS),
609 EVEN IF SUCH HOLDER OR OTHER PARTY HAS BEEN ADVISED OF THE POSSIBILITY OF
610 SUCH DAMAGES.
611
612 17. Interpretation of Sections 15 and 16.
613
614 If the disclaimer of warranty and limitation of liability provided
615 above cannot be given local legal effect according to their terms,
616 reviewing courts shall apply local law that most closely approximates
617 an absolute waiver of all civil liability in connection with the
618 Program, unless a warranty or assumption of liability accompanies a
619 copy of the Program in return for a fee.
270 12. IN NO EVENT UNLESS REQUIRED BY APPLICABLE LAW OR AGREED TO IN WRITING
271 WILL ANY COPYRIGHT HOLDER, OR ANY OTHER PARTY WHO MAY MODIFY AND/OR
272 REDISTRIBUTE THE PROGRAM AS PERMITTED ABOVE, BE LIABLE TO YOU FOR DAMAGES,
273 INCLUDING ANY GENERAL, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES ARISING
274 OUT OF THE USE OR INABILITY TO USE THE PROGRAM (INCLUDING BUT NOT LIMITED
275 TO LOSS OF DATA OR DATA BEING RENDERED INACCURATE OR LOSSES SUSTAINED BY
276 YOU OR THIRD PARTIES OR A FAILURE OF THE PROGRAM TO OPERATE WITH ANY OTHER
277 PROGRAMS), EVEN IF SUCH HOLDER OR OTHER PARTY HAS BEEN ADVISED OF THE
278 POSSIBILITY OF SUCH DAMAGES.
620 279
621 280 END OF TERMS AND CONDITIONS
622 281
@@ -628,15 +287,15 free software which everyone can redistr
628 287
629 288 To do so, attach the following notices to the program. It is safest
630 289 to attach them to the start of each source file to most effectively
631 state the exclusion of warranty; and each file should have at least
290 convey the exclusion of warranty; and each file should have at least
632 291 the "copyright" line and a pointer to where the full notice is found.
633 292
634 293 <one line to give the program's name and a brief idea of what it does.>
635 294 Copyright (C) <year> <name of author>
636 295
637 This program is free software: you can redistribute it and/or modify
296 This program is free software; you can redistribute it and/or modify
638 297 it under the terms of the GNU General Public License as published by
639 the Free Software Foundation, either version 3 of the License, or
298 the Free Software Foundation; either version 2 of the License, or
640 299 (at your option) any later version.
641 300
642 301 This program is distributed in the hope that it will be useful,
@@ -644,31 +303,37 the "copyright" line and a pointer to wh
644 303 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
645 304 GNU General Public License for more details.
646 305
647 You should have received a copy of the GNU General Public License
648 along with this program. If not, see <http://www.gnu.org/licenses/>.
306 You should have received a copy of the GNU General Public License along
307 with this program; if not, write to the Free Software Foundation, Inc.,
308 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
649 309
650 310 Also add information on how to contact you by electronic and paper mail.
651 311
652 If the program does terminal interaction, make it output a short
653 notice like this when it starts in an interactive mode:
312 If the program is interactive, make it output a short notice like this
313 when it starts in an interactive mode:
654 314
655 <program> Copyright (C) <year> <name of author>
656 This program comes with ABSOLUTELY NO WARRANTY; for details type `show w'.
315 Gnomovision version 69, Copyright (C) year name of author
316 Gnomovision comes with ABSOLUTELY NO WARRANTY; for details type `show w'.
657 317 This is free software, and you are welcome to redistribute it
658 318 under certain conditions; type `show c' for details.
659 319
660 320 The hypothetical commands `show w' and `show c' should show the appropriate
661 parts of the General Public License. Of course, your program's commands
662 might be different; for a GUI interface, you would use an "about box".
321 parts of the General Public License. Of course, the commands you use may
322 be called something other than `show w' and `show c'; they could even be
323 mouse-clicks or menu items--whatever suits your program.
324
325 You should also get your employer (if you work as a programmer) or your
326 school, if any, to sign a "copyright disclaimer" for the program, if
327 necessary. Here is a sample; alter the names:
663 328
664 You should also get your employer (if you work as a programmer) or school,
665 if any, to sign a "copyright disclaimer" for the program, if necessary.
666 For more information on this, and how to apply and follow the GNU GPL, see
667 <http://www.gnu.org/licenses/>.
329 Yoyodyne, Inc., hereby disclaims all copyright interest in the program
330 `Gnomovision' (which makes passes at compilers) written by James Hacker.
331
332 <signature of Ty Coon>, 1 April 1989
333 Ty Coon, President of Vice
668 334
669 The GNU General Public License does not permit incorporating your program
670 into proprietary programs. If your program is a subroutine library, you
671 may consider it more useful to permit linking proprietary applications with
672 the library. If this is what you want to do, use the GNU Lesser General
673 Public License instead of this License. But first, please read
674 <http://www.gnu.org/philosophy/why-not-lgpl.html>.
335 This General Public License does not permit incorporating your program into
336 proprietary programs. If your program is a subroutine library, you may
337 consider it more useful to permit linking proprietary applications with the
338 library. If this is what you want to do, use the GNU Lesser General
339 Public License instead of this License.
@@ -9,7 +9,7 echo '----------------------------------
9 9
10 10 This program is free software; you can redistribute it and/or modify
11 11 it under the terms of the GNU General Public License as published by
12 the Free Software Foundation; either version 2 of the License, or
12 the Free Software Foundation; either version 3 of the License, or
13 13 (at your option) any later version.
14 14
15 15 This program is distributed in the hope that it will be useful,
@@ -9,7 +9,7 echo '----------------------------------
9 9
10 10 This program is free software; you can redistribute it and/or modify
11 11 it under the terms of the GNU General Public License as published by
12 the Free Software Foundation; either version 2 of the License, or
12 the Free Software Foundation; either version 3 of the License, or
13 13 (at your option) any later version.
14 14
15 15 This program is distributed in the hope that it will be useful,
@@ -33,15 +33,20 echo
33 33 LPP_PATCHPATH=`pwd -L`
34 34
35 35
36 cd $LPP_PATCHPATH/$3
37
38 echo $LPP_PATCHPATH/$3
39 echo $LPP_PATCHPATH
40
36 41 case $1 in
37 42 -R | --recursive )
38 for file in $(find . -name '*.vhd')
43 for file in $(find . -name *.$2)
39 44 do
40 if(grep -q "This program is free software" $file); then
45 if(grep -q "This program is free software" $file); then
41 46 echo "$file already contains GPL HEADER"
42 47 else
43 48 echo "Modifying file : $file"
44 more $LPP_PATCHPATH/licenses/GPL_V2/HEADER >> $file.tmp
49 more $LPP_PATCHPATH/licenses/GPL_V3/${2}HEADER >> $file.tmp
45 50 cat $file >> $file.tmp
46 51 mv $file.tmp $file
47 52 fi
@@ -50,18 +55,22 case $1 in
50 55 -h | --help | --h | -help)
51 56 echo 'Help:
52 57 This script add a GPL HEADER in all vhdl files.
53
58 usage: sh GPL_Patcher.sh [-R] [extension] [path]
54 59 -R or --recurcive:
55 Analyse recurcively folders starting from $LPP_PATCHPATH'
60 Analyse recurcively folders starting from $LPP_PATCHPATH
61 extension
62 for example vhd,h,c
63 path
64 starting path'
56 65 ;;
57 66 * )
58 for file in $(ls *.vhd)
67 for file in $(ls *.$2)
59 68 do
60 69 if(grep -q "This program is free software" $file); then
61 70 echo "$file already contains GPL HEADER"
62 71 else
63 72 echo "Modifying file : $file"
64 more $LPP_PATCHPATH/licenses/GPL_V2/HEADER >> $file.tmp
73 more $LPP_PATCHPATH/licenses/GPL_V3/${2}HEADER >> $file.tmp
65 74 cat $file >> $file.tmp
66 75 mv $file.tmp $file
67 76 fi
@@ -70,3 +79,4 case $1 in
70 79
71 80 esac
72 81
82 cd $LPP_PATCHPATH
@@ -9,7 +9,7 echo '----------------------------------
9 9
10 10 This program is free software; you can redistribute it and/or modify
11 11 it under the terms of the GNU General Public License as published by
12 the Free Software Foundation; either version 2 of the License, or
12 the Free Software Foundation; either version 3 of the License, or
13 13 (at your option) any later version.
14 14
15 15 This program is distributed in the hope that it will be useful,
@@ -9,7 +9,7 echo '----------------------------------
9 9 --
10 10 -- This program is free software; you can redistribute it and/or modify
11 11 -- it under the terms of the GNU General Public License as published by
12 -- the Free Software Foundation; either version 2 of the License, or
12 -- the Free Software Foundation; either version 3 of the License, or
13 13 -- (at your option) any later version.
14 14 --
15 15 -- This program is distributed in the hope that it will be useful,
@@ -9,7 +9,7 echo '----------------------------------
9 9
10 10 This program is free software; you can redistribute it and/or modify
11 11 it under the terms of the GNU General Public License as published by
12 the Free Software Foundation; either version 2 of the License, or
12 the Free Software Foundation; either version 3 of the License, or
13 13 (at your option) any later version.
14 14
15 15 This program is distributed in the hope that it will be useful,
@@ -9,7 +9,7 echo '----------------------------------
9 9
10 10 This program is free software; you can redistribute it and/or modify
11 11 it under the terms of the GNU General Public License as published by
12 the Free Software Foundation; either version 2 of the License, or
12 the Free Software Foundation; either version 3 of the License, or
13 13 (at your option) any later version.
14 14
15 15 This program is distributed in the hope that it will be useful,
@@ -9,7 +9,7 echo '----------------------------------
9 9
10 10 This program is free software; you can redistribute it and/or modify
11 11 it under the terms of the GNU General Public License as published by
12 the Free Software Foundation; either version 2 of the License, or
12 the Free Software Foundation; either version 3 of the License, or
13 13 (at your option) any later version.
14 14
15 15 This program is distributed in the hope that it will be useful,
@@ -9,7 +9,7 echo '----------------------------------
9 9
10 10 This program is free software; you can redistribute it and/or modify
11 11 it under the terms of the GNU General Public License as published by
12 the Free Software Foundation; either version 2 of the License, or
12 the Free Software Foundation; either version 3 of the License, or
13 13 (at your option) any later version.
14 14
15 15 This program is distributed in the hope that it will be useful,
1 NO CONTENT: file was removed
1 NO CONTENT: file was removed
1 NO CONTENT: file was removed
1 NO CONTENT: file was removed
1 NO CONTENT: file was removed
1 NO CONTENT: file was removed
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