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1 #include <stdio.h>
1 #include <stdio.h>
2 #include "lpp_apb_functions.h"
2 #include "lpp_apb_functions.h"
3 #include "apb_fifo_Driver.h"
3 #include "apb_uart_Driver.h"
4 #include "apb_uart_Driver.h"
4 #include "apb_fft_Driver.h"
5 #include "TableTest.h"
5 #include "apb_delay_Driver.h"
6
6
7
7
8 int main()
8 int main()
9 {
9 {
10 int i=0,j=0;
11 int data1,data2;
10 char temp[256];
12 char temp[256];
11 int i;
13
12 int Table[256];
14 int TblSinA[256] = {0x0000,0x0142,0x0282,0x03C2,0x04FF,0x0638,0x076E,0x08A0,0x09CC,0x0AF2,0x0C11,0x0D29,0x0E39,0x0F40,0x103E,0x1131,0x121A,0x12F8,0x13CA,0x1490,0x1549,0x15F5,0x1694,0x1724,0x17A7,0x181B,0x187F,0x18D5,0x191C,0x1953,0x197A,0x1992,0x199A,0x1992,0x197A,0x1953,0x191C,0x18D5,0x187F,0x181B,0x17A7,0x1724,0x1694,0x15F5,0x1549,0x1490,0x13CA,0x12F8,0x121A,0x1131,0x103E,0x0F40,0x0E39,0x0D29,0x0C11,0x0AF2,0x09CC,0x08A0,0x076E,0x0638,0x04FF,0x03C2,0x0282,0x0142,0x0000,0xFEBE,0xFD7E,0xFC3E,0xFB01,0xF9C8,0xF892,0xF760,0xF634,0xF50E,0xF3EF,0xF2D7,0xF1C7,0xF0C0,0xEFC2,0xEECF,0xEDE6,0xED08,0xEC36,0xEB70,0xEAB7,0xEA0B,0xE96C,0xE8DC,0xE859,0xE7E5,0xE781,0xE72B,0xE6E4,0xE6AD,0xE686,0xE66E,0xE666,0xE66E,0xE686,0xE6AD,0xE6E4,0xE72B,0xE781,0xE7E5,0xE859,0xE8DC,0xE96C,0xEA0B,0xEAB7,0xEB70,0xEC36,0xED08,0xEDE6,0xEECF,0xEFC2,0xF0C0,0xF1C7,0xF2D7,0xF3EF,0xF50E,0xF634,0xF760,0xF892,0xF9C8,0xFB01,0xFC3E,0xFD7E,0xFEBE,0x0000,0x0142,0x0282,0x03C2,0x04FF,0x0638,0x076E,0x08A0,0x09CC,0x0AF2,0x0C11,0x0D29,0x0E39,0x0F40,0x103E,0x1131,0x121A,0x12F8,0x13CA,0x1490,0x1549,0x15F5,0x1694,0x1724,0x17A7,0x181B,0x187F,0x18D5,0x191C,0x1953,0x197A,0x1992,0x199A,0x1992,0x197A,0x1953,0x191C,0x18D5,0x187F,0x181B,0x17A7,0x1724,0x1694,0x15F5,0x1549,0x1490,0x13CA,0x12F8,0x121A,0x1131,0x103E,0x0F40,0x0E39,0x0D29,0x0C11,0x0AF2,0x09CC,0x08A0,0x076E,0x0638,0x04FF,0x03C2,0x0282,0x0142,0x0000,0xFEBE,0xFD7E,0xFC3E,0xFB01,0xF9C8,0xF892,0xF760,0xF634,0xF50E,0xF3EF,0xF2D7,0xF1C7,0xF0C0,0xEFC2,0xEECF,0xEDE6,0xED08,0xEC36,0xEB70,0xEAB7,0xEA0B,0xE96C,0xE8DC,0xE859,0xE7E5,0xE781,0xE72B,0xE6E4,0xE6AD,0xE686,0xE66E,0xE666,0xE66E,0xE686,0xE6AD,0xE6E4,0xE72B,0xE781,0xE7E5,0xE859,0xE8DC,0xE96C,0xEA0B,0xEAB7,0xEB70,0xEC36,0xED08,0xEDE6,0xEECF,0xEFC2,0xF0C0,0xF1C7,0xF2D7,0xF3EF,0xF50E,0xF634,0xF760,0xF892,0xF9C8,0xFB01,0xFC3E,0xFD7E,0xFEBE};
13 //Somme de 2 sinus//
15 int TblSinAB[256] = {0x0000,0x0D53,0x17CB,0x1D3C,0x1CA5,0x1676,0x0C6D,0x0131,0xF7B2,0xF273,0xF2F6,0xF95F,0x046D,0x11C2,0x1E77,0x27C5,0x2BB4,0x298C,0x2203,0x1712,0x0B7D,0x022B,0xFD78,0xFEA5,0x058D,0x10AC,0x1D7E,0x2913,0x30C2,0x32CD,0x2EC3,0x25A3,0x199A,0x0D80,0x0431,0xFFD9,0x0175,0x0898,0x1381,0x1F89,0x29C1,0x2FA4,0x2FAF,0x29BF,0x1F15,0x120E,0x0591,0xFC64,0xF880,0xFA9D,0x0205,0x0CBE,0x1805,0x20F3,0x252D,0x2371,0x1BE6,0x100E,0x0270,0xF5FB,0xED58,0xEA48,0xED39,0xF530,0x0000,0x0AD0,0x12C7,0x15B8,0x12A8,0x0A05,0xFD90,0xEFF2,0xE41A,0xDC8F,0xDAD3,0xDF0D,0xE7FB,0xF342,0xFDFB,0x0563,0x0780,0x039C,0xFA6F,0xEDF2,0xE0EB,0xD641,0xD051,0xD05C,0xD63F,0xE077,0xEC7F,0xF768,0xFE8B,0x0027,0xFBCF,0xF280,0xE666,0xDA5D,0xD13D,0xCD33,0xCF3E,0xD6ED,0xE282,0xEF54,0xFA73,0x015B,0x0288,0xFDD5,0xF483,0xE8EE,0xDDFD,0xD674,0xD44C,0xD83B,0xE189,0xEE3E,0xFB93,0x06A1,0x0D0A,0x0D8D,0x084E,0xFECF,0xF393,0xE98A,0xE35B,0xE2C4,0xE835,0xF2AD,0x0000,0x0D53,0x17CB,0x1D3C,0x1CA5,0x1676,0x0C6D,0x0131,0xF7B2,0xF273,0xF2F6,0xF95F,0x046D,0x11C2,0x1E77,0x27C5,0x2BB4,0x298C,0x2203,0x1712,0x0B7D,0x022B,0xFD78,0xFEA5,0x058D,0x10AC,0x1D7E,0x2913,0x30C2,0x32CD,0x2EC3,0x25A3,0x199A,0x0D80,0x0431,0xFFD9,0x0175,0x0898,0x1381,0x1F89,0x29C1,0x2FA4,0x2FAF,0x29BF,0x1F15,0x120E,0x0591,0xFC64,0xF880,0xFA9D,0x0205,0x0CBE,0x1805,0x20F3,0x252D,0x2371,0x1BE6,0x100E,0x0270,0xF5FB,0xED58,0xEA48,0xED39,0xF530,0x0000,0x0AD0,0x12C7,0x15B8,0x12A8,0x0A05,0xFD90,0xEFF2,0xE41A,0xDC8F,0xDAD3,0xDF0D,0xE7FB,0xF342,0xFDFB,0x0563,0x0780,0x039C,0xFA6F,0xEDF2,0xE0EB,0xD641,0xD051,0xD05C,0xD63F,0xE077,0xEC7F,0xF768,0xFE8B,0x0027,0xFBCF,0xF280,0xE666,0xDA5D,0xD13D,0xCD33,0xCF3E,0xD6ED,0xE282,0xEF54,0xFA73,0x015B,0x0288,0xFDD5,0xF483,0xE8EE,0xDDFD,0xD674,0xD44C,0xD83B,0xE189,0xEE3E,0xFB93,0x06A1,0x0D0A,0x0D8D,0x084E,0xFECF,0xF393,0xE98A,0xE35B,0xE2C4,0xE835,0xF2AD};
14 //int Tablo[256] = {0x00000000,0x0DA20000,0x1B080000,0x27F70000,0x34380000,0x3F960000,0x49E10000,0x52F10000,0x5AA10000,0x60D60000,0x657D0000,0x688C0000,0x69FE0000,0x69DB0000,0x68310000,0x65170000,0x60A90000,0x5B0D0000,0x546D0000,0x4CF90000,0x44E30000,0x3C610000,0x33AA0000,0x2AF40000,0x22750000,0x1A610000,0x12E70000,0x0C310000,0x06660000,0x01A30000,0xFE010000,0xFB8E0000,0xFA520000,0xFA4D0000,0xFB770000,0xFDBE0000,0x010A0000,0x053E0000,0x0A330000,0x0FBF0000,0x15B30000,0x1BDE0000,0x220C0000,0x28080000,0x2D9D0000,0x329B0000,0x36D20000,0x3A170000,0x3C440000,0x3D390000,0x3CDE0000,0x3B210000,0x37F90000,0x33650000,0x2D6D0000,0x26210000,0x1D990000,0x13F30000,0x09570000,0xFDF10000,0xF1F20000,0xE58F0000,0xD9030000,0xCC870000,0xC0560000,0xB4AA0000,0xA9BC0000,0x9FBF0000,0x96E40000,0x8F570000,0x893A0000,0x84AB0000,0x81BF0000,0x80830000,0x80FB0000,0x83220000,0x86EC0000,0x8C430000,0x93090000,0x9B1B0000,0xA44D0000,0xAE700000,0xB9500000,0xC4B40000,0xD0630000,0xDC240000,0xE7BD0000,0xF2F60000,0xFD9A0000,0x077A0000,0x106B0000,0x18480000,0x1EF30000,0x24570000,0x28650000,0x2B160000,0x2C6F0000,0x2C790000,0x2B470000,0x28F30000,0x259E0000,0x216E0000,0x1C8F0000,0x17310000,0x11860000,0x0BC10000,0x06170000,0x00BA0000,0xFBDD0000,0xF7AC0000,0xF44F0000,0xF1EA0000,0xF09C0000,0xF0790000,0xF1900000,0xF3E80000,0xF77E0000,0xFC4A0000,0x02370000,0x092E0000,0x110E0000,0x19AF0000,0x22E40000,0x2C7C0000,0x36420000,0x3FFF0000,0x497C0000,0x52810000,0x5AD70000,0x624B0000,0x68AD0000,0x6DD40000,0x71990000,0x73E10000,0x74950000,0x73A60000,0x71100000,0x6CD60000,0x67040000,0x5FAD0000,0x56EE0000,0x4CEA0000,0x41CD0000,0x35C50000,0x29070000,0x1BCC0000,0x0E4E0000,0x00CA0000,0xF37C0000,0xE69C0000,0xDA620000,0xCF040000,0xC4AE0000,0xBB8B0000,0xB3BC0000,0xAD5C0000,0xA87D0000,0xA5290000,0xA3630000,0xA3220000,0xA4590000,0xA6EF0000,0xAAC80000,0xAFBD0000,0xB5A40000,0xBC4F0000,0xC38B0000,0xCB220000,0xD2E00000,0xDA8E0000,0xE1F70000,0xE8EC0000,0xEF3C0000,0xF4C10000,0xF9560000,0xFCDF0000,0xFF470000,0x007F0000,0x00850000,0xFF5C0000,0xFD0B0000,0xF9A80000,0xF54B0000,0xF0170000,0xEA320000,0xE3C90000,0xDD0B0000,0xD62B0000,0xCF5F0000,0xC8DA0000,0xC2D30000,0xBD7A0000,0xB8FF0000,0xB58D0000,0xB3490000,0xB2510000,0xB2BE0000,0xB49F0000,0xB7FC0000,0xBCD60000,0xC3220000,0xCAD10000,0xD3C70000,0xDDE50000,0xE9030000,0xF4F20000,0x01800000,0x0E770000,0x1B9D0000,0x28B70000,0x35880000,0x41D70000,0x4D6C0000,0x58100000,0x61950000,0x69D00000,0x709C0000,0x75DE0000,0x79800000,0x7B750000,0x7BBB0000,0x7A570000,0x77550000,0x72CB0000,0x6CD70000,0x659E0000,0x5D490000,0x54090000,0x4A110000,0x3F980000,0x34D80000,0x2A090000,0x1F630000,0x151D0000,0x0B690000,0x02760000,0xFA6F0000,0xF3730000,0xEDA10000,0xE90B0000,0xE5BF0000,0xE3C00000,0xE30A0000,0xE38F0000,0xE53D0000,0xE7F80000,0xEB9D0000,0xF0050000,0xF5030000,0xFA680000,0x00000000,0x05980000,0x0AFD0000,0x0FFB0000,0x14630000,0x18080000};
16 int TblSinB[256] = {0x0000,0x0C11,0x1549,0x197A,0x17A7,0x103E,0x04FF,0xF892,0xEDE6,0xE781,0xE6E4,0xEC36,0xF634,0x0282,0x0E39,0x1694,0x199A,0x1694,0x0E39,0x0282,0xF634,0xEC36,0xE6E4,0xE781,0xEDE6,0xF892,0x04FF,0x103E,0x17A7,0x197A,0x1549,0x0C11,0x0000,0xF3EF,0xEAB7,0xE686,0xE859,0xEFC2,0xFB01,0x076E,0x121A,0x187F,0x191C,0x13CA,0x09CC,0xFD7E,0xF1C7,0xE96C,0xE666,0xE96C,0xF1C7,0xFD7E,0x09CC,0x13CA,0x191C,0x187F,0x121A,0x076E,0xFB01,0xEFC2,0xE859,0xE686,0xEAB7,0xF3EF,0x0000,0x0C11,0x1549,0x197A,0x17A7,0x103E,0x04FF,0xF892,0xEDE6,0xE781,0xE6E4,0xEC36,0xF634,0x0282,0x0E39,0x1694,0x199A,0x1694,0x0E39,0x0282,0xF634,0xEC36,0xE6E4,0xE781,0xEDE6,0xF892,0x04FF,0x103E,0x17A7,0x197A,0x1549,0x0C11,0x0000,0xF3EF,0xEAB7,0xE686,0xE859,0xEFC2,0xFB01,0x076E,0x121A,0x187F,0x191C,0x13CA,0x09CC,0xFD7E,0xF1C7,0xE96C,0xE666,0xE96C,0xF1C7,0xFD7E,0x09CC,0x13CA,0x191C,0x187F,0x121A,0x076E,0xFB01,0xEFC2,0xE859,0xE686,0xEAB7,0xF3EF,0x0000,0x0C11,0x1549,0x197A,0x17A7,0x103E,0x04FF,0xF892,0xEDE6,0xE781,0xE6E4,0xEC36,0xF634,0x0282,0x0E39,0x1694,0x199A,0x1694,0x0E39,0x0282,0xF634,0xEC36,0xE6E4,0xE781,0xEDE6,0xF892,0x04FF,0x103E,0x17A7,0x197A,0x1549,0x0C11,0x0000,0xF3EF,0xEAB7,0xE686,0xE859,0xEFC2,0xFB01,0x076E,0x121A,0x187F,0x191C,0x13CA,0x09CC,0xFD7E,0xF1C7,0xE96C,0xE666,0xE96C,0xF1C7,0xFD7E,0x09CC,0x13CA,0x191C,0x187F,0x121A,0x076E,0xFB01,0xEFC2,0xE859,0xE686,0xEAB7,0xF3EF,0x0000,0x0C11,0x1549,0x197A,0x17A7,0x103E,0x04FF,0xF892,0xEDE6,0xE781,0xE6E4,0xEC36,0xF634,0x0282,0x0E39,0x1694,0x199A,0x1694,0x0E39,0x0282,0xF634,0xEC36,0xE6E4,0xE781,0xEDE6,0xF892,0x04FF,0x103E,0x17A7,0x197A,0x1549,0x0C11,0x0000,0xF3EF,0xEAB7,0xE686,0xE859,0xEFC2,0xFB01,0x076E,0x121A,0x187F,0x191C,0x13CA,0x09CC,0xFD7E,0xF1C7,0xE96C,0xE666,0xE96C,0xF1C7,0xFD7E,0x09CC,0x13CA,0x191C,0x187F,0x121A,0x076E,0xFB01,0xEFC2,0xE859,0xE686,0xEAB7,0xF3EF};
15 //1 Sinus//
17 int TblSinBC[256] = {0x0000,0x0E94,0x1A48,0x20E8,0x2173,0x1C4F,0x1338,0x08CF,0x0000,0xFB4B,0xFC2D,0x02CA,0x0DDB,0x1B02,0x2755,0x300E,0x3333,0x300E,0x2755,0x1B02,0x0DDB,0x02CA,0xFC2D,0xFB4B,0x0000,0x08CF,0x1338,0x1C4F,0x2173,0x20E8,0x1A48,0x0E94,0x0000,0xF16C,0xE5B8,0xDF18,0xDE8D,0xE3B1,0xECC8,0xF731,0x0000,0x04B5,0x03D3,0xFD36,0xF225,0xE4FE,0xD8AB,0xCFF2,0xCCCD,0xCFF2,0xD8AB,0xE4FE,0xF225,0xFD36,0x03D3,0x04B5,0x0000,0xF731,0xECC8,0xE3B1,0xDE8D,0xDF18,0xE5B8,0xF16C,0x0000,0x0E94,0x1A48,0x20E8,0x2173,0x1C4F,0x1338,0x08CF,0x0000,0xFB4B,0xFC2D,0x02CA,0x0DDB,0x1B02,0x2755,0x300E,0x3333,0x300E,0x2755,0x1B02,0x0DDB,0x02CA,0xFC2D,0xFB4B,0x0000,0x08CF,0x1338,0x1C4F,0x2173,0x20E8,0x1A48,0x0E94,0x0000,0xF16C,0xE5B8,0xDF18,0xDE8D,0xE3B1,0xECC8,0xF731,0x0000,0x04B5,0x03D3,0xFD36,0xF225,0xE4FE,0xD8AB,0xCFF2,0xCCCD,0xCFF2,0xD8AB,0xE4FE,0xF225,0xFD36,0x03D3,0x04B5,0x0000,0xF731,0xECC8,0xE3B1,0xDE8D,0xDF18,0xE5B8,0xF16C,0x0000,0x0E94,0x1A48,0x20E8,0x2173,0x1C4F,0x1338,0x08CF,0x0000,0xFB4B,0xFC2D,0x02CA,0x0DDB,0x1B02,0x2755,0x300E,0x3333,0x300E,0x2755,0x1B02,0x0DDB,0x02CA,0xFC2D,0xFB4B,0x0000,0x08CF,0x1338,0x1C4F,0x2173,0x20E8,0x1A48,0x0E94,0x0000,0xF16C,0xE5B8,0xDF18,0xDE8D,0xE3B1,0xECC8,0xF731,0x0000,0x04B5,0x03D3,0xFD36,0xF225,0xE4FE,0xD8AB,0xCFF2,0xCCCD,0xCFF2,0xD8AB,0xE4FE,0xF225,0xFD36,0x03D3,0x04B5,0x0000,0xF731,0xECC8,0xE3B1,0xDE8D,0xDF18,0xE5B8,0xF16C,0x0000,0x0E94,0x1A48,0x20E8,0x2173,0x1C4F,0x1338,0x08CF,0x0000,0xFB4B,0xFC2D,0x02CA,0x0DDB,0x1B02,0x2755,0x300E,0x3333,0x300E,0x2755,0x1B02,0x0DDB,0x02CA,0xFC2D,0xFB4B,0x0000,0x08CF,0x1338,0x1C4F,0x2173,0x20E8,0x1A48,0x0E94,0x0000,0xF16C,0xE5B8,0xDF18,0xDE8D,0xE3B1,0xECC8,0xF731,0x0000,0x04B5,0x03D3,0xFD36,0xF225,0xE4FE,0xD8AB,0xCFF2,0xCCCD,0xCFF2,0xD8AB,0xE4FE,0xF225,0xFD36,0x03D3,0x04B5,0x0000,0xF731,0xECC8,0xE3B1,0xDE8D,0xDF18,0xE5B8,0xF16C};
16 int Tablo[256] = {0x00000000,0x080A0000,0x100B0000,0x17FC0000,0x1FD50000,0x278E0000,0x2F1F0000,0x36800000,0x3DAA0000,0x44960000,0x4B3D0000,0x51970000,0x579F0000,0x5D4F0000,0x62A00000,0x678E0000,0x6C130000,0x702B0000,0x73D10000,0x77030000,0x79BC0000,0x7BFB0000,0x7DBC0000,0x7EFE0000,0x7FBF0000,0x80000000,0x7FBF0000,0x7EFE0000,0x7DBC0000,0x7BFB0000,0x79BC0000,0x77030000,0x73D10000,0x702B0000,0x6C130000,0x678E0000,0x62A00000,0x5D4F0000,0x579F0000,0x51970000,0x4B3D0000,0x44960000,0x3DAA0000,0x36800000,0x2F1F0000,0x278E0000,0x1FD50000,0x17FC0000,0x100B0000,0x080A0000,0x00000000,0xF7F60000,0xEFF50000,0xE8040000,0xE02B0000,0xD8720000,0xD0E10000,0xC9800000,0xC2560000,0xBB6A0000,0xB4C30000,0xAE690000,0xA8610000,0xA2B10000,0x9D600000,0x98720000,0x93ED0000,0x8FD50000,0x8C2F0000,0x88FD0000,0x86440000,0x84050000,0x82440000,0x81020000,0x80410000,0x80000000,0x80410000,0x81020000,0x82440000,0x84050000,0x86440000,0x88FD0000,0x8C2F0000,0x8FD50000,0x93ED0000,0x98720000,0x9D600000,0xA2B10000,0xA8610000,0xAE690000,0xB4C30000,0xBB6A0000,0xC2560000,0xC9800000,0xD0E10000,0xD8720000,0xE02B0000,0xE8040000,0xEFF50000,0xF7F60000,0x00000000,0x080A0000,0x100B0000,0x17FC0000,0x1FD50000,0x278E0000,0x2F1F0000,0x36800000,0x3DAA0000,0x44960000,0x4B3D0000,0x51970000,0x579F0000,0x5D4F0000,0x62A00000,0x678E0000,0x6C130000,0x702B0000,0x73D10000,0x77030000,0x79BC0000,0x7BFB0000,0x7DBC0000,0x7EFE0000,0x7FBF0000,0x80000000,0x7FBF0000,0x7EFE0000,0x7DBC0000,0x7BFB0000,0x79BC0000,0x77030000,0x73D10000,0x702B0000,0x6C130000,0x678E0000,0x62A00000,0x5D4F0000,0x579F0000,0x51970000,0x4B3D0000,0x44960000,0x3DAA0000,0x36800000,0x2F1F0000,0x278E0000,0x1FD50000,0x17FC0000,0x100B0000,0x080A0000,0x00000000,0xF7F60000,0xEFF50000,0xE8040000,0xE02B0000,0xD8720000,0xD0E10000,0xC9800000,0xC2560000,0xBB6A0000,0xB4C30000,0xAE690000,0xA8610000,0xA2B10000,0x9D600000,0x98720000,0x93ED0000,0x8FD50000,0x8C2F0000,0x88FD0000,0x86440000,0x84050000,0x82440000,0x81020000,0x80410000,0x80000000,0x80410000,0x81020000,0x82440000,0x84050000,0x86440000,0x88FD0000,0x8C2F0000,0x8FD50000,0x93ED0000,0x98720000,0x9D600000,0xA2B10000,0xA8610000,0xAE690000,0xB4C30000,0xBB6A0000,0xC2560000,0xC9800000,0xD0E10000,0xD8720000,0xE02B0000,0xE8040000,0xEFF50000,0xF7F60000,0x00000000,0x080A0000,0x100B0000,0x17FC0000,0x1FD50000,0x278E0000,0x2F1F0000,0x36800000,0x3DAA0000,0x44960000,0x4B3D0000,0x51970000,0x579F0000,0x5D4F0000,0x62A00000,0x678E0000,0x6C130000,0x702B0000,0x73D10000,0x77030000,0x79BC0000,0x7BFB0000,0x7DBC0000,0x7EFE0000,0x7FBF0000,0x80000000,0x7FBF0000,0x7EFE0000,0x7DBC0000,0x7BFB0000,0x79BC0000,0x77030000,0x73D10000,0x702B0000,0x6C130000,0x678E0000,0x62A00000,0x5D4F0000,0x579F0000,0x51970000,0x4B3D0000,0x44960000,0x3DAA0000,0x36800000,0x2F1F0000,0x278E0000,0x1FD50000,0x17FC0000,0x100B0000,0x080A0000,0x00000000,0xF7F60000,0xEFF50000,0xE8040000,0xE02B0000,0xD8720000};
18 int TblSinC[256] = {0x0000,0x0282,0x04FF,0x076E,0x09CC,0x0C11,0x0E39,0x103E,0x121A,0x13CA,0x1549,0x1694,0x17A7,0x187F,0x191C,0x197A,0x199A,0x197A,0x191C,0x187F,0x17A7,0x1694,0x1549,0x13CA,0x121A,0x103E,0x0E39,0x0C11,0x09CC,0x076E,0x04FF,0x0282,0x0000,0xFD7E,0xFB01,0xF892,0xF634,0xF3EF,0xF1C7,0xEFC2,0xEDE6,0xEC36,0xEAB7,0xE96C,0xE859,0xE781,0xE6E4,0xE686,0xE666,0xE686,0xE6E4,0xE781,0xE859,0xE96C,0xEAB7,0xEC36,0xEDE6,0xEFC2,0xF1C7,0xF3EF,0xF634,0xF892,0xFB01,0xFD7E,0x0000,0x0282,0x04FF,0x076E,0x09CC,0x0C11,0x0E39,0x103E,0x121A,0x13CA,0x1549,0x1694,0x17A7,0x187F,0x191C,0x197A,0x199A,0x197A,0x191C,0x187F,0x17A7,0x1694,0x1549,0x13CA,0x121A,0x103E,0x0E39,0x0C11,0x09CC,0x076E,0x04FF,0x0282,0x0000,0xFD7E,0xFB01,0xF892,0xF634,0xF3EF,0xF1C7,0xEFC2,0xEDE6,0xEC36,0xEAB7,0xE96C,0xE859,0xE781,0xE6E4,0xE686,0xE666,0xE686,0xE6E4,0xE781,0xE859,0xE96C,0xEAB7,0xEC36,0xEDE6,0xEFC2,0xF1C7,0xF3EF,0xF634,0xF892,0xFB01,0xFD7E,0x0000,0x0282,0x04FF,0x076E,0x09CC,0x0C11,0x0E39,0x103E,0x121A,0x13CA,0x1549,0x1694,0x17A7,0x187F,0x191C,0x197A,0x199A,0x197A,0x191C,0x187F,0x17A7,0x1694,0x1549,0x13CA,0x121A,0x103E,0x0E39,0x0C11,0x09CC,0x076E,0x04FF,0x0282,0x0000,0xFD7E,0xFB01,0xF892,0xF634,0xF3EF,0xF1C7,0xEFC2,0xEDE6,0xEC36,0xEAB7,0xE96C,0xE859,0xE781,0xE6E4,0xE686,0xE666,0xE686,0xE6E4,0xE781,0xE859,0xE96C,0xEAB7,0xEC36,0xEDE6,0xEFC2,0xF1C7,0xF3EF,0xF634,0xF892,0xFB01,0xFD7E,0x0000,0x0282,0x04FF,0x076E,0x09CC,0x0C11,0x0E39,0x103E,0x121A,0x13CA,0x1549,0x1694,0x17A7,0x187F,0x191C,0x197A,0x199A,0x197A,0x191C,0x187F,0x17A7,0x1694,0x1549,0x13CA,0x121A,0x103E,0x0E39,0x0C11,0x09CC,0x076E,0x04FF,0x0282,0x0000,0xFD7E,0xFB01,0xF892,0xF634,0xF3EF,0xF1C7,0xEFC2,0xEDE6,0xEC36,0xEAB7,0xE96C,0xE859,0xE781,0xE6E4,0xE686,0xE666,0xE686,0xE6E4,0xE781,0xE859,0xE96C,0xEAB7,0xEC36,0xEDE6,0xEFC2,0xF1C7,0xF3EF,0xF634,0xF892,0xFB01,0xFD7E};
17 printf("Debut Main\n\n");
19
18 UART_Device* uart0 = openUART(0);
20 UART_Device* uart0 = openUART(0);
19 FFT_Device* fft0 = openFFT(0);
21 FIFO_Device* fifotry = openFIFO(0);
20 DELAY_Device* delay = openDELAY(0);
22 FIFO_Device* fifoIn = openFIFO(1);
23 FIFO_Device* fifoOut = openFIFO(2);
24
25 printf("\nDebut Main\n\n");
21
26
22 printf("addr_fft: %x\n",(unsigned int)fft0);
27 FillFifo(fifoIn,0,TblSinA,256);
23 printf("addr_uart: %x\n\n",(unsigned int)uart0);
28 FillFifo(fifoIn,1,TblSinAB,256);
24 printf("cfg_fft: %x\n",fft0->ConfigReg);
29 FillFifo(fifoIn,2,TblSinB,256);
25 printf("cfg_uart: %x\n\n",uart0->ConfigReg);
30 FillFifo(fifoIn,3,TblSinBC,256);
31 FillFifo(fifoIn,4,TblSinC,256);
32
33 while(j<5){
34 while((fifoOut->FIFOreg[(2*j)+FIFO_Ctrl] & FIFO_Full) != FIFO_Full); // TANT QUE full a 0 RIEN
26
35
27 while(1)
36 sprintf(temp,"FIFO %d\n\r",j);
28 {
37 uartputs(uart0,temp);
29 FftInput(Tablo,fft0,delay);
38 //while((fifoOut->FIFOreg[(2*0)+FIFO_Ctrl] & FIFO_Empty) != FIFO_Empty){ // TANT QUE empty a 0 ALORS
30 /* for (i = 0 ; i < 256 ; i++)
39 while(i < 128){
31 {
40 data1 = (fifoOut->FIFOreg[(2*j)+FIFO_RWdata]) & Mask_4hex;
32 sprintf(temp,"%x/in",Tablo[i]);
41 data2 = (fifoOut->FIFOreg[(2*j)+FIFO_RWdata]) & Mask_4hex;
33 uartputs(uart0,temp);
42 i++;
34 }*/
43 sprintf(temp,"%d\t%d\n\r",data1,data2);
35
36 FftOutput(Table,fft0);
37 for (i = 0 ; i < 128 ; i++)
38 {
39 sprintf(temp,"%x/out",Table[i]);
40 uartputs(uart0,temp);
44 uartputs(uart0,temp);
41 }
45 }
46 i=0;
47 j++;
42 }
48 }
49 printf("\nFin Main\n\n");
43 return 0;
50 return 0;
44 }
51 }
45
Show file before | Show file after | Hide comments
@@ -25,14 +25,14 use IEEE.numeric_std.all;
25
25
26 entity Driver_FFT is
26 entity Driver_FFT is
27 generic(
27 generic(
28 Data_sz : integer range 1 to 32 := 16
28 Data_sz : integer range 1 to 32 := 16;
29 NbData : integer range 1 to 512 := 256
29 );
30 );
30 port(
31 port(
31 clk : in std_logic;
32 clk : in std_logic;
32 rstn : in std_logic;
33 rstn : in std_logic;
33 Load : in std_logic;
34 Load : in std_logic;
34 Empty : in std_logic_vector(4 downto 0);
35 Empty : in std_logic_vector(4 downto 0);
35 Full : in std_logic_vector(4 downto 0);
36 DATA : in std_logic_vector((5*Data_sz)-1 downto 0);
36 DATA : in std_logic_vector((5*Data_sz)-1 downto 0);
37 Valid : out std_logic;
37 Valid : out std_logic;
38 Read : out std_logic_vector(4 downto 0);
38 Read : out std_logic_vector(4 downto 0);
@@ -47,111 +47,75 architecture ar_Driver of Driver_FFT is
47 type etat is (eX,e0,e1,e2);
47 type etat is (eX,e0,e1,e2);
48 signal ect : etat;
48 signal ect : etat;
49
49
50 signal FifoCpt : integer;
50 signal DataCount : integer range 0 to 255 := 0;
51 --signal DataTmp : std_logic_vector(Data_sz-1 downto 0);
51 signal FifoCpt : integer range 0 to 4 := 0;
52
52
53 signal sEmpty : std_logic;
53 signal sLoad : std_logic;
54 signal sFull : std_logic;
55 signal sData : std_logic_vector(Data_sz-1 downto 0);
56
54
57 begin
55 begin
58
56
59 process(clk,rstn)
57 process(clk,rstn)
60 begin
58 begin
61 if(rstn='0')then
59 if(rstn='0')then
62 ect <= eX;
60 ect <= e0;
63 Read <= (others => '1');
61 Read <= (others => '1');
64 Valid <= '0';
62 Valid <= '0';
65 FifoCpt <= 1;
66 Data_re <= (others => '0');
63 Data_re <= (others => '0');
67 Data_im <= (others => '0');
64 Data_im <= (others => '0');
65 DataCount <= 0;
66 FifoCpt <= 0;
67 sLoad <= '0';
68
68
69 elsif(clk'event and clk='1')then
69 elsif(clk'event and clk='1')then
70 sLoad <= Load;
70
71
72 if(sLoad='1' and Load='0')then
73 if(FifoCpt=4)then
74 FifoCpt <= 0;
75 else
76 FifoCpt <= FifoCpt + 1;
77 end if;
78 end if;
79
71 case ect is
80 case ect is
72
81
73 when eX =>
74 if(sFull='1')then
75 ect <= e0;
76 end if;
77
78 when e0 =>
82 when e0 =>
79 Valid <= '0';
83 if(Load='1' and Empty(FifoCpt)='0')then
80 if(Load='1' and sEmpty='0')then
84 Read(FifoCpt) <= '0';
81 Read(FifoCpt-1) <= '0';
85 ect <= e1;
82 ect <= e2;
83 -- ect <= e1;
84 elsif(sEmpty='1')then
85 if(FifoCpt=6)then
86 FifoCpt <= 1;
87 else
88 FifoCpt <= FifoCpt+1;
89 end if;
90 ect <= eX;
91 end if;
86 end if;
92
87
93 when e1 =>
88 when e1 =>
94 null;
89 Valid <= '0';
95 -- DataTmp <= sData;
90 Read(FifoCpt) <= '1';
96 -- ect <= e2;
91 ect <= e2;
97
92
98 when e2 =>
93 when e2 =>
99 Read(FifoCpt-1) <= '1';
94 Data_re <= DATA(((FifoCpt+1)*Data_sz)-1 downto (FifoCpt*Data_sz));
100 Data_re <= sData;
101 Data_im <= (others => '0');
95 Data_im <= (others => '0');
102 -- Data_re <= DataTmp;
103 -- Data_im <= sData;
104 Valid <= '1';
96 Valid <= '1';
97 if(DataCount=NbData-1)then
98 DataCount <= 0;
99 ect <= eX;
100 else
101 DataCount <= DataCount + 1;
102 if(Load='1' and Empty(FifoCpt)='0')then
103 Read(FifoCpt) <= '0';
104 ect <= e1;
105 else
106 ect <= eX;
107 end if;
108 end if;
109
110 when eX =>
111 Valid <= '0';
105 ect <= e0;
112 ect <= e0;
106
113
114 when others =>
115 null;
107
116
108 end case;
117 end case;
109 end if;
118 end if;
110 end process;
119 end process;
111
120
112 with FifoCpt select
121 end architecture; No newline at end of file
113 sFull <= Full(0) when 1,
114 Full(1) when 2,
115 Full(2) when 3,
116 Full(3) when 4,
117 Full(4) when 5,
118 '1' when others;
119
120 with FifoCpt select
121 sEmpty <= Empty(0) when 1,
122 Empty(1) when 2,
123 Empty(2) when 3,
124 Empty(3) when 4,
125 Empty(4) when 5,
126 '1' when others;
127
128 with FifoCpt select
129 sData <= DATA(Data_sz-1 downto 0) when 1,
130 DATA((2*Data_sz)-1 downto Data_sz) when 2,
131 DATA((3*Data_sz)-1 downto (2*Data_sz)) when 3,
132 DATA((4*Data_sz)-1 downto (3*Data_sz)) when 4,
133 DATA((5*Data_sz)-1 downto (4*Data_sz)) when 5,
134 (others => '0') when others;
135
136 end architecture;
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
Show file before | Show file after | Hide comments
@@ -25,7 +25,8 use IEEE.numeric_std.all;
25
25
26 entity Linker_FFT is
26 entity Linker_FFT is
27 generic(
27 generic(
28 Data_sz : integer range 1 to 32 := 8
28 Data_sz : integer range 1 to 32 := 16;
29 NbData : integer range 1 to 512 := 256
29 );
30 );
30 port(
31 port(
31 clk : in std_logic;
32 clk : in std_logic;
@@ -45,15 +46,15 end entity;
45
46
46 architecture ar_Linker of Linker_FFT is
47 architecture ar_Linker of Linker_FFT is
47
48
48 type etat is (eX,e0,e1,e2,e3);
49 type etat is (eX,e0,e1,e2);
49 signal ect : etat;
50 signal ect : etat;
50
51
51 signal FifoCpt : integer;
52 signal DataTmp : std_logic_vector(Data_sz-1 downto 0);
52 signal DataTmp : std_logic_vector(Data_sz-1 downto 0);
53
53
54 signal sFull : std_logic;
54 signal sRead : std_logic;
55 signal sData : std_logic_vector(Data_sz-1 downto 0);
55 signal sReady : std_logic;
56 signal sReady : std_logic;
56
57 signal FifoCpt : integer range 0 to 4 := 0;
57
58
58 begin
59 begin
59
60
@@ -61,69 +62,51 begin
61 begin
62 begin
62 if(rstn='0')then
63 if(rstn='0')then
63 ect <= e0;
64 ect <= e0;
64 Read <= '0';
65 sRead <= '0';
66 sReady <= '0';
65 Write <= (others => '1');
67 Write <= (others => '1');
66 Reuse <= (others => '0');
68 Reuse <= (others => '0');
67 FifoCpt <= 1;
69 FifoCpt <= 0;
68 sDATA <= (others => '0');
69
70
70 elsif(clk'event and clk='1')then
71 elsif(clk'event and clk='1')then
71 sReady <= Ready;
72 sReady <= Ready;
72
73
74 if(sReady='1' and Ready='0')then
75 if(FifoCpt=4)then
76 FifoCpt <= 0;
77 else
78 FifoCpt <= FifoCpt + 1;
79 end if;
80 elsif(Ready='1')then
81 sRead <= not sRead;
82 else
83 sRead <= '0';
84 end if;
85
73 case ect is
86 case ect is
74
87
75 when e0 =>
88 when e0 =>
76 Write(FifoCpt-1) <= '1';
89 Write(FifoCpt) <= '1';
77 if(sReady='0' and Ready='1' and sfull='0')then
90 if(Valid='1' and Full(FifoCpt)='0')then
78 Read <= '1';
91 DataTmp <= Data_im;
92 DATA(((FifoCpt+1)*Data_sz)-1 downto (FifoCpt*Data_sz)) <= Data_re;
93 Write(FifoCpt) <= '0';
79 ect <= e1;
94 ect <= e1;
80 end if;
95 elsif(Full(FifoCpt)='1')then
81
96 ReUse(FifoCpt) <= '1';
82 when e1 =>
83 Read <= '0';
84 if(Valid='1' and sfull='0')then
85 DataTmp <= Data_im;
86 sDATA <= Data_re;
87 Write(FifoCpt-1) <= '0';
88 ect <= e2;
89 elsif(sfull='1')then
90 ReUse(FifoCpt-1) <= '1';
91 ect <= eX;
92 end if;
97 end if;
93
98
94 when e2 =>
99 when e1 =>
95 sDATA <= DataTmp;
100 DATA(((FifoCpt+1)*Data_sz)-1 downto (FifoCpt*Data_sz)) <= DataTmp;
96 ect <= e3;
101 ect <= e0;
97
98 when e3 =>
99 Write(FifoCpt-1) <= '1';
100 if(Ready='1' and sfull='0')then
101 Read <= '1';
102 ect <= e1;
103 end if;
104
102
105 when eX =>
103 when others =>
106 if(FifoCpt=5)then
104 null;
107 FifoCpt <= 1;
108 else
109 FifoCpt <= FifoCpt+1;
110 end if;
111 ect <= e0;
112
105
113 end case;
106 end case;
114 end if;
107 end if;
115 end process;
108 end process;
116
109
117 DATA <= sData & sData & sData & sData & sData;
110 Read <= sRead;
118
111
119 with FifoCpt select
112 end architecture; No newline at end of file
120 sFull <= Full(0) when 1,
121 Full(1) when 2,
122 Full(2) when 3,
123 Full(3) when 4,
124 Full(4) when 5,
125 '1' when others;
126
127
128 end architecture;
129
Show file before | Show file after | Hide comments
@@ -89,7 +89,8 end component;
89
89
90 component Linker_FFT is
90 component Linker_FFT is
91 generic(
91 generic(
92 Data_sz : integer range 1 to 32 := 16
92 Data_sz : integer range 1 to 32 := 16;
93 NbData : integer range 1 to 512 := 256
93 );
94 );
94 port(
95 port(
95 clk : in std_logic;
96 clk : in std_logic;
@@ -109,14 +110,14 end component;
109
110
110 component Driver_FFT is
111 component Driver_FFT is
111 generic(
112 generic(
112 Data_sz : integer range 1 to 32 := 16
113 Data_sz : integer range 1 to 32 := 16;
114 NbData : integer range 1 to 512 := 256
113 );
115 );
114 port(
116 port(
115 clk : in std_logic;
117 clk : in std_logic;
116 rstn : in std_logic;
118 rstn : in std_logic;
117 Load : in std_logic;
119 Load : in std_logic;
118 Empty : in std_logic_vector(4 downto 0);
120 Empty : in std_logic_vector(4 downto 0);
119 Full : in std_logic_vector(4 downto 0);
120 DATA : in std_logic_vector((5*Data_sz)-1 downto 0);
121 DATA : in std_logic_vector((5*Data_sz)-1 downto 0);
121 Valid : out std_logic;
122 Valid : out std_logic;
122 Read : out std_logic_vector(4 downto 0);
123 Read : out std_logic_vector(4 downto 0);
Show file before | Show file after | Hide comments
@@ -170,15 +170,15 signal dsuo : dsu_out_type;
170 --- AJOUT TEST ------------------------Signaux----------------------
170 --- AJOUT TEST ------------------------Signaux----------------------
171 ---------------------------------------------------------------------
171 ---------------------------------------------------------------------
172 -- FIFOs
172 -- FIFOs
173 signal FifoIN_Full : std_logic_vector(0 downto 0);--
173 signal FifoIN_Full : std_logic_vector(4 downto 0);--
174 signal FifoIN_Empty : std_logic_vector(0 downto 0);--
174 signal FifoIN_Empty : std_logic_vector(4 downto 0);--
175 signal FifoIN_Data : std_logic_vector(15 downto 0);--
175 signal FifoIN_Data : std_logic_vector(79 downto 0);--
176
176
177 signal FifoINT_Full : std_logic_vector(4 downto 0);
177 signal FifoINT_Full : std_logic_vector(4 downto 0);
178 signal FifoINT_Data : std_logic_vector(79 downto 0);
178 signal FifoINT_Data : std_logic_vector(79 downto 0);
179
179
180 signal FifoOUT_FullV : std_logic;
180 signal FifoOUT_FullV : std_logic;
181 signal FifoOUT_Full : std_logic_vector(0 downto 0);--
181 signal FifoOUT_Full : std_logic_vector(4 downto 0);--
182 signal Matrix_WriteV : std_logic_vector(0 downto 0);
182 signal Matrix_WriteV : std_logic_vector(0 downto 0);
183
183
184 -- MATRICE SPECTRALE
184 -- MATRICE SPECTRALE
@@ -200,7 +200,7 signal Dma_acq : std_logic;
200
200
201 -- FFT
201 -- FFT
202 signal Drive_Write : std_logic;
202 signal Drive_Write : std_logic;
203 signal Drive_Read : std_logic_vector(0 downto 0);--
203 signal Drive_Read : std_logic_vector(4 downto 0);--
204 signal Drive_DataRE : std_logic_vector(15 downto 0);
204 signal Drive_DataRE : std_logic_vector(15 downto 0);
205 signal Drive_DataIM : std_logic_vector(15 downto 0);
205 signal Drive_DataIM : std_logic_vector(15 downto 0);
206
206
@@ -213,9 +213,9 signal FFT_DataRE : std_logic_vect
213 signal FFT_DataIM : std_logic_vector(15 downto 0);
213 signal FFT_DataIM : std_logic_vector(15 downto 0);
214
214
215 signal Link_Read : std_logic;
215 signal Link_Read : std_logic;
216 signal Link_Write : std_logic_vector(0 downto 0);--
216 signal Link_Write : std_logic_vector(4 downto 0);--
217 signal Link_ReUse : std_logic_vector(0 downto 0);--
217 signal Link_ReUse : std_logic_vector(4 downto 0);--
218 signal Link_Data : std_logic_vector(15 downto 0);--
218 signal Link_Data : std_logic_vector(79 downto 0);--
219
219
220 -- ADC
220 -- ADC
221 signal SmplClk : std_logic;
221 signal SmplClk : std_logic;
@@ -237,7 +237,7 signal TXDint : std_logic;
237 signal sample_clk_out : std_logic;
237 signal sample_clk_out : std_logic;
238
238
239 signal Rd : std_logic_vector(0 downto 0);--
239 signal Rd : std_logic_vector(0 downto 0);--
240 signal Ept : std_logic_vector(0 downto 0);--
240 signal Ept : std_logic_vector(4 downto 0);--
241
241
242 signal Bwr : std_logic_vector(0 downto 0);
242 signal Bwr : std_logic_vector(0 downto 0);
243 signal Bre : std_logic_vector(0 downto 0);
243 signal Bre : std_logic_vector(0 downto 0);
@@ -313,7 +313,7 SPW2_EN <= '0';
313 --- FFT -------------------------------------------------------------
313 --- FFT -------------------------------------------------------------
314
314
315 MemIn : APB_FIFO
315 MemIn : APB_FIFO
316 generic map (pindex => 8, paddr => 8, FifoCnt => 1, Data_sz => 16, Addr_sz => 8, Enable_ReUse => '1', R => 0, W => 1)
316 generic map (pindex => 8, paddr => 8, FifoCnt => 5, Data_sz => 16, Addr_sz => 8, Enable_ReUse => '0', R => 0, W => 1)
317 port map (clkm,rstn,clkm,clkm,(others => '0'),Drive_Read,(others => '1'),FifoIN_Empty,FifoIN_Full,FifoIN_Data,(others => '0'),open,open,apbi,apbo(8));
317 port map (clkm,rstn,clkm,clkm,(others => '0'),Drive_Read,(others => '1'),FifoIN_Empty,FifoIN_Full,FifoIN_Data,(others => '0'),open,open,apbi,apbo(8));
318 -- MemIn : APB_FIFO
318 -- MemIn : APB_FIFO
319 -- generic map (pindex => 8, paddr => 8, FifoCnt => 1, Data_sz => 16, Addr_sz => 8, Enable_ReUse => '0', R => 0, W => 1)
319 -- generic map (pindex => 8, paddr => 8, FifoCnt => 1, Data_sz => 16, Addr_sz => 8, Enable_ReUse => '0', R => 0, W => 1)
@@ -322,12 +322,12 SPW2_EN <= '0';
322
322
323 Start <= '0';
323 Start <= '0';
324
324
325 DRIVE : FFTamont
325 -- DRIVE : FFTamont
326 generic map(Data_sz => 16,NbData => 256)
326 -- generic map(Data_sz => 16,NbData => 256)
327 port map(clkm,rstn,FFT_Load,FifoIN_Empty(0),FifoIN_Data,Drive_Write,Drive_Read(0),Drive_DataRE,Drive_DataIM);
327 -- port map(clkm,rstn,FFT_Load,FifoIN_Empty(0),FifoIN_Data,Drive_Write,Drive_Read(0),Drive_DataRE,Drive_DataIM);
328 -- DRIVE : Driver_FFT
328 DRIVE : Driver_FFT
329 -- generic map(Data_sz => 16)
329 generic map(Data_sz => 16)
330 -- port map(clkm,rstn,FFT_Load,FifoIN_Empty,FifoIN_Full,FifoIN_Data,Drive_Write,Drive_Read,Drive_DataRE,Drive_DataIM);
330 port map(clkm,rstn,FFT_Load,FifoIN_Empty,FifoIN_Data,Drive_Write,Drive_Read,Drive_DataRE,Drive_DataIM);
331 --
331 --
332 FFT : CoreFFT
332 FFT : CoreFFT
333 generic map(
333 generic map(
@@ -344,17 +344,17 Start <= '0';
344 inBuf_RWDLY => gInBuf_RWDLY)
344 inBuf_RWDLY => gInBuf_RWDLY)
345 port map(clkm,start,rstn,Drive_Write,Link_Read,Drive_DataIM,Drive_DataRE,FFT_Load,open,FFT_DataIM,FFT_DataRE,FFT_Valid,FFT_Ready);
345 port map(clkm,start,rstn,Drive_Write,Link_Read,Drive_DataIM,Drive_DataRE,FFT_Load,open,FFT_DataIM,FFT_DataRE,FFT_Valid,FFT_Ready);
346 --
346 --
347 -- LINK : Linker_FFT
347 LINK : Linker_FFT
348 -- generic map(Data_sz => 16)
348 generic map(Data_sz => 16)
349 -- port map(clkm,rstn,FFT_Ready,FFT_Valid,FifoOUT_Full,FFT_DataRE,FFT_DataIM,Link_Read,Link_Write,Link_ReUse,Link_Data);--FifoOUT_Full/FifoINT_Full
349 port map(clkm,rstn,FFT_Ready,FFT_Valid,FifoOUT_Full,FFT_DataRE,FFT_DataIM,Link_Read,Link_Write,Link_ReUse,Link_Data);--FifoOUT_Full/FifoINT_Full
350 LINK : FFTaval
350 -- LINK : FFTaval
351 generic map(Data_sz => 16,NbData => 256)
351 -- generic map(Data_sz => 16,NbData => 256)
352 port map(clkm,rstn,FFT_Ready,FFT_Valid,FifoOUT_Full(0),FFT_DataRE,FFT_DataIM,Link_Read,Link_Write(0),Link_ReUse(0),Link_Data);
352 -- port map(clkm,rstn,FFT_Ready,FFT_Valid,FifoOUT_Full(0),FFT_DataRE,FFT_DataIM,Link_Read,Link_Write(0),Link_ReUse(0),Link_Data);
353 --
353 --
354 ----- MATRICE SPECTRALE ---------------------5 FIFO Input---------------
354 ----- MATRICE SPECTRALE ---------------------5 FIFO Input---------------
355 --
355 --
356 MemOut : APB_FIFO
356 MemOut : APB_FIFO
357 generic map (pindex => 9, paddr => 9, FifoCnt => 1, Data_sz => 16, Addr_sz => 8, Enable_ReUse => '0', R => 1, W => 0)
357 generic map (pindex => 9, paddr => 9, FifoCnt => 5, Data_sz => 16, Addr_sz => 8, Enable_ReUse => '1', R => 1, W => 0)
358 port map (clkm,rstn,clkm,clkm,Link_ReUse,(others =>'1'),Link_Write,Ept,FifoOUT_Full,open,Link_Data,open,open,apbi,apbo(9));
358 port map (clkm,rstn,clkm,clkm,Link_ReUse,(others =>'1'),Link_Write,Ept,FifoOUT_Full,open,Link_Data,open,open,apbi,apbo(9));
359
359
360
360
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