##// END OF EJS Templates
LCD Driver fixed but AMBA interface still not implemented.
Alexis -
r11:b3a8b4c115e7 default
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@@ -21,7 +21,7
21 | ABOUT
21 | ABOUT
22 | ~~~~~
22 | ~~~~~
23
23
24 LPP's VHD_Lib is a VHDL library, which is target independent and includes a set of scripts for integrating into
24 LPP's VHD_Lib is a VHDL library which is target independent and includes a set of scripts for integrating into
25 gaisler's grlib and use its features. For setup read instalation section.
25 gaisler's grlib and use its features. For setup read instalation section.
26
26
27
27
@@ -61,6 +61,4 All the programs used by the VHD_Lib are
61 license. They all are free software and most of them are covered by the
61 license. They all are free software and most of them are covered by the
62 GNU General Public License.
62 GNU General Public License.
63
63
64 The VHD_Lib itself, meaning all the scripts which are used in the building
65 process, are covered by the GNU General Public License.
66
64
@@ -36,7 +36,7 constant ClearDSPLY : std_logic_vector(
36 constant FunctionSet : std_logic_vector(7 downto 0):= X"38";
36 constant FunctionSet : std_logic_vector(7 downto 0):= X"38";
37 constant RetHome : std_logic_vector(7 downto 0):= X"02";
37 constant RetHome : std_logic_vector(7 downto 0):= X"02";
38 constant SetEntryMode : std_logic_vector(7 downto 0):= X"06";
38 constant SetEntryMode : std_logic_vector(7 downto 0):= X"06";
39 constant DSPL_CTRL : std_logic_vector(7 downto 0):= X"0C";
39 constant DSPL_CTRL : std_logic_vector(7 downto 0):= X"0E";
40
40
41 constant CursorON : std_logic_vector(7 downto 0):= X"0E";
41 constant CursorON : std_logic_vector(7 downto 0):= X"0E";
42 constant CursorOFF : std_logic_vector(7 downto 0):= X"0C";
42 constant CursorOFF : std_logic_vector(7 downto 0):= X"0C";
@@ -1,4 +1,4
1 ------------------------------------------------------------------------------
1 ------------------------------------------------------------------------------
2 -- This file is a part of the LPP VHDL IP LIBRARY
2 -- This file is a part of the LPP VHDL IP LIBRARY
3 -- Copyright (C) 2009 - 2010, Laboratory of Plasmas Physic - CNRS
3 -- Copyright (C) 2009 - 2010, Laboratory of Plasmas Physic - CNRS
4 --
4 --
@@ -35,16 +35,18
35 -- Additional Comments:
35 -- Additional Comments:
36 --
36 --
37 ----------------------------------------------------------------------------------
37 ----------------------------------------------------------------------------------
38
39 ---TDODO => Clean Enable pulse FSM
38 library IEEE;
40 library IEEE;
39 use IEEE.STD_LOGIC_1164.ALL;
41 use IEEE.STD_LOGIC_1164.ALL;
40 use IEEE.NUMERIC_STD.all;
42 use IEEE.NUMERIC_STD.all;
41 library lpp;
43 library lpp;
42 use lpp.amba_lcd_16x2_ctrlr.all;
44 use lpp.amba_lcd_16x2_ctrlr.all;
43
45 use lpp.lcd_16x2_cfg.all;
44
46
45 entity LCD_16x2_DRIVER is
47 entity LCD_16x2_DRIVER is
46 generic(
48 generic(
47 OSC_Freq_MHz : integer:=60
49 OSC_Freq_KHz : integer:=50000
48 );
50 );
49 Port(
51 Port(
50 reset : in STD_LOGIC;
52 reset : in STD_LOGIC;
@@ -57,11 +59,129 end LCD_16x2_DRIVER;
57
59
58 architecture Behavioral of LCD_16x2_DRIVER is
60 architecture Behavioral of LCD_16x2_DRIVER is
59
61
62 type stateT is (idle,Enable0,Enable1,Enable2,tempo);
63 signal state : stateT;
64
65
66 constant trigger_4us : integer := 5;
67 constant trigger_100us : integer := 100;
68 constant trigger_4ms : integer := 4200;
69 constant trigger_20ms : integer := 20000;
70
71
72 signal i : integer :=0;
73 signal reset_i : std_logic := '0';
74 signal tempoTRIG : integer :=0;
75
76 signal clk_1us : std_logic;
77 signal clk_1us_reg : std_logic;
78
60 begin
79 begin
61
80
81
82 CLK0: LCD_CLK_GENERATOR
83 generic map(OSC_Freq_KHz)
84 Port map( clk,reset,clk_1us);
85
86
87
88 process(clk_1us,reset_i)
89 begin
90 if reset_i = '0' then
91 i <= 0;
92 elsif clk_1us'event and clk_1us ='1' then
93 i <= i+1;
94 end if;
95 end process;
96
97 LCD_CTRL.LCD_RW <= '0';
98
99 process(clk,reset)
100 begin
101 if reset = '0' then
102 state <= idle;
103 LCD_CTRL.LCD_E <= '0';
104 SYNCH.DRVR_READY <= '0';
105 SYNCH.LCD_INITIALISED <= '0';
106 reset_i <= '0';
107 elsif clk'event and clk = '1' then
108 case state is
109 when idle =>
110 SYNCH.LCD_INITIALISED <= '1';
111 LCD_CTRL.LCD_E <= '0';
112 if DRIVER_CMD.Exec = '1' then
113 state <= Enable0;
114 reset_i <= '1';
115 SYNCH.DRVR_READY <= '0';
116 LCD_CTRL.LCD_DATA <= DRIVER_CMD.Word;
117 LCD_CTRL.LCD_RS <= DRIVER_CMD.CMD_Data;
118 case DRIVER_CMD.Duration is
119 when Duration_4us =>
120 tempoTRIG <= trigger_4us;
121 when Duration_100us =>
122 tempoTRIG <= trigger_100us;
123 when Duration_4ms =>
124 tempoTRIG <= trigger_4ms;
125 when Duration_20ms =>
126 tempoTRIG <= trigger_20ms;
127 when others =>
128 tempoTRIG <= trigger_20ms;
129 end case;
130 else
131 SYNCH.DRVR_READY <= '1';
132 reset_i <= '0';
133 end if;
134 when Enable0 =>
135 if i = 1 then
136 reset_i <= '0';
137 LCD_CTRL.LCD_E <= '1';
138 state <= Enable1;
139 else
140 reset_i <= '1';
141 LCD_CTRL.LCD_E <= '0';
142 end if;
143 when Enable1 =>
144 if i = 2 then
145 reset_i <= '0';
146 LCD_CTRL.LCD_E <= '0';
147 state <= Enable2;
148 else
149 reset_i <= '1';
150 LCD_CTRL.LCD_E <= '1';
151 end if;
152 when Enable2 =>
153 if i = 1 then
154 reset_i <= '0';
155 LCD_CTRL.LCD_E <= '0';
156 state <= tempo;
157 else
158 reset_i <= '1';
159 LCD_CTRL.LCD_E <= '0';
160 end if;
161 when tempo =>
162 if i = tempoTRIG then
163 reset_i <= '0';
164 state <= idle;
165 else
166 reset_i <= '1';
167 end if;
168 end case;
169 end if;
170 end process;
171
62 end Behavioral;
172 end Behavioral;
63
173
64
174
65
175
66
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67
177
178
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187
@@ -153,12 +153,12 begin
153 DRIVER_CMD.Duration <= Duration_100us;
153 DRIVER_CMD.Duration <= Duration_100us;
154 DRIVER_CMD.CMD_Data <= '1';
154 DRIVER_CMD.CMD_Data <= '1';
155 DRIVER_CMD.Word <= DATA(i*8+7 downto i*8);
155 DRIVER_CMD.Word <= DATA(i*8+7 downto i*8);
156 i <= i + 1;
157 state <= Refresh0;
156 state <= Refresh0;
158 else
157 else
159 DRIVER_CMD.Exec <= '0';
158 DRIVER_CMD.Exec <= '0';
160 end if;
159 end if;
161 when Refresh0=>
160 when Refresh0=>
161 i <= i + 1;
162 state <= Refresh1;
162 state <= Refresh1;
163 DRIVER_CMD.Exec <= '0';
163 DRIVER_CMD.Exec <= '0';
164 when Refresh1=>
164 when Refresh1=>
@@ -205,7 +205,7 begin
205 DRIVER_CMD.Exec <= '1';
205 DRIVER_CMD.Exec <= '1';
206 DRIVER_CMD.Duration <= Duration_4ms;
206 DRIVER_CMD.Duration <= Duration_4ms;
207 DRIVER_CMD.CMD_Data <= '0';
207 DRIVER_CMD.CMD_Data <= '0';
208 DRIVER_CMD.Word <= X"02";
208 DRIVER_CMD.Word <= RetHome;
209 state <= Idle;
209 state <= Idle;
210 else
210 else
211 DRIVER_CMD.Exec <= '0';
211 DRIVER_CMD.Exec <= '0';
@@ -83,13 +83,12 LCD_CS2 <= '0';
83
83
84 SF_CE0 <= '1';
84 SF_CE0 <= '1';
85
85
86 rst <= not reset;
87
86
88
87
89
88
90 Driver0 : LCD_16x2_ENGINE
89 Driver0 : LCD_16x2_ENGINE
91 generic map(50000)
90 generic map(50000)
92 Port map(clk,rst,FramBUFF,CMD,Exec,Ready,LCD_CTRL);
91 Port map(clk,reset,FramBUFF,CMD,Exec,Ready,LCD_CTRL);
93
92
94 FramBUFF(0*8+7 downto 0*8) <= X"41" when Bp0 = '1' else
93 FramBUFF(0*8+7 downto 0*8) <= X"41" when Bp0 = '1' else
95 X"42" when Bp1 = '1' else
94 X"42" when Bp1 = '1' else
@@ -1,3 +1,4
1 ./dsp/iir_filter
2 ./general_purpose
1 ./general_purpose
3 ./lpp_amba
2 ./lpp_amba
3 ./dsp/iir_filter
4 ./amba_lcd_16x2_ctrlr
@@ -1,12 +1,12
1 APB_IIR_CEL.vhd
1 APB_IIR_CEL.vhd
2 FILTER.vhd
3 FILTER_RAM_CTRLR.vhd
4 FILTERcfg.vhd
2 FILTERcfg.vhd
5 FilterCTRLR.vhd
3 FilterCTRLR.vhd
4 FILTER_RAM_CTRLR.vhd
5 FILTER.vhd
6 IIR_CEL_CTRLR.vhd
6 IIR_CEL_CTRLR.vhd
7 IIR_CEL_FILTER.vhd
7 IIR_CEL_FILTER.vhd
8 RAM.vhd
8 iir_filter.vhd
9 RAM_CEL.vhd
9 RAM_CEL.vhd
10 RAM_CTRLR2.vhd
10 RAM_CTRLR2.vhd
11 RAM.vhd
11 Top_Filtre_IIR.vhd
12 Top_Filtre_IIR.vhd
12 iir_filter.vhd
@@ -1,13 +1,13
1 Adder.vhd
1 ADDRcntr.vhd
2 ADDRcntr.vhd
2 ALU.vhd
3 ALU.vhd
3 Adder.vhd
4 general_purpose.vhd
4 MAC.vhd
5 MAC_CONTROLER.vhd
5 MAC_CONTROLER.vhd
6 MAC_MUX2.vhd
6 MAC_MUX.vhd
7 MAC_MUX.vhd
7 MAC_MUX2.vhd
8 MAC_REG.vhd
8 MAC_REG.vhd
9 MAC.vhd
10 Multiplier.vhd
9 MUX2.vhd
11 MUX2.vhd
10 Multiplier.vhd
11 REG.vhd
12 REG.vhd
12 Shifter.vhd
13 Shifter.vhd
13 general_purpose.vhd
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