HG_REPOSITORIES/LPP/INSTRUMENTATION/USERS/PELLION/VHD_Lib Commit - r11:b3a8b4c115e7

LCD Driver fixed but AMBA interface still not implemented.

Alexis -

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README +1 -3

             ------------------------------------------------------------------------------
             --  This file is a part of the LPP VHDL IP LIBRARY
             --  Copyright (C) 2009 - 2010, Laboratory of Plasmas Physic - CNRS
             --
             --  This program is free software; you can redistribute it and/or modify
             --  it under the terms of the GNU General Public License as published by
             --  the Free Software Foundation; either version 2 of the License, or
             --  (at your option) any later version.
             --
             --  This program is distributed in the hope that it will be useful,
             --  but WITHOUT ANY WARRANTY; without even the implied warranty of
             --  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
             --  GNU General Public License for more details.
             --
             --  You should have received a copy of the GNU General Public License
             --  along with this program; if not, write to the Free Software
             --  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
             -------------------------------------------------------------------------------
             | ABOUT
             | ~~~~~
-            LPP's VHD_Lib is a VHDL library, which is target independent and includes a set of scripts for integrating into
+            LPP's VHD_Lib is a VHDL library which is target independent and includes a set of scripts for integrating into
             gaisler's grlib and use its features. For setup read instalation section.
             | REQUIREMENTS
             | ~~~~~~~~~~~~
             To use this library you need the grlib and linux shell or mingw for windows users.
             | PERSONALIZATION
             | ~~~~~~~~~~~~~~~
             You can add your IPs to the library, see how_to_improve.pdf(Comming soon).
             | INSTALLATION
             | ~~~~~~~~~~~~
             To set up the VHD_Lib follow this steps:
             	-download and setup the grlib
             	-create a VARIABLE called GRLIB with value the path to the grlib folder.
             	-untar the VHD_Lib and type "make Patch-GRLIB"
             	-now you can use the grlib's Makefiles and designs.
             Please note that if you try "make" or "make help" you will see all targets and if the GRLIB variable is correct.
             | HACKING
             | ~~~~~~~
             The first thing you should look at is the Makefile and then all scripts in "scripts" folder.
             | LICENSE
             | ~~~~~~~
             All the programs used by the VHD_Lib are protected by their respective
             license. They all are free software and most of them are covered by the
             GNU General Public License.
-            The VHD_Lib itself, meaning all the scripts which are used in the building
-            process, are covered by the GNU General Public License.

lib/lpp/amba_lcd_16x2_ctrlr/LCD_16x2_CFG.vhd +1 -1

             ------------------------------------------------------------------------------
             --  This file is a part of the LPP VHDL IP LIBRARY
             --  Copyright (C) 2009 - 2010, Laboratory of Plasmas Physic - CNRS
             --
             --  This program is free software; you can redistribute it and/or modify
             --  it under the terms of the GNU General Public License as published by
             --  the Free Software Foundation; either version 2 of the License, or
             --  (at your option) any later version.
             --
             --  This program is distributed in the hope that it will be useful,
             --  but WITHOUT ANY WARRANTY; without even the implied warranty of
             --  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
             --  GNU General Public License for more details.
             --
             --  You should have received a copy of the GNU General Public License
             --  along with this program; if not, write to the Free Software
             --  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
             -------------------------------------------------------------------------------
             --	Package File Template
             --
             --	Purpose: This package defines supplemental types, subtypes,
             --	constants, and functions
             library IEEE;
             use IEEE.STD_LOGIC_1164.all;
             library lpp;
             use lpp.amba_lcd_16x2_ctrlr.all;
             package LCD_16x2_CFG is
             constant ClearDSPLY		:	std_logic_vector(7 downto 0):= X"01";
             constant	FunctionSet		:	std_logic_vector(7 downto 0):= X"38";
             constant RetHome			:	std_logic_vector(7 downto 0):= X"02";
             constant SetEntryMode	:	std_logic_vector(7 downto 0):= X"06";
-            constant DSPL_CTRL		:	std_logic_vector(7 downto 0):= X"0C";
+            constant DSPL_CTRL		:	std_logic_vector(7 downto 0):= X"0E";
             constant CursorON			:	std_logic_vector(7 downto 0):= X"0E";
             constant CursorOFF		:	std_logic_vector(7 downto 0):= X"0C";
             --===========================================================|
             --======L C D    D R I V E R     T I M I N G     C O D E=====|
             --===========================================================|
             constant    Duration_4us    		:   std_logic_vector(1 downto 0) := "00";
             constant    Duration_100us   		:   std_logic_vector(1 downto 0) := "01";
             constant    Duration_4ms    		:   std_logic_vector(1 downto 0) := "10";
             constant    Duration_20ms    		:   std_logic_vector(1 downto 0) := "11";
             end LCD_16x2_CFG;

lib/lpp/amba_lcd_16x2_ctrlr/LCD_16x2_DRVR.vhd +123 -3

@@ -1,67 +1,187
1	------------------------------------------------------------------------------	1	------------------------------------------------------------------------------
2	-- This file is a part of the LPP VHDL IP LIBRARY	2	-- This file is a part of the LPP VHDL IP LIBRARY
3	-- Copyright (C) 2009 - 2010, Laboratory of Plasmas Physic - CNRS	3	-- Copyright (C) 2009 - 2010, Laboratory of Plasmas Physic - CNRS
4	--	4	--
5	-- This program is free software; you can redistribute it and/or modify	5	-- This program is free software; you can redistribute it and/or modify
6	-- it under the terms of the GNU General Public License as published by	6	-- it under the terms of the GNU General Public License as published by
7	-- the Free Software Foundation; either version 2 of the License, or	7	-- the Free Software Foundation; either version 2 of the License, or
8	-- (at your option) any later version.	8	-- (at your option) any later version.
9	--	9	--
10	-- This program is distributed in the hope that it will be useful,	10	-- This program is distributed in the hope that it will be useful,
11	-- but WITHOUT ANY WARRANTY; without even the implied warranty of	11	-- but WITHOUT ANY WARRANTY; without even the implied warranty of
12	-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the	12	-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13	-- GNU General Public License for more details.	13	-- GNU General Public License for more details.
14	--	14	--
15	-- You should have received a copy of the GNU General Public License	15	-- You should have received a copy of the GNU General Public License
16	-- along with this program; if not, write to the Free Software	16	-- along with this program; if not, write to the Free Software
17	-- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA	17	-- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18	-------------------------------------------------------------------------------	18	-------------------------------------------------------------------------------
19	----------------------------------------------------------------------------------	19	----------------------------------------------------------------------------------
20	-- Company:	20	-- Company:
21	-- Engineer:	21	-- Engineer:
22	--	22	--
23	-- Create Date: 10:09:57 10/13/2010	23	-- Create Date: 10:09:57 10/13/2010
24	-- Design Name:	24	-- Design Name:
25	-- Module Name: LCD_2x16_DRIVER - Behavioral	25	-- Module Name: LCD_2x16_DRIVER - Behavioral
26	-- Project Name:	26	-- Project Name:
27	-- Target Devices:	27	-- Target Devices:
28	-- Tool versions:	28	-- Tool versions:
29	-- Description:	29	-- Description:
30	--	30	--
31	-- Dependencies:	31	-- Dependencies:
32	--	32	--
33	-- Revision:	33	-- Revision:
34	-- Revision 0.01 - File Created	34	-- Revision 0.01 - File Created
35	-- Additional Comments:	35	-- Additional Comments:
36	--	36	--
37	----------------------------------------------------------------------------------	37	----------------------------------------------------------------------------------
		38
		39	---TDODO => Clean Enable pulse FSM
38	library IEEE;	40	library IEEE;
39	use IEEE.STD_LOGIC_1164.ALL;	41	use IEEE.STD_LOGIC_1164.ALL;
40	use IEEE.NUMERIC_STD.all;	42	use IEEE.NUMERIC_STD.all;
41	library lpp;	43	library lpp;
42	use lpp.amba_lcd_16x2_ctrlr.all;	44	use lpp.amba_lcd_16x2_ctrlr.all;
43		45	use lpp.lcd_16x2_cfg.all;
44		46
45	entity LCD_16x2_DRIVER is	47	entity LCD_16x2_DRIVER is
46	generic(	48	generic(
47	OSC_Freq_MHz : integer:=60	49	OSC_Freq_KHz : integer:=50000
48	);	50	);
49	Port(	51	Port(
50	reset : in STD_LOGIC;	52	reset : in STD_LOGIC;
51	clk : in STD_LOGIC;	53	clk : in STD_LOGIC;
52	LCD_CTRL : out LCD_DRVR_CTRL_BUSS;	54	LCD_CTRL : out LCD_DRVR_CTRL_BUSS;
53	SYNCH : out LCD_DRVR_SYNCH_BUSS;	55	SYNCH : out LCD_DRVR_SYNCH_BUSS;
54	DRIVER_CMD : in LCD_DRVR_CMD_BUSS	56	DRIVER_CMD : in LCD_DRVR_CMD_BUSS
55	);	57	);
56	end LCD_16x2_DRIVER;	58	end LCD_16x2_DRIVER;
57		59
58	architecture Behavioral of LCD_16x2_DRIVER is	60	architecture Behavioral of LCD_16x2_DRIVER is
59		61
		62	type stateT is (idle,Enable0,Enable1,Enable2,tempo);
		63	signal state : stateT;
		64
		65
		66	constant trigger_4us : integer := 5;
		67	constant trigger_100us : integer := 100;
		68	constant trigger_4ms : integer := 4200;
		69	constant trigger_20ms : integer := 20000;
		70
		71
		72	signal i : integer :=0;
		73	signal reset_i : std_logic := '0';
		74	signal tempoTRIG : integer :=0;
		75
		76	signal clk_1us : std_logic;
		77	signal clk_1us_reg : std_logic;
		78
60	begin	79	begin
61		80
		81
		82	CLK0: LCD_CLK_GENERATOR
		83	generic map(OSC_Freq_KHz)
		84	Port map( clk,reset,clk_1us);
		85
		86
		87
		88	process(clk_1us,reset_i)
		89	begin
		90	if reset_i = '0' then
		91	i <= 0;
		92	elsif clk_1us'event and clk_1us ='1' then
		93	i <= i+1;
		94	end if;
		95	end process;
		96
		97	LCD_CTRL.LCD_RW <= '0';
		98
		99	process(clk,reset)
		100	begin
		101	if reset = '0' then
		102	state <= idle;
		103	LCD_CTRL.LCD_E <= '0';
		104	SYNCH.DRVR_READY <= '0';
		105	SYNCH.LCD_INITIALISED <= '0';
		106	reset_i <= '0';
		107	elsif clk'event and clk = '1' then
		108	case state is
		109	when idle =>
		110	SYNCH.LCD_INITIALISED <= '1';
		111	LCD_CTRL.LCD_E <= '0';
		112	if DRIVER_CMD.Exec = '1' then
		113	state <= Enable0;
		114	reset_i <= '1';
		115	SYNCH.DRVR_READY <= '0';
		116	LCD_CTRL.LCD_DATA <= DRIVER_CMD.Word;
		117	LCD_CTRL.LCD_RS <= DRIVER_CMD.CMD_Data;
		118	case DRIVER_CMD.Duration is
		119	when Duration_4us =>
		120	tempoTRIG <= trigger_4us;
		121	when Duration_100us =>
		122	tempoTRIG <= trigger_100us;
		123	when Duration_4ms =>
		124	tempoTRIG <= trigger_4ms;
		125	when Duration_20ms =>
		126	tempoTRIG <= trigger_20ms;
		127	when others =>
		128	tempoTRIG <= trigger_20ms;
		129	end case;
		130	else
		131	SYNCH.DRVR_READY <= '1';
		132	reset_i <= '0';
		133	end if;
		134	when Enable0 =>
		135	if i = 1 then
		136	reset_i <= '0';
		137	LCD_CTRL.LCD_E <= '1';
		138	state <= Enable1;
		139	else
		140	reset_i <= '1';
		141	LCD_CTRL.LCD_E <= '0';
		142	end if;
		143	when Enable1 =>
		144	if i = 2 then
		145	reset_i <= '0';
		146	LCD_CTRL.LCD_E <= '0';
		147	state <= Enable2;
		148	else
		149	reset_i <= '1';
		150	LCD_CTRL.LCD_E <= '1';
		151	end if;
		152	when Enable2 =>
		153	if i = 1 then
		154	reset_i <= '0';
		155	LCD_CTRL.LCD_E <= '0';
		156	state <= tempo;
		157	else
		158	reset_i <= '1';
		159	LCD_CTRL.LCD_E <= '0';
		160	end if;
		161	when tempo =>
		162	if i = tempoTRIG then
		163	reset_i <= '0';
		164	state <= idle;
		165	else
		166	reset_i <= '1';
		167	end if;
		168	end case;
		169	end if;
		170	end process;
		171
62	end Behavioral;	172	end Behavioral;
63		173
64		174
65		175
66		176
67		177
		178
		179
		180
		181
		182
		183
		184
		185
		186
		187

lib/lpp/amba_lcd_16x2_ctrlr/LCD_16x2_ENGINE.vhd +2 -2

             ------------------------------------------------------------------------------
             --  This file is a part of the LPP VHDL IP LIBRARY
             --  Copyright (C) 2009 - 2010, Laboratory of Plasmas Physic - CNRS
             --
             --  This program is free software; you can redistribute it and/or modify
             --  it under the terms of the GNU General Public License as published by
             --  the Free Software Foundation; either version 2 of the License, or
             --  (at your option) any later version.
             --
             --  This program is distributed in the hope that it will be useful,
             --  but WITHOUT ANY WARRANTY; without even the implied warranty of
             --  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
             --  GNU General Public License for more details.
             --
             --  You should have received a copy of the GNU General Public License
             --  along with this program; if not, write to the Free Software
             --  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
             -------------------------------------------------------------------------------
             ----------------------------------------------------------------------------------
             -- Company:
             -- Engineer:
             --
             -- Create Date:    08:32:21 10/19/2010
             -- Design Name:
             -- Module Name:    LCD_16x2_ENGINE - Behavioral
             -- Project Name:
             -- Target Devices:
             -- Tool versions:
             -- Description:
             --
             -- Dependencies:
             --
             -- Revision:
             -- Revision 0.01 - File Created
             -- Additional Comments:
             --
             ----------------------------------------------------------------------------------
             library IEEE;
             use IEEE.STD_LOGIC_1164.ALL;
             use IEEE.NUMERIC_STD.ALL;
             library lpp;
             use lpp.amba_lcd_16x2_ctrlr.all;
             use lpp.LCD_16x2_CFG.all;
             entity LCD_16x2_ENGINE is
             	generic(OSC_freqKHz	:	integer := 50000);
                 Port ( clk 	:	in  STD_LOGIC;
                        reset 	:	in  STD_LOGIC;
             			  DATA	:	in std_logic_vector(16*2*8-1 downto 0);
             			  CMD		:	in std_logic_vector(10 downto 0);
             			  Exec	:	in	std_logic;
             			  Ready	:	out std_logic;
             			  LCD_CTRL	:	out LCD_DRVR_CTRL_BUSS
             			  );
             end LCD_16x2_ENGINE;
             architecture ar_LCD_16x2_ENGINE of LCD_16x2_ENGINE is
             constant ConfigTbl	: LCD_CFG_Tbl	:=(ClearDSPLY,FunctionSet,DSPL_CTRL,SetEntryMode,RetHome);
             signal	SYNCH		:	 LCD_DRVR_SYNCH_BUSS;
             signal   DRIVER_CMD	   :	 LCD_DRVR_CMD_BUSS;
             signal	FRAME_CLK	:	std_logic;
             signal	FRAME_CLK_reg	:	std_logic;
             signal	RefreshFlag		:	std_logic;
             signal	CMD_Flag			:	std_logic;
             signal	Exec_Reg			:	std_logic;
             type state_t is (INIT0,INIT1,INIT2,IDLE,Refresh,Refresh0,Refresh1,ReturnHome,GoLine2,GoLine2_0,ExecCMD0,ExecCMD1);
             signal	state	:	state_t;
             signal	i		:	integer range 0 to 32 := 0;
             begin
             Driver0 :  LCD_16x2_DRIVER
             	generic map(OSC_freqKHz)
                 Port map(reset,clk,LCD_CTRL,SYNCH,DRIVER_CMD);
             FRAME_CLK_GEN0 : FRAME_CLK_GEN
             	generic map(OSC_freqKHz)
                 Port map( clk,reset,FRAME_CLK);
             process(reset,clk)
             begin
             	if reset = '0' then
             		state <=	INIT0;
             		Ready	<=	'0';
             		RefreshFlag	<=	'0';
             		i	<=	0;
             	elsif clk'event and clk ='1' then
             		FRAME_CLK_reg	<=	FRAME_CLK;
             		Exec_Reg			<=	Exec;
             		if FRAME_CLK_reg = '0' and FRAME_CLK = '1' then
             			RefreshFlag	<=	'1';
             		elsif state = Refresh or state = Refresh0 or state = Refresh1 then
             			RefreshFlag	<=	'0';
             		end if;
             		if Exec_Reg = '0' and Exec = '1' then
             			CMD_Flag	<=	'1';
             		elsif state = ExecCMD0 or state = ExecCMD1 then
             			CMD_Flag	<=	'0';
             		end if;
             		case state is
             			when	INIT0 =>
             				if SYNCH.DRVR_READY = '1' then
             					DRIVER_CMD.Exec		<=	'1';
             					DRIVER_CMD.Duration	<=	Duration_20ms;
             					DRIVER_CMD.CMD_Data	<=	'0';
             					DRIVER_CMD.Word			<=	ConfigTbl(i);
             					i	<=	i + 1;
             					state	<=	INIT1;
             				else
             					DRIVER_CMD.Exec		<=	'0';
             				end if;
             			when	INIT1 =>
             				state	<=	INIT2;
             				DRIVER_CMD.Exec		<=	'0';
             			when	INIT2 =>
             				if SYNCH.DRVR_READY = '1' then
             					if i = 5 then
             						state	<=	Idle;
             					else
             						state	<=	INIT0;
             					end if;
             				end if;
             			when Idle=>
             				DRIVER_CMD.Exec		<=	'0';
             				if RefreshFlag	=	'1' then
             					Ready	<=	'0';
             					state	<=	Refresh;
             				elsif CMD_Flag = '1' then
             					Ready	<=	'0';
             					state	<=	ExecCMD0;
             				else
             					Ready	<=	'1';
             				end if;
             				i	<=	0;
             			when Refresh=>
             				if SYNCH.DRVR_READY = '1' then
             					DRIVER_CMD.Exec		<=	'1';
             					DRIVER_CMD.Duration	<=	Duration_100us;
             					DRIVER_CMD.CMD_Data	<=	'1';
             					DRIVER_CMD.Word			<=	DATA(i*8+7 downto i*8);
-            					i	<=	i + 1;
             					state	<=	Refresh0;
             				else
             					DRIVER_CMD.Exec		<=	'0';
             				end if;
             			when Refresh0=>
+            				i	<=	i + 1;
             				state	<=	Refresh1;
             				DRIVER_CMD.Exec		<=	'0';
             			when Refresh1=>
             				if SYNCH.DRVR_READY = '1' then
             					if i = 32 then
             						state	<=	ReturnHome;
             					elsif i = 16 then
             						state	<=	GoLine2;
             					else
             						state	<=	Refresh;
             					end if;
             				end if;
             			when ExecCMD0=>
             				if SYNCH.DRVR_READY = '1' then
             					DRIVER_CMD.Exec		<=	'1';
             					DRIVER_CMD.Duration	<=	CMD(9 downto 8);
             					DRIVER_CMD.CMD_Data	<=	'0';
             					DRIVER_CMD.Word		<= CMD(7 downto 0);
             					state	<=	ExecCMD1;
             				else
             					DRIVER_CMD.Exec		<=	'0';
             				end if;
             			when ExecCMD1=>
             				state	<=	Idle;
             				DRIVER_CMD.Exec		<=	'0';
             			when	GoLine2=>
             				if SYNCH.DRVR_READY = '1' then
             					DRIVER_CMD.Exec		<=	'1';
             					DRIVER_CMD.Duration	<=	Duration_100us;
             					DRIVER_CMD.CMD_Data	<=	'0';
             					DRIVER_CMD.Word			<= X"C0";
             					state	<=	GoLine2_0;
             				else
             					DRIVER_CMD.Exec		<=	'0';
             				end if;
             			when	GoLine2_0=>
             				state	<=	Refresh;
             				DRIVER_CMD.Exec		<=	'0';
             			when ReturnHome=>
             				if SYNCH.DRVR_READY = '1' then
             					DRIVER_CMD.Exec		<=	'1';
             					DRIVER_CMD.Duration	<=	Duration_4ms;
             					DRIVER_CMD.CMD_Data	<=	'0';
-            					DRIVER_CMD.Word			<= X"02";
+            					DRIVER_CMD.Word			<= RetHome;
             					state	<=	Idle;
             				else
             					DRIVER_CMD.Exec		<=	'0';
             				end if;
             		end case;
             	end if;
             end process;
             end ar_LCD_16x2_ENGINE;

lib/lpp/amba_lcd_16x2_ctrlr/Top_LCD.vhd +1 -2

             ------------------------------------------------------------------------------
             --  This file is a part of the LPP VHDL IP LIBRARY
             --  Copyright (C) 2009 - 2010, Laboratory of Plasmas Physic - CNRS
             --
             --  This program is free software; you can redistribute it and/or modify
             --  it under the terms of the GNU General Public License as published by
             --  the Free Software Foundation; either version 2 of the License, or
             --  (at your option) any later version.
             --
             --  This program is distributed in the hope that it will be useful,
             --  but WITHOUT ANY WARRANTY; without even the implied warranty of
             --  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
             --  GNU General Public License for more details.
             --
             --  You should have received a copy of the GNU General Public License
             --  along with this program; if not, write to the Free Software
             --  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
             -------------------------------------------------------------------------------
             ----------------------------------------------------------------------------------
             -- Company:
             -- Engineer:
             --
             -- Create Date:    08:44:41 10/14/2010
             -- Design Name:
             -- Module Name:    Top_LCD - Behavioral
             -- Project Name:
             -- Target Devices:
             -- Tool versions:
             -- Description:
             --
             -- Dependencies:
             --
             -- Revision:
             -- Revision 0.01 - File Created
             -- Additional Comments:
             --
             ----------------------------------------------------------------------------------
             library IEEE;
             use IEEE.STD_LOGIC_1164.ALL;
             library lpp;
             use lpp.amba_lcd_16x2_ctrlr.all;
             use lpp.LCD_16x2_CFG.all;
             entity AMBA_LCD_16x2_DRIVER is
                 Port ( reset 		: in  STD_LOGIC;
                        clk 		: in  STD_LOGIC;
                        Bp0 		: in  STD_LOGIC;
                        Bp1 		: in  STD_LOGIC;
                        Bp2 		: in  STD_LOGIC;
             			  LCD_data 	: out  STD_LOGIC_VECTOR (7 downto 0);
                        LCD_RS 	: out  STD_LOGIC;
                        LCD_RW 	: out  STD_LOGIC;
             			  LCD_E  	: out  STD_LOGIC;
                        LCD_RET 	: out  STD_LOGIC;
                        LCD_CS1 	: out  STD_LOGIC;
                        LCD_CS2 	: out  STD_LOGIC;
             			  SF_CE0		: out	std_logic
             			  );
             end AMBA_LCD_16x2_DRIVER;
             architecture Behavioral of AMBA_LCD_16x2_DRIVER is
             signal	FramBUFF :  STD_LOGIC_VECTOR(16*2*8-1 downto 0);
             signal	CMD		:	std_logic_vector(10 downto 0);
             signal	Exec	:		std_logic;
             signal	Ready	:	 std_logic;
             signal	rst	:	std_logic;
             signal	LCD_CTRL	:	 LCD_DRVR_CTRL_BUSS;
             begin
             LCD_data 	<=	LCD_CTRL.LCD_DATA;
             LCD_RS 	<=	LCD_CTRL.LCD_RS;
             LCD_RW 	<=	LCD_CTRL.LCD_RW;
             LCD_E  	<=	LCD_CTRL.LCD_E;
             LCD_RET	<=	'0';
             LCD_CS1	<=	'0';
             LCD_CS2	<=	'0';
             SF_CE0	<=	'1';
-            rst <= not reset;
             Driver0 : LCD_16x2_ENGINE
             	generic map(50000)
-                Port map(clk,rst,FramBUFF,CMD,Exec,Ready,LCD_CTRL);
+                Port map(clk,reset,FramBUFF,CMD,Exec,Ready,LCD_CTRL);
             FramBUFF(0*8+7 downto 0*8)	<=	X"41" when	Bp0 = '1' else
             								X"42" when	Bp1 = '1' else
             								X"43" when	Bp2 = '1' else
             								X"44";
             FramBUFF(1*8+7 downto 1*8)<=	X"46" when	Bp0 = '1' else
             								X"47" when	Bp1 = '1' else
             								X"48" when	Bp2 = '1' else
             								X"49";
             CMD(9 downto 0)	<=	Duration_100us & CursorON when	Bp0 = '1' else
             							Duration_100us & CursorOFF;
             Exec	<=	Bp1;
             FramBUFF(2*8+7 downto 2*8) <= X"23";
             FramBUFF(3*8+7 downto 3*8) <= X"66";
             FramBUFF(4*8+7 downto 4*8) <= X"67";
             FramBUFF(5*8+7 downto 5*8) <= X"68";
             FramBUFF(17*8+7 downto 17*8) <= X"69";
             --FramBUFF(16*2*8-1 downto 16) <= (others => '0');
             end Behavioral;

lib/lpp/dirs.txt +2 -1

@@ -1,3 +1,4
1	./dsp/iir_filter
2	./general_purpose	1	./general_purpose
3	./lpp_amba	2	./lpp_amba
		3	./dsp/iir_filter
		4	./amba_lcd_16x2_ctrlr

lib/lpp/dsp/iir_filter/vhdlsyn.txt +4 -4

             APB_IIR_CEL.vhd
-            FILTER.vhd
-            FILTER_RAM_CTRLR.vhd
             FILTERcfg.vhd
             FilterCTRLR.vhd
+            FILTER_RAM_CTRLR.vhd
+            FILTER.vhd
             IIR_CEL_CTRLR.vhd
             IIR_CEL_FILTER.vhd
-            RAM.vhd
+            iir_filter.vhd
             RAM_CEL.vhd
             RAM_CTRLR2.vhd
+            RAM.vhd
             Top_Filtre_IIR.vhd
-            iir_filter.vhd

lib/lpp/general_purpose/vhdlsyn.txt +5 -5

+            Adder.vhd
             ADDRcntr.vhd
             ALU.vhd
-            Adder.vhd
+            general_purpose.vhd
-            MAC.vhd
             MAC_CONTROLER.vhd
+            MAC_MUX2.vhd
             MAC_MUX.vhd
-            MAC_MUX2.vhd
             MAC_REG.vhd
+            MAC.vhd
+            Multiplier.vhd
             MUX2.vhd
-            Multiplier.vhd
             REG.vhd
             Shifter.vhd
-            general_purpose.vhd

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