@@ -0,0 +1,5 | |||||
|
1 | vhdl lpp "../../lib/lpp/lpp_ad_Conv/lpp_ad_Conv.vhd" | |||
|
2 | vhdl lpp "../../lib/lpp/general_purpose/general_purpose.vhd" | |||
|
3 | vhdl lpp "../../lib/lpp/lpp_ad_Conv/AD7688_spi_if.vhd" | |||
|
4 | vhdl lpp "../../lib/lpp/general_purpose/Clk_divider.vhd" | |||
|
5 | vhdl lpp "../../lib/lpp/lpp_ad_Conv/AD7688_drvr.vhd" |
@@ -0,0 +1,12 | |||||
|
1 | vhdl grlib "../../lib/grlib/stdlib/version.vhd" | |||
|
2 | vhdl grlib "../../lib/grlib/stdlib/stdlib.vhd" | |||
|
3 | vhdl grlib "../../lib/grlib/stdlib/config.vhd" | |||
|
4 | vhdl grlib "../../lib/grlib/amba/amba.vhd" | |||
|
5 | vhdl grlib "../../lib/grlib/amba/devices.vhd" | |||
|
6 | vhdl lpp "../../lib/lpp/lpp_ad_Conv/lpp_ad_Conv.vhd" | |||
|
7 | vhdl lpp "../../lib/lpp/general_purpose/general_purpose.vhd" | |||
|
8 | vhdl lpp "../../lib/lpp/lpp_ad_Conv/AD7688_spi_if.vhd" | |||
|
9 | vhdl lpp "../../lib/lpp/general_purpose/Clk_divider.vhd" | |||
|
10 | vhdl lpp "../../lib/lpp/lpp_amba/lpp_amba.vhd" | |||
|
11 | vhdl lpp "../../lib/lpp/lpp_ad_Conv/AD7688_drvr.vhd" | |||
|
12 | vhdl lpp "../../lib/lpp/lpp_ad_Conv/lpp_apb_ad_conv.vhd" |
@@ -0,0 +1,12 | |||||
|
1 | vhdl grlib "/opt/GRLIB/grlib-gpl-1.1.0-b4104/lib/grlib/stdlib/version.vhd" | |||
|
2 | vhdl grlib "/opt/GRLIB/grlib-gpl-1.1.0-b4104/lib/grlib/stdlib/stdlib.vhd" | |||
|
3 | vhdl grlib "/opt/GRLIB/grlib-gpl-1.1.0-b4104/lib/grlib/stdlib/config.vhd" | |||
|
4 | vhdl grlib "/opt/GRLIB/grlib-gpl-1.1.0-b4104/lib/grlib/amba/amba.vhd" | |||
|
5 | vhdl grlib "/opt/GRLIB/grlib-gpl-1.1.0-b4104/lib/grlib/amba/devices.vhd" | |||
|
6 | vhdl lpp "/opt/GRLIB/grlib-gpl-1.1.0-b4104/lib/lpp/lpp_ad_Conv/lpp_ad_Conv.vhd" | |||
|
7 | vhdl lpp "/opt/GRLIB/grlib-gpl-1.1.0-b4104/lib/lpp/general_purpose/general_purpose.vhd" | |||
|
8 | vhdl lpp "/opt/GRLIB/grlib-gpl-1.1.0-b4104/lib/lpp/lpp_ad_Conv/AD7688_spi_if.vhd" | |||
|
9 | vhdl lpp "/opt/GRLIB/grlib-gpl-1.1.0-b4104/lib/lpp/general_purpose/Clk_divider.vhd" | |||
|
10 | vhdl lpp "/opt/GRLIB/grlib-gpl-1.1.0-b4104/lib/lpp/lpp_amba/lpp_amba.vhd" | |||
|
11 | vhdl lpp "/opt/GRLIB/grlib-gpl-1.1.0-b4104/lib/lpp/lpp_ad_Conv/AD7688_drvr.vhd" | |||
|
12 | vhdl lpp "/opt/GRLIB/grlib-gpl-1.1.0-b4104/lib/lpp/lpp_ad_Conv/lpp_apb_ad_conv.vhd" |
@@ -0,0 +1,12 | |||||
|
1 | <?xml version="1.0" encoding="UTF-8"?> | |||
|
2 | <drawing version="7"> | |||
|
3 | <attr value="spartan3e" name="DeviceFamilyName"> | |||
|
4 | <trait delete="all:0" /> | |||
|
5 | <trait editname="all:0" /> | |||
|
6 | <trait edittrait="all:0" /> | |||
|
7 | </attr> | |||
|
8 | <netlist> | |||
|
9 | </netlist> | |||
|
10 | <sheet sheetnum="1" width="3520" height="2720"> | |||
|
11 | </sheet> | |||
|
12 | </drawing> No newline at end of file |
@@ -0,0 +1,75 | |||||
|
1 | ------------------------------------------------------------------------------ | |||
|
2 | -- This file is a part of the LPP VHDL IP LIBRARY | |||
|
3 | -- Copyright (C) 2009 - 2010, Laboratory of Plasmas Physic - CNRS | |||
|
4 | -- | |||
|
5 | -- This program is free software; you can redistribute it and/or modify | |||
|
6 | -- it under the terms of the GNU General Public License as published by | |||
|
7 | -- the Free Software Foundation; either version 3 of the License, or | |||
|
8 | -- (at your option) any later version. | |||
|
9 | -- | |||
|
10 | -- This program is distributed in the hope that it will be useful, | |||
|
11 | -- but WITHOUT ANY WARRANTY; without even the implied warranty of | |||
|
12 | -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |||
|
13 | -- GNU General Public License for more details. | |||
|
14 | -- | |||
|
15 | -- You should have received a copy of the GNU General Public License | |||
|
16 | -- along with this program; if not, write to the Free Software | |||
|
17 | -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |||
|
18 | ------------------------------------------------------------------------------- | |||
|
19 | library IEEE; | |||
|
20 | use IEEE.STD_LOGIC_1164.ALL; | |||
|
21 | library lpp; | |||
|
22 | use lpp.lpp_ad_conv.all; | |||
|
23 | use lpp.general_purpose.Clk_divider; | |||
|
24 | ||||
|
25 | entity AD7688_spi_if is | |||
|
26 | generic(ChanelCount : integer); | |||
|
27 | Port( clk : in STD_LOGIC; | |||
|
28 | reset : in STD_LOGIC; | |||
|
29 | cnv : in STD_LOGIC; | |||
|
30 | DataReady: out std_logic; | |||
|
31 | sdi : in AD7688_in(ChanelCount-1 downto 0); | |||
|
32 | smpout : out Samples_out(ChanelCount-1 downto 0) | |||
|
33 | ); | |||
|
34 | end AD7688_spi_if; | |||
|
35 | ||||
|
36 | architecture ar_AD7688_spi_if of AD7688_spi_if is | |||
|
37 | ||||
|
38 | signal shift_reg : Samples_out(ChanelCount-1 downto 0); | |||
|
39 | signal i : integer range 0 to 15 :=0; | |||
|
40 | signal cnv_reg : std_logic := '0'; | |||
|
41 | ||||
|
42 | begin | |||
|
43 | ||||
|
44 | ||||
|
45 | ||||
|
46 | process(clk,reset) | |||
|
47 | begin | |||
|
48 | if reset = '0' then | |||
|
49 | for l in 0 to ChanelCount-1 loop | |||
|
50 | shift_reg(l) <= (others => '0'); | |||
|
51 | end loop; | |||
|
52 | i <= 0; | |||
|
53 | cnv_reg <= '0'; | |||
|
54 | elsif clk'event and clk = '1' then | |||
|
55 | if cnv = '0' and cnv_reg = '0' then | |||
|
56 | if i = 15 then | |||
|
57 | i <= 0; | |||
|
58 | cnv_reg <= '1'; | |||
|
59 | else | |||
|
60 | DataReady <= '0'; | |||
|
61 | i <= i+1; | |||
|
62 | for l in 0 to ChanelCount-1 loop | |||
|
63 | shift_reg(l)(0) <= sdi(l).SDI; | |||
|
64 | shift_reg(l)(15 downto 1) <= shift_reg(l)(14 downto 0); | |||
|
65 | end loop; | |||
|
66 | end if; | |||
|
67 | else | |||
|
68 | cnv_reg <= not cnv; | |||
|
69 | smpout <= shift_reg; | |||
|
70 | DataReady <= '1'; | |||
|
71 | end if; | |||
|
72 | end if; | |||
|
73 | end process; | |||
|
74 | ||||
|
75 | end ar_AD7688_spi_if; |
@@ -0,0 +1,102 | |||||
|
1 | ------------------------------------------------------------------------------ | |||
|
2 | -- This file is a part of the LPP VHDL IP LIBRARY | |||
|
3 | -- Copyright (C) 2009 - 2010, Laboratory of Plasmas Physic - CNRS | |||
|
4 | -- | |||
|
5 | -- This program is free software; you can redistribute it and/or modify | |||
|
6 | -- it under the terms of the GNU General Public License as published by | |||
|
7 | -- the Free Software Foundation; either version 3 of the License, or | |||
|
8 | -- (at your option) any later version. | |||
|
9 | -- | |||
|
10 | -- This program is distributed in the hope that it will be useful, | |||
|
11 | -- but WITHOUT ANY WARRANTY; without even the implied warranty of | |||
|
12 | -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |||
|
13 | -- GNU General Public License for more details. | |||
|
14 | -- | |||
|
15 | -- You should have received a copy of the GNU General Public License | |||
|
16 | -- along with this program; if not, write to the Free Software | |||
|
17 | -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |||
|
18 | ------------------------------------------------------------------------------- | |||
|
19 | library IEEE; | |||
|
20 | use IEEE.STD_LOGIC_1164.ALL; | |||
|
21 | library lpp; | |||
|
22 | use lpp.lpp_ad_conv.all; | |||
|
23 | use lpp.general_purpose.Clk_divider; | |||
|
24 | ||||
|
25 | entity ADS7886_drvr is | |||
|
26 | generic(ChanelCount : integer; | |||
|
27 | clkkHz : integer); | |||
|
28 | Port ( clk : in STD_LOGIC; | |||
|
29 | reset : in STD_LOGIC; | |||
|
30 | smplClk: in STD_LOGIC; | |||
|
31 | DataReady : out std_logic; | |||
|
32 | smpout : out Samples_out(ChanelCount-1 downto 0); | |||
|
33 | AD_in : in AD7688_in(ChanelCount-1 downto 0); | |||
|
34 | AD_out : out AD7688_out); | |||
|
35 | end ADS7886_drvr; | |||
|
36 | ||||
|
37 | architecture ar_ADS7886_drvr of ADS7886_drvr is | |||
|
38 | ||||
|
39 | constant convTrigger : integer:= clkkHz*1/1000; --tconv = 1.6µs | |||
|
40 | ||||
|
41 | signal i : integer range 0 to convTrigger :=0; | |||
|
42 | signal clk_int : std_logic; | |||
|
43 | signal smplClk_reg : std_logic; | |||
|
44 | signal cnv_int : std_logic; | |||
|
45 | signal smpout_int : Samples_out(ChanelCount-1 downto 0); | |||
|
46 | ||||
|
47 | ||||
|
48 | begin | |||
|
49 | ||||
|
50 | ||||
|
51 | clkdiv: if clkkHz>=20000 generate | |||
|
52 | clkdivider: Clk_divider | |||
|
53 | generic map(clkkHz*1000,19000000) | |||
|
54 | Port map( clk ,reset,clk_int); | |||
|
55 | end generate; | |||
|
56 | ||||
|
57 | ||||
|
58 | clknodiv: if clkkHz<20000 generate | |||
|
59 | nodiv: clk_int <= clk; | |||
|
60 | end generate; | |||
|
61 | ||||
|
62 | AD_out.CNV <= cnv_int; | |||
|
63 | AD_out.SCK <= clk_int; | |||
|
64 | ||||
|
65 | ||||
|
66 | sckgen: process(clk,reset) | |||
|
67 | begin | |||
|
68 | if reset = '0' then | |||
|
69 | i <= 0; | |||
|
70 | cnv_int <= '0'; | |||
|
71 | smplClk_reg <= '0'; | |||
|
72 | elsif clk'event and clk = '1' then | |||
|
73 | if smplClk = '1' and smplClk_reg = '0' then | |||
|
74 | if i = convTrigger then | |||
|
75 | smplClk_reg <= '1'; | |||
|
76 | i <= 0; | |||
|
77 | cnv_int <= '0'; | |||
|
78 | else | |||
|
79 | i <= i+1; | |||
|
80 | cnv_int <= '1'; | |||
|
81 | end if; | |||
|
82 | elsif smplClk = '0' and smplClk_reg = '1' then | |||
|
83 | smplClk_reg <= '0'; | |||
|
84 | end if; | |||
|
85 | end if; | |||
|
86 | end process; | |||
|
87 | ||||
|
88 | ||||
|
89 | NDMSK: for i in 0 to ChanelCount-1 | |||
|
90 | generate | |||
|
91 | smpout(i) <= smpout_int(i) and X"0FFF"; | |||
|
92 | end generate; | |||
|
93 | ||||
|
94 | ||||
|
95 | spidrvr: AD7688_spi_if | |||
|
96 | generic map(ChanelCount) | |||
|
97 | Port map(clk_int,reset,cnv_int,DataReady,AD_in,smpout_int); | |||
|
98 | ||||
|
99 | ||||
|
100 | ||||
|
101 | end ar_ADS7886_drvr; | |||
|
102 |
@@ -0,0 +1,142 | |||||
|
1 | ------------------------------------------------------------------------------ | |||
|
2 | -- This file is a part of the LPP VHDL IP LIBRARY | |||
|
3 | -- Copyright (C) 2009 - 2010, Laboratory of Plasmas Physic - CNRS | |||
|
4 | -- | |||
|
5 | -- This program is free software; you can redistribute it and/or modify | |||
|
6 | -- it under the terms of the GNU General Public License as published by | |||
|
7 | -- the Free Software Foundation; either version 3 of the License, or | |||
|
8 | -- (at your option) any later version. | |||
|
9 | -- | |||
|
10 | -- This program is distributed in the hope that it will be useful, | |||
|
11 | -- but WITHOUT ANY WARRANTY; without even the implied warranty of | |||
|
12 | -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |||
|
13 | -- GNU General Public License for more details. | |||
|
14 | -- | |||
|
15 | -- You should have received a copy of the GNU General Public License | |||
|
16 | -- along with this program; if not, write to the Free Software | |||
|
17 | -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |||
|
18 | ------------------------------------------------------------------------------- | |||
|
19 | library IEEE; | |||
|
20 | use IEEE.STD_LOGIC_1164.ALL; | |||
|
21 | use ieee.numeric_std.all; | |||
|
22 | library grlib; | |||
|
23 | use grlib.amba.all; | |||
|
24 | use grlib.stdlib.all; | |||
|
25 | use grlib.devices.all; | |||
|
26 | library lpp; | |||
|
27 | use lpp.lpp_ad_conv.all; | |||
|
28 | use lpp.lpp_amba.all; | |||
|
29 | use lpp.general_purpose.Clk_divider; | |||
|
30 | ||||
|
31 | entity lpp_apb_ad_conv is | |||
|
32 | generic( | |||
|
33 | pindex : integer := 0; | |||
|
34 | paddr : integer := 0; | |||
|
35 | pmask : integer := 16#fff#; | |||
|
36 | pirq : integer := 0; | |||
|
37 | abits : integer := 8; | |||
|
38 | ChanelCount : integer := 1; | |||
|
39 | clkkHz : integer := 50000; | |||
|
40 | smpClkHz : integer := 100; | |||
|
41 | ADCref : integer := AD7688); | |||
|
42 | Port ( | |||
|
43 | clk : in STD_LOGIC; | |||
|
44 | reset : in STD_LOGIC; | |||
|
45 | apbi : in apb_slv_in_type; | |||
|
46 | apbo : out apb_slv_out_type; | |||
|
47 | AD_in : in AD7688_in(ChanelCount-1 downto 0); | |||
|
48 | AD_out : out AD7688_out); | |||
|
49 | end lpp_apb_ad_conv; | |||
|
50 | ||||
|
51 | ||||
|
52 | architecture ar_lpp_apb_ad_conv of lpp_apb_ad_conv is | |||
|
53 | constant REVISION : integer := 1; | |||
|
54 | ||||
|
55 | constant pconfig : apb_config_type := ( | |||
|
56 | 0 => ahb_device_reg (VENDOR_LPP, LPP_ADC_7688, 0, REVISION, 0), | |||
|
57 | 1 => apb_iobar(paddr, pmask)); | |||
|
58 | ||||
|
59 | signal Rdata : std_logic_vector(31 downto 0); | |||
|
60 | signal smpout : Samples_out(ChanelCount-1 downto 0); | |||
|
61 | signal smplClk : STD_LOGIC; | |||
|
62 | signal DataReady : STD_LOGIC; | |||
|
63 | ||||
|
64 | type lpp_apb_ad_conv_Reg is record | |||
|
65 | CTRL_Reg : std_logic_vector(31 downto 0); | |||
|
66 | sample : Samples_out(ChanelCount-1 downto 0); | |||
|
67 | end record; | |||
|
68 | ||||
|
69 | signal r : lpp_apb_ad_conv_Reg; | |||
|
70 | ||||
|
71 | begin | |||
|
72 | ||||
|
73 | ||||
|
74 | caseAD7688: if ADCref = AD7688 generate | |||
|
75 | AD7688: AD7688_drvr | |||
|
76 | generic map(ChanelCount,clkkHz) | |||
|
77 | Port map(clk,reset,smplClk,DataReady,smpout,AD_in,AD_out); | |||
|
78 | end generate; | |||
|
79 | ||||
|
80 | caseADS786: if ADCref = ADS7886 generate | |||
|
81 | ADS7886: ADS7886_drvr | |||
|
82 | generic map(ChanelCount,clkkHz) | |||
|
83 | Port map(clk,reset,smplClk,DataReady,smpout,AD_in,AD_out); | |||
|
84 | end generate; | |||
|
85 | ||||
|
86 | ||||
|
87 | clkdivider: Clk_divider | |||
|
88 | generic map(clkkHz*1000,smpClkHz) | |||
|
89 | Port map( clk ,reset,smplClk); | |||
|
90 | ||||
|
91 | ||||
|
92 | ||||
|
93 | r.CTRL_Reg(0) <= DataReady; | |||
|
94 | ||||
|
95 | r.sample <= smpout; | |||
|
96 | ||||
|
97 | ||||
|
98 | process(reset,clk) | |||
|
99 | begin | |||
|
100 | if reset = '0' then | |||
|
101 | --r.CTRL_Reg(9 downto 0) <= (others => '0'); | |||
|
102 | elsif clk'event and clk = '1' then | |||
|
103 | ||||
|
104 | --APB Write OP | |||
|
105 | if (apbi.psel(pindex) and apbi.penable and apbi.pwrite) = '1' then | |||
|
106 | case apbi.paddr(7 downto 2) is | |||
|
107 | when "000000" => | |||
|
108 | --r.CTRL_Reg(9 downto 0) <= apbi.pwdata(9 downto 0); | |||
|
109 | when others => | |||
|
110 | end case; | |||
|
111 | end if; | |||
|
112 | ||||
|
113 | --APB READ OP | |||
|
114 | if (apbi.psel(pindex) and (not apbi.pwrite)) = '1' then | |||
|
115 | case apbi.paddr(7 downto 2) is | |||
|
116 | when "000000" => | |||
|
117 | Rdata <= r.CTRL_Reg; | |||
|
118 | when others => | |||
|
119 | readC: for i in 1 to ChanelCount loop | |||
|
120 | if TO_INTEGER(unsigned(apbi.paddr(abits-1 downto 2))) =i then | |||
|
121 | Rdata(15 downto 0) <= r.sample(i-1)(15 downto 0); | |||
|
122 | end if; | |||
|
123 | end loop; | |||
|
124 | end case; | |||
|
125 | end if; | |||
|
126 | end if; | |||
|
127 | apbo.pconfig <= pconfig; | |||
|
128 | end process; | |||
|
129 | ||||
|
130 | apbo.prdata <= Rdata when apbi.penable = '1' ; | |||
|
131 | ||||
|
132 | ||||
|
133 | end ar_lpp_apb_ad_conv; | |||
|
134 | ||||
|
135 | ||||
|
136 | ||||
|
137 | ||||
|
138 | ||||
|
139 | ||||
|
140 | ||||
|
141 | ||||
|
142 |
@@ -8,6 +8,47 | |||||
8 | <ClosedNodes> |
|
8 | <ClosedNodes> | |
9 | <ClosedNodesVersion>2</ClosedNodesVersion> |
|
9 | <ClosedNodesVersion>2</ClosedNodesVersion> | |
10 | <ClosedNode>/Unassigned User Library Modules</ClosedNode> |
|
10 | <ClosedNode>/Unassigned User Library Modules</ClosedNode> | |
|
11 | <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-APB_LCD-digilent-xc3s1600e|leon3mp.vhd/LCD0 - apb_lcd_ctrlr - Behavioral</ClosedNode> | |||
|
12 | <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-APB_LCD-digilent-xc3s1600e|leon3mp.vhd/addr_pad - outpadv - rtl</ClosedNode> | |||
|
13 | <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-APB_LCD-digilent-xc3s1600e|leon3mp.vhd/ahbjtag0 - ahbjtag - struct</ClosedNode> | |||
|
14 | <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-APB_LCD-digilent-xc3s1600e|leon3mp.vhd/ahbram0 - ahbram - rtl</ClosedNode> | |||
|
15 | <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-APB_LCD-digilent-xc3s1600e|leon3mp.vhd/clk_pad - clkpad - rtl</ClosedNode> | |||
|
16 | <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-APB_LCD-digilent-xc3s1600e|leon3mp.vhd/clkgen0 - clkgen - struct</ClosedNode> | |||
|
17 | <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-APB_LCD-digilent-xc3s1600e|leon3mp.vhd/dcom0 - ahbuart - struct</ClosedNode> | |||
|
18 | <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-APB_LCD-digilent-xc3s1600e|leon3mp.vhd/ddrc - ddrspa - rtl</ClosedNode> | |||
|
19 | <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-APB_LCD-digilent-xc3s1600e|leon3mp.vhd/dsu0 - dsu3 - rtl</ClosedNode> | |||
|
20 | <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-APB_LCD-digilent-xc3s1600e|leon3mp.vhd/dsubre_pad - inpad - rtl</ClosedNode> | |||
|
21 | <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-APB_LCD-digilent-xc3s1600e|leon3mp.vhd/dsurx_pad - inpad - rtl</ClosedNode> | |||
|
22 | <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-APB_LCD-digilent-xc3s1600e|leon3mp.vhd/dsutx_pad - outpad - rtl</ClosedNode> | |||
|
23 | <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-APB_LCD-digilent-xc3s1600e|leon3mp.vhd/e1 - grethm - rtl</ClosedNode> | |||
|
24 | <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-APB_LCD-digilent-xc3s1600e|leon3mp.vhd/emdc_pad - outpad - rtl</ClosedNode> | |||
|
25 | <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-APB_LCD-digilent-xc3s1600e|leon3mp.vhd/emdio_pad - iopad - rtl</ClosedNode> | |||
|
26 | <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-APB_LCD-digilent-xc3s1600e|leon3mp.vhd/error_pad - odpad - rtl</ClosedNode> | |||
|
27 | <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-APB_LCD-digilent-xc3s1600e|leon3mp.vhd/erxc_pad - inpad - rtl</ClosedNode> | |||
|
28 | <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-APB_LCD-digilent-xc3s1600e|leon3mp.vhd/erxco_pad - inpad - rtl</ClosedNode> | |||
|
29 | <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-APB_LCD-digilent-xc3s1600e|leon3mp.vhd/erxcr_pad - inpad - rtl</ClosedNode> | |||
|
30 | <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-APB_LCD-digilent-xc3s1600e|leon3mp.vhd/erxd_pad - inpadv - rtl</ClosedNode> | |||
|
31 | <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-APB_LCD-digilent-xc3s1600e|leon3mp.vhd/erxdv_pad - inpad - rtl</ClosedNode> | |||
|
32 | <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-APB_LCD-digilent-xc3s1600e|leon3mp.vhd/erxer_pad - inpad - rtl</ClosedNode> | |||
|
33 | <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-APB_LCD-digilent-xc3s1600e|leon3mp.vhd/etxc_pad - inpad - rtl</ClosedNode> | |||
|
34 | <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-APB_LCD-digilent-xc3s1600e|leon3mp.vhd/etxd_pad - outpadv - rtl</ClosedNode> | |||
|
35 | <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-APB_LCD-digilent-xc3s1600e|leon3mp.vhd/etxen_pad - outpad - rtl</ClosedNode> | |||
|
36 | <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-APB_LCD-digilent-xc3s1600e|leon3mp.vhd/etxer_pad - outpad - rtl</ClosedNode> | |||
|
37 | <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-APB_LCD-digilent-xc3s1600e|leon3mp.vhd/horiz_sync_pad - outpad - rtl</ClosedNode> | |||
|
38 | <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-APB_LCD-digilent-xc3s1600e|leon3mp.vhd/kbdata_pad - iopad - rtl</ClosedNode> | |||
|
39 | <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-APB_LCD-digilent-xc3s1600e|leon3mp.vhd/kbdclk_pad - iopad - rtl</ClosedNode> | |||
|
40 | <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-APB_LCD-digilent-xc3s1600e|leon3mp.vhd/oen_pad - outpad - rtl</ClosedNode> | |||
|
41 | <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-APB_LCD-digilent-xc3s1600e|leon3mp.vhd/roms_pad - outpad - rtl</ClosedNode> | |||
|
42 | <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-APB_LCD-digilent-xc3s1600e|leon3mp.vhd/serrx_pad - inpad - rtl</ClosedNode> | |||
|
43 | <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-APB_LCD-digilent-xc3s1600e|leon3mp.vhd/sertx_pad - outpad - rtl</ClosedNode> | |||
|
44 | <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-APB_LCD-digilent-xc3s1600e|leon3mp.vhd/sr1 - mctrl - rtl</ClosedNode> | |||
|
45 | <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-APB_LCD-digilent-xc3s1600e|leon3mp.vhd/svga0 - svgactrl - rtl</ClosedNode> | |||
|
46 | <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-APB_LCD-digilent-xc3s1600e|leon3mp.vhd/u0 - leon3s - rtl</ClosedNode> | |||
|
47 | <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-APB_LCD-digilent-xc3s1600e|leon3mp.vhd/vert_sync_pad - outpad - rtl</ClosedNode> | |||
|
48 | <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-APB_LCD-digilent-xc3s1600e|leon3mp.vhd/video_out_b_pad - outpad - rtl</ClosedNode> | |||
|
49 | <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-APB_LCD-digilent-xc3s1600e|leon3mp.vhd/video_out_g_pad - outpad - rtl</ClosedNode> | |||
|
50 | <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-APB_LCD-digilent-xc3s1600e|leon3mp.vhd/video_out_r_pad - outpad - rtl</ClosedNode> | |||
|
51 | <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-APB_LCD-digilent-xc3s1600e|leon3mp.vhd/wri_pad - outpad - rtl</ClosedNode> | |||
11 | <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-digilent-xc3s1600e|leon3mp.vhd/LCD0 - apb_lcd_ctrlr - Behavioral</ClosedNode> |
|
52 | <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-digilent-xc3s1600e|leon3mp.vhd/LCD0 - apb_lcd_ctrlr - Behavioral</ClosedNode> | |
12 | <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-digilent-xc3s1600e|leon3mp.vhd/addr_pad - outpadv - rtl</ClosedNode> |
|
53 | <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-digilent-xc3s1600e|leon3mp.vhd/addr_pad - outpadv - rtl</ClosedNode> | |
13 | <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-digilent-xc3s1600e|leon3mp.vhd/ahbjtag0 - ahbjtag - struct</ClosedNode> |
|
54 | <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-digilent-xc3s1600e|leon3mp.vhd/ahbjtag0 - ahbjtag - struct</ClosedNode> | |
@@ -52,18 +93,20 | |||||
52 | <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-digilent-xc3s1600e|leon3mp.vhd/wri_pad - outpad - rtl</ClosedNode> |
|
93 | <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-digilent-xc3s1600e|leon3mp.vhd/wri_pad - outpad - rtl</ClosedNode> | |
53 | </ClosedNodes> |
|
94 | </ClosedNodes> | |
54 | <SelectedItems> |
|
95 | <SelectedItems> | |
55 |
<SelectedItem> |
|
96 | <SelectedItem>clkdivider - Clk_divider - ar_Clk_divider (/opt/GRLIB/grlib-gpl-1.1.0-b4104/lib/lpp/general_purpose/Clk_divider.vhd)</SelectedItem> | |
56 | </SelectedItems> |
|
97 | </SelectedItems> | |
57 |
<ScrollbarPosition orientation="vertical" > |
|
98 | <ScrollbarPosition orientation="vertical" >0</ScrollbarPosition> | |
58 | <ScrollbarPosition orientation="horizontal" >0</ScrollbarPosition> |
|
99 | <ScrollbarPosition orientation="horizontal" >0</ScrollbarPosition> | |
59 |
<ViewHeaderState orientation="horizontal" >000000ff000000000000000100000001000000000000000000000000000000000202000000010000000100000064000002 |
|
100 | <ViewHeaderState orientation="horizontal" >000000ff000000000000000100000001000000000000000000000000000000000202000000010000000100000064000002be000000020000000000000000000000000000000064ffffffff000000810000000000000002000002be0000000100000000000000000000000100000000</ViewHeaderState> | |
60 | <UserChangedColumnWidths orientation="horizontal" >false</UserChangedColumnWidths> |
|
101 | <UserChangedColumnWidths orientation="horizontal" >false</UserChangedColumnWidths> | |
61 | <CurrentItem>leon3mp - rtl (/opt/GRLIB/grlib-gpl-1.1.0-b4104/designs/leon3-digilent-xc3s1600e/leon3mp.vhd)</CurrentItem> |
|
102 | <CurrentItem>clkdivider - Clk_divider - ar_Clk_divider (/opt/GRLIB/grlib-gpl-1.1.0-b4104/lib/lpp/general_purpose/Clk_divider.vhd)</CurrentItem> | |
62 | </ItemView> |
|
103 | </ItemView> | |
63 | <ItemView engineview="SynthesisOnly" sourcetype="DESUT_VHDL_ARCHITECTURE" guiview="Process" > |
|
104 | <ItemView engineview="SynthesisOnly" sourcetype="DESUT_VHDL_ARCHITECTURE" guiview="Process" > | |
64 | <ClosedNodes> |
|
105 | <ClosedNodes> | |
65 | <ClosedNodesVersion>1</ClosedNodesVersion> |
|
106 | <ClosedNodesVersion>1</ClosedNodesVersion> | |
|
107 | <ClosedNode>Configure Target Device</ClosedNode> | |||
66 | <ClosedNode>Design Utilities</ClosedNode> |
|
108 | <ClosedNode>Design Utilities</ClosedNode> | |
|
109 | <ClosedNode>Implement Design</ClosedNode> | |||
67 | <ClosedNode>Implement Design/Map</ClosedNode> |
|
110 | <ClosedNode>Implement Design/Map</ClosedNode> | |
68 | <ClosedNode>Implement Design/Place & Route</ClosedNode> |
|
111 | <ClosedNode>Implement Design/Place & Route</ClosedNode> | |
69 | <ClosedNode>Implement Design/Translate</ClosedNode> |
|
112 | <ClosedNode>Implement Design/Translate</ClosedNode> | |
@@ -71,24 +114,26 | |||||
71 | <ClosedNode>User Constraints</ClosedNode> |
|
114 | <ClosedNode>User Constraints</ClosedNode> | |
72 | </ClosedNodes> |
|
115 | </ClosedNodes> | |
73 | <SelectedItems> |
|
116 | <SelectedItems> | |
74 |
<SelectedItem> |
|
117 | <SelectedItem></SelectedItem> | |
75 | </SelectedItems> |
|
118 | </SelectedItems> | |
76 |
<ScrollbarPosition orientation="vertical" > |
|
119 | <ScrollbarPosition orientation="vertical" >0</ScrollbarPosition> | |
77 | <ScrollbarPosition orientation="horizontal" >0</ScrollbarPosition> |
|
120 | <ScrollbarPosition orientation="horizontal" >0</ScrollbarPosition> | |
78 |
<ViewHeaderState orientation="horizontal" >000000ff000000000000000100000001000000000000000000000000000000000000000000000001 |
|
121 | <ViewHeaderState orientation="horizontal" >000000ff00000000000000010000000100000000000000000000000000000000000000000000000163000000010000000100000000000000000000000064ffffffff000000810000000000000001000001630000000100000000</ViewHeaderState> | |
79 | <UserChangedColumnWidths orientation="horizontal" >false</UserChangedColumnWidths> |
|
122 | <UserChangedColumnWidths orientation="horizontal" >false</UserChangedColumnWidths> | |
80 |
<CurrentItem> |
|
123 | <CurrentItem></CurrentItem> | |
81 | </ItemView> |
|
124 | </ItemView> | |
82 | <ItemView guiview="File" > |
|
125 | <ItemView guiview="File" > | |
83 | <ClosedNodes> |
|
126 | <ClosedNodes> | |
84 | <ClosedNodesVersion>1</ClosedNodesVersion> |
|
127 | <ClosedNodesVersion>1</ClosedNodesVersion> | |
85 | </ClosedNodes> |
|
128 | </ClosedNodes> | |
86 |
<SelectedItems |
|
129 | <SelectedItems> | |
87 | <ScrollbarPosition orientation="vertical" >0</ScrollbarPosition> |
|
130 | <SelectedItem>../../lib/lpp/lpp_ad_Conv/AD7688_drvr.vhd</SelectedItem> | |
|
131 | </SelectedItems> | |||
|
132 | <ScrollbarPosition orientation="vertical" >178</ScrollbarPosition> | |||
88 | <ScrollbarPosition orientation="horizontal" >0</ScrollbarPosition> |
|
133 | <ScrollbarPosition orientation="horizontal" >0</ScrollbarPosition> | |
89 | <ViewHeaderState orientation="horizontal" >000000ff00000000000000010000000000000000010000000000000000000000000000000000000598000000040101000100000000000000000000000064ffffffff000000810000000000000004000001970000000100000000000000d60000000100000000000000840000000100000000000002a70000000100000000</ViewHeaderState> |
|
134 | <ViewHeaderState orientation="horizontal" >000000ff00000000000000010000000000000000010000000000000000000000000000000000000598000000040101000100000000000000000000000064ffffffff000000810000000000000004000001970000000100000000000000d60000000100000000000000840000000100000000000002a70000000100000000</ViewHeaderState> | |
90 | <UserChangedColumnWidths orientation="horizontal" >false</UserChangedColumnWidths> |
|
135 | <UserChangedColumnWidths orientation="horizontal" >false</UserChangedColumnWidths> | |
91 |
<CurrentItem>../../lib/ |
|
136 | <CurrentItem>../../lib/lpp/lpp_ad_Conv/AD7688_drvr.vhd</CurrentItem> | |
92 | </ItemView> |
|
137 | </ItemView> | |
93 | <ItemView guiview="Library" > |
|
138 | <ItemView guiview="Library" > | |
94 | <ClosedNodes> |
|
139 | <ClosedNodes> | |
@@ -107,13 +152,13 | |||||
107 | <ClosedNode>unisim</ClosedNode> |
|
152 | <ClosedNode>unisim</ClosedNode> | |
108 | </ClosedNodes> |
|
153 | </ClosedNodes> | |
109 | <SelectedItems> |
|
154 | <SelectedItems> | |
110 |
<SelectedItem>../../lib/lpp/lpp_a |
|
155 | <SelectedItem>../../lib/lpp/lpp_ad_Conv/lpp_apb_ad_conv.vhd</SelectedItem> | |
111 | </SelectedItems> |
|
156 | </SelectedItems> | |
112 |
<ScrollbarPosition orientation="vertical" > |
|
157 | <ScrollbarPosition orientation="vertical" >66</ScrollbarPosition> | |
113 | <ScrollbarPosition orientation="horizontal" >0</ScrollbarPosition> |
|
158 | <ScrollbarPosition orientation="horizontal" >0</ScrollbarPosition> | |
114 |
<ViewHeaderState orientation="horizontal" >000000ff000000000000000100000000000000000100000000000000000000000000000000000001 |
|
159 | <ViewHeaderState orientation="horizontal" >000000ff00000000000000010000000000000000010000000000000000000000000000000000000119000000010001000100000000000000000000000064ffffffff000000810000000000000001000001190000000100000000</ViewHeaderState> | |
115 | <UserChangedColumnWidths orientation="horizontal" >false</UserChangedColumnWidths> |
|
160 | <UserChangedColumnWidths orientation="horizontal" >false</UserChangedColumnWidths> | |
116 |
<CurrentItem>../../lib/lpp/lpp_a |
|
161 | <CurrentItem>../../lib/lpp/lpp_ad_Conv/lpp_apb_ad_conv.vhd</CurrentItem> | |
117 | </ItemView> |
|
162 | </ItemView> | |
118 | <SourceProcessView>000000ff0000000000000002000001f4000000b001000000060100000002</SourceProcessView> |
|
163 | <SourceProcessView>000000ff0000000000000002000001f4000000b001000000060100000002</SourceProcessView> | |
119 | <CurrentView>Implementation</CurrentView> |
|
164 | <CurrentView>Implementation</CurrentView> | |
@@ -127,7 +172,7 | |||||
127 | </SelectedItems> |
|
172 | </SelectedItems> | |
128 | <ScrollbarPosition orientation="vertical" >0</ScrollbarPosition> |
|
173 | <ScrollbarPosition orientation="vertical" >0</ScrollbarPosition> | |
129 | <ScrollbarPosition orientation="horizontal" >0</ScrollbarPosition> |
|
174 | <ScrollbarPosition orientation="horizontal" >0</ScrollbarPosition> | |
130 |
<ViewHeaderState orientation="horizontal" >000000ff00000000000000010000000100000000000000000000000000000000000000000000000 |
|
175 | <ViewHeaderState orientation="horizontal" >000000ff00000000000000010000000100000000000000000000000000000000000000000000000138000000010000000100000000000000000000000064ffffffff000000810000000000000001000001380000000100000000</ViewHeaderState> | |
131 | <UserChangedColumnWidths orientation="horizontal" >false</UserChangedColumnWidths> |
|
176 | <UserChangedColumnWidths orientation="horizontal" >false</UserChangedColumnWidths> | |
132 | <CurrentItem/> |
|
177 | <CurrentItem/> | |
133 | </ItemView> |
|
178 | </ItemView> |
@@ -1,11 +1,11 | |||||
1 | <?xml version='1.0' encoding='UTF-8'?> |
|
1 | <?xml version='1.0' encoding='UTF-8'?> | |
2 | <report-views version="2.0" > |
|
2 | <report-views version="2.0" > | |
3 | <header> |
|
3 | <header> | |
4 |
<DateModified>2010-1 |
|
4 | <DateModified>2010-12-02T07:02:18</DateModified> | |
5 | <ModuleName>leon3mp</ModuleName> |
|
5 | <ModuleName>leon3mp</ModuleName> | |
6 | <SummaryTimeStamp>Unknown</SummaryTimeStamp> |
|
6 | <SummaryTimeStamp>Unknown</SummaryTimeStamp> | |
7 | <SavedFilePath>/opt/GRLIB/grlib-gpl-1.1.0-b4104/designs/leon3-digilent-xc3s1600e/iseconfig/leon3mp.xreport</SavedFilePath> |
|
7 | <SavedFilePath>/opt/GRLIB/grlib-gpl-1.1.0-b4104/designs/leon3-APB_LCD-digilent-xc3s1600e/iseconfig/leon3mp.xreport</SavedFilePath> | |
8 | <ImplementationReportsDirectory>/opt/GRLIB/grlib-gpl-1.1.0-b4104/designs/leon3-digilent-xc3s1600e/</ImplementationReportsDirectory> |
|
8 | <ImplementationReportsDirectory>/opt/GRLIB/grlib-gpl-1.1.0-b4104/designs/leon3-APB_LCD-digilent-xc3s1600e/</ImplementationReportsDirectory> | |
9 | <DateInitialized>2010-11-19T08:25:19</DateInitialized> |
|
9 | <DateInitialized>2010-11-19T08:25:19</DateInitialized> | |
10 | <EnableMessageFiltering>false</EnableMessageFiltering> |
|
10 | <EnableMessageFiltering>false</EnableMessageFiltering> | |
11 | </header> |
|
11 | </header> |
@@ -239,4 +239,17 NET "LCD_E" LOC = "M18" | IOSTANDARD = L | |||||
239 | NET "LCD_RET" LOC = "E3" | IOSTANDARD = SSTL2_I ; |
|
239 | NET "LCD_RET" LOC = "E3" | IOSTANDARD = SSTL2_I ; | |
240 | NET "LCD_CS1" LOC = "P3" | IOSTANDARD = SSTL2_I ; |
|
240 | NET "LCD_CS1" LOC = "P3" | IOSTANDARD = SSTL2_I ; | |
241 | NET "LCD_CS2" LOC = "P4" | IOSTANDARD = SSTL2_I ; |
|
241 | NET "LCD_CS2" LOC = "P4" | IOSTANDARD = SSTL2_I ; | |
|
242 | NET "ADC_SCK" LOC = "P13" | IOSTANDARD = LVTTL ; | |||
|
243 | NET "ADC_CNV" LOC = "T14" | IOSTANDARD = LVTTL ; | |||
|
244 | NET "ADC_SDI" LOC = "R13" | IOSTANDARD = LVTTL ; | |||
242 |
|
245 | |||
|
246 | ||||
|
247 | ||||
|
248 | ||||
|
249 | ||||
|
250 | ||||
|
251 | ||||
|
252 | ||||
|
253 | ||||
|
254 | ||||
|
255 |
@@ -43,6 +43,8 use work.config.all; | |||||
43 | library lpp; |
|
43 | library lpp; | |
44 | use lpp.amba_lcd_16x2_ctrlr.all; |
|
44 | use lpp.amba_lcd_16x2_ctrlr.all; | |
45 | use lpp.LCD_16x2_CFG.all; |
|
45 | use lpp.LCD_16x2_CFG.all; | |
|
46 | use lpp.lpp_ad_conv.all; | |||
|
47 | ||||
46 |
|
48 | |||
47 | entity leon3mp is |
|
49 | entity leon3mp is | |
48 | generic ( |
|
50 | generic ( | |
@@ -133,7 +135,10 entity leon3mp is | |||||
133 | LCD_CS2 : out STD_LOGIC; |
|
135 | LCD_CS2 : out STD_LOGIC; | |
134 | SF_CE0 : out std_logic; |
|
136 | SF_CE0 : out std_logic; | |
135 | BTN_NORTH : in std_ulogic; |
|
137 | BTN_NORTH : in std_ulogic; | |
136 | BTN_WEST : in std_ulogic |
|
138 | BTN_WEST : in std_ulogic; | |
|
139 | ADC_SCK : out std_logic; | |||
|
140 | ADC_CNV : out std_logic; | |||
|
141 | ADC_SDI : in std_logic | |||
137 | ); |
|
142 | ); | |
138 | end; |
|
143 | end; | |
139 |
|
144 | |||
@@ -204,6 +209,9 architecture rtl of leon3mp is | |||||
204 | signal ddr_csb : std_logic_vector(1 downto 0); |
|
209 | signal ddr_csb : std_logic_vector(1 downto 0); | |
205 | signal ddr_adl : std_logic_vector(13 downto 0); -- ddr address |
|
210 | signal ddr_adl : std_logic_vector(13 downto 0); -- ddr address | |
206 |
|
211 | |||
|
212 | signal AD_in : AD7688_in(0 downto 0); | |||
|
213 | signal AD_out : AD7688_out; | |||
|
214 | ||||
207 | attribute keep : boolean; |
|
215 | attribute keep : boolean; | |
208 | attribute syn_keep : boolean; |
|
216 | attribute syn_keep : boolean; | |
209 | attribute syn_preserve : boolean; |
|
217 | attribute syn_preserve : boolean; | |
@@ -478,6 +486,17 LCD0 : apb_lcd_ctrlr | |||||
478 | Port map( rstn,clkm,apbi, apbo(8),data(15 downto 8),LCD_RS,LCD_RW,LCD_E,LCD_RET,LCD_CS1,LCD_CS2,SF_CE0); |
|
486 | Port map( rstn,clkm,apbi, apbo(8),data(15 downto 8),LCD_RS,LCD_RW,LCD_E,LCD_RET,LCD_CS1,LCD_CS2,SF_CE0); | |
479 |
|
487 | |||
480 | ----------------------------------------------------------------------- |
|
488 | ----------------------------------------------------------------------- | |
|
489 | --- ADS7886 ---------------------------------------------------- | |||
|
490 | ----------------------------------------------------------------------- | |||
|
491 | ||||
|
492 | ADC0 : lpp_apb_ad_conv | |||
|
493 | generic map(9,9,16#fff#,0,8,1,50000,100,ADS7886) | |||
|
494 | Port map(clkm,rstn,apbi, apbo(9),AD_in,AD_out); | |||
|
495 | ||||
|
496 | AD_in(0).SDI <= ADC_SDI; | |||
|
497 | ADC_CNV <= AD_out.CNV; | |||
|
498 | ADC_SCK <= AD_out.SCK; | |||
|
499 | ----------------------------------------------------------------------- | |||
481 | --- ETHERNET --------------------------------------------------------- |
|
500 | --- ETHERNET --------------------------------------------------------- | |
482 | ----------------------------------------------------------------------- |
|
501 | ----------------------------------------------------------------------- | |
483 |
|
502 |
@@ -3,12 +3,12 | |||||
3 | <!--The data in this file is primarily intended for consumption by Xilinx tools. |
|
3 | <!--The data in this file is primarily intended for consumption by Xilinx tools. | |
4 | The structure and the elements are likely to change over the next few releases. |
|
4 | The structure and the elements are likely to change over the next few releases. | |
5 | This means code written to parse this file will need to be revisited each subsequent release.--> |
|
5 | This means code written to parse this file will need to be revisited each subsequent release.--> | |
6 |
<application name="pn" timeStamp=" |
|
6 | <application name="pn" timeStamp="Wed Dec 1 15:45:26 2010"> | |
7 | <section name="Project Information" visible="false"> |
|
7 | <section name="Project Information" visible="false"> | |
8 |
<property name="ProjectID" value=" |
|
8 | <property name="ProjectID" value="144BAC8BCC020358A10E3C9EB2A797A8" type="project"/> | |
9 |
<property name="ProjectIteration" value=" |
|
9 | <property name="ProjectIteration" value="9" type="project"/> | |
10 | <property name="ProjectFile" value="/opt/GRLIB/grlib-gpl-1.1.0-b4104/designs/leon3-digilent-xc3s1600e/leon3mp.xise" type="project"/> |
|
10 | <property name="ProjectFile" value="/opt/GRLIB/grlib-gpl-1.1.0-b4104/designs/leon3-APB_LCD-digilent-xc3s1600e/leon3mp.xise" type="project"/> | |
11 |
<property name="ProjectCreationTimestamp" value="2010-1 |
|
11 | <property name="ProjectCreationTimestamp" value="2010-12-01T11:32:09" type="project"/> | |
12 | </section> |
|
12 | </section> | |
13 | <section name="Project Statistics" visible="true"> |
|
13 | <section name="Project Statistics" visible="true"> | |
14 | <property name="PROP_Enable_Message_Filtering" value="false" type="design"/> |
|
14 | <property name="PROP_Enable_Message_Filtering" value="false" type="design"/> | |
@@ -23,9 +23,9 This means code written to parse this fi | |||||
23 | <property name="PROP_Top_Level_Module_Type" value="HDL" type="design"/> |
|
23 | <property name="PROP_Top_Level_Module_Type" value="HDL" type="design"/> | |
24 | <property name="PROP_UseSmartGuide" value="false" type="design"/> |
|
24 | <property name="PROP_UseSmartGuide" value="false" type="design"/> | |
25 | <property name="PROP_UserConstraintEditorPreference" value="Text Editor" type="process"/> |
|
25 | <property name="PROP_UserConstraintEditorPreference" value="Text Editor" type="process"/> | |
26 |
<property name="PROP_intProjectCreationTimestamp" value="2010-1 |
|
26 | <property name="PROP_intProjectCreationTimestamp" value="2010-12-01T11:32:09" type="design"/> | |
27 |
<property name="PROP_intWbtProjectID" value=" |
|
27 | <property name="PROP_intWbtProjectID" value="144BAC8BCC020358A10E3C9EB2A797A8" type="design"/> | |
28 |
<property name="PROP_intWbtProjectIteration" value=" |
|
28 | <property name="PROP_intWbtProjectIteration" value="9" type="process"/> | |
29 | <property name="PROP_intWorkingDirLocWRTProjDir" value="Same" type="design"/> |
|
29 | <property name="PROP_intWorkingDirLocWRTProjDir" value="Same" type="design"/> | |
30 | <property name="PROP_intWorkingDirUsed" value="No" type="design"/> |
|
30 | <property name="PROP_intWorkingDirUsed" value="No" type="design"/> | |
31 | <property name="PROP_map_otherCmdLineOptions" value="-timing" type="process"/> |
|
31 | <property name="PROP_map_otherCmdLineOptions" value="-timing" type="process"/> | |
@@ -40,6 +40,7 This means code written to parse this fi | |||||
40 | <property name="PROP_xst_otherCmdLineOptions" value="-uc leon3mp.xcf" type="process"/> |
|
40 | <property name="PROP_xst_otherCmdLineOptions" value="-uc leon3mp.xcf" type="process"/> | |
41 | <property name="PROP_AutoTop" value="false" type="design"/> |
|
41 | <property name="PROP_AutoTop" value="false" type="design"/> | |
42 | <property name="PROP_DevFamily" value="Spartan3E" type="design"/> |
|
42 | <property name="PROP_DevFamily" value="Spartan3E" type="design"/> | |
|
43 | <property name="PROP_WriteDefaultPropToSourceProject" value="false" type="process"/> | |||
43 | <property name="PROP_xilxBitgCfg_GenOpt_MaskFile" value="true" type="process"/> |
|
44 | <property name="PROP_xilxBitgCfg_GenOpt_MaskFile" value="true" type="process"/> | |
44 | <property name="PROP_DevDevice" value="xc3s1600e" type="design"/> |
|
45 | <property name="PROP_DevDevice" value="xc3s1600e" type="design"/> | |
45 | <property name="PROP_DevFamilyPMName" value="spartan3e" type="design"/> |
|
46 | <property name="PROP_DevFamilyPMName" value="spartan3e" type="design"/> | |
@@ -48,7 +49,7 This means code written to parse this fi | |||||
48 | <property name="PROP_DevSpeed" value="-4" type="design"/> |
|
49 | <property name="PROP_DevSpeed" value="-4" type="design"/> | |
49 | <property name="PROP_PreferredLanguage" value="VHDL" type="design"/> |
|
50 | <property name="PROP_PreferredLanguage" value="VHDL" type="design"/> | |
50 | <property name="FILE_UCF" value="1" type="source"/> |
|
51 | <property name="FILE_UCF" value="1" type="source"/> | |
51 |
<property name="FILE_VHDL" value="2 |
|
52 | <property name="FILE_VHDL" value="302" type="source"/> | |
52 | </section> |
|
53 | </section> | |
53 | </application> |
|
54 | </application> | |
54 | </document> |
|
55 | </document> |
@@ -18,8 +18,9 | |||||
18 | ------------------------------------------------------------------------------- |
|
18 | ------------------------------------------------------------------------------- | |
19 | library IEEE; |
|
19 | library IEEE; | |
20 | use IEEE.STD_LOGIC_1164.ALL; |
|
20 | use IEEE.STD_LOGIC_1164.ALL; | |
21 |
|
21 | library lpp; | ||
22 |
|
22 | use lpp.lpp_ad_conv.all; | ||
|
23 | use lpp.general_purpose.Clk_divider; | |||
23 |
|
24 | |||
24 | entity AD7688_drvr is |
|
25 | entity AD7688_drvr is | |
25 | generic(ChanelCount : integer; |
|
26 | generic(ChanelCount : integer; | |
@@ -27,6 +28,7 entity AD7688_drvr is | |||||
27 | Port ( clk : in STD_LOGIC; |
|
28 | Port ( clk : in STD_LOGIC; | |
28 | reset : in STD_LOGIC; |
|
29 | reset : in STD_LOGIC; | |
29 | smplClk: in STD_LOGIC; |
|
30 | smplClk: in STD_LOGIC; | |
|
31 | DataReady : out std_logic; | |||
30 | smpout : out Samples_out(ChanelCount-1 downto 0); |
|
32 | smpout : out Samples_out(ChanelCount-1 downto 0); | |
31 | AD_in : in AD7688_in(ChanelCount-1 downto 0); |
|
33 | AD_in : in AD7688_in(ChanelCount-1 downto 0); | |
32 | AD_out : out AD7688_out); |
|
34 | AD_out : out AD7688_out); | |
@@ -34,21 +36,63 end AD7688_drvr; | |||||
34 |
|
36 | |||
35 | architecture ar_AD7688_drvr of AD7688_drvr is |
|
37 | architecture ar_AD7688_drvr of AD7688_drvr is | |
36 |
|
38 | |||
37 |
constant convTrigger : integer:= clkkHz*1 |
|
39 | constant convTrigger : integer:= clkkHz*16/10000; --tconv = 1.6µs | |
38 |
|
40 | |||
39 | signal i : integer range 0 to convTrigger :=0; |
|
41 | signal i : integer range 0 to convTrigger :=0; | |
|
42 | signal clk_int : std_logic; | |||
|
43 | signal smplClk_reg : std_logic; | |||
|
44 | signal cnv_int : std_logic; | |||
40 |
|
45 | |||
41 | begin |
|
46 | begin | |
42 |
|
47 | |||
|
48 | clkdiv: if clkkHz>=66000 generate | |||
|
49 | clkdivider: Clk_divider | |||
|
50 | generic map(clkkHz*1000,60000000) | |||
|
51 | Port map( clk ,reset,clk_int); | |||
|
52 | end generate; | |||
|
53 | ||||
|
54 | clknodiv: if clkkHz<66000 generate | |||
|
55 | nodiv: clk_int <= clk; | |||
|
56 | end generate; | |||
|
57 | ||||
|
58 | AD_out.CNV <= cnv_int; | |||
|
59 | AD_out.SCK <= clk_int; | |||
|
60 | ||||
|
61 | ||||
43 | sckgen: process(clk,reset) |
|
62 | sckgen: process(clk,reset) | |
44 | begin |
|
63 | begin | |
45 | if reset = '0' then |
|
64 | if reset = '0' then | |
46 | i <= 0; |
|
65 | i <= 0; | |
47 |
|
|
66 | cnv_int <= '0'; | |
|
67 | smplClk_reg <= '0'; | |||
48 | elsif clk'event and clk = '1' then |
|
68 | elsif clk'event and clk = '1' then | |
|
69 | if smplClk = '1' and smplClk_reg = '0' then | |||
|
70 | if i = convTrigger then | |||
|
71 | smplClk_reg <= '1'; | |||
|
72 | i <= 0; | |||
|
73 | cnv_int <= '0'; | |||
|
74 | else | |||
|
75 | i <= i+1; | |||
|
76 | cnv_int <= '1'; | |||
|
77 | end if; | |||
|
78 | elsif smplClk = '0' and smplClk_reg = '1' then | |||
|
79 | smplClk_reg <= '0'; | |||
|
80 | end if; | |||
49 | end if; |
|
81 | end if; | |
50 | end process; |
|
82 | end process; | |
51 |
|
83 | |||
52 |
|
84 | |||
|
85 | ||||
|
86 | spidrvr: AD7688_spi_if | |||
|
87 | generic map(ChanelCount) | |||
|
88 | Port map(clk_int,reset,cnv_int,DataReady,AD_in,smpout); | |||
|
89 | ||||
|
90 | ||||
|
91 | ||||
53 | end ar_AD7688_drvr; |
|
92 | end ar_AD7688_drvr; | |
54 |
|
93 | |||
|
94 | ||||
|
95 | ||||
|
96 | ||||
|
97 | ||||
|
98 |
@@ -16,13 +16,21 | |||||
16 | -- along with this program; if not, write to the Free Software |
|
16 | -- along with this program; if not, write to the Free Software | |
17 | -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
|
17 | -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
18 | ------------------------------------------------------------------------------- |
|
18 | ------------------------------------------------------------------------------- | |
|
19 | ||||
19 | library IEEE; |
|
20 | library IEEE; | |
20 | use IEEE.STD_LOGIC_1164.all; |
|
21 | use IEEE.STD_LOGIC_1164.all; | |
21 |
|
22 | library grlib; | ||
|
23 | use grlib.amba.all; | |||
|
24 | use grlib.stdlib.all; | |||
|
25 | use grlib.devices.all; | |||
22 |
|
26 | |||
23 |
|
27 | |||
24 | package lpp_ad_conv is |
|
28 | package lpp_ad_conv is | |
25 |
|
29 | |||
|
30 | ||||
|
31 | constant AD7688 : integer := 0; | |||
|
32 | constant ADS7886 : integer := 1; | |||
|
33 | ||||
26 |
|
34 | |||
27 | type AD7688_out is |
|
35 | type AD7688_out is | |
28 | record |
|
36 | record | |
@@ -40,19 +48,64 package lpp_ad_conv is | |||||
40 | type Samples_out is array(natural range <>) of std_logic_vector(15 downto 0); |
|
48 | type Samples_out is array(natural range <>) of std_logic_vector(15 downto 0); | |
41 |
|
49 | |||
42 | component AD7688_drvr is |
|
50 | component AD7688_drvr is | |
43 | generic(ChanelCount : integer; |
|
51 | generic(ChanelCount : integer; | |
44 |
|
|
52 | clkkHz : integer); | |
45 | Port ( clk : in STD_LOGIC; |
|
53 | Port ( clk : in STD_LOGIC; | |
46 | reset : in STD_LOGIC; |
|
54 | reset : in STD_LOGIC; | |
47 | smplClk: in STD_LOGIC; |
|
55 | smplClk: in STD_LOGIC; | |
|
56 | DataReady : out std_logic; | |||
48 | smpout : out Samples_out(ChanelCount-1 downto 0); |
|
57 | smpout : out Samples_out(ChanelCount-1 downto 0); | |
49 | AD_in : in AD7688_in(ChanelCount-1 downto 0); |
|
58 | AD_in : in AD7688_in(ChanelCount-1 downto 0); | |
50 | AD_out : out AD7688_out); |
|
59 | AD_out : out AD7688_out); | |
51 | end component; |
|
60 | end component; | |
52 |
|
61 | |||
53 |
|
62 | |||
|
63 | component AD7688_spi_if is | |||
|
64 | generic(ChanelCount : integer); | |||
|
65 | Port( clk : in STD_LOGIC; | |||
|
66 | reset : in STD_LOGIC; | |||
|
67 | cnv : in STD_LOGIC; | |||
|
68 | DataReady: out std_logic; | |||
|
69 | sdi : in AD7688_in(ChanelCount-1 downto 0); | |||
|
70 | smpout : out Samples_out(ChanelCount-1 downto 0) | |||
|
71 | ); | |||
|
72 | end component; | |||
54 |
|
73 | |||
55 |
|
74 | |||
|
75 | component lpp_apb_ad_conv | |||
|
76 | generic( | |||
|
77 | pindex : integer := 0; | |||
|
78 | paddr : integer := 0; | |||
|
79 | pmask : integer := 16#fff#; | |||
|
80 | pirq : integer := 0; | |||
|
81 | abits : integer := 8; | |||
|
82 | ChanelCount : integer := 1; | |||
|
83 | clkkHz : integer := 50000; | |||
|
84 | smpClkHz : integer := 100; | |||
|
85 | ADCref : integer := AD7688); | |||
|
86 | Port ( | |||
|
87 | clk : in STD_LOGIC; | |||
|
88 | reset : in STD_LOGIC; | |||
|
89 | apbi : in apb_slv_in_type; | |||
|
90 | apbo : out apb_slv_out_type; | |||
|
91 | AD_in : in AD7688_in(ChanelCount-1 downto 0); | |||
|
92 | AD_out : out AD7688_out); | |||
|
93 | end component; | |||
|
94 | ||||
|
95 | component ADS7886_drvr is | |||
|
96 | generic(ChanelCount : integer; | |||
|
97 | clkkHz : integer); | |||
|
98 | Port ( | |||
|
99 | clk : in STD_LOGIC; | |||
|
100 | reset : in STD_LOGIC; | |||
|
101 | smplClk : in STD_LOGIC; | |||
|
102 | DataReady : out std_logic; | |||
|
103 | smpout : out Samples_out(ChanelCount-1 downto 0); | |||
|
104 | AD_in : in AD7688_in(ChanelCount-1 downto 0); | |||
|
105 | AD_out : out AD7688_out | |||
|
106 | ); | |||
|
107 | end component; | |||
|
108 | ||||
56 |
|
109 | |||
57 | end lpp_ad_conv; |
|
110 | end lpp_ad_conv; | |
58 |
|
111 |
@@ -39,7 +39,7 constant LPP_MULTI_DIODE : amba_ | |||||
39 | constant LPP_LCD_CTRLR : amba_device_type := 16#005#; |
|
39 | constant LPP_LCD_CTRLR : amba_device_type := 16#005#; | |
40 | constant LPP_UART : amba_device_type := 16#006#; |
|
40 | constant LPP_UART : amba_device_type := 16#006#; | |
41 | constant LPP_CNA : amba_device_type := 16#007#; |
|
41 | constant LPP_CNA : amba_device_type := 16#007#; | |
42 |
|
42 | constant LPP_ADC_7688 : amba_device_type := 16#008#; | ||
43 |
|
43 | |||
44 | component APB_SIMPLE_DIODE is |
|
44 | component APB_SIMPLE_DIODE is | |
45 | generic ( |
|
45 | generic ( |
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