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temp : update ADC driver...
temp : update ADC driver - conversion part clocked by clk_49 (49.152 MHz) - cnv_clk = clk_49.152/100 with duty cycle of 50% - 3 period for each Ren, - Data sampling during the 2nd cycle of Ren, - each 2 data input, 1 data output (@)
pellion - - Load All Authors

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r521:ed390d662fa9 (MINI-LFR) WFP_MS-0-1-56 (LFR-EM) WFP_MS_1-1-56 JC
r594:a9702b7364d2 simu_with_Leon3
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run.do
26 lines | 868 B | text/x-stata | StataLexer
/ designs / Validation_CIC_LFR / run.do
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vcom -quiet -93 -work lpp ../../lib/lpp/dsp/cic/cic_pkg.vhd
vcom -quiet -93 -work lpp ../../lib/lpp/dsp/cic/cic.vhd
vcom -quiet -93 -work lpp ../../lib/lpp/dsp/cic/cic_integrator.vhd
vcom -quiet -93 -work lpp ../../lib/lpp/dsp/cic/cic_downsampler.vhd
vcom -quiet -93 -work lpp ../../lib/lpp/dsp/cic/cic_comb.vhd
vcom -quiet -93 -work lpp ../../lib/lpp/dsp/cic/cic_lfr.vhd
vcom -quiet -93 -work lpp ../../lib/lpp/dsp/cic/cic_lfr_control.vhd
vcom -quiet -93 -work lpp ../../lib/lpp/dsp/cic/cic_lfr_add_sub.vhd
vcom -quiet -93 -work lpp ../../lib/lpp/dsp/cic/cic_lfr_address_gen.vhd
vcom -quiet -93 -work lpp ../../lib/lpp/dsp/cic/cic_lfr_r2.vhd
vcom -quiet -93 -work lpp ../../lib/lpp/dsp/cic/cic_lfr_control_r2.vhd
vcom -quiet -93 -work work tb.vhd
vsim work.testbench
log -r *
do wave.do
run -all