##// END OF EJS Templates
cleaned file tree, added README
alexis -
r7:de2005838214 default
parent child
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@@ -1,10 +1,20
1 SCRIPTSDIR=scripts/
2 LIBDIR=lib/
3 BOARDSDIR=boards/
4 DESIGNSDIR=designs/
5
6
7
8
9
10
1 all: help
11 all: help
2
12
3 help:
13 help:
4 @echo
14 @echo
5 @echo " batch targets:"
15 @echo " batch targets:"
6 @echo
16 @echo
7 @echo " make Patch-GRLIB : install library into $(GRLIB)"
17 @echo " make Patch-GRLIB : install library into GRLIB at : $(GRLIB)"
8 @echo " make dist : create a tar file for using into an other computer"
18 @echo " make dist : create a tar file for using into an other computer"
9 @echo " make Patched-dist : create a tar file for with a patched grlib for using into an other computer"
19 @echo " make Patched-dist : create a tar file for with a patched grlib for using into an other computer"
10 @echo " make allGPL : add a GPL HEADER in all vhdl Files"
20 @echo " make allGPL : add a GPL HEADER in all vhdl Files"
@@ -13,19 +23,19 help:
13 @echo
23 @echo
14
24
15 allGPL:
25 allGPL:
16 sh lib/GPL_Patcher.sh -R
26 sh $(SCRIPTSDIR)/GPL_Patcher.sh -R
17
27
18 init: allGPL
28 init: allGPL
19 sh lib/lpp/vhdlsynPatcher.sh
29 sh $(SCRIPTSDIR)/vhdlsynPatcher.sh
20 sh lib/lpp/makeDirs.sh lib/lpp
30 sh $(SCRIPTSDIR)/makeDirs.sh lib/lpp
21
31
22
32
23 Patch-GRLIB: init doc
33 Patch-GRLIB: init doc
24 sh patch.sh $(GRLIB)
34 sh $(SCRIPTSDIR)/patch.sh $(GRLIB)
25
35
26
36
27 dist: init
37 dist: init
28 tar -cvzf ./../lpp-lib.tgz ./../lib_lpp/*
38 tar -cvzf ./../lpp-lib.tgz ./../VHD_Lib/*
29
39
30 Patched-dist: Patch-GRLIB
40 Patched-dist: Patch-GRLIB
31 tar -cvzf ./../lpp-patched-GRLIB.tgz $(GRLIB)/*
41 tar -cvzf ./../lpp-patched-GRLIB.tgz $(GRLIB)/*
@@ -1,4 +1,5
1 patch VENDOR Ids
1 x patch VENDOR Ids
2 Write a README
2 x Write a README
3 add app_simple_diode
3 x add app_simple_diode
4 add LCD_16x2_DRIVER.vhd
4 x add LCD_16x2_DRIVER.vhd
5 Write how_to_improve.pdf
@@ -38,7 +38,7 PROJECT_NUMBER = 1.0
38 # If a relative path is entered, it will be relative to the location
38 # If a relative path is entered, it will be relative to the location
39 # where doxygen was started. If left blank the current directory will be used.
39 # where doxygen was started. If left blank the current directory will be used.
40
40
41 OUTPUT_DIRECTORY = doc
41 OUTPUT_DIRECTORY = ../../doc/
42
42
43 # If the CREATE_SUBDIRS tag is set to YES, then doxygen will create
43 # If the CREATE_SUBDIRS tag is set to YES, then doxygen will create
44 # 4096 sub-directories (in 2 levels) under the output directory of each output
44 # 4096 sub-directories (in 2 levels) under the output directory of each output
@@ -121,23 +121,6 component LCD_CLK_GENERATOR is
121 clk_1us : out STD_LOGIC);
121 clk_1us : out STD_LOGIC);
122 end component;
122 end component;
123
123
124 component AMBA_LCD_16x2_DRIVER is
125 Port ( reset : in STD_LOGIC;
126 clk : in STD_LOGIC;
127 Bp0 : in STD_LOGIC;
128 Bp1 : in STD_LOGIC;
129 Bp2 : in STD_LOGIC;
130 LCD_data : out STD_LOGIC_VECTOR (7 downto 0);
131 LCD_RS : out STD_LOGIC;
132 LCD_RW : out STD_LOGIC;
133 LCD_E : out STD_LOGIC;
134 LCD_RET : out STD_LOGIC;
135 LCD_CS1 : out STD_LOGIC;
136 LCD_CS2 : out STD_LOGIC;
137 SF_CE0 : out std_logic
138 );
139 end component;
140
141 component LCD_16x2_ENGINE is
124 component LCD_16x2_ENGINE is
142 generic(OSC_freqKHz : integer := 50000);
125 generic(OSC_freqKHz : integer := 50000);
143 Port ( clk : in STD_LOGIC;
126 Port ( clk : in STD_LOGIC;
@@ -151,23 +134,4 component LCD_16x2_ENGINE is
151 end component;
134 end component;
152
135
153
136
154 component AMBA_LCD_16x2_DRIVER is
155 Port ( reset : in STD_LOGIC;
156 clk : in STD_LOGIC;
157 Bp0 : in STD_LOGIC;
158 Bp1 : in STD_LOGIC;
159 Bp2 : in STD_LOGIC;
160 LCD_data : out STD_LOGIC_VECTOR (7 downto 0);
161 LCD_RS : out STD_LOGIC;
162 LCD_RW : out STD_LOGIC;
163 LCD_E : out STD_LOGIC;
164 LCD_RET : out STD_LOGIC;
165 LCD_CS1 : out STD_LOGIC;
166 LCD_CS2 : out STD_LOGIC;
167 SF_CE0 : out std_logic
168 );
169 end component;
170
171
172
173 end;
137 end;
@@ -1,6 +1,7
1 amba_lcd_16x2_ctrlr.vhd
1 amba_lcd_16x2_ctrlr.vhd
2 FRAME_CLK.vhd
2 FRAME_CLK.vhd
3 LCD_16x2_CFG.vhd
3 LCD_16x2_CFG.vhd
4 LCD_16x2_DRVR.vhd
4 LCD_16x2_ENGINE.vhd
5 LCD_16x2_ENGINE.vhd
5 LCD_2x16_DRIVER.vhd
6 LCD_2x16_DRIVER.vhd
6 LCD_CLK_GENERATOR.vhd
7 LCD_CLK_GENERATOR.vhd
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