##// END OF EJS Templates
temp
pellion -
r183:cf9b1db95735 paul
parent child
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@@ -1,11 +1,11
1 ./amba_lcd_16x2_ctrlr
1 ./amba_lcd_16x2_ctrlr
2 ./dsp/iir_filter
3 ./dsp/lpp_downsampling
4 ./dsp/lpp_fft
5 ./general_purpose
2 ./general_purpose
6 ./general_purpose/lpp_AMR
3 ./general_purpose/lpp_AMR
7 ./general_purpose/lpp_balise
4 ./general_purpose/lpp_balise
8 ./general_purpose/lpp_delay
5 ./general_purpose/lpp_delay
6 ./dsp/iir_filter
7 ./dsp/lpp_downsampling
8 ./dsp/lpp_fft
9 ./lfr_time_management
9 ./lfr_time_management
10 ./lpp_ad_Conv
10 ./lpp_ad_Conv
11 ./lpp_amba
11 ./lpp_amba
@@ -117,4 +117,4 BEGIN
117 STD_LOGIC_VECTOR(UNSIGNED(counter));
117 STD_LOGIC_VECTOR(UNSIGNED(counter));
118
118
119
119
120 END ar_RAM_CTRLR_v2;
120 END ar_RAM_CTRLR_v2; No newline at end of file
@@ -164,11 +164,11 BEGIN
164 END IF;
164 END IF;
165
165
166 END IF;
166 END IF;
167 apbo.pconfig <= pconfig;
168 END PROCESS;
167 END PROCESS;
169
168
170 apbo.prdata <= Rdata WHEN apbi.penable = '1';
169 apbo.prdata <= Rdata ;--WHEN apbi.penable = '1';
171 coarse_time <= r.coarse_time;
170 coarse_time <= r.coarse_time;
172 fine_time <= r.fine_time;
171 fine_time <= r.fine_time;
172 apbo.pconfig <= pconfig;
173
173
174 END Behavioral;
174 END Behavioral; No newline at end of file
@@ -172,7 +172,7 BEGIN
172 --shift_reg(l)(15) <= sdo(l);
172 --shift_reg(l)(15) <= sdo(l);
173 --shift_reg(l)(14 DOWNTO 0) <= shift_reg(l)(15 DOWNTO 1);
173 --shift_reg(l)(14 DOWNTO 0) <= shift_reg(l)(15 DOWNTO 1);
174 shift_reg(l)(0) <= sdo(l);
174 shift_reg(l)(0) <= sdo(l);
175 shift_reg(l)(15 DOWNTO 1) <= shift_reg(l)(14 DOWNTO 0);
175 shift_reg(l)(14 DOWNTO 1) <= shift_reg(l)(13 DOWNTO 0);
176 END LOOP;
176 END LOOP;
177 SCK <= '0';
177 SCK <= '0';
178 ELSE
178 ELSE
@@ -194,4 +194,3 BEGIN
194 END PROCESS;
194 END PROCESS;
195
195
196 END ar_AD7688_drvr;
196 END ar_AD7688_drvr;
197
@@ -405,4 +405,4 BEGIN -- beh
405 apbo.prdata <= prdata;
405 apbo.prdata <= prdata;
406
406
407
407
408 END beh;
408 END beh; No newline at end of file
@@ -22,10 +22,10 USE GRLIB.DMA2AHB_Package.ALL;
22 ENTITY lpp_top_lfr_wf_picker IS
22 ENTITY lpp_top_lfr_wf_picker IS
23 GENERIC (
23 GENERIC (
24 hindex : INTEGER := 2;
24 hindex : INTEGER := 2;
25 pindex : INTEGER := 4;
25 pindex : INTEGER := 15;
26 paddr : INTEGER := 4;
26 paddr : INTEGER := 15;
27 pmask : INTEGER := 16#fff#;
27 pmask : INTEGER := 16#fff#;
28 pirq : INTEGER := 0;
28 pirq : INTEGER := 15;
29 tech : INTEGER := 0;
29 tech : INTEGER := 0;
30 nb_burst_available_size : INTEGER := 11;
30 nb_burst_available_size : INTEGER := 11;
31 nb_snapshot_param_size : INTEGER := 11;
31 nb_snapshot_param_size : INTEGER := 11;
@@ -122,6 +122,14 ARCHITECTURE tb OF lpp_top_lfr_wf_picker
122
122
123 BEGIN
123 BEGIN
124
124
125 ready_matrix_f0_0 <= '0';
126 ready_matrix_f0_1 <= '0';
127 ready_matrix_f1 <= '0';
128 ready_matrix_f2 <= '0';
129 error_anticipating_empty_fifo <= '0';
130 error_bad_component_error <= '0';
131 debug_reg <= (others => '0');
132
125 lpp_top_apbreg_1: lpp_top_apbreg
133 lpp_top_apbreg_1: lpp_top_apbreg
126 GENERIC MAP (
134 GENERIC MAP (
127 nb_burst_available_size => nb_burst_available_size,
135 nb_burst_available_size => nb_burst_available_size,
@@ -240,4 +248,4 BEGIN
240 addr_data_f1 => addr_data_f1,
248 addr_data_f1 => addr_data_f1,
241 addr_data_f2 => addr_data_f2,
249 addr_data_f2 => addr_data_f2,
242 addr_data_f3 => addr_data_f3);
250 addr_data_f3 => addr_data_f3);
243 END tb;
251 END tb; No newline at end of file
@@ -84,7 +84,7 ARCHITECTURE Behavioral OF lpp_waveform_
84 SEND_TIME_1, WAIT_TIME_1,
84 SEND_TIME_1, WAIT_TIME_1,
85 SEND_5_TIME,
85 SEND_5_TIME,
86 SEND_DATA, WAIT_DATA);
86 SEND_DATA, WAIT_DATA);
87 SIGNAL state : state_DMAWriteBurst := IDLE;
87 SIGNAL state : state_DMAWriteBurst;
88 -----------------------------------------------------------------------------
88 -----------------------------------------------------------------------------
89 -- CONTROL
89 -- CONTROL
90 SIGNAL sel_data_s : STD_LOGIC_VECTOR(1 DOWNTO 0);
90 SIGNAL sel_data_s : STD_LOGIC_VECTOR(1 DOWNTO 0);
@@ -127,7 +127,7 BEGIN
127 GENERIC MAP (
127 GENERIC MAP (
128 hindex => hindex,
128 hindex => hindex,
129 vendorid => VENDOR_LPP,
129 vendorid => VENDOR_LPP,
130 deviceid => 0,
130 deviceid => 10,
131 version => 0,
131 version => 0,
132 syncrst => 1,
132 syncrst => 1,
133 boundary => 1) -- FIX 11/01/2013
133 boundary => 1) -- FIX 11/01/2013
@@ -360,4 +360,4 BEGIN
360 -----------------------------------------------------------------------------
360 -----------------------------------------------------------------------------
361
361
362
362
363 END Behavioral;
363 END Behavioral; No newline at end of file
@@ -36,7 +36,6 ARCHITECTURE beh OF lpp_waveform_snapsho
36 SIGNAL coarse_time_0_r : STD_LOGIC;
36 SIGNAL coarse_time_0_r : STD_LOGIC;
37 SIGNAL start_snapshot_f2_temp : STD_LOGIC;
37 SIGNAL start_snapshot_f2_temp : STD_LOGIC;
38 SIGNAL start_snapshot_fothers_temp : STD_LOGIC;
38 SIGNAL start_snapshot_fothers_temp : STD_LOGIC;
39 SIGNAL start_snapshot_fothers_temp2 : STD_LOGIC;
40 BEGIN -- beh
39 BEGIN -- beh
41
40
42 PROCESS (clk, rstn)
41 PROCESS (clk, rstn)
@@ -50,7 +49,6 BEGIN -- beh
50 coarse_time_0_r <= '0';
49 coarse_time_0_r <= '0';
51 start_snapshot_f2_temp <= '0';
50 start_snapshot_f2_temp <= '0';
52 start_snapshot_fothers_temp <= '0';
51 start_snapshot_fothers_temp <= '0';
53 start_snapshot_fothers_temp2 <= '0';
54 ELSIF clk'EVENT AND clk = '1' THEN
52 ELSIF clk'EVENT AND clk = '1' THEN
55 IF counter_delta_snapshot = UNSIGNED(delta_snapshot) THEN
53 IF counter_delta_snapshot = UNSIGNED(delta_snapshot) THEN
56 start_snapshot_f2_temp <= '1';
54 start_snapshot_f2_temp <= '1';
@@ -113,4 +111,4 BEGIN -- beh
113 END IF;
111 END IF;
114 END PROCESS;
112 END PROCESS;
115
113
116 END beh;
114 END beh; No newline at end of file
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