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update test design Validation_CIC_LFR (and lib\lpp\chirp simulation IP)
pellion -
r634:b5a2eca6bf42 simu_with_Leon3
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1 #GRLIB=../..
1 #GRLIB=../..
2 VHDLIB=../..
2 VHDLIB=../..
3 SCRIPTSDIR=$(VHDLIB)/scripts/
3 SCRIPTSDIR=$(VHDLIB)/scripts/
4 GRLIB := $(shell sh $(VHDLIB)/scripts/lpp_relpath.sh)
4 GRLIB := $(shell sh $(VHDLIB)/scripts/lpp_relpath.sh)
5 TOP=leon3mp
5 TOP=leon3mp
6 BOARD=em-LeonLPP-A3PE3kL-v3-core1
6 BOARD=em-LeonLPP-A3PE3kL-v3-core1
7 include $(GRLIB)/boards/$(BOARD)/Makefile.inc
7 #include $(GRLIB)/boards/$(BOARD)/Makefile.inc
8 DEVICE=$(PART)-$(PACKAGE)$(SPEED)
8 DEVICE=$(PART)-$(PACKAGE)$(SPEED)
9 UCF=$(GRLIB)/boards/$(BOARD)/$(TOP).ucf
9 UCF=$(GRLIB)/boards/$(BOARD)/$(TOP).ucf
10 QSF=$(GRLIB)/boards/$(BOARD)/$(TOP).qsf
10 QSF=$(GRLIB)/boards/$(BOARD)/$(TOP).qsf
11 EFFORT=high
11 EFFORT=high
12 XSTOPT=
12 XSTOPT=
13 SYNPOPT="set_option -pipe 0; set_option -retiming 0; set_option -write_apr_constraint 0"
13 SYNPOPT="set_option -pipe 0; set_option -retiming 0; set_option -write_apr_constraint 0"
14 #VHDLSYNFILES=config.vhd ahbrom.vhd leon3mp.vhd
14 #VHDLSYNFILES=config.vhd ahbrom.vhd leon3mp.vhd
15 VHDLSYNFILES=
15 VHDLSYNFILES=
16 VHDLSIMFILES= tb.vhd
16 VHDLSIMFILES= tb.vhd
17 SIMTOP=testbench
17 SIMTOP=testbench
18 #SDCFILE=$(GRLIB)/boards/$(BOARD)/synplify.sdc
18 #SDCFILE=$(GRLIB)/boards/$(BOARD)/synplify.sdc
19 #SDC=$(GRLIB)/boards/$(BOARD)/leon3mp.sdc
19 #SDC=$(GRLIB)/boards/$(BOARD)/leon3mp.sdc
20 PDC=$(GRLIB)/boards/$(BOARD)/em-LeonLPP-A3PE3kL.pdc
20 PDC=$(GRLIB)/boards/$(BOARD)/em-LeonLPP-A3PE3kL.pdc
21 BITGEN=$(GRLIB)/boards/$(BOARD)/default.ut
21 BITGEN=$(GRLIB)/boards/$(BOARD)/default.ut
22 CLEAN=soft-clean
22 CLEAN=soft-clean
23
23
24 TECHLIBS = proasic3e
24 TECHLIBS = proasic3e
25
25
26 LIBSKIP = core1553bbc core1553brm core1553brt gr1553 corePCIF \
26 LIBSKIP = core1553bbc core1553brm core1553brt gr1553 corePCIF \
27 tmtc openchip hynix ihp gleichmann micron usbhc
27 tmtc openchip hynix ihp gleichmann micron usbhc
28
28
29 DIRSKIP = b1553 pcif leon2 leon2ft crypto satcan ddr usb ata i2c \
29 DIRSKIP = b1553 pcif leon2 leon2ft crypto satcan ddr usb ata i2c \
30 pci grusbhc haps slink ascs pwm coremp7 spi ac97 \
30 pci grusbhc haps slink ascs pwm coremp7 spi ac97 \
31 ./amba_lcd_16x2_ctrlr \
31 ./amba_lcd_16x2_ctrlr \
32 ./general_purpose/lpp_AMR \
32 ./general_purpose/lpp_AMR \
33 ./general_purpose/lpp_balise \
33 ./general_purpose/lpp_balise \
34 ./general_purpose/lpp_delay \
34 ./general_purpose/lpp_delay \
35 ./lpp_bootloader \
35 ./lpp_bootloader \
36 ./lpp_cna \
36 ./lpp_cna \
37 ./lpp_uart \
37 ./lpp_uart \
38 ./lpp_usb \
38 ./lpp_usb \
39 ./dsp/lpp_fft_rtax \
39 ./dsp/lpp_fft_rtax \
40
40
41 FILESKIP = i2cmst.vhd \
41 FILESKIP = i2cmst.vhd \
42 APB_MULTI_DIODE.vhd \
42 APB_MULTI_DIODE.vhd \
43 APB_MULTI_DIODE.vhd \
43 APB_MULTI_DIODE.vhd \
44 Top_MatrixSpec.vhd \
44 Top_MatrixSpec.vhd \
45 APB_FFT.vhd \
45 APB_FFT.vhd \
46 lpp_lfr_apbreg.vhd \
46 lpp_lfr_apbreg.vhd \
47 CoreFFT.vhd
47 CoreFFT.vhd
48
48
49 include $(GRLIB)/bin/Makefile
49 include $(GRLIB)/bin/Makefile
50 include $(GRLIB)/software/leon3/Makefile
50 include $(GRLIB)/software/leon3/Makefile
51
51
52 ################## project specific targets ##########################
52 ################## project specific targets ##########################
53
53
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@@ -1,26 +1,29
1 vcom -quiet -93 -work lpp ../../lib/lpp/dsp/chirp/chirp_pkg.vhd
2 vcom -quiet -93 -work lpp ../../lib/lpp/dsp/chirp/chirp.vhd
3
1 vcom -quiet -93 -work lpp ../../lib/lpp/dsp/cic/cic_pkg.vhd
4 vcom -quiet -93 -work lpp ../../lib/lpp/dsp/cic/cic_pkg.vhd
2
5
3 vcom -quiet -93 -work lpp ../../lib/lpp/dsp/cic/cic.vhd
6 vcom -quiet -93 -work lpp ../../lib/lpp/dsp/cic/cic.vhd
4 vcom -quiet -93 -work lpp ../../lib/lpp/dsp/cic/cic_integrator.vhd
7 vcom -quiet -93 -work lpp ../../lib/lpp/dsp/cic/cic_integrator.vhd
5 vcom -quiet -93 -work lpp ../../lib/lpp/dsp/cic/cic_downsampler.vhd
8 vcom -quiet -93 -work lpp ../../lib/lpp/dsp/cic/cic_downsampler.vhd
6 vcom -quiet -93 -work lpp ../../lib/lpp/dsp/cic/cic_comb.vhd
9 vcom -quiet -93 -work lpp ../../lib/lpp/dsp/cic/cic_comb.vhd
7
10
8
11
9 vcom -quiet -93 -work lpp ../../lib/lpp/dsp/cic/cic_lfr.vhd
12 vcom -quiet -93 -work lpp ../../lib/lpp/dsp/cic/cic_lfr.vhd
10 vcom -quiet -93 -work lpp ../../lib/lpp/dsp/cic/cic_lfr_control.vhd
13 vcom -quiet -93 -work lpp ../../lib/lpp/dsp/cic/cic_lfr_control.vhd
11 vcom -quiet -93 -work lpp ../../lib/lpp/dsp/cic/cic_lfr_add_sub.vhd
14 vcom -quiet -93 -work lpp ../../lib/lpp/dsp/cic/cic_lfr_add_sub.vhd
12 vcom -quiet -93 -work lpp ../../lib/lpp/dsp/cic/cic_lfr_address_gen.vhd
15 vcom -quiet -93 -work lpp ../../lib/lpp/dsp/cic/cic_lfr_address_gen.vhd
13
16
14 vcom -quiet -93 -work lpp ../../lib/lpp/dsp/cic/cic_lfr_r2.vhd
17 vcom -quiet -93 -work lpp ../../lib/lpp/dsp/cic/cic_lfr_r2.vhd
15 vcom -quiet -93 -work lpp ../../lib/lpp/dsp/cic/cic_lfr_control_r2.vhd
18 vcom -quiet -93 -work lpp ../../lib/lpp/dsp/cic/cic_lfr_control_r2.vhd
16
19
17 vcom -quiet -93 -work work tb.vhd
20 vcom -quiet -93 -work work tb.vhd
18
21
19 vsim work.testbench
22 vsim work.testbench
20
23
21 log -r *
24 log -r *
22
25
23 do wave.do
26 do wave.do
24
27
25 run -all
28 run -all
26
29
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@@ -1,271 +1,274
1
1
2 LIBRARY ieee;
2 LIBRARY ieee;
3 USE ieee.std_logic_1164.ALL;
3 USE ieee.std_logic_1164.ALL;
4 USE IEEE.MATH_REAL.ALL;
4 USE IEEE.MATH_REAL.ALL;
5 USE ieee.numeric_std.ALL;
5 USE ieee.numeric_std.ALL;
6
6
7 LIBRARY lpp;
7 LIBRARY lpp;
8 USE lpp.cic_pkg.ALL;
8 USE lpp.cic_pkg.ALL;
9 USE lpp.data_type_pkg.ALL;
9 USE lpp.data_type_pkg.ALL;
10 USE lpp.chirp_pkg.ALL;
10 USE lpp.chirp_pkg.ALL;
11
11
12 ENTITY testbench IS
12 ENTITY testbench IS
13 END;
13 END;
14
14
15 ARCHITECTURE behav OF testbench IS
15 ARCHITECTURE behav OF testbench IS
16
16
17 SIGNAL clk : STD_LOGIC := '0';
17 SIGNAL clk : STD_LOGIC := '0';
18 SIGNAL clk_24k : STD_LOGIC := '0';
18 SIGNAL clk_24k : STD_LOGIC := '0';
19 SIGNAL clk_24k_r : STD_LOGIC := '0';
19 SIGNAL clk_24k_r : STD_LOGIC := '0';
20 SIGNAL rstn : STD_LOGIC;
20 SIGNAL rstn : STD_LOGIC;
21 SIGNAL run : STD_LOGIC;
21 SIGNAL run : STD_LOGIC;
22 SIGNAL data_in : STD_LOGIC_VECTOR(15 DOWNTO 0);
22 SIGNAL data_in : STD_LOGIC_VECTOR(15 DOWNTO 0);
23 SIGNAL data_gen : STD_LOGIC_VECTOR(15 DOWNTO 0);
23 SIGNAL data_gen : STD_LOGIC_VECTOR(15 DOWNTO 0);
24 SIGNAL data_in_v_r2 : sample_vector(7 DOWNTO 0,15 DOWNTO 0);
24 SIGNAL data_in_v_r2 : sample_vector(7 DOWNTO 0,15 DOWNTO 0);
25 SIGNAL data_in_v : sample_vector(5 DOWNTO 0,15 DOWNTO 0);
25 SIGNAL data_in_v : sample_vector(5 DOWNTO 0,15 DOWNTO 0);
26 SIGNAL data_in_valid : STD_LOGIC;
26 SIGNAL data_in_valid : STD_LOGIC;
27
27
28 CONSTANT DATA_VALUE_0 : STD_LOGIC_VECTOR(15 DOWNTO 0) := X"7FFF";
28 CONSTANT DATA_VALUE_0 : STD_LOGIC_VECTOR(15 DOWNTO 0) := X"7FFF";
29 CONSTANT DATA_VALUE_1 : STD_LOGIC_VECTOR(15 DOWNTO 0) := X"FFFF";
29 CONSTANT DATA_VALUE_1 : STD_LOGIC_VECTOR(15 DOWNTO 0) := X"FFFF";
30 CONSTANT DATA_VALUE_2 : STD_LOGIC_VECTOR(15 DOWNTO 0) := X"8000";
30 CONSTANT DATA_VALUE_2 : STD_LOGIC_VECTOR(15 DOWNTO 0) := X"8000";
31 CONSTANT DATA_VALUE_3 : STD_LOGIC_VECTOR(15 DOWNTO 0) := X"0010";
31 CONSTANT DATA_VALUE_3 : STD_LOGIC_VECTOR(15 DOWNTO 0) := X"0010";
32 CONSTANT DATA_VALUE_4 : STD_LOGIC_VECTOR(15 DOWNTO 0) := X"0020";
32 CONSTANT DATA_VALUE_4 : STD_LOGIC_VECTOR(15 DOWNTO 0) := X"0020";
33 CONSTANT DATA_VALUE_5 : STD_LOGIC_VECTOR(15 DOWNTO 0) := X"0040";
33 CONSTANT DATA_VALUE_5 : STD_LOGIC_VECTOR(15 DOWNTO 0) := X"0040";
34
34
35 SIGNAL data_in_0_s : STD_LOGIC_VECTOR(15 DOWNTO 0);
35 SIGNAL data_in_0_s : STD_LOGIC_VECTOR(15 DOWNTO 0);
36
36
37 SIGNAL data_in_0 : STD_LOGIC_VECTOR(15 DOWNTO 0);
37 SIGNAL data_in_0 : STD_LOGIC_VECTOR(15 DOWNTO 0);
38 SIGNAL data_in_1 : STD_LOGIC_VECTOR(15 DOWNTO 0);
38 SIGNAL data_in_1 : STD_LOGIC_VECTOR(15 DOWNTO 0);
39 SIGNAL data_in_2 : STD_LOGIC_VECTOR(15 DOWNTO 0);
39 SIGNAL data_in_2 : STD_LOGIC_VECTOR(15 DOWNTO 0);
40 SIGNAL data_in_3 : STD_LOGIC_VECTOR(15 DOWNTO 0);
40 SIGNAL data_in_3 : STD_LOGIC_VECTOR(15 DOWNTO 0);
41 SIGNAL data_in_4 : STD_LOGIC_VECTOR(15 DOWNTO 0);
41 SIGNAL data_in_4 : STD_LOGIC_VECTOR(15 DOWNTO 0);
42 SIGNAL data_in_5 : STD_LOGIC_VECTOR(15 DOWNTO 0);
42 SIGNAL data_in_5 : STD_LOGIC_VECTOR(15 DOWNTO 0);
43
43
44 SIGNAL data_in_0_temp : STD_LOGIC_VECTOR(15 DOWNTO 0);
44 SIGNAL data_in_0_temp : STD_LOGIC_VECTOR(15 DOWNTO 0);
45 SIGNAL data_in_1_temp : STD_LOGIC_VECTOR(15 DOWNTO 0);
45 SIGNAL data_in_1_temp : STD_LOGIC_VECTOR(15 DOWNTO 0);
46 SIGNAL data_in_2_temp : STD_LOGIC_VECTOR(15 DOWNTO 0);
46 SIGNAL data_in_2_temp : STD_LOGIC_VECTOR(15 DOWNTO 0);
47 SIGNAL data_in_3_temp : STD_LOGIC_VECTOR(15 DOWNTO 0);
47 SIGNAL data_in_3_temp : STD_LOGIC_VECTOR(15 DOWNTO 0);
48 SIGNAL data_in_4_temp : STD_LOGIC_VECTOR(15 DOWNTO 0);
48 SIGNAL data_in_4_temp : STD_LOGIC_VECTOR(15 DOWNTO 0);
49 SIGNAL data_in_5_temp : STD_LOGIC_VECTOR(15 DOWNTO 0);
49 SIGNAL data_in_5_temp : STD_LOGIC_VECTOR(15 DOWNTO 0);
50
50
51 SIGNAL param_r2 : STD_LOGIC;
51 SIGNAL param_r2 : STD_LOGIC;
52
52
53 BEGIN
53 SIGNAL chirp_done : STD_LOGIC;
54
54
55
55 BEGIN
56
56
57 clk <= NOT clk AFTER 5 ns;
57
58 clk_24k <= NOT clk_24k AFTER 20345 ns;
58
59
59 clk <= NOT clk AFTER 5 ns;
60 PROCESS (clk, rstn)
60 clk_24k <= NOT clk_24k AFTER 20345 ns;
61 BEGIN -- PROCESS
61
62 IF rstn = '0' THEN -- asynchronous reset (active low)
62 PROCESS (clk, rstn)
63 data_in_valid <= '0';
63 BEGIN -- PROCESS
64 clk_24k_r <= '0';
64 IF rstn = '0' THEN -- asynchronous reset (active low)
65 ELSIF clk'event AND clk = '1' THEN -- rising clock edge
65 data_in_valid <= '0';
66 clk_24k_r <= clk_24k;
66 clk_24k_r <= '0';
67 IF clk_24k = '1' AND clk_24k_r = '0' THEN
67 ELSIF clk'event AND clk = '1' THEN -- rising clock edge
68 data_in_valid <= '1';
68 clk_24k_r <= clk_24k;
69 ELSE
69 IF clk_24k = '1' AND clk_24k_r = '0' THEN
70 data_in_valid <= '0';
70 data_in_valid <= '1';
71 END IF;
71 ELSE
72 END IF;
72 data_in_valid <= '0';
73 END PROCESS;
73 END IF;
74
74 END IF;
75
75 END PROCESS;
76 PROCESS
76
77 BEGIN -- PROCESS
77
78 WAIT UNTIL clk = '1';
78 PROCESS
79 rstn <= '0';
79 BEGIN -- PROCESS
80 run <= '0';
80 WAIT UNTIL clk = '1';
81 param_r2 <= '1';
81 rstn <= '0';
82 WAIT UNTIL clk = '1';
82 run <= '0';
83 rstn <= '1';
83 param_r2 <= '1';
84 WAIT UNTIL clk = '1';
84 WAIT UNTIL clk = '1';
85 WAIT UNTIL clk = '1';
85 rstn <= '1';
86 run <= '1';
86 WAIT UNTIL clk = '1';
87 WAIT UNTIL clk = '1';
87 WAIT UNTIL clk = '1';
88
88 run <= '1';
89 WAIT FOR 30 ms;
89 WAIT UNTIL clk = '1';
90 param_r2 <= '0';
90
91
91 WAIT FOR 30 ms;
92 WAIT FOR 30 ms;
92 param_r2 <= '0';
93 REPORT "*** END simulation ***" SEVERITY failure;
93
94 WAIT;
94 WAIT UNTIL chirp_done = '1';
95 END PROCESS;
95 REPORT "*** END simulation ***" SEVERITY failure;
96 -----------------------------------------------------------------------------
96 WAIT;
97 cic_lfr_1: cic_lfr
97 END PROCESS;
98 GENERIC MAP (
98 -----------------------------------------------------------------------------
99 tech => 0,
99 cic_lfr_1: cic_lfr
100 use_RAM_nCEL => 0)
100 GENERIC MAP (
101 PORT MAP (
101 tech => 0,
102 clk => clk,
102 use_RAM_nCEL => 0)
103 rstn => rstn,
103 PORT MAP (
104 run => run,
104 clk => clk,
105 data_in => data_in_v,
105 rstn => rstn,
106 data_in_valid => data_in_valid,
106 run => run,
107 data_out_16 => OPEN,
107 data_in => data_in_v,
108 data_out_16_valid => OPEN,
108 data_in_valid => data_in_valid,
109 data_out_256 => OPEN,
109 data_out_16 => OPEN,
110 data_out_256_valid => OPEN);
110 data_out_16_valid => OPEN,
111 -----------------------------------------------------------------------------
111 data_out_256 => OPEN,
112 cic_lfr_r2_1: cic_lfr_r2
112 data_out_256_valid => OPEN);
113 GENERIC MAP (
113 -----------------------------------------------------------------------------
114 tech => 0,
114 cic_lfr_r2_1: cic_lfr_r2
115 use_RAM_nCEL => 0)
115 GENERIC MAP (
116 PORT MAP (
116 tech => 0,
117 clk => clk,
117 use_RAM_nCEL => 0)
118 rstn => rstn,
118 PORT MAP (
119 run => run,
119 clk => clk,
120 param_r2 => param_r2,
120 rstn => rstn,
121 data_in => data_in_v_r2,
121 run => run,
122 data_in_valid => data_in_valid,
122 param_r2 => param_r2,
123 data_out_16 => OPEN,
123 data_in => data_in_v_r2,
124 data_out_16_valid => OPEN,
124 data_in_valid => data_in_valid,
125 data_out_256 => OPEN,
125 data_out_16 => OPEN,
126 data_out_256_valid => OPEN);
126 data_out_16_valid => OPEN,
127
127 data_out_256 => OPEN,
128 -----------------------------------------------------------------------------
128 data_out_256_valid => OPEN);
129 all_bit_r2: FOR J IN 15 DOWNTO 0 GENERATE
129
130 data_in_v_r2(0,J) <= data_in_0(J);
130 -----------------------------------------------------------------------------
131 data_in_v_r2(1,J) <= data_in_1(J);
131 all_bit_r2: FOR J IN 15 DOWNTO 0 GENERATE
132 data_in_v_r2(2,J) <= data_in_2(J);
132 data_in_v_r2(0,J) <= data_in_0(J);
133 data_in_v_r2(3,J) <= data_in_3(J);
133 data_in_v_r2(1,J) <= data_in_1(J);
134 data_in_v_r2(4,J) <= data_in_4(J);
134 data_in_v_r2(2,J) <= data_in_2(J);
135 data_in_v_r2(5,J) <= data_in_5(J);
135 data_in_v_r2(3,J) <= data_in_3(J);
136 data_in_v_r2(6,J) <= data_in_0(J);
136 data_in_v_r2(4,J) <= data_in_4(J);
137 data_in_v_r2(7,J) <= data_in_0(J);
137 data_in_v_r2(5,J) <= data_in_5(J);
138 END GENERATE all_bit_r2;
138 data_in_v_r2(6,J) <= data_in_0(J);
139 -----------------------------------------------------------------------------
139 data_in_v_r2(7,J) <= data_in_0(J);
140 all_bit: FOR J IN 15 DOWNTO 0 GENERATE
140 END GENERATE all_bit_r2;
141 data_in_v(0,J) <= data_in_0(J);
141 -----------------------------------------------------------------------------
142 data_in_v(1,J) <= data_in_1(J);
142 all_bit: FOR J IN 15 DOWNTO 0 GENERATE
143 data_in_v(2,J) <= data_in_2(J);
143 data_in_v(0,J) <= data_in_0(J);
144 data_in_v(3,J) <= data_in_3(J);
144 data_in_v(1,J) <= data_in_1(J);
145 data_in_v(4,J) <= data_in_4(J);
145 data_in_v(2,J) <= data_in_2(J);
146 data_in_v(5,J) <= data_in_5(J);
146 data_in_v(3,J) <= data_in_3(J);
147 END GENERATE all_bit;
147 data_in_v(4,J) <= data_in_4(J);
148 -----------------------------------------------------------------------------
148 data_in_v(5,J) <= data_in_5(J);
149 --chirp_gen: chirp
149 END GENERATE all_bit;
150 -- GENERIC MAP (
150 -----------------------------------------------------------------------------
151 -- LOW_FREQUENCY_LIMIT => 0,
151 --chirp_gen: chirp
152 -- HIGH_FREQUENCY_LIMIT => 1000,
152 -- GENERIC MAP (
153 -- NB_POINT_TO_GEN => 10000,
153 -- LOW_FREQUENCY_LIMIT => 0,
154 -- AMPLITUDE => 200,
154 -- HIGH_FREQUENCY_LIMIT => 1000,
155 -- NB_BITS => 16)
155 -- NB_POINT_TO_GEN => 10000,
156 -- PORT MAP (
156 -- AMPLITUDE => 200,
157 -- clk => clk,
157 -- NB_BITS => 16)
158 -- rstn => rstn,
158 -- PORT MAP (
159 -- run => run,
159 -- clk => clk,
160 -- data_ack => data_in_valid,
160 -- rstn => rstn,
161 -- data => data_in);
161 -- run => run,
162
162 -- data_ack => data_in_valid,
163 PROCESS (clk, rstn)
163 -- data => data_in);
164 BEGIN
164
165 IF rstn = '0' THEN
165 PROCESS (clk, rstn)
166 data_in_0_temp <= (OTHERS => '0');
166 BEGIN
167 data_in_1_temp <= (OTHERS => '0');
167 IF rstn = '0' THEN
168 data_in_2_temp <= (OTHERS => '0');
168 data_in_0_temp <= (OTHERS => '0');
169 data_in_3_temp <= (OTHERS => '0');
169 data_in_1_temp <= (OTHERS => '0');
170 data_in_4_temp <= (OTHERS => '0');
170 data_in_2_temp <= (OTHERS => '0');
171 data_in_5_temp <= (OTHERS => '0');
171 data_in_3_temp <= (OTHERS => '0');
172 ELSIF clk'event AND clk = '1' THEN
172 data_in_4_temp <= (OTHERS => '0');
173 IF data_in_valid = '1' THEN
173 data_in_5_temp <= (OTHERS => '0');
174 data_in_0_temp <= DATA_VALUE_0;
174 ELSIF clk'event AND clk = '1' THEN
175 data_in_1_temp <= DATA_VALUE_1;
175 IF data_in_valid = '1' THEN
176 data_in_2_temp <= DATA_VALUE_2;
176 data_in_0_temp <= DATA_VALUE_0;
177 data_in_3_temp <= DATA_VALUE_3;
177 data_in_1_temp <= DATA_VALUE_1;
178 data_in_4_temp <= DATA_VALUE_4;
178 data_in_2_temp <= DATA_VALUE_2;
179 data_in_5_temp <= DATA_VALUE_5;
179 data_in_3_temp <= DATA_VALUE_3;
180 END IF;
180 data_in_4_temp <= DATA_VALUE_4;
181 END IF;
181 data_in_5_temp <= DATA_VALUE_5;
182 END PROCESS;
182 END IF;
183 --data_in_0 <= data_in_0_temp WHEN data_in_valid = '0' ELSE DATA_VALUE_0;
183 END IF;
184 data_in_1 <= data_in_1_temp WHEN data_in_valid = '0' ELSE DATA_VALUE_1;
184 END PROCESS;
185 data_in_2 <= data_in_2_temp WHEN data_in_valid = '0' ELSE DATA_VALUE_2;
185 --data_in_0 <= data_in_0_temp WHEN data_in_valid = '0' ELSE DATA_VALUE_0;
186 data_in_3 <= data_in_3_temp WHEN data_in_valid = '0' ELSE DATA_VALUE_3;
186 data_in_1 <= data_in_1_temp WHEN data_in_valid = '0' ELSE DATA_VALUE_1;
187 data_in_4 <= data_in_4_temp WHEN data_in_valid = '0' ELSE DATA_VALUE_4;
187 data_in_2 <= data_in_2_temp WHEN data_in_valid = '0' ELSE DATA_VALUE_2;
188 data_in_5 <= data_in_5_temp WHEN data_in_valid = '0' ELSE DATA_VALUE_5;
188 data_in_3 <= data_in_3_temp WHEN data_in_valid = '0' ELSE DATA_VALUE_3;
189
189 data_in_4 <= data_in_4_temp WHEN data_in_valid = '0' ELSE DATA_VALUE_4;
190 -----------------------------------------------------------------------------
190 data_in_5 <= data_in_5_temp WHEN data_in_valid = '0' ELSE DATA_VALUE_5;
191 chirp_gen: chirp
191
192 GENERIC MAP (
192 -----------------------------------------------------------------------------
193 LOW_FREQUENCY_LIMIT => 0,
193 chirp_gen: chirp
194 HIGH_FREQUENCY_LIMIT => 1000,
194 GENERIC MAP (
195 NB_POINT_TO_GEN => 10000,
195 LOW_FREQUENCY_LIMIT => 0,
196 AMPLITUDE => 200,
196 HIGH_FREQUENCY_LIMIT => 4000, --1000
197 NB_BITS => 16)
197 NB_POINT_TO_GEN => 100000, --10000
198 PORT MAP (
198 AMPLITUDE => 32000,
199 clk => clk,
199 NB_BITS => 16)
200 rstn => rstn,
200 PORT MAP (
201 run => run,
201 clk => clk,
202 data_ack => data_in_valid,
202 rstn => rstn,
203 data => data_in_0_s);
203 run => run,
204
204 data_ack => data_in_valid,
205 -----------------------------------------------------------------------------
205 data => data_in_0_s,
206
206 done => chirp_done);
207 PROCESS (clk, rstn)
207
208 BEGIN -- PROCESS
208 -----------------------------------------------------------------------------
209 IF rstn = '0' THEN -- asynchronous reset (active low)
209
210 data_in_0 <= (OTHERS => '0');
210 PROCESS (clk, rstn)
211 ELSIF clk'event AND clk = '1' THEN -- rising clock edge
211 BEGIN -- PROCESS
212 IF data_in_valid = '1' THEN
212 IF rstn = '0' THEN -- asynchronous reset (active low)
213 data_in_0 <= data_in_0_s;
213 data_in_0 <= (OTHERS => '0');
214 END IF;
214 ELSIF clk'event AND clk = '1' THEN -- rising clock edge
215 END IF;
215 IF data_in_valid = '1' THEN
216 END PROCESS;
216 data_in_0 <= data_in_0_s;
217
217 END IF;
218 -----------------------------------------------------------------------------
218 END IF;
219 cic_1: cic
219 END PROCESS;
220 GENERIC MAP (
220
221 D_delay_number => 2,
221 -----------------------------------------------------------------------------
222 S_stage_number => 3,
222 cic_1: cic
223 R_downsampling_decimation_factor => 16,
223 GENERIC MAP (
224 b_data_size => 16,
224 D_delay_number => 2,
225 b_grow => 15) --16 #### log2(RD)*S
225 S_stage_number => 3,
226 PORT MAP (
226 R_downsampling_decimation_factor => 16,
227 clk => clk,
227 b_data_size => 16,
228 rstn => rstn,
228 b_grow => 15) --16 #### log2(RD)*S
229 run => run,
229 PORT MAP (
230 data_in => data_in_0_s,
230 clk => clk,
231 data_in_valid => data_in_valid,
231 rstn => rstn,
232 data_out => OPEN,
232 run => run,
233 data_out_valid => OPEN);
233 data_in => data_in_0_s,
234
234 data_in_valid => data_in_valid,
235 --cic_16: cic
235 data_out => OPEN,
236 -- GENERIC MAP (
236 data_out_valid => OPEN);
237 -- D_delay_number => 2,
237
238 -- S_stage_number => 3,
238 --cic_16: cic
239 -- R_downsampling_decimation_factor => 16,
239 -- GENERIC MAP (
240 -- b_data_size => 16,
240 -- D_delay_number => 2,
241 -- b_grow => 15) --16 #### log2(RD)*S
241 -- S_stage_number => 3,
242 -- PORT MAP (
242 -- R_downsampling_decimation_factor => 16,
243 -- clk => clk,
243 -- b_data_size => 16,
244 -- rstn => rstn,
244 -- b_grow => 15) --16 #### log2(RD)*S
245 -- run => run,
245 -- PORT MAP (
246 -- data_in => data_in_0_s,
246 -- clk => clk,
247 -- data_in_valid => data_in_valid,
247 -- rstn => rstn,
248 -- data_out => OPEN,
248 -- run => run,
249 -- data_out_valid => OPEN);
249 -- data_in => data_in_0_s,
250
250 -- data_in_valid => data_in_valid,
251 cic_256: cic
251 -- data_out => OPEN,
252 GENERIC MAP (
252 -- data_out_valid => OPEN);
253 D_delay_number => 2,
253
254 S_stage_number => 3,
254 cic_256: cic
255 R_downsampling_decimation_factor => 256,
255 GENERIC MAP (
256 b_data_size => 16,
256 D_delay_number => 2,
257 b_grow => 27) --32 #### log2(RD)*S = log2(256*2)*3
257 S_stage_number => 3,
258 PORT MAP (
258 R_downsampling_decimation_factor => 256,
259 clk => clk,
259 b_data_size => 16,
260 rstn => rstn,
260 b_grow => 27) --32 #### log2(RD)*S = log2(256*2)*3
261 run => run,
261 PORT MAP (
262 data_in => data_in_0_s,
262 clk => clk,
263 data_in_valid => data_in_valid,
263 rstn => rstn,
264 data_out => OPEN,
264 run => run,
265 data_out_valid => OPEN);
265 data_in => data_in_0_s,
266
266 data_in_valid => data_in_valid,
267
267 data_out => OPEN,
268
268 data_out_valid => OPEN);
269
269
270
270
271 END;
271
272
273
274 END;
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This diff has been collapsed as it changes many lines, (1075 lines changed) Show them Hide them
@@ -1,389 +1,752
1 onerror {resume}
1 onerror {resume}
2 quietly virtual signal -install /testbench/cic_lfr_r2_1/memCEL/RAMblk { (context /testbench/cic_lfr_r2_1/memCEL/RAMblk )(RAMarray(0) &RAMarray(1) &RAMarray(2) &RAMarray(3) &RAMarray(4) &RAMarray(5) &RAMarray(6) &RAMarray(7) &RAMarray(8) &RAMarray(9) &RAMarray(10) &RAMarray(11) &RAMarray(12) &RAMarray(13) &RAMarray(14) &RAMarray(15) &RAMarray(16) &RAMarray(17) &RAMarray(18) &RAMarray(19) &RAMarray(20) &RAMarray(21) &RAMarray(22) &RAMarray(23) &RAMarray(24) &RAMarray(25) &RAMarray(26) &RAMarray(27) &RAMarray(28) &RAMarray(29) &RAMarray(30) &RAMarray(31) &RAMarray(32) &RAMarray(33) &RAMarray(34) &RAMarray(35) &RAMarray(36) &RAMarray(37) &RAMarray(38) &RAMarray(39) )} R2_RAM_lane0
2 quietly virtual signal -install /testbench/cic_lfr_r2_1/memCEL/RAMblk { (context /testbench/cic_lfr_r2_1/memCEL/RAMblk )(RAMarray(0) &RAMarray(1) &RAMarray(2) &RAMarray(3) &RAMarray(4) &RAMarray(5) &RAMarray(6) &RAMarray(7) &RAMarray(8) &RAMarray(9) &RAMarray(10) &RAMarray(11) &RAMarray(12) &RAMarray(13) &RAMarray(14) &RAMarray(15) &RAMarray(16) &RAMarray(17) &RAMarray(18) &RAMarray(19) &RAMarray(20) &RAMarray(21) &RAMarray(22) &RAMarray(23) &RAMarray(24) &RAMarray(25) &RAMarray(26) &RAMarray(27) &RAMarray(28) &RAMarray(29) &RAMarray(30) &RAMarray(31) &RAMarray(32) &RAMarray(33) &RAMarray(34) &RAMarray(35) &RAMarray(36) &RAMarray(37) &RAMarray(38) &RAMarray(39) )} R2_RAM_lane0
3 quietly virtual signal -install /testbench/cic_lfr_r2_1/memCEL/RAMblk { (context /testbench/cic_lfr_r2_1/memCEL/RAMblk )(RAMarray(40) &RAMarray(41) &RAMarray(42) &RAMarray(43) &RAMarray(44) &RAMarray(45) &RAMarray(46) &RAMarray(47) &RAMarray(48) &RAMarray(49) &RAMarray(50) &RAMarray(51) &RAMarray(52) &RAMarray(53) &RAMarray(54) &RAMarray(55) &RAMarray(56) &RAMarray(57) &RAMarray(58) &RAMarray(59) &RAMarray(60) &RAMarray(61) &RAMarray(62) &RAMarray(63) &RAMarray(64) &RAMarray(65) &RAMarray(66) &RAMarray(67) &RAMarray(68) &RAMarray(69) &RAMarray(70) &RAMarray(71) &RAMarray(72) &RAMarray(73) &RAMarray(74) &RAMarray(75) &RAMarray(76) &RAMarray(77) &RAMarray(78) &RAMarray(79) )} R2_RAM_lane0001
3 quietly virtual signal -install /testbench/cic_lfr_r2_1/memCEL/RAMblk { (context /testbench/cic_lfr_r2_1/memCEL/RAMblk )(RAMarray(40) &RAMarray(41) &RAMarray(42) &RAMarray(43) &RAMarray(44) &RAMarray(45) &RAMarray(46) &RAMarray(47) &RAMarray(48) &RAMarray(49) &RAMarray(50) &RAMarray(51) &RAMarray(52) &RAMarray(53) &RAMarray(54) &RAMarray(55) &RAMarray(56) &RAMarray(57) &RAMarray(58) &RAMarray(59) &RAMarray(60) &RAMarray(61) &RAMarray(62) &RAMarray(63) &RAMarray(64) &RAMarray(65) &RAMarray(66) &RAMarray(67) &RAMarray(68) &RAMarray(69) &RAMarray(70) &RAMarray(71) &RAMarray(72) &RAMarray(73) &RAMarray(74) &RAMarray(75) &RAMarray(76) &RAMarray(77) &RAMarray(78) &RAMarray(79) )} R2_RAM_lane0001
4 quietly virtual signal -install /testbench/cic_lfr_r2_1/memCEL/RAMblk { (context /testbench/cic_lfr_r2_1/memCEL/RAMblk )(RAMarray(80) &RAMarray(81) &RAMarray(82) &RAMarray(83) &RAMarray(84) &RAMarray(85) &RAMarray(86) &RAMarray(87) &RAMarray(88) &RAMarray(89) &RAMarray(90) &RAMarray(91) &RAMarray(92) &RAMarray(93) &RAMarray(94) &RAMarray(95) &RAMarray(96) &RAMarray(97) &RAMarray(98) &RAMarray(99) &RAMarray(100) &RAMarray(101) &RAMarray(102) &RAMarray(103) &RAMarray(104) &RAMarray(105) &RAMarray(106) &RAMarray(107) &RAMarray(108) &RAMarray(109) &RAMarray(110) &RAMarray(111) &RAMarray(112) &RAMarray(113) &RAMarray(114) &RAMarray(115) &RAMarray(116) &RAMarray(117) &RAMarray(118) &RAMarray(119) )} R2_RAM_lane2
4 quietly virtual signal -install /testbench/cic_lfr_r2_1/memCEL/RAMblk { (context /testbench/cic_lfr_r2_1/memCEL/RAMblk )(RAMarray(80) &RAMarray(81) &RAMarray(82) &RAMarray(83) &RAMarray(84) &RAMarray(85) &RAMarray(86) &RAMarray(87) &RAMarray(88) &RAMarray(89) &RAMarray(90) &RAMarray(91) &RAMarray(92) &RAMarray(93) &RAMarray(94) &RAMarray(95) &RAMarray(96) &RAMarray(97) &RAMarray(98) &RAMarray(99) &RAMarray(100) &RAMarray(101) &RAMarray(102) &RAMarray(103) &RAMarray(104) &RAMarray(105) &RAMarray(106) &RAMarray(107) &RAMarray(108) &RAMarray(109) &RAMarray(110) &RAMarray(111) &RAMarray(112) &RAMarray(113) &RAMarray(114) &RAMarray(115) &RAMarray(116) &RAMarray(117) &RAMarray(118) &RAMarray(119) )} R2_RAM_lane2
5 quietly virtual signal -install /testbench/cic_lfr_r2_1/memCEL/RAMblk { (context /testbench/cic_lfr_r2_1/memCEL/RAMblk )(RAMarray(120) &RAMarray(121) &RAMarray(122) &RAMarray(123) &RAMarray(124) &RAMarray(125) &RAMarray(126) &RAMarray(127) &RAMarray(128) &RAMarray(129) &RAMarray(130) &RAMarray(131) &RAMarray(132) &RAMarray(133) &RAMarray(134) &RAMarray(135) &RAMarray(136) &RAMarray(137) &RAMarray(138) &RAMarray(139) &RAMarray(140) &RAMarray(141) &RAMarray(142) &RAMarray(143) &RAMarray(144) &RAMarray(145) &RAMarray(146) &RAMarray(147) &RAMarray(148) &RAMarray(149) &RAMarray(150) &RAMarray(151) &RAMarray(152) &RAMarray(153) &RAMarray(154) &RAMarray(155) &RAMarray(156) &RAMarray(157) &RAMarray(158) &RAMarray(159) )} R2_RAM_lane3
5 quietly virtual signal -install /testbench/cic_lfr_r2_1/memCEL/RAMblk { (context /testbench/cic_lfr_r2_1/memCEL/RAMblk )(RAMarray(120) &RAMarray(121) &RAMarray(122) &RAMarray(123) &RAMarray(124) &RAMarray(125) &RAMarray(126) &RAMarray(127) &RAMarray(128) &RAMarray(129) &RAMarray(130) &RAMarray(131) &RAMarray(132) &RAMarray(133) &RAMarray(134) &RAMarray(135) &RAMarray(136) &RAMarray(137) &RAMarray(138) &RAMarray(139) &RAMarray(140) &RAMarray(141) &RAMarray(142) &RAMarray(143) &RAMarray(144) &RAMarray(145) &RAMarray(146) &RAMarray(147) &RAMarray(148) &RAMarray(149) &RAMarray(150) &RAMarray(151) &RAMarray(152) &RAMarray(153) &RAMarray(154) &RAMarray(155) &RAMarray(156) &RAMarray(157) &RAMarray(158) &RAMarray(159) )} R2_RAM_lane3
6 quietly virtual signal -install /testbench/cic_lfr_r2_1/memCEL/RAMblk { (context /testbench/cic_lfr_r2_1/memCEL/RAMblk )(RAMarray(160) &RAMarray(161) &RAMarray(162) &RAMarray(163) &RAMarray(164) &RAMarray(165) &RAMarray(166) &RAMarray(167) &RAMarray(168) &RAMarray(169) &RAMarray(170) &RAMarray(171) &RAMarray(172) &RAMarray(173) &RAMarray(174) &RAMarray(175) &RAMarray(176) &RAMarray(177) &RAMarray(178) &RAMarray(179) &RAMarray(180) &RAMarray(181) &RAMarray(182) &RAMarray(183) &RAMarray(184) &RAMarray(185) &RAMarray(186) &RAMarray(187) &RAMarray(188) &RAMarray(189) &RAMarray(190) &RAMarray(191) &RAMarray(192) &RAMarray(193) &RAMarray(194) &RAMarray(195) &RAMarray(196) &RAMarray(197) &RAMarray(198) &RAMarray(199) )} R2_RAM_lane4
6 quietly virtual signal -install /testbench/cic_lfr_r2_1/memCEL/RAMblk { (context /testbench/cic_lfr_r2_1/memCEL/RAMblk )(RAMarray(160) &RAMarray(161) &RAMarray(162) &RAMarray(163) &RAMarray(164) &RAMarray(165) &RAMarray(166) &RAMarray(167) &RAMarray(168) &RAMarray(169) &RAMarray(170) &RAMarray(171) &RAMarray(172) &RAMarray(173) &RAMarray(174) &RAMarray(175) &RAMarray(176) &RAMarray(177) &RAMarray(178) &RAMarray(179) &RAMarray(180) &RAMarray(181) &RAMarray(182) &RAMarray(183) &RAMarray(184) &RAMarray(185) &RAMarray(186) &RAMarray(187) &RAMarray(188) &RAMarray(189) &RAMarray(190) &RAMarray(191) &RAMarray(192) &RAMarray(193) &RAMarray(194) &RAMarray(195) &RAMarray(196) &RAMarray(197) &RAMarray(198) &RAMarray(199) )} R2_RAM_lane4
7 quietly virtual signal -install /testbench/cic_lfr_r2_1/memCEL/RAMblk { (context /testbench/cic_lfr_r2_1/memCEL/RAMblk )(RAMarray(200) &RAMarray(201) &RAMarray(202) &RAMarray(203) &RAMarray(204) &RAMarray(205) &RAMarray(206) &RAMarray(207) &RAMarray(208) &RAMarray(209) &RAMarray(210) &RAMarray(211) &RAMarray(212) &RAMarray(213) &RAMarray(214) &RAMarray(215) &RAMarray(216) &RAMarray(217) &RAMarray(218) &RAMarray(219) &RAMarray(220) &RAMarray(221) &RAMarray(222) &RAMarray(223) &RAMarray(224) &RAMarray(225) &RAMarray(226) &RAMarray(227) &RAMarray(228) &RAMarray(229) &RAMarray(230) &RAMarray(231) &RAMarray(232) &RAMarray(233) &RAMarray(234) &RAMarray(235) &RAMarray(236) &RAMarray(237) &RAMarray(238) &RAMarray(239) )} R2_RAM_lane5
7 quietly virtual signal -install /testbench/cic_lfr_r2_1/memCEL/RAMblk { (context /testbench/cic_lfr_r2_1/memCEL/RAMblk )(RAMarray(200) &RAMarray(201) &RAMarray(202) &RAMarray(203) &RAMarray(204) &RAMarray(205) &RAMarray(206) &RAMarray(207) &RAMarray(208) &RAMarray(209) &RAMarray(210) &RAMarray(211) &RAMarray(212) &RAMarray(213) &RAMarray(214) &RAMarray(215) &RAMarray(216) &RAMarray(217) &RAMarray(218) &RAMarray(219) &RAMarray(220) &RAMarray(221) &RAMarray(222) &RAMarray(223) &RAMarray(224) &RAMarray(225) &RAMarray(226) &RAMarray(227) &RAMarray(228) &RAMarray(229) &RAMarray(230) &RAMarray(231) &RAMarray(232) &RAMarray(233) &RAMarray(234) &RAMarray(235) &RAMarray(236) &RAMarray(237) &RAMarray(238) &RAMarray(239) )} R2_RAM_lane5
8 quietly virtual signal -install /testbench/cic_lfr_r2_1/memCEL/RAMblk { (context /testbench/cic_lfr_r2_1/memCEL/RAMblk )(RAMarray(240) &RAMarray(241) &RAMarray(242) &RAMarray(243) &RAMarray(244) &RAMarray(245) &RAMarray(246) &RAMarray(247) &RAMarray(248) &RAMarray(249) &RAMarray(250) &RAMarray(251) &RAMarray(252) &RAMarray(253) &RAMarray(254) &RAMarray(255) &RAMarray(256) &RAMarray(257) &RAMarray(258) &RAMarray(259) &RAMarray(260) &RAMarray(261) &RAMarray(262) &RAMarray(263) &RAMarray(264) &RAMarray(265) &RAMarray(266) &RAMarray(267) &RAMarray(268) &RAMarray(269) &RAMarray(270) &RAMarray(271) &RAMarray(272) &RAMarray(273) &RAMarray(274) &RAMarray(275) &RAMarray(276) &RAMarray(277) &RAMarray(278) &RAMarray(279) )} R2_RAM_lane5001
8 quietly virtual signal -install /testbench/cic_lfr_r2_1/memCEL/RAMblk { (context /testbench/cic_lfr_r2_1/memCEL/RAMblk )(RAMarray(240) &RAMarray(241) &RAMarray(242) &RAMarray(243) &RAMarray(244) &RAMarray(245) &RAMarray(246) &RAMarray(247) &RAMarray(248) &RAMarray(249) &RAMarray(250) &RAMarray(251) &RAMarray(252) &RAMarray(253) &RAMarray(254) &RAMarray(255) &RAMarray(256) &RAMarray(257) &RAMarray(258) &RAMarray(259) &RAMarray(260) &RAMarray(261) &RAMarray(262) &RAMarray(263) &RAMarray(264) &RAMarray(265) &RAMarray(266) &RAMarray(267) &RAMarray(268) &RAMarray(269) &RAMarray(270) &RAMarray(271) &RAMarray(272) &RAMarray(273) &RAMarray(274) &RAMarray(275) &RAMarray(276) &RAMarray(277) &RAMarray(278) &RAMarray(279) )} R2_RAM_lane5001
9 quietly virtual signal -install /testbench/cic_lfr_r2_1/memCEL/RAMblk { (context /testbench/cic_lfr_r2_1/memCEL/RAMblk )(RAMarray(280) &RAMarray(281) &RAMarray(282) &RAMarray(283) &RAMarray(284) &RAMarray(285) &RAMarray(286) &RAMarray(287) &RAMarray(288) &RAMarray(289) &RAMarray(290) &RAMarray(291) &RAMarray(292) &RAMarray(293) &RAMarray(294) &RAMarray(295) &RAMarray(296) &RAMarray(297) &RAMarray(298) &RAMarray(299) &RAMarray(300) &RAMarray(301) &RAMarray(302) &RAMarray(303) &RAMarray(304) &RAMarray(305) &RAMarray(306) &RAMarray(307) &RAMarray(308) &RAMarray(309) &RAMarray(310) &RAMarray(311) &RAMarray(312) &RAMarray(313) &RAMarray(314) &RAMarray(315) &RAMarray(316) &RAMarray(317) &RAMarray(318) &RAMarray(319) )} R2_RAM_lane7
9 quietly virtual signal -install /testbench/cic_lfr_r2_1/memCEL/RAMblk { (context /testbench/cic_lfr_r2_1/memCEL/RAMblk )(RAMarray(280) &RAMarray(281) &RAMarray(282) &RAMarray(283) &RAMarray(284) &RAMarray(285) &RAMarray(286) &RAMarray(287) &RAMarray(288) &RAMarray(289) &RAMarray(290) &RAMarray(291) &RAMarray(292) &RAMarray(293) &RAMarray(294) &RAMarray(295) &RAMarray(296) &RAMarray(297) &RAMarray(298) &RAMarray(299) &RAMarray(300) &RAMarray(301) &RAMarray(302) &RAMarray(303) &RAMarray(304) &RAMarray(305) &RAMarray(306) &RAMarray(307) &RAMarray(308) &RAMarray(309) &RAMarray(310) &RAMarray(311) &RAMarray(312) &RAMarray(313) &RAMarray(314) &RAMarray(315) &RAMarray(316) &RAMarray(317) &RAMarray(318) &RAMarray(319) )} R2_RAM_lane7
10 quietly WaveActivateNextPane {} 0
10 quietly WaveActivateNextPane {} 0
11 add wave -noupdate -group CIC_256 -radix hexadecimal /testbench/cic_256/data_in
11 add wave -noupdate -group CIC_256 -radix hexadecimal /testbench/cic_256/data_in
12 add wave -noupdate -group CIC_256 -radix hexadecimal /testbench/cic_256/data_in_valid
12 add wave -noupdate -group CIC_256 -radix hexadecimal /testbench/cic_256/data_in_valid
13 add wave -noupdate -group CIC_256 -radix hexadecimal /testbench/cic_256/data_out
13 add wave -noupdate -group CIC_256 -radix hexadecimal /testbench/cic_256/data_out
14 add wave -noupdate -group CIC_256 -radix hexadecimal /testbench/cic_256/data_out_valid
14 add wave -noupdate -group CIC_256 -radix hexadecimal /testbench/cic_256/data_out_valid
15 add wave -noupdate -group CIC_256 -radix hexadecimal /testbench/cic_256/I_data
15 add wave -noupdate -group CIC_256 -radix hexadecimal /testbench/cic_256/I_data
16 add wave -noupdate -group CIC_256 -radix hexadecimal /testbench/cic_256/I_valid
16 add wave -noupdate -group CIC_256 -radix hexadecimal /testbench/cic_256/I_valid
17 add wave -noupdate -group CIC_256 -radix hexadecimal /testbench/cic_256/C_data
17 add wave -noupdate -group CIC_256 -radix hexadecimal /testbench/cic_256/C_data
18 add wave -noupdate -group CIC_256 -radix hexadecimal /testbench/cic_256/C_valid
18 add wave -noupdate -group CIC_256 -radix hexadecimal /testbench/cic_256/C_valid
19 add wave -noupdate -expand -group CIC_16 -radix hexadecimal /testbench/cic_1/data_in
19 add wave -noupdate -group CIC_256 -radix hexadecimal /testbench/cic_256/data_in
20 add wave -noupdate -expand -group CIC_16 -radix hexadecimal /testbench/cic_1/data_in_valid
20 add wave -noupdate -group CIC_256 -radix hexadecimal /testbench/cic_256/data_in_valid
21 add wave -noupdate -expand -group CIC_16 -radix hexadecimal /testbench/cic_1/data_out
21 add wave -noupdate -group CIC_256 -radix hexadecimal /testbench/cic_256/data_out
22 add wave -noupdate -expand -group CIC_16 -radix hexadecimal /testbench/cic_1/data_out_valid
22 add wave -noupdate -group CIC_256 -radix hexadecimal /testbench/cic_256/data_out_valid
23 add wave -noupdate -expand -group CIC_16 -radix hexadecimal -childformat {{/testbench/cic_1/I_data(3) -radix hexadecimal} {/testbench/cic_1/I_data(2) -radix hexadecimal} {/testbench/cic_1/I_data(1) -radix hexadecimal} {/testbench/cic_1/I_data(0) -radix hexadecimal}} -expand -subitemconfig {/testbench/cic_1/I_data(3) {-height 15 -radix hexadecimal} /testbench/cic_1/I_data(2) {-height 15 -radix hexadecimal} /testbench/cic_1/I_data(1) {-height 15 -radix hexadecimal} /testbench/cic_1/I_data(0) {-height 15 -radix hexadecimal}} /testbench/cic_1/I_data
23 add wave -noupdate -group CIC_256 -radix hexadecimal /testbench/cic_256/I_data
24 add wave -noupdate -expand -group CIC_16 -radix hexadecimal /testbench/cic_1/I_valid
24 add wave -noupdate -group CIC_256 -radix hexadecimal /testbench/cic_256/I_valid
25 add wave -noupdate -expand -group CIC_16 -radix hexadecimal -childformat {{/testbench/cic_1/C_data(3) -radix hexadecimal -childformat {{/testbench/cic_1/C_data(3)(30) -radix hexadecimal} {/testbench/cic_1/C_data(3)(29) -radix hexadecimal} {/testbench/cic_1/C_data(3)(28) -radix hexadecimal} {/testbench/cic_1/C_data(3)(27) -radix hexadecimal} {/testbench/cic_1/C_data(3)(26) -radix hexadecimal} {/testbench/cic_1/C_data(3)(25) -radix hexadecimal} {/testbench/cic_1/C_data(3)(24) -radix hexadecimal} {/testbench/cic_1/C_data(3)(23) -radix hexadecimal} {/testbench/cic_1/C_data(3)(22) -radix hexadecimal} {/testbench/cic_1/C_data(3)(21) -radix hexadecimal} {/testbench/cic_1/C_data(3)(20) -radix hexadecimal} {/testbench/cic_1/C_data(3)(19) -radix hexadecimal} {/testbench/cic_1/C_data(3)(18) -radix hexadecimal} {/testbench/cic_1/C_data(3)(17) -radix hexadecimal} {/testbench/cic_1/C_data(3)(16) -radix hexadecimal} {/testbench/cic_1/C_data(3)(15) -radix hexadecimal} {/testbench/cic_1/C_data(3)(14) -radix hexadecimal} {/testbench/cic_1/C_data(3)(13) -radix hexadecimal} {/testbench/cic_1/C_data(3)(12) -radix hexadecimal} {/testbench/cic_1/C_data(3)(11) -radix hexadecimal} {/testbench/cic_1/C_data(3)(10) -radix hexadecimal} {/testbench/cic_1/C_data(3)(9) -radix hexadecimal} {/testbench/cic_1/C_data(3)(8) -radix hexadecimal} {/testbench/cic_1/C_data(3)(7) -radix hexadecimal} {/testbench/cic_1/C_data(3)(6) -radix hexadecimal} {/testbench/cic_1/C_data(3)(5) -radix hexadecimal} {/testbench/cic_1/C_data(3)(4) -radix hexadecimal} {/testbench/cic_1/C_data(3)(3) -radix hexadecimal} {/testbench/cic_1/C_data(3)(2) -radix hexadecimal} {/testbench/cic_1/C_data(3)(1) -radix hexadecimal} {/testbench/cic_1/C_data(3)(0) -radix hexadecimal}}} {/testbench/cic_1/C_data(2) -radix hexadecimal} {/testbench/cic_1/C_data(1) -radix hexadecimal} {/testbench/cic_1/C_data(0) -radix hexadecimal}} -expand -subitemconfig {/testbench/cic_1/C_data(3) {-height 15 -radix hexadecimal -childformat {{/testbench/cic_1/C_data(3)(30) -radix hexadecimal} {/testbench/cic_1/C_data(3)(29) -radix hexadecimal} {/testbench/cic_1/C_data(3)(28) -radix hexadecimal} {/testbench/cic_1/C_data(3)(27) -radix hexadecimal} {/testbench/cic_1/C_data(3)(26) -radix hexadecimal} {/testbench/cic_1/C_data(3)(25) -radix hexadecimal} {/testbench/cic_1/C_data(3)(24) -radix hexadecimal} {/testbench/cic_1/C_data(3)(23) -radix hexadecimal} {/testbench/cic_1/C_data(3)(22) -radix hexadecimal} {/testbench/cic_1/C_data(3)(21) -radix hexadecimal} {/testbench/cic_1/C_data(3)(20) -radix hexadecimal} {/testbench/cic_1/C_data(3)(19) -radix hexadecimal} {/testbench/cic_1/C_data(3)(18) -radix hexadecimal} {/testbench/cic_1/C_data(3)(17) -radix hexadecimal} {/testbench/cic_1/C_data(3)(16) -radix hexadecimal} {/testbench/cic_1/C_data(3)(15) -radix hexadecimal} {/testbench/cic_1/C_data(3)(14) -radix hexadecimal} {/testbench/cic_1/C_data(3)(13) -radix hexadecimal} {/testbench/cic_1/C_data(3)(12) -radix hexadecimal} {/testbench/cic_1/C_data(3)(11) -radix hexadecimal} {/testbench/cic_1/C_data(3)(10) -radix hexadecimal} {/testbench/cic_1/C_data(3)(9) -radix hexadecimal} {/testbench/cic_1/C_data(3)(8) -radix hexadecimal} {/testbench/cic_1/C_data(3)(7) -radix hexadecimal} {/testbench/cic_1/C_data(3)(6) -radix hexadecimal} {/testbench/cic_1/C_data(3)(5) -radix hexadecimal} {/testbench/cic_1/C_data(3)(4) -radix hexadecimal} {/testbench/cic_1/C_data(3)(3) -radix hexadecimal} {/testbench/cic_1/C_data(3)(2) -radix hexadecimal} {/testbench/cic_1/C_data(3)(1) -radix hexadecimal} {/testbench/cic_1/C_data(3)(0) -radix hexadecimal}}} /testbench/cic_1/C_data(3)(30) {-height 15 -radix hexadecimal} /testbench/cic_1/C_data(3)(29) {-height 15 -radix hexadecimal} /testbench/cic_1/C_data(3)(28) {-height 15 -radix hexadecimal} /testbench/cic_1/C_data(3)(27) {-height 15 -radix hexadecimal} /testbench/cic_1/C_data(3)(26) {-height 15 -radix hexadecimal} /testbench/cic_1/C_data(3)(25) {-height 15 -radix hexadecimal} /testbench/cic_1/C_data(3)(24) {-height 15 -radix hexadecimal} /testbench/cic_1/C_data(3)(23) {-height 15 -radix hexadecimal} /testbench/cic_1/C_data(3)(22) {-height 15 -radix hexadecimal} /testbench/cic_1/C_data(3)(21) {-height 15 -radix hexadecimal} /testbench/cic_1/C_data(3)(20) {-height 15 -radix hexadecimal} /testbench/cic_1/C_data(3)(19) {-height 15 -radix hexadecimal} /testbench/cic_1/C_data(3)(18) {-height 15 -radix hexadecimal} /testbench/cic_1/C_data(3)(17) {-height 15 -radix hexadecimal} /testbench/cic_1/C_data(3)(16) {-height 15 -radix hexadecimal} /testbench/cic_1/C_data(3)(15) {-height 15 -radix hexadecimal} /testbench/cic_1/C_data(3)(14) {-height 15 -radix hexadecimal} /testbench/cic_1/C_data(3)(13) {-height 15 -radix hexadecimal} /testbench/cic_1/C_data(3)(12) {-height 15 -radix hexadecimal} /testbench/cic_1/C_data(3)(11) {-height 15 -radix hexadecimal} /testbench/cic_1/C_data(3)(10) {-height 15 -radix hexadecimal} /testbench/cic_1/C_data(3)(9) {-height 15 -radix hexadecimal} /testbench/cic_1/C_data(3)(8) {-height 15 -radix hexadecimal} /testbench/cic_1/C_data(3)(7) {-height 15 -radix hexadecimal} /testbench/cic_1/C_data(3)(6) {-height 15 -radix hexadecimal} /testbench/cic_1/C_data(3)(5) {-height 15 -radix hexadecimal} /testbench/cic_1/C_data(3)(4) {-height 15 -radix hexadecimal} /testbench/cic_1/C_data(3)(3) {-height 15 -radix hexadecimal} /testbench/cic_1/C_data(3)(2) {-height 15 -radix hexadecimal} /testbench/cic_1/C_data(3)(1) {-height 15 -radix hexadecimal} /testbench/cic_1/C_data(3)(0) {-height 15 -radix hexadecimal} /testbench/cic_1/C_data(2) {-height 15 -radix hexadecimal} /testbench/cic_1/C_data(1) {-height 15 -radix hexadecimal} /testbench/cic_1/C_data(0) {-height 15 -radix hexadecimal}} /testbench/cic_1/C_data
25 add wave -noupdate -group CIC_256 -radix hexadecimal /testbench/cic_256/C_data
26 add wave -noupdate -expand -group CIC_16 -radix hexadecimal /testbench/cic_1/C_valid
26 add wave -noupdate -group CIC_256 -radix hexadecimal /testbench/cic_256/C_valid
27 add wave -noupdate -expand -group CIC_LFR -radix decimal -childformat {{/testbench/cic_lfr_1/data_in(5) -radix hexadecimal} {/testbench/cic_lfr_1/data_in(4) -radix hexadecimal} {/testbench/cic_lfr_1/data_in(3) -radix hexadecimal} {/testbench/cic_lfr_1/data_in(2) -radix hexadecimal} {/testbench/cic_lfr_1/data_in(1) -radix hexadecimal} {/testbench/cic_lfr_1/data_in(0) -radix hexadecimal}} -expand -subitemconfig {/testbench/cic_lfr_1/data_in(5) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/data_in(4) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/data_in(3) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/data_in(2) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/data_in(1) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/data_in(0) {-height 15 -radix hexadecimal}} /testbench/cic_lfr_1/data_in
27 add wave -noupdate -group CIC_16 -radix hexadecimal /testbench/cic_1/data_in
28 add wave -noupdate -expand -group CIC_LFR -radix hexadecimal /testbench/cic_lfr_1/data_in_valid
28 add wave -noupdate -group CIC_16 -radix hexadecimal /testbench/cic_1/data_in_valid
29 add wave -noupdate -expand -group CIC_LFR -radix hexadecimal -childformat {{/testbench/cic_lfr_1/data_out_16(5) -radix hexadecimal} {/testbench/cic_lfr_1/data_out_16(4) -radix hexadecimal} {/testbench/cic_lfr_1/data_out_16(3) -radix hexadecimal} {/testbench/cic_lfr_1/data_out_16(2) -radix hexadecimal} {/testbench/cic_lfr_1/data_out_16(1) -radix hexadecimal} {/testbench/cic_lfr_1/data_out_16(0) -radix hexadecimal -childformat {{/testbench/cic_lfr_1/data_out_16(0)(15) -radix hexadecimal} {/testbench/cic_lfr_1/data_out_16(0)(14) -radix hexadecimal} {/testbench/cic_lfr_1/data_out_16(0)(13) -radix hexadecimal} {/testbench/cic_lfr_1/data_out_16(0)(12) -radix hexadecimal} {/testbench/cic_lfr_1/data_out_16(0)(11) -radix hexadecimal} {/testbench/cic_lfr_1/data_out_16(0)(10) -radix hexadecimal} {/testbench/cic_lfr_1/data_out_16(0)(9) -radix hexadecimal} {/testbench/cic_lfr_1/data_out_16(0)(8) -radix hexadecimal} {/testbench/cic_lfr_1/data_out_16(0)(7) -radix hexadecimal} {/testbench/cic_lfr_1/data_out_16(0)(6) -radix hexadecimal} {/testbench/cic_lfr_1/data_out_16(0)(5) -radix hexadecimal} {/testbench/cic_lfr_1/data_out_16(0)(4) -radix hexadecimal} {/testbench/cic_lfr_1/data_out_16(0)(3) -radix hexadecimal} {/testbench/cic_lfr_1/data_out_16(0)(2) -radix hexadecimal} {/testbench/cic_lfr_1/data_out_16(0)(1) -radix hexadecimal} {/testbench/cic_lfr_1/data_out_16(0)(0) -radix hexadecimal}}}} -expand -subitemconfig {/testbench/cic_lfr_1/data_out_16(5) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/data_out_16(4) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/data_out_16(3) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/data_out_16(2) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/data_out_16(1) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/data_out_16(0) {-height 15 -radix hexadecimal -childformat {{/testbench/cic_lfr_1/data_out_16(0)(15) -radix hexadecimal} {/testbench/cic_lfr_1/data_out_16(0)(14) -radix hexadecimal} {/testbench/cic_lfr_1/data_out_16(0)(13) -radix hexadecimal} {/testbench/cic_lfr_1/data_out_16(0)(12) -radix hexadecimal} {/testbench/cic_lfr_1/data_out_16(0)(11) -radix hexadecimal} {/testbench/cic_lfr_1/data_out_16(0)(10) -radix hexadecimal} {/testbench/cic_lfr_1/data_out_16(0)(9) -radix hexadecimal} {/testbench/cic_lfr_1/data_out_16(0)(8) -radix hexadecimal} {/testbench/cic_lfr_1/data_out_16(0)(7) -radix hexadecimal} {/testbench/cic_lfr_1/data_out_16(0)(6) -radix hexadecimal} {/testbench/cic_lfr_1/data_out_16(0)(5) -radix hexadecimal} {/testbench/cic_lfr_1/data_out_16(0)(4) -radix hexadecimal} {/testbench/cic_lfr_1/data_out_16(0)(3) -radix hexadecimal} {/testbench/cic_lfr_1/data_out_16(0)(2) -radix hexadecimal} {/testbench/cic_lfr_1/data_out_16(0)(1) -radix hexadecimal} {/testbench/cic_lfr_1/data_out_16(0)(0) -radix hexadecimal}}} /testbench/cic_lfr_1/data_out_16(0)(15) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/data_out_16(0)(14) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/data_out_16(0)(13) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/data_out_16(0)(12) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/data_out_16(0)(11) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/data_out_16(0)(10) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/data_out_16(0)(9) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/data_out_16(0)(8) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/data_out_16(0)(7) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/data_out_16(0)(6) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/data_out_16(0)(5) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/data_out_16(0)(4) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/data_out_16(0)(3) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/data_out_16(0)(2) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/data_out_16(0)(1) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/data_out_16(0)(0) {-height 15 -radix hexadecimal}} /testbench/cic_lfr_1/data_out_16
29 add wave -noupdate -group CIC_16 -radix hexadecimal /testbench/cic_1/data_out
30 add wave -noupdate -expand -group CIC_LFR -radix hexadecimal /testbench/cic_lfr_1/data_out_16_valid
30 add wave -noupdate -group CIC_16 -radix hexadecimal /testbench/cic_1/data_out_valid
31 add wave -noupdate -expand -group CIC_LFR -radix hexadecimal -childformat {{/testbench/cic_lfr_1/data_out_256(5) -radix hexadecimal} {/testbench/cic_lfr_1/data_out_256(4) -radix hexadecimal} {/testbench/cic_lfr_1/data_out_256(3) -radix hexadecimal} {/testbench/cic_lfr_1/data_out_256(2) -radix hexadecimal} {/testbench/cic_lfr_1/data_out_256(1) -radix hexadecimal} {/testbench/cic_lfr_1/data_out_256(0) -radix hexadecimal}} -subitemconfig {/testbench/cic_lfr_1/data_out_256(5) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/data_out_256(4) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/data_out_256(3) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/data_out_256(2) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/data_out_256(1) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/data_out_256(0) {-height 15 -radix hexadecimal}} /testbench/cic_lfr_1/data_out_256
31 add wave -noupdate -group CIC_16 -radix hexadecimal -childformat {{/testbench/cic_1/I_data(3) -radix hexadecimal} {/testbench/cic_1/I_data(2) -radix hexadecimal} {/testbench/cic_1/I_data(1) -radix hexadecimal} {/testbench/cic_1/I_data(0) -radix hexadecimal}} -expand -subitemconfig {/testbench/cic_1/I_data(3) {-height 15 -radix hexadecimal} /testbench/cic_1/I_data(2) {-height 15 -radix hexadecimal} /testbench/cic_1/I_data(1) {-height 15 -radix hexadecimal} /testbench/cic_1/I_data(0) {-height 15 -radix hexadecimal}} /testbench/cic_1/I_data
32 add wave -noupdate -expand -group CIC_LFR -radix hexadecimal /testbench/cic_lfr_1/data_out_256_valid
32 add wave -noupdate -group CIC_16 -radix hexadecimal /testbench/cic_1/I_valid
33 add wave -noupdate -format Analog-Step -height 74 -max 6000000.0 -min 6.0000000000000002e-06 -radix decimal /testbench/cic_lfr_1/sample_out_reg16_s(0)
33 add wave -noupdate -group CIC_16 -radix hexadecimal -childformat {{/testbench/cic_1/C_data(3) -radix hexadecimal -childformat {{/testbench/cic_1/C_data(3)(30) -radix hexadecimal} {/testbench/cic_1/C_data(3)(29) -radix hexadecimal} {/testbench/cic_1/C_data(3)(28) -radix hexadecimal} {/testbench/cic_1/C_data(3)(27) -radix hexadecimal} {/testbench/cic_1/C_data(3)(26) -radix hexadecimal} {/testbench/cic_1/C_data(3)(25) -radix hexadecimal} {/testbench/cic_1/C_data(3)(24) -radix hexadecimal} {/testbench/cic_1/C_data(3)(23) -radix hexadecimal} {/testbench/cic_1/C_data(3)(22) -radix hexadecimal} {/testbench/cic_1/C_data(3)(21) -radix hexadecimal} {/testbench/cic_1/C_data(3)(20) -radix hexadecimal} {/testbench/cic_1/C_data(3)(19) -radix hexadecimal} {/testbench/cic_1/C_data(3)(18) -radix hexadecimal} {/testbench/cic_1/C_data(3)(17) -radix hexadecimal} {/testbench/cic_1/C_data(3)(16) -radix hexadecimal} {/testbench/cic_1/C_data(3)(15) -radix hexadecimal} {/testbench/cic_1/C_data(3)(14) -radix hexadecimal} {/testbench/cic_1/C_data(3)(13) -radix hexadecimal} {/testbench/cic_1/C_data(3)(12) -radix hexadecimal} {/testbench/cic_1/C_data(3)(11) -radix hexadecimal} {/testbench/cic_1/C_data(3)(10) -radix hexadecimal} {/testbench/cic_1/C_data(3)(9) -radix hexadecimal} {/testbench/cic_1/C_data(3)(8) -radix hexadecimal} {/testbench/cic_1/C_data(3)(7) -radix hexadecimal} {/testbench/cic_1/C_data(3)(6) -radix hexadecimal} {/testbench/cic_1/C_data(3)(5) -radix hexadecimal} {/testbench/cic_1/C_data(3)(4) -radix hexadecimal} {/testbench/cic_1/C_data(3)(3) -radix hexadecimal} {/testbench/cic_1/C_data(3)(2) -radix hexadecimal} {/testbench/cic_1/C_data(3)(1) -radix hexadecimal} {/testbench/cic_1/C_data(3)(0) -radix hexadecimal}}} {/testbench/cic_1/C_data(2) -radix hexadecimal} {/testbench/cic_1/C_data(1) -radix hexadecimal} {/testbench/cic_1/C_data(0) -radix hexadecimal}} -expand -subitemconfig {/testbench/cic_1/C_data(3) {-height 15 -radix hexadecimal -childformat {{/testbench/cic_1/C_data(3)(30) -radix hexadecimal} {/testbench/cic_1/C_data(3)(29) -radix hexadecimal} {/testbench/cic_1/C_data(3)(28) -radix hexadecimal} {/testbench/cic_1/C_data(3)(27) -radix hexadecimal} {/testbench/cic_1/C_data(3)(26) -radix hexadecimal} {/testbench/cic_1/C_data(3)(25) -radix hexadecimal} {/testbench/cic_1/C_data(3)(24) -radix hexadecimal} {/testbench/cic_1/C_data(3)(23) -radix hexadecimal} {/testbench/cic_1/C_data(3)(22) -radix hexadecimal} {/testbench/cic_1/C_data(3)(21) -radix hexadecimal} {/testbench/cic_1/C_data(3)(20) -radix hexadecimal} {/testbench/cic_1/C_data(3)(19) -radix hexadecimal} {/testbench/cic_1/C_data(3)(18) -radix hexadecimal} {/testbench/cic_1/C_data(3)(17) -radix hexadecimal} {/testbench/cic_1/C_data(3)(16) -radix hexadecimal} {/testbench/cic_1/C_data(3)(15) -radix hexadecimal} {/testbench/cic_1/C_data(3)(14) -radix hexadecimal} {/testbench/cic_1/C_data(3)(13) -radix hexadecimal} {/testbench/cic_1/C_data(3)(12) -radix hexadecimal} {/testbench/cic_1/C_data(3)(11) -radix hexadecimal} {/testbench/cic_1/C_data(3)(10) -radix hexadecimal} {/testbench/cic_1/C_data(3)(9) -radix hexadecimal} {/testbench/cic_1/C_data(3)(8) -radix hexadecimal} {/testbench/cic_1/C_data(3)(7) -radix hexadecimal} {/testbench/cic_1/C_data(3)(6) -radix hexadecimal} {/testbench/cic_1/C_data(3)(5) -radix hexadecimal} {/testbench/cic_1/C_data(3)(4) -radix hexadecimal} {/testbench/cic_1/C_data(3)(3) -radix hexadecimal} {/testbench/cic_1/C_data(3)(2) -radix hexadecimal} {/testbench/cic_1/C_data(3)(1) -radix hexadecimal} {/testbench/cic_1/C_data(3)(0) -radix hexadecimal}}} /testbench/cic_1/C_data(3)(30) {-height 15 -radix hexadecimal} /testbench/cic_1/C_data(3)(29) {-height 15 -radix hexadecimal} /testbench/cic_1/C_data(3)(28) {-height 15 -radix hexadecimal} /testbench/cic_1/C_data(3)(27) {-height 15 -radix hexadecimal} /testbench/cic_1/C_data(3)(26) {-height 15 -radix hexadecimal} /testbench/cic_1/C_data(3)(25) {-height 15 -radix hexadecimal} /testbench/cic_1/C_data(3)(24) {-height 15 -radix hexadecimal} /testbench/cic_1/C_data(3)(23) {-height 15 -radix hexadecimal} /testbench/cic_1/C_data(3)(22) {-height 15 -radix hexadecimal} /testbench/cic_1/C_data(3)(21) {-height 15 -radix hexadecimal} /testbench/cic_1/C_data(3)(20) {-height 15 -radix hexadecimal} /testbench/cic_1/C_data(3)(19) {-height 15 -radix hexadecimal} /testbench/cic_1/C_data(3)(18) {-height 15 -radix hexadecimal} /testbench/cic_1/C_data(3)(17) {-height 15 -radix hexadecimal} /testbench/cic_1/C_data(3)(16) {-height 15 -radix hexadecimal} /testbench/cic_1/C_data(3)(15) {-height 15 -radix hexadecimal} /testbench/cic_1/C_data(3)(14) {-height 15 -radix hexadecimal} /testbench/cic_1/C_data(3)(13) {-height 15 -radix hexadecimal} /testbench/cic_1/C_data(3)(12) {-height 15 -radix hexadecimal} /testbench/cic_1/C_data(3)(11) {-height 15 -radix hexadecimal} /testbench/cic_1/C_data(3)(10) {-height 15 -radix hexadecimal} /testbench/cic_1/C_data(3)(9) {-height 15 -radix hexadecimal} /testbench/cic_1/C_data(3)(8) {-height 15 -radix hexadecimal} /testbench/cic_1/C_data(3)(7) {-height 15 -radix hexadecimal} /testbench/cic_1/C_data(3)(6) {-height 15 -radix hexadecimal} /testbench/cic_1/C_data(3)(5) {-height 15 -radix hexadecimal} /testbench/cic_1/C_data(3)(4) {-height 15 -radix hexadecimal} /testbench/cic_1/C_data(3)(3) {-height 15 -radix hexadecimal} /testbench/cic_1/C_data(3)(2) {-height 15 -radix hexadecimal} /testbench/cic_1/C_data(3)(1) {-height 15 -radix hexadecimal} /testbench/cic_1/C_data(3)(0) {-height 15 -radix hexadecimal} /testbench/cic_1/C_data(2) {-height 15 -radix hexadecimal} /testbench/cic_1/C_data(1) {-height 15 -radix hexadecimal} /testbench/cic_1/C_data(0) {-height 15 -radix hexadecimal}} /testbench/cic_1/C_data
34 add wave -noupdate -format Analog-Step -height 200 -max 200.0 -min -200.0 -radix decimal /testbench/cic_1/data_out
34 add wave -noupdate -group CIC_16 -radix hexadecimal /testbench/cic_1/C_valid
35 add wave -noupdate -group temp -format Analog-Step -height 200 -max 200.0 -min -200.0 -radix decimal -childformat {{/testbench/cic_lfr_1/data_out_16(0)(15) -radix hexadecimal} {/testbench/cic_lfr_1/data_out_16(0)(14) -radix hexadecimal} {/testbench/cic_lfr_1/data_out_16(0)(13) -radix hexadecimal} {/testbench/cic_lfr_1/data_out_16(0)(12) -radix hexadecimal} {/testbench/cic_lfr_1/data_out_16(0)(11) -radix hexadecimal} {/testbench/cic_lfr_1/data_out_16(0)(10) -radix hexadecimal} {/testbench/cic_lfr_1/data_out_16(0)(9) -radix hexadecimal} {/testbench/cic_lfr_1/data_out_16(0)(8) -radix hexadecimal} {/testbench/cic_lfr_1/data_out_16(0)(7) -radix hexadecimal} {/testbench/cic_lfr_1/data_out_16(0)(6) -radix hexadecimal} {/testbench/cic_lfr_1/data_out_16(0)(5) -radix hexadecimal} {/testbench/cic_lfr_1/data_out_16(0)(4) -radix hexadecimal} {/testbench/cic_lfr_1/data_out_16(0)(3) -radix hexadecimal} {/testbench/cic_lfr_1/data_out_16(0)(2) -radix hexadecimal} {/testbench/cic_lfr_1/data_out_16(0)(1) -radix hexadecimal} {/testbench/cic_lfr_1/data_out_16(0)(0) -radix hexadecimal}} -subitemconfig {/testbench/cic_lfr_1/data_out_16(0)(15) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/data_out_16(0)(14) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/data_out_16(0)(13) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/data_out_16(0)(12) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/data_out_16(0)(11) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/data_out_16(0)(10) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/data_out_16(0)(9) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/data_out_16(0)(8) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/data_out_16(0)(7) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/data_out_16(0)(6) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/data_out_16(0)(5) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/data_out_16(0)(4) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/data_out_16(0)(3) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/data_out_16(0)(2) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/data_out_16(0)(1) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/data_out_16(0)(0) {-height 15 -radix hexadecimal}} /testbench/cic_lfr_1/data_out_16(0)
35 add wave -noupdate -group CIC_16 -radix hexadecimal /testbench/cic_1/data_in
36 add wave -noupdate -group temp -radix hexadecimal -childformat {{/testbench/cic_lfr_1/sample_out_reg16_s(5) -radix hexadecimal -childformat {{/testbench/cic_lfr_1/sample_out_reg16_s(5)(31) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(5)(30) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(5)(29) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(5)(28) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(5)(27) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(5)(26) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(5)(25) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(5)(24) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(5)(23) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(5)(22) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(5)(21) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(5)(20) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(5)(19) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(5)(18) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(5)(17) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(5)(16) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(5)(15) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(5)(14) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(5)(13) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(5)(12) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(5)(11) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(5)(10) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(5)(9) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(5)(8) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(5)(7) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(5)(6) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(5)(5) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(5)(4) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(5)(3) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(5)(2) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(5)(1) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(5)(0) -radix hexadecimal}}} {/testbench/cic_lfr_1/sample_out_reg16_s(4) -radix hexadecimal -childformat {{/testbench/cic_lfr_1/sample_out_reg16_s(4)(31) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(4)(30) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(4)(29) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(4)(28) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(4)(27) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(4)(26) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(4)(25) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(4)(24) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(4)(23) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(4)(22) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(4)(21) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(4)(20) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(4)(19) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(4)(18) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(4)(17) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(4)(16) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(4)(15) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(4)(14) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(4)(13) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(4)(12) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(4)(11) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(4)(10) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(4)(9) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(4)(8) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(4)(7) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(4)(6) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(4)(5) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(4)(4) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(4)(3) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(4)(2) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(4)(1) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(4)(0) -radix hexadecimal}}} {/testbench/cic_lfr_1/sample_out_reg16_s(3) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(2) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(1) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(0) -radix hexadecimal}} -subitemconfig {/testbench/cic_lfr_1/sample_out_reg16_s(5) {-height 15 -radix hexadecimal -childformat {{/testbench/cic_lfr_1/sample_out_reg16_s(5)(31) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(5)(30) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(5)(29) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(5)(28) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(5)(27) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(5)(26) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(5)(25) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(5)(24) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(5)(23) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(5)(22) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(5)(21) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(5)(20) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(5)(19) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(5)(18) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(5)(17) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(5)(16) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(5)(15) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(5)(14) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(5)(13) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(5)(12) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(5)(11) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(5)(10) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(5)(9) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(5)(8) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(5)(7) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(5)(6) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(5)(5) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(5)(4) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(5)(3) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(5)(2) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(5)(1) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(5)(0) -radix hexadecimal}}} /testbench/cic_lfr_1/sample_out_reg16_s(5)(31) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(5)(30) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(5)(29) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(5)(28) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(5)(27) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(5)(26) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(5)(25) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(5)(24) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(5)(23) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(5)(22) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(5)(21) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(5)(20) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(5)(19) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(5)(18) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(5)(17) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(5)(16) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(5)(15) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(5)(14) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(5)(13) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(5)(12) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(5)(11) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(5)(10) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(5)(9) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(5)(8) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(5)(7) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(5)(6) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(5)(5) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(5)(4) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(5)(3) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(5)(2) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(5)(1) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(5)(0) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(4) {-height 15 -radix hexadecimal -childformat {{/testbench/cic_lfr_1/sample_out_reg16_s(4)(31) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(4)(30) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(4)(29) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(4)(28) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(4)(27) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(4)(26) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(4)(25) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(4)(24) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(4)(23) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(4)(22) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(4)(21) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(4)(20) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(4)(19) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(4)(18) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(4)(17) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(4)(16) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(4)(15) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(4)(14) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(4)(13) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(4)(12) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(4)(11) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(4)(10) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(4)(9) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(4)(8) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(4)(7) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(4)(6) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(4)(5) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(4)(4) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(4)(3) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(4)(2) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(4)(1) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(4)(0) -radix hexadecimal}}} /testbench/cic_lfr_1/sample_out_reg16_s(4)(31) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(4)(30) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(4)(29) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(4)(28) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(4)(27) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(4)(26) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(4)(25) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(4)(24) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(4)(23) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(4)(22) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(4)(21) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(4)(20) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(4)(19) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(4)(18) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(4)(17) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(4)(16) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(4)(15) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(4)(14) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(4)(13) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(4)(12) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(4)(11) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(4)(10) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(4)(9) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(4)(8) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(4)(7) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(4)(6) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(4)(5) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(4)(4) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(4)(3) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(4)(2) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(4)(1) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(4)(0) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(3) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(2) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(1) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(0) {-height 15 -radix hexadecimal}} /testbench/cic_lfr_1/sample_out_reg16_s
36 add wave -noupdate -group CIC_16 -radix hexadecimal /testbench/cic_1/data_in_valid
37 add wave -noupdate -group temp -radix hexadecimal -childformat {{/testbench/cic_lfr_1/sample_out_reg256_s(5) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg256_s(4) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg256_s(3) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg256_s(2) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg256_s(1) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg256_s(0) -radix hexadecimal}} -subitemconfig {/testbench/cic_lfr_1/sample_out_reg256_s(5) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg256_s(4) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg256_s(3) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg256_s(2) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg256_s(1) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg256_s(0) {-height 15 -radix hexadecimal}} /testbench/cic_lfr_1/sample_out_reg256_s
37 add wave -noupdate -group CIC_16 -radix hexadecimal /testbench/cic_1/data_out
38 add wave -noupdate -group temp -format Analog-Step -height 74 -max 6000000.0 -min 6.0000000000000002e-06 -radix decimal /testbench/cic_lfr_1/sample_out_reg16_s(0)
38 add wave -noupdate -group CIC_16 -radix hexadecimal /testbench/cic_1/data_out_valid
39 add wave -noupdate -group temp -format Analog-Step -height 200 -max 200.0 -min -200.0 -radix decimal /testbench/cic_1/data_out
39 add wave -noupdate -group CIC_16 -radix hexadecimal -childformat {{/testbench/cic_1/I_data(3) -radix hexadecimal} {/testbench/cic_1/I_data(2) -radix hexadecimal} {/testbench/cic_1/I_data(1) -radix hexadecimal} {/testbench/cic_1/I_data(0) -radix hexadecimal}} -expand -subitemconfig {/testbench/cic_1/I_data(3) {-height 15 -radix hexadecimal} /testbench/cic_1/I_data(2) {-height 15 -radix hexadecimal} /testbench/cic_1/I_data(1) {-height 15 -radix hexadecimal} /testbench/cic_1/I_data(0) {-height 15 -radix hexadecimal}} /testbench/cic_1/I_data
40 add wave -noupdate -radix hexadecimal -childformat {{/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(0) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(1) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(2) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(3) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(4) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(5) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(6) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(7) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(8) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(9) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(10) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(11) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(12) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(13) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(14) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(15) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(16) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(17) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(18) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(19) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(20) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(21) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(22) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(23) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(24) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(25) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(26) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(27) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(28) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(29) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(30) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(31) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(32) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(33) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(34) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(35) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(36) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(37) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(38) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(39) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(40) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(41) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(42) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(43) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(44) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(45) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(46) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(47) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(48) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(49) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(50) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(51) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(52) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(53) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(54) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(55) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(56) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(57) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(58) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(59) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(60) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(61) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(62) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(63) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(64) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(65) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(66) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(67) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(68) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(69) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(70) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(71) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(72) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(73) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(74) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(75) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(76) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(77) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(78) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(79) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(80) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(81) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(82) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(83) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(84) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(85) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(86) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(87) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(88) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(89) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(90) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(91) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(92) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(93) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(94) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(95) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(96) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(97) -radix hexadecimal} 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/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(33) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(34) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(35) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(36) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(37) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(38) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(39) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(40) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(41) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(42) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(43) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(44) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(45) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(46) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(47) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(48) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(49) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(50) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(51) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(52) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(53) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(54) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(55) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(56) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(57) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(58) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(59) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(60) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(61) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(62) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(63) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(64) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(65) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(66) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(67) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(68) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(69) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(70) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(71) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(72) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(73) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(74) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(75) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(76) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(77) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(78) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(79) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(80) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(81) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(82) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(83) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(84) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(85) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(86) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(87) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(88) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(89) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(90) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(91) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(92) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(93) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(94) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(95) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(96) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(97) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(98) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(99) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(100) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(101) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(102) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(103) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(104) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(105) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(106) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(107) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(108) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(109) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(110) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(111) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(112) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(113) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(114) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(115) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(116) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(117) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(118) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(119) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(120) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(121) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(122) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(123) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(124) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(125) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(126) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(127) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(128) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(129) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(130) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(131) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(132) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(133) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(134) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(135) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(136) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(137) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(138) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(139) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(140) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(141) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(142) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(143) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(144) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(145) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(146) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(147) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(148) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(149) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(150) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(151) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(152) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(153) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(154) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(155) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(156) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(157) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(158) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(159) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(160) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(161) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(162) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(163) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(164) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(165) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(166) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(167) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(168) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(169) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(170) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(171) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(172) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(173) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(174) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(175) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(176) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(177) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(178) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(179) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(180) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(181) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(182) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(183) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(184) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(185) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(186) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(187) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(188) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(189) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(190) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(191) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(192) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(193) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(194) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(195) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(196) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(197) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(198) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(199) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(200) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(201) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(202) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(203) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(204) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(205) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(206) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(207) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(208) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(209) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(210) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(211) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(212) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(213) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(214) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(215) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(216) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(217) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(218) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(219) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(220) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(221) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(222) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(223) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(224) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(225) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(226) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(227) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(228) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(229) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(230) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(231) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(232) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(233) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(234) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(235) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(236) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(237) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(238) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(239) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(240) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(241) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(242) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(243) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(244) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(245) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(246) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(247) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(248) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(249) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(250) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(251) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(252) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(253) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(254) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(255) {-height 15 -radix hexadecimal}} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray
40 add wave -noupdate -group CIC_16 -radix hexadecimal /testbench/cic_1/I_valid
41 add wave -noupdate -radix decimal -childformat {{/testbench/cic_lfr_r2_1/data_out_16(5) -radix hexadecimal} {/testbench/cic_lfr_r2_1/data_out_16(4) -radix hexadecimal} {/testbench/cic_lfr_r2_1/data_out_16(3) -radix hexadecimal} {/testbench/cic_lfr_r2_1/data_out_16(2) -radix hexadecimal} {/testbench/cic_lfr_r2_1/data_out_16(1) -radix hexadecimal} {/testbench/cic_lfr_r2_1/data_out_16(0) -radix hexadecimal}} -expand -subitemconfig {/testbench/cic_lfr_r2_1/data_out_16(5) {-height 15 -radix hexadecimal} /testbench/cic_lfr_r2_1/data_out_16(4) {-height 15 -radix hexadecimal} /testbench/cic_lfr_r2_1/data_out_16(3) {-height 15 -radix hexadecimal} /testbench/cic_lfr_r2_1/data_out_16(2) {-height 15 -radix hexadecimal} /testbench/cic_lfr_r2_1/data_out_16(1) {-height 15 -radix hexadecimal} /testbench/cic_lfr_r2_1/data_out_16(0) {-height 15 -radix hexadecimal}} /testbench/cic_lfr_r2_1/data_out_16
41 add wave -noupdate -group CIC_16 -radix hexadecimal -childformat {{/testbench/cic_1/C_data(3) -radix hexadecimal -childformat {{/testbench/cic_1/C_data(3)(30) -radix hexadecimal} {/testbench/cic_1/C_data(3)(29) -radix hexadecimal} {/testbench/cic_1/C_data(3)(28) -radix hexadecimal} {/testbench/cic_1/C_data(3)(27) -radix hexadecimal} {/testbench/cic_1/C_data(3)(26) -radix hexadecimal} {/testbench/cic_1/C_data(3)(25) -radix hexadecimal} {/testbench/cic_1/C_data(3)(24) -radix hexadecimal} {/testbench/cic_1/C_data(3)(23) -radix hexadecimal} {/testbench/cic_1/C_data(3)(22) -radix hexadecimal} {/testbench/cic_1/C_data(3)(21) -radix hexadecimal} {/testbench/cic_1/C_data(3)(20) -radix hexadecimal} {/testbench/cic_1/C_data(3)(19) -radix hexadecimal} {/testbench/cic_1/C_data(3)(18) -radix hexadecimal} {/testbench/cic_1/C_data(3)(17) -radix hexadecimal} {/testbench/cic_1/C_data(3)(16) -radix hexadecimal} {/testbench/cic_1/C_data(3)(15) -radix hexadecimal} {/testbench/cic_1/C_data(3)(14) -radix hexadecimal} {/testbench/cic_1/C_data(3)(13) -radix hexadecimal} {/testbench/cic_1/C_data(3)(12) -radix hexadecimal} {/testbench/cic_1/C_data(3)(11) -radix hexadecimal} {/testbench/cic_1/C_data(3)(10) -radix hexadecimal} {/testbench/cic_1/C_data(3)(9) -radix hexadecimal} {/testbench/cic_1/C_data(3)(8) -radix hexadecimal} {/testbench/cic_1/C_data(3)(7) -radix hexadecimal} {/testbench/cic_1/C_data(3)(6) -radix hexadecimal} {/testbench/cic_1/C_data(3)(5) -radix hexadecimal} {/testbench/cic_1/C_data(3)(4) -radix hexadecimal} {/testbench/cic_1/C_data(3)(3) -radix hexadecimal} {/testbench/cic_1/C_data(3)(2) -radix hexadecimal} {/testbench/cic_1/C_data(3)(1) -radix hexadecimal} {/testbench/cic_1/C_data(3)(0) -radix hexadecimal}}} {/testbench/cic_1/C_data(2) -radix hexadecimal} {/testbench/cic_1/C_data(1) -radix hexadecimal} {/testbench/cic_1/C_data(0) -radix hexadecimal}} -expand -subitemconfig {/testbench/cic_1/C_data(3) {-height 15 -radix hexadecimal -childformat {{/testbench/cic_1/C_data(3)(30) -radix hexadecimal} {/testbench/cic_1/C_data(3)(29) -radix hexadecimal} {/testbench/cic_1/C_data(3)(28) -radix hexadecimal} {/testbench/cic_1/C_data(3)(27) -radix hexadecimal} {/testbench/cic_1/C_data(3)(26) -radix hexadecimal} {/testbench/cic_1/C_data(3)(25) -radix hexadecimal} {/testbench/cic_1/C_data(3)(24) -radix hexadecimal} {/testbench/cic_1/C_data(3)(23) -radix hexadecimal} {/testbench/cic_1/C_data(3)(22) -radix hexadecimal} {/testbench/cic_1/C_data(3)(21) -radix hexadecimal} {/testbench/cic_1/C_data(3)(20) -radix hexadecimal} {/testbench/cic_1/C_data(3)(19) -radix hexadecimal} {/testbench/cic_1/C_data(3)(18) -radix hexadecimal} {/testbench/cic_1/C_data(3)(17) -radix hexadecimal} {/testbench/cic_1/C_data(3)(16) -radix hexadecimal} {/testbench/cic_1/C_data(3)(15) -radix hexadecimal} {/testbench/cic_1/C_data(3)(14) -radix hexadecimal} {/testbench/cic_1/C_data(3)(13) -radix hexadecimal} {/testbench/cic_1/C_data(3)(12) -radix hexadecimal} {/testbench/cic_1/C_data(3)(11) -radix hexadecimal} {/testbench/cic_1/C_data(3)(10) -radix hexadecimal} {/testbench/cic_1/C_data(3)(9) -radix hexadecimal} {/testbench/cic_1/C_data(3)(8) -radix hexadecimal} {/testbench/cic_1/C_data(3)(7) -radix hexadecimal} {/testbench/cic_1/C_data(3)(6) -radix hexadecimal} {/testbench/cic_1/C_data(3)(5) -radix hexadecimal} {/testbench/cic_1/C_data(3)(4) -radix hexadecimal} {/testbench/cic_1/C_data(3)(3) -radix hexadecimal} {/testbench/cic_1/C_data(3)(2) -radix hexadecimal} {/testbench/cic_1/C_data(3)(1) -radix hexadecimal} {/testbench/cic_1/C_data(3)(0) -radix hexadecimal}}} /testbench/cic_1/C_data(3)(30) {-height 15 -radix hexadecimal} /testbench/cic_1/C_data(3)(29) {-height 15 -radix hexadecimal} /testbench/cic_1/C_data(3)(28) {-height 15 -radix hexadecimal} /testbench/cic_1/C_data(3)(27) {-height 15 -radix hexadecimal} /testbench/cic_1/C_data(3)(26) {-height 15 -radix hexadecimal} /testbench/cic_1/C_data(3)(25) {-height 15 -radix hexadecimal} /testbench/cic_1/C_data(3)(24) {-height 15 -radix hexadecimal} /testbench/cic_1/C_data(3)(23) {-height 15 -radix hexadecimal} /testbench/cic_1/C_data(3)(22) {-height 15 -radix hexadecimal} /testbench/cic_1/C_data(3)(21) {-height 15 -radix hexadecimal} /testbench/cic_1/C_data(3)(20) {-height 15 -radix hexadecimal} /testbench/cic_1/C_data(3)(19) {-height 15 -radix hexadecimal} /testbench/cic_1/C_data(3)(18) {-height 15 -radix hexadecimal} /testbench/cic_1/C_data(3)(17) {-height 15 -radix hexadecimal} /testbench/cic_1/C_data(3)(16) {-height 15 -radix hexadecimal} /testbench/cic_1/C_data(3)(15) {-height 15 -radix hexadecimal} /testbench/cic_1/C_data(3)(14) {-height 15 -radix hexadecimal} /testbench/cic_1/C_data(3)(13) {-height 15 -radix hexadecimal} /testbench/cic_1/C_data(3)(12) {-height 15 -radix hexadecimal} /testbench/cic_1/C_data(3)(11) {-height 15 -radix hexadecimal} /testbench/cic_1/C_data(3)(10) {-height 15 -radix hexadecimal} /testbench/cic_1/C_data(3)(9) {-height 15 -radix hexadecimal} /testbench/cic_1/C_data(3)(8) {-height 15 -radix hexadecimal} /testbench/cic_1/C_data(3)(7) {-height 15 -radix hexadecimal} /testbench/cic_1/C_data(3)(6) {-height 15 -radix hexadecimal} /testbench/cic_1/C_data(3)(5) {-height 15 -radix hexadecimal} /testbench/cic_1/C_data(3)(4) {-height 15 -radix hexadecimal} /testbench/cic_1/C_data(3)(3) {-height 15 -radix hexadecimal} /testbench/cic_1/C_data(3)(2) {-height 15 -radix hexadecimal} /testbench/cic_1/C_data(3)(1) {-height 15 -radix hexadecimal} /testbench/cic_1/C_data(3)(0) {-height 15 -radix hexadecimal} /testbench/cic_1/C_data(2) {-height 15 -radix hexadecimal} /testbench/cic_1/C_data(1) {-height 15 -radix hexadecimal} /testbench/cic_1/C_data(0) {-height 15 -radix hexadecimal}} /testbench/cic_1/C_data
42 add wave -noupdate -radix decimal -childformat {{/testbench/cic_lfr_r2_1/data_out_256(5) -radix decimal} {/testbench/cic_lfr_r2_1/data_out_256(4) -radix decimal} {/testbench/cic_lfr_r2_1/data_out_256(3) -radix decimal} {/testbench/cic_lfr_r2_1/data_out_256(2) -radix decimal} {/testbench/cic_lfr_r2_1/data_out_256(1) -radix decimal} {/testbench/cic_lfr_r2_1/data_out_256(0) -radix decimal}} -expand -subitemconfig {/testbench/cic_lfr_r2_1/data_out_256(5) {-height 15 -radix decimal} /testbench/cic_lfr_r2_1/data_out_256(4) {-height 15 -radix decimal} /testbench/cic_lfr_r2_1/data_out_256(3) {-height 15 -radix decimal} /testbench/cic_lfr_r2_1/data_out_256(2) {-height 15 -radix decimal} /testbench/cic_lfr_r2_1/data_out_256(1) {-height 15 -radix decimal} /testbench/cic_lfr_r2_1/data_out_256(0) {-height 15 -radix decimal}} /testbench/cic_lfr_r2_1/data_out_256
42 add wave -noupdate -group CIC_16 -radix hexadecimal /testbench/cic_1/C_valid
43 add wave -noupdate /testbench/param_r2
43 add wave -noupdate -group CIC_LFR -radix decimal -childformat {{/testbench/cic_lfr_1/data_in(5) -radix hexadecimal} {/testbench/cic_lfr_1/data_in(4) -radix hexadecimal} {/testbench/cic_lfr_1/data_in(3) -radix hexadecimal} {/testbench/cic_lfr_1/data_in(2) -radix hexadecimal} {/testbench/cic_lfr_1/data_in(1) -radix hexadecimal} {/testbench/cic_lfr_1/data_in(0) -radix hexadecimal}} -expand -subitemconfig {/testbench/cic_lfr_1/data_in(5) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/data_in(4) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/data_in(3) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/data_in(2) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/data_in(1) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/data_in(0) {-height 15 -radix hexadecimal}} /testbench/cic_lfr_1/data_in
44 add wave -noupdate -group lane0 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(0)
44 add wave -noupdate -group CIC_LFR -radix hexadecimal /testbench/cic_lfr_1/data_in_valid
45 add wave -noupdate -group lane0 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(1)
45 add wave -noupdate -group CIC_LFR -radix hexadecimal -childformat {{/testbench/cic_lfr_1/data_out_16(5) -radix hexadecimal} {/testbench/cic_lfr_1/data_out_16(4) -radix hexadecimal} {/testbench/cic_lfr_1/data_out_16(3) -radix hexadecimal} {/testbench/cic_lfr_1/data_out_16(2) -radix hexadecimal} {/testbench/cic_lfr_1/data_out_16(1) -radix hexadecimal} {/testbench/cic_lfr_1/data_out_16(0) -radix hexadecimal -childformat {{/testbench/cic_lfr_1/data_out_16(0)(15) -radix hexadecimal} {/testbench/cic_lfr_1/data_out_16(0)(14) -radix hexadecimal} {/testbench/cic_lfr_1/data_out_16(0)(13) -radix hexadecimal} {/testbench/cic_lfr_1/data_out_16(0)(12) -radix hexadecimal} {/testbench/cic_lfr_1/data_out_16(0)(11) -radix hexadecimal} {/testbench/cic_lfr_1/data_out_16(0)(10) -radix hexadecimal} {/testbench/cic_lfr_1/data_out_16(0)(9) -radix hexadecimal} {/testbench/cic_lfr_1/data_out_16(0)(8) -radix hexadecimal} {/testbench/cic_lfr_1/data_out_16(0)(7) -radix hexadecimal} {/testbench/cic_lfr_1/data_out_16(0)(6) -radix hexadecimal} {/testbench/cic_lfr_1/data_out_16(0)(5) -radix hexadecimal} {/testbench/cic_lfr_1/data_out_16(0)(4) -radix hexadecimal} {/testbench/cic_lfr_1/data_out_16(0)(3) -radix hexadecimal} {/testbench/cic_lfr_1/data_out_16(0)(2) -radix hexadecimal} {/testbench/cic_lfr_1/data_out_16(0)(1) -radix hexadecimal} {/testbench/cic_lfr_1/data_out_16(0)(0) -radix hexadecimal}}}} -expand -subitemconfig {/testbench/cic_lfr_1/data_out_16(5) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/data_out_16(4) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/data_out_16(3) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/data_out_16(2) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/data_out_16(1) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/data_out_16(0) {-height 15 -radix hexadecimal -childformat {{/testbench/cic_lfr_1/data_out_16(0)(15) -radix hexadecimal} {/testbench/cic_lfr_1/data_out_16(0)(14) -radix hexadecimal} {/testbench/cic_lfr_1/data_out_16(0)(13) -radix hexadecimal} {/testbench/cic_lfr_1/data_out_16(0)(12) -radix hexadecimal} {/testbench/cic_lfr_1/data_out_16(0)(11) -radix hexadecimal} {/testbench/cic_lfr_1/data_out_16(0)(10) -radix hexadecimal} {/testbench/cic_lfr_1/data_out_16(0)(9) -radix hexadecimal} {/testbench/cic_lfr_1/data_out_16(0)(8) -radix hexadecimal} {/testbench/cic_lfr_1/data_out_16(0)(7) -radix hexadecimal} {/testbench/cic_lfr_1/data_out_16(0)(6) -radix hexadecimal} {/testbench/cic_lfr_1/data_out_16(0)(5) -radix hexadecimal} {/testbench/cic_lfr_1/data_out_16(0)(4) -radix hexadecimal} {/testbench/cic_lfr_1/data_out_16(0)(3) -radix hexadecimal} {/testbench/cic_lfr_1/data_out_16(0)(2) -radix hexadecimal} {/testbench/cic_lfr_1/data_out_16(0)(1) -radix hexadecimal} {/testbench/cic_lfr_1/data_out_16(0)(0) -radix hexadecimal}}} /testbench/cic_lfr_1/data_out_16(0)(15) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/data_out_16(0)(14) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/data_out_16(0)(13) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/data_out_16(0)(12) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/data_out_16(0)(11) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/data_out_16(0)(10) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/data_out_16(0)(9) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/data_out_16(0)(8) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/data_out_16(0)(7) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/data_out_16(0)(6) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/data_out_16(0)(5) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/data_out_16(0)(4) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/data_out_16(0)(3) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/data_out_16(0)(2) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/data_out_16(0)(1) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/data_out_16(0)(0) {-height 15 -radix hexadecimal}} /testbench/cic_lfr_1/data_out_16
46 add wave -noupdate -group lane0 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(2)
46 add wave -noupdate -group CIC_LFR -radix hexadecimal /testbench/cic_lfr_1/data_out_16_valid
47 add wave -noupdate -group lane0 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(3)
47 add wave -noupdate -group CIC_LFR -radix hexadecimal -childformat {{/testbench/cic_lfr_1/data_out_256(5) -radix hexadecimal} {/testbench/cic_lfr_1/data_out_256(4) -radix hexadecimal} {/testbench/cic_lfr_1/data_out_256(3) -radix hexadecimal} {/testbench/cic_lfr_1/data_out_256(2) -radix hexadecimal} {/testbench/cic_lfr_1/data_out_256(1) -radix hexadecimal} {/testbench/cic_lfr_1/data_out_256(0) -radix hexadecimal}} -subitemconfig {/testbench/cic_lfr_1/data_out_256(5) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/data_out_256(4) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/data_out_256(3) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/data_out_256(2) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/data_out_256(1) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/data_out_256(0) {-height 15 -radix hexadecimal}} /testbench/cic_lfr_1/data_out_256
48 add wave -noupdate -group lane0 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(4)
48 add wave -noupdate -group CIC_LFR -radix hexadecimal /testbench/cic_lfr_1/data_out_256_valid
49 add wave -noupdate -group lane0 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(5)
49 add wave -noupdate -group CIC_LFR -radix decimal -childformat {{/testbench/cic_lfr_1/data_in(5) -radix hexadecimal} {/testbench/cic_lfr_1/data_in(4) -radix hexadecimal} {/testbench/cic_lfr_1/data_in(3) -radix hexadecimal} {/testbench/cic_lfr_1/data_in(2) -radix hexadecimal} {/testbench/cic_lfr_1/data_in(1) -radix hexadecimal} {/testbench/cic_lfr_1/data_in(0) -radix hexadecimal}} -expand -subitemconfig {/testbench/cic_lfr_1/data_in(5) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/data_in(4) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/data_in(3) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/data_in(2) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/data_in(1) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/data_in(0) {-format Analog-Step -height 74 -max 65534.999999999993 -radix hexadecimal}} /testbench/cic_lfr_1/data_in
50 add wave -noupdate -group lane0 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(6)
50 add wave -noupdate -group CIC_LFR -radix hexadecimal /testbench/cic_lfr_1/data_in_valid
51 add wave -noupdate -group lane0 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(7)
51 add wave -noupdate -group CIC_LFR -radix hexadecimal -childformat {{/testbench/cic_lfr_1/data_out_16(5) -radix hexadecimal} {/testbench/cic_lfr_1/data_out_16(4) -radix hexadecimal} {/testbench/cic_lfr_1/data_out_16(3) -radix hexadecimal} {/testbench/cic_lfr_1/data_out_16(2) -radix hexadecimal} {/testbench/cic_lfr_1/data_out_16(1) -radix hexadecimal} {/testbench/cic_lfr_1/data_out_16(0) -radix hexadecimal -childformat {{/testbench/cic_lfr_1/data_out_16(0)(15) -radix hexadecimal} {/testbench/cic_lfr_1/data_out_16(0)(14) -radix hexadecimal} {/testbench/cic_lfr_1/data_out_16(0)(13) -radix hexadecimal} {/testbench/cic_lfr_1/data_out_16(0)(12) -radix hexadecimal} {/testbench/cic_lfr_1/data_out_16(0)(11) -radix hexadecimal} {/testbench/cic_lfr_1/data_out_16(0)(10) -radix hexadecimal} {/testbench/cic_lfr_1/data_out_16(0)(9) -radix hexadecimal} {/testbench/cic_lfr_1/data_out_16(0)(8) -radix hexadecimal} {/testbench/cic_lfr_1/data_out_16(0)(7) -radix hexadecimal} {/testbench/cic_lfr_1/data_out_16(0)(6) -radix hexadecimal} {/testbench/cic_lfr_1/data_out_16(0)(5) -radix hexadecimal} {/testbench/cic_lfr_1/data_out_16(0)(4) -radix hexadecimal} {/testbench/cic_lfr_1/data_out_16(0)(3) -radix hexadecimal} {/testbench/cic_lfr_1/data_out_16(0)(2) -radix hexadecimal} {/testbench/cic_lfr_1/data_out_16(0)(1) -radix hexadecimal} {/testbench/cic_lfr_1/data_out_16(0)(0) -radix hexadecimal}}}} -expand -subitemconfig {/testbench/cic_lfr_1/data_out_16(5) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/data_out_16(4) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/data_out_16(3) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/data_out_16(2) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/data_out_16(1) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/data_out_16(0) {-height 15 -radix hexadecimal -childformat {{/testbench/cic_lfr_1/data_out_16(0)(15) -radix hexadecimal} {/testbench/cic_lfr_1/data_out_16(0)(14) -radix hexadecimal} {/testbench/cic_lfr_1/data_out_16(0)(13) -radix hexadecimal} {/testbench/cic_lfr_1/data_out_16(0)(12) -radix hexadecimal} {/testbench/cic_lfr_1/data_out_16(0)(11) -radix hexadecimal} {/testbench/cic_lfr_1/data_out_16(0)(10) -radix hexadecimal} {/testbench/cic_lfr_1/data_out_16(0)(9) -radix hexadecimal} {/testbench/cic_lfr_1/data_out_16(0)(8) -radix hexadecimal} {/testbench/cic_lfr_1/data_out_16(0)(7) -radix hexadecimal} {/testbench/cic_lfr_1/data_out_16(0)(6) -radix hexadecimal} {/testbench/cic_lfr_1/data_out_16(0)(5) -radix hexadecimal} {/testbench/cic_lfr_1/data_out_16(0)(4) -radix hexadecimal} {/testbench/cic_lfr_1/data_out_16(0)(3) -radix hexadecimal} {/testbench/cic_lfr_1/data_out_16(0)(2) -radix hexadecimal} {/testbench/cic_lfr_1/data_out_16(0)(1) -radix hexadecimal} {/testbench/cic_lfr_1/data_out_16(0)(0) -radix hexadecimal}}} /testbench/cic_lfr_1/data_out_16(0)(15) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/data_out_16(0)(14) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/data_out_16(0)(13) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/data_out_16(0)(12) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/data_out_16(0)(11) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/data_out_16(0)(10) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/data_out_16(0)(9) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/data_out_16(0)(8) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/data_out_16(0)(7) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/data_out_16(0)(6) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/data_out_16(0)(5) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/data_out_16(0)(4) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/data_out_16(0)(3) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/data_out_16(0)(2) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/data_out_16(0)(1) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/data_out_16(0)(0) {-height 15 -radix hexadecimal}} /testbench/cic_lfr_1/data_out_16
52 add wave -noupdate -group lane0 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(8)
52 add wave -noupdate -group CIC_LFR -radix hexadecimal /testbench/cic_lfr_1/data_out_16_valid
53 add wave -noupdate -group lane0 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(9)
53 add wave -noupdate -group CIC_LFR -radix hexadecimal -childformat {{/testbench/cic_lfr_1/data_out_256(5) -radix hexadecimal} {/testbench/cic_lfr_1/data_out_256(4) -radix hexadecimal} {/testbench/cic_lfr_1/data_out_256(3) -radix hexadecimal} {/testbench/cic_lfr_1/data_out_256(2) -radix hexadecimal} {/testbench/cic_lfr_1/data_out_256(1) -radix hexadecimal} {/testbench/cic_lfr_1/data_out_256(0) -radix hexadecimal}} -subitemconfig {/testbench/cic_lfr_1/data_out_256(5) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/data_out_256(4) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/data_out_256(3) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/data_out_256(2) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/data_out_256(1) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/data_out_256(0) {-height 15 -radix hexadecimal}} /testbench/cic_lfr_1/data_out_256
54 add wave -noupdate -group lane0 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(10)
54 add wave -noupdate -group CIC_LFR -radix hexadecimal /testbench/cic_lfr_1/data_out_256_valid
55 add wave -noupdate -group lane0 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(11)
55 add wave -noupdate -group ALL -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray
56 add wave -noupdate -group lane0 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(12)
56 add wave -noupdate -group ALL -radix hexadecimal /testbench/cic_lfr_r2_1/data_out
57 add wave -noupdate -group lane0 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(13)
57 add wave -noupdate -group ALL /testbench/cic_lfr_r2_1/data_out_16_valid_s
58 add wave -noupdate -group lane0 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(14)
58 add wave -noupdate -group ALL /testbench/cic_lfr_r2_1/data_out_16_valid_s1
59 add wave -noupdate -group lane0 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(15)
59 add wave -noupdate -group ALL /testbench/cic_lfr_r2_1/data_out_16_valid_s2
60 add wave -noupdate -group lane0 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(16)
60 add wave -noupdate -group ALL -radix hexadecimal -childformat {{/testbench/cic_lfr_r2_1/sample_out_reg16(15) -radix hexadecimal} {/testbench/cic_lfr_r2_1/sample_out_reg16(14) -radix hexadecimal} {/testbench/cic_lfr_r2_1/sample_out_reg16(13) -radix hexadecimal} {/testbench/cic_lfr_r2_1/sample_out_reg16(12) -radix hexadecimal} {/testbench/cic_lfr_r2_1/sample_out_reg16(11) -radix hexadecimal} {/testbench/cic_lfr_r2_1/sample_out_reg16(10) -radix hexadecimal} {/testbench/cic_lfr_r2_1/sample_out_reg16(9) -radix hexadecimal} {/testbench/cic_lfr_r2_1/sample_out_reg16(8) -radix hexadecimal} {/testbench/cic_lfr_r2_1/sample_out_reg16(7) -radix hexadecimal} {/testbench/cic_lfr_r2_1/sample_out_reg16(6) -radix hexadecimal} {/testbench/cic_lfr_r2_1/sample_out_reg16(5) -radix hexadecimal} {/testbench/cic_lfr_r2_1/sample_out_reg16(4) -radix hexadecimal} {/testbench/cic_lfr_r2_1/sample_out_reg16(3) -radix hexadecimal} {/testbench/cic_lfr_r2_1/sample_out_reg16(2) -radix hexadecimal} {/testbench/cic_lfr_r2_1/sample_out_reg16(1) -radix hexadecimal} {/testbench/cic_lfr_r2_1/sample_out_reg16(0) -radix hexadecimal}} -subitemconfig {/testbench/cic_lfr_r2_1/sample_out_reg16(15) {-height 15 -radix hexadecimal} /testbench/cic_lfr_r2_1/sample_out_reg16(14) {-height 15 -radix hexadecimal} /testbench/cic_lfr_r2_1/sample_out_reg16(13) {-height 15 -radix hexadecimal} /testbench/cic_lfr_r2_1/sample_out_reg16(12) {-height 15 -radix hexadecimal} /testbench/cic_lfr_r2_1/sample_out_reg16(11) {-height 15 -radix hexadecimal} /testbench/cic_lfr_r2_1/sample_out_reg16(10) {-height 15 -radix hexadecimal} /testbench/cic_lfr_r2_1/sample_out_reg16(9) {-height 15 -radix hexadecimal} /testbench/cic_lfr_r2_1/sample_out_reg16(8) {-height 15 -radix hexadecimal} /testbench/cic_lfr_r2_1/sample_out_reg16(7) {-height 15 -radix hexadecimal} /testbench/cic_lfr_r2_1/sample_out_reg16(6) {-height 15 -radix hexadecimal} /testbench/cic_lfr_r2_1/sample_out_reg16(5) {-height 15 -radix hexadecimal} /testbench/cic_lfr_r2_1/sample_out_reg16(4) {-height 15 -radix hexadecimal} /testbench/cic_lfr_r2_1/sample_out_reg16(3) {-height 15 -radix hexadecimal} /testbench/cic_lfr_r2_1/sample_out_reg16(2) {-height 15 -radix hexadecimal} /testbench/cic_lfr_r2_1/sample_out_reg16(1) {-height 15 -radix hexadecimal} /testbench/cic_lfr_r2_1/sample_out_reg16(0) {-height 15 -radix hexadecimal}} /testbench/cic_lfr_r2_1/sample_out_reg16
61 add wave -noupdate -group lane0 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(17)
61 add wave -noupdate -group ALL -radix hexadecimal -childformat {{/testbench/cic_lfr_r2_1/sample_valid_reg16(16) -radix hexadecimal} {/testbench/cic_lfr_r2_1/sample_valid_reg16(15) -radix hexadecimal} {/testbench/cic_lfr_r2_1/sample_valid_reg16(14) -radix hexadecimal} {/testbench/cic_lfr_r2_1/sample_valid_reg16(13) -radix hexadecimal} {/testbench/cic_lfr_r2_1/sample_valid_reg16(12) -radix hexadecimal} {/testbench/cic_lfr_r2_1/sample_valid_reg16(11) -radix hexadecimal} {/testbench/cic_lfr_r2_1/sample_valid_reg16(10) -radix hexadecimal} {/testbench/cic_lfr_r2_1/sample_valid_reg16(9) -radix hexadecimal} {/testbench/cic_lfr_r2_1/sample_valid_reg16(8) -radix hexadecimal} {/testbench/cic_lfr_r2_1/sample_valid_reg16(7) -radix hexadecimal} {/testbench/cic_lfr_r2_1/sample_valid_reg16(6) -radix hexadecimal} {/testbench/cic_lfr_r2_1/sample_valid_reg16(5) -radix hexadecimal} {/testbench/cic_lfr_r2_1/sample_valid_reg16(4) -radix hexadecimal} {/testbench/cic_lfr_r2_1/sample_valid_reg16(3) -radix hexadecimal} {/testbench/cic_lfr_r2_1/sample_valid_reg16(2) -radix hexadecimal} {/testbench/cic_lfr_r2_1/sample_valid_reg16(1) -radix hexadecimal} {/testbench/cic_lfr_r2_1/sample_valid_reg16(0) -radix hexadecimal}} -subitemconfig {/testbench/cic_lfr_r2_1/sample_valid_reg16(16) {-height 15 -radix hexadecimal} /testbench/cic_lfr_r2_1/sample_valid_reg16(15) {-height 15 -radix hexadecimal} /testbench/cic_lfr_r2_1/sample_valid_reg16(14) {-height 15 -radix hexadecimal} /testbench/cic_lfr_r2_1/sample_valid_reg16(13) {-height 15 -radix hexadecimal} /testbench/cic_lfr_r2_1/sample_valid_reg16(12) {-height 15 -radix hexadecimal} /testbench/cic_lfr_r2_1/sample_valid_reg16(11) {-height 15 -radix hexadecimal} /testbench/cic_lfr_r2_1/sample_valid_reg16(10) {-height 15 -radix hexadecimal} /testbench/cic_lfr_r2_1/sample_valid_reg16(9) {-height 15 -radix hexadecimal} /testbench/cic_lfr_r2_1/sample_valid_reg16(8) {-height 15 -radix hexadecimal} /testbench/cic_lfr_r2_1/sample_valid_reg16(7) {-height 15 -radix hexadecimal} /testbench/cic_lfr_r2_1/sample_valid_reg16(6) {-height 15 -radix hexadecimal} /testbench/cic_lfr_r2_1/sample_valid_reg16(5) {-height 15 -radix hexadecimal} /testbench/cic_lfr_r2_1/sample_valid_reg16(4) {-height 15 -radix hexadecimal} /testbench/cic_lfr_r2_1/sample_valid_reg16(3) {-height 15 -radix hexadecimal} /testbench/cic_lfr_r2_1/sample_valid_reg16(2) {-height 15 -radix hexadecimal} /testbench/cic_lfr_r2_1/sample_valid_reg16(1) {-height 15 -radix hexadecimal} /testbench/cic_lfr_r2_1/sample_valid_reg16(0) {-height 15 -radix hexadecimal}} /testbench/cic_lfr_r2_1/sample_valid_reg16
62 add wave -noupdate -group lane0 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(18)
62 add wave -noupdate -group ALL -radix hexadecimal -childformat {{/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(0) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(1) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(2) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(3) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(4) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(5) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(6) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(7) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(8) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(9) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(10) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(11) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(12) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(13) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(14) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(15) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(16) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(17) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(18) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(19) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(20) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(21) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(22) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(23) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(24) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(25) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(26) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(27) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(28) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(29) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(30) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(31) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(32) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(33) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(34) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(35) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(36) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(37) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(38) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(39) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(40) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(41) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(42) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(43) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(44) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(45) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(46) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(47) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(48) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(49) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(50) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(51) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(52) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(53) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(54) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(55) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(56) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(57) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(58) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(59) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(60) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(61) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(62) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(63) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(64) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(65) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(66) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(67) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(68) -radix hexadecimal} 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/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(200) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(201) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(202) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(203) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(204) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(205) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(206) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(207) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(208) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(209) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(210) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(211) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(212) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(213) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(214) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(215) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(216) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(217) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(218) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(219) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(220) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(221) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(222) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(223) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(224) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(225) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(226) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(227) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(228) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(229) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(230) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(231) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(232) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(233) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(234) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(235) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(236) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(237) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(238) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(239) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(240) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(241) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(242) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(243) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(244) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(245) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(246) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(247) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(248) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(249) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(250) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(251) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(252) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(253) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(254) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(255) {-height 15 -radix hexadecimal}} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray
63 add wave -noupdate -group lane0 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(19)
63 add wave -noupdate -group ALL -radix decimal -childformat {{/testbench/cic_lfr_r2_1/data_out_16(5) -radix hexadecimal} {/testbench/cic_lfr_r2_1/data_out_16(4) -radix hexadecimal} {/testbench/cic_lfr_r2_1/data_out_16(3) -radix hexadecimal} {/testbench/cic_lfr_r2_1/data_out_16(2) -radix hexadecimal} {/testbench/cic_lfr_r2_1/data_out_16(1) -radix hexadecimal} {/testbench/cic_lfr_r2_1/data_out_16(0) -radix hexadecimal}} -subitemconfig {/testbench/cic_lfr_r2_1/data_out_16(5) {-height 15 -radix hexadecimal} /testbench/cic_lfr_r2_1/data_out_16(4) {-height 15 -radix hexadecimal} /testbench/cic_lfr_r2_1/data_out_16(3) {-height 15 -radix hexadecimal} /testbench/cic_lfr_r2_1/data_out_16(2) {-height 15 -radix hexadecimal} /testbench/cic_lfr_r2_1/data_out_16(1) {-height 15 -radix hexadecimal} /testbench/cic_lfr_r2_1/data_out_16(0) {-height 15 -radix hexadecimal}} /testbench/cic_lfr_r2_1/data_out_16
64 add wave -noupdate -group lane0 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(20)
64 add wave -noupdate -group ALL -radix decimal -childformat {{/testbench/cic_lfr_r2_1/data_out_256(5) -radix decimal} {/testbench/cic_lfr_r2_1/data_out_256(4) -radix decimal} {/testbench/cic_lfr_r2_1/data_out_256(3) -radix decimal} {/testbench/cic_lfr_r2_1/data_out_256(2) -radix decimal} {/testbench/cic_lfr_r2_1/data_out_256(1) -radix decimal} {/testbench/cic_lfr_r2_1/data_out_256(0) -radix decimal}} -subitemconfig {/testbench/cic_lfr_r2_1/data_out_256(5) {-height 15 -radix decimal} /testbench/cic_lfr_r2_1/data_out_256(4) {-height 15 -radix decimal} /testbench/cic_lfr_r2_1/data_out_256(3) {-height 15 -radix decimal} /testbench/cic_lfr_r2_1/data_out_256(2) {-height 15 -radix decimal} /testbench/cic_lfr_r2_1/data_out_256(1) {-height 15 -radix decimal} /testbench/cic_lfr_r2_1/data_out_256(0) {-height 15 -radix decimal}} /testbench/cic_lfr_r2_1/data_out_256
65 add wave -noupdate -group lane0 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(21)
65 add wave -noupdate -group ALL /testbench/param_r2
66 add wave -noupdate -group lane0 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(22)
66 add wave -noupdate -group ALL -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray
67 add wave -noupdate -group lane0 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(23)
67 add wave -noupdate -group ALL -radix hexadecimal /testbench/cic_lfr_r2_1/data_out
68 add wave -noupdate -group lane0 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(24)
68 add wave -noupdate -group ALL /testbench/cic_lfr_r2_1/data_out_16_valid_s
69 add wave -noupdate -group lane0 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(25)
69 add wave -noupdate -group ALL /testbench/cic_lfr_r2_1/data_out_16_valid_s1
70 add wave -noupdate -group lane0 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(26)
70 add wave -noupdate -group ALL /testbench/cic_lfr_r2_1/data_out_16_valid_s2
71 add wave -noupdate -group lane0 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(27)
71 add wave -noupdate -group ALL -radix hexadecimal -childformat {{/testbench/cic_lfr_r2_1/sample_out_reg16(15) -radix hexadecimal} {/testbench/cic_lfr_r2_1/sample_out_reg16(14) -radix hexadecimal} {/testbench/cic_lfr_r2_1/sample_out_reg16(13) -radix hexadecimal} {/testbench/cic_lfr_r2_1/sample_out_reg16(12) -radix hexadecimal} {/testbench/cic_lfr_r2_1/sample_out_reg16(11) -radix hexadecimal} {/testbench/cic_lfr_r2_1/sample_out_reg16(10) -radix hexadecimal} {/testbench/cic_lfr_r2_1/sample_out_reg16(9) -radix hexadecimal} {/testbench/cic_lfr_r2_1/sample_out_reg16(8) -radix hexadecimal} {/testbench/cic_lfr_r2_1/sample_out_reg16(7) -radix hexadecimal} {/testbench/cic_lfr_r2_1/sample_out_reg16(6) -radix hexadecimal} {/testbench/cic_lfr_r2_1/sample_out_reg16(5) -radix hexadecimal} {/testbench/cic_lfr_r2_1/sample_out_reg16(4) -radix hexadecimal} {/testbench/cic_lfr_r2_1/sample_out_reg16(3) -radix hexadecimal} {/testbench/cic_lfr_r2_1/sample_out_reg16(2) -radix hexadecimal} {/testbench/cic_lfr_r2_1/sample_out_reg16(1) -radix hexadecimal} {/testbench/cic_lfr_r2_1/sample_out_reg16(0) -radix hexadecimal}} -subitemconfig {/testbench/cic_lfr_r2_1/sample_out_reg16(15) {-height 15 -radix hexadecimal} /testbench/cic_lfr_r2_1/sample_out_reg16(14) {-height 15 -radix hexadecimal} /testbench/cic_lfr_r2_1/sample_out_reg16(13) {-height 15 -radix hexadecimal} /testbench/cic_lfr_r2_1/sample_out_reg16(12) {-height 15 -radix hexadecimal} /testbench/cic_lfr_r2_1/sample_out_reg16(11) {-height 15 -radix hexadecimal} /testbench/cic_lfr_r2_1/sample_out_reg16(10) {-height 15 -radix hexadecimal} /testbench/cic_lfr_r2_1/sample_out_reg16(9) {-height 15 -radix hexadecimal} /testbench/cic_lfr_r2_1/sample_out_reg16(8) {-height 15 -radix hexadecimal} /testbench/cic_lfr_r2_1/sample_out_reg16(7) {-height 15 -radix hexadecimal} /testbench/cic_lfr_r2_1/sample_out_reg16(6) {-height 15 -radix hexadecimal} /testbench/cic_lfr_r2_1/sample_out_reg16(5) {-height 15 -radix hexadecimal} /testbench/cic_lfr_r2_1/sample_out_reg16(4) {-height 15 -radix hexadecimal} /testbench/cic_lfr_r2_1/sample_out_reg16(3) {-height 15 -radix hexadecimal} /testbench/cic_lfr_r2_1/sample_out_reg16(2) {-height 15 -radix hexadecimal} /testbench/cic_lfr_r2_1/sample_out_reg16(1) {-height 15 -radix hexadecimal} /testbench/cic_lfr_r2_1/sample_out_reg16(0) {-height 15 -radix hexadecimal}} /testbench/cic_lfr_r2_1/sample_out_reg16
72 add wave -noupdate -group lane0 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(28)
72 add wave -noupdate -group ALL -radix hexadecimal -childformat {{/testbench/cic_lfr_r2_1/sample_valid_reg16(16) -radix hexadecimal} {/testbench/cic_lfr_r2_1/sample_valid_reg16(15) -radix hexadecimal} {/testbench/cic_lfr_r2_1/sample_valid_reg16(14) -radix hexadecimal} {/testbench/cic_lfr_r2_1/sample_valid_reg16(13) -radix hexadecimal} {/testbench/cic_lfr_r2_1/sample_valid_reg16(12) -radix hexadecimal} {/testbench/cic_lfr_r2_1/sample_valid_reg16(11) -radix hexadecimal} {/testbench/cic_lfr_r2_1/sample_valid_reg16(10) -radix hexadecimal} {/testbench/cic_lfr_r2_1/sample_valid_reg16(9) -radix hexadecimal} {/testbench/cic_lfr_r2_1/sample_valid_reg16(8) -radix hexadecimal} {/testbench/cic_lfr_r2_1/sample_valid_reg16(7) -radix hexadecimal} {/testbench/cic_lfr_r2_1/sample_valid_reg16(6) -radix hexadecimal} {/testbench/cic_lfr_r2_1/sample_valid_reg16(5) -radix hexadecimal} {/testbench/cic_lfr_r2_1/sample_valid_reg16(4) -radix hexadecimal} {/testbench/cic_lfr_r2_1/sample_valid_reg16(3) -radix hexadecimal} {/testbench/cic_lfr_r2_1/sample_valid_reg16(2) -radix hexadecimal} {/testbench/cic_lfr_r2_1/sample_valid_reg16(1) -radix hexadecimal} {/testbench/cic_lfr_r2_1/sample_valid_reg16(0) -radix hexadecimal}} -subitemconfig {/testbench/cic_lfr_r2_1/sample_valid_reg16(16) {-height 15 -radix hexadecimal} /testbench/cic_lfr_r2_1/sample_valid_reg16(15) {-height 15 -radix hexadecimal} /testbench/cic_lfr_r2_1/sample_valid_reg16(14) {-height 15 -radix hexadecimal} /testbench/cic_lfr_r2_1/sample_valid_reg16(13) {-height 15 -radix hexadecimal} /testbench/cic_lfr_r2_1/sample_valid_reg16(12) {-height 15 -radix hexadecimal} /testbench/cic_lfr_r2_1/sample_valid_reg16(11) {-height 15 -radix hexadecimal} /testbench/cic_lfr_r2_1/sample_valid_reg16(10) {-height 15 -radix hexadecimal} /testbench/cic_lfr_r2_1/sample_valid_reg16(9) {-height 15 -radix hexadecimal} /testbench/cic_lfr_r2_1/sample_valid_reg16(8) {-height 15 -radix hexadecimal} /testbench/cic_lfr_r2_1/sample_valid_reg16(7) {-height 15 -radix hexadecimal} /testbench/cic_lfr_r2_1/sample_valid_reg16(6) {-height 15 -radix hexadecimal} /testbench/cic_lfr_r2_1/sample_valid_reg16(5) {-height 15 -radix hexadecimal} /testbench/cic_lfr_r2_1/sample_valid_reg16(4) {-height 15 -radix hexadecimal} /testbench/cic_lfr_r2_1/sample_valid_reg16(3) {-height 15 -radix hexadecimal} /testbench/cic_lfr_r2_1/sample_valid_reg16(2) {-height 15 -radix hexadecimal} /testbench/cic_lfr_r2_1/sample_valid_reg16(1) {-height 15 -radix hexadecimal} /testbench/cic_lfr_r2_1/sample_valid_reg16(0) {-height 15 -radix hexadecimal}} /testbench/cic_lfr_r2_1/sample_valid_reg16
73 add wave -noupdate -group lane0 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(29)
73 add wave -noupdate -group ALL -group temp -format Analog-Step -height 200 -max 200.0 -min -200.0 -radix decimal -childformat {{/testbench/cic_lfr_1/data_out_16(0)(15) -radix hexadecimal} {/testbench/cic_lfr_1/data_out_16(0)(14) -radix hexadecimal} {/testbench/cic_lfr_1/data_out_16(0)(13) -radix hexadecimal} {/testbench/cic_lfr_1/data_out_16(0)(12) -radix hexadecimal} {/testbench/cic_lfr_1/data_out_16(0)(11) -radix hexadecimal} {/testbench/cic_lfr_1/data_out_16(0)(10) -radix hexadecimal} {/testbench/cic_lfr_1/data_out_16(0)(9) -radix hexadecimal} {/testbench/cic_lfr_1/data_out_16(0)(8) -radix hexadecimal} {/testbench/cic_lfr_1/data_out_16(0)(7) -radix hexadecimal} {/testbench/cic_lfr_1/data_out_16(0)(6) -radix hexadecimal} {/testbench/cic_lfr_1/data_out_16(0)(5) -radix hexadecimal} {/testbench/cic_lfr_1/data_out_16(0)(4) -radix hexadecimal} {/testbench/cic_lfr_1/data_out_16(0)(3) -radix hexadecimal} {/testbench/cic_lfr_1/data_out_16(0)(2) -radix hexadecimal} {/testbench/cic_lfr_1/data_out_16(0)(1) -radix hexadecimal} {/testbench/cic_lfr_1/data_out_16(0)(0) -radix hexadecimal}} -subitemconfig {/testbench/cic_lfr_1/data_out_16(0)(15) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/data_out_16(0)(14) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/data_out_16(0)(13) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/data_out_16(0)(12) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/data_out_16(0)(11) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/data_out_16(0)(10) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/data_out_16(0)(9) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/data_out_16(0)(8) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/data_out_16(0)(7) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/data_out_16(0)(6) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/data_out_16(0)(5) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/data_out_16(0)(4) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/data_out_16(0)(3) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/data_out_16(0)(2) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/data_out_16(0)(1) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/data_out_16(0)(0) {-height 15 -radix hexadecimal}} /testbench/cic_lfr_1/data_out_16(0)
74 add wave -noupdate -group lane0 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(30)
74 add wave -noupdate -group ALL -group temp -radix hexadecimal -childformat {{/testbench/cic_lfr_1/sample_out_reg16_s(5) -radix hexadecimal -childformat {{/testbench/cic_lfr_1/sample_out_reg16_s(5)(31) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(5)(30) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(5)(29) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(5)(28) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(5)(27) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(5)(26) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(5)(25) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(5)(24) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(5)(23) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(5)(22) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(5)(21) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(5)(20) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(5)(19) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(5)(18) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(5)(17) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(5)(16) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(5)(15) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(5)(14) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(5)(13) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(5)(12) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(5)(11) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(5)(10) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(5)(9) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(5)(8) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(5)(7) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(5)(6) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(5)(5) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(5)(4) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(5)(3) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(5)(2) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(5)(1) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(5)(0) -radix hexadecimal}}} {/testbench/cic_lfr_1/sample_out_reg16_s(4) -radix hexadecimal -childformat {{/testbench/cic_lfr_1/sample_out_reg16_s(4)(31) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(4)(30) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(4)(29) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(4)(28) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(4)(27) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(4)(26) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(4)(25) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(4)(24) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(4)(23) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(4)(22) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(4)(21) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(4)(20) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(4)(19) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(4)(18) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(4)(17) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(4)(16) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(4)(15) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(4)(14) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(4)(13) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(4)(12) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(4)(11) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(4)(10) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(4)(9) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(4)(8) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(4)(7) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(4)(6) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(4)(5) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(4)(4) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(4)(3) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(4)(2) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(4)(1) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(4)(0) -radix hexadecimal}}} {/testbench/cic_lfr_1/sample_out_reg16_s(3) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(2) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(1) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(0) -radix hexadecimal}} -subitemconfig {/testbench/cic_lfr_1/sample_out_reg16_s(5) {-height 15 -radix hexadecimal -childformat {{/testbench/cic_lfr_1/sample_out_reg16_s(5)(31) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(5)(30) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(5)(29) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(5)(28) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(5)(27) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(5)(26) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(5)(25) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(5)(24) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(5)(23) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(5)(22) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(5)(21) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(5)(20) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(5)(19) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(5)(18) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(5)(17) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(5)(16) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(5)(15) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(5)(14) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(5)(13) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(5)(12) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(5)(11) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(5)(10) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(5)(9) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(5)(8) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(5)(7) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(5)(6) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(5)(5) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(5)(4) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(5)(3) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(5)(2) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(5)(1) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(5)(0) -radix hexadecimal}}} /testbench/cic_lfr_1/sample_out_reg16_s(5)(31) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(5)(30) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(5)(29) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(5)(28) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(5)(27) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(5)(26) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(5)(25) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(5)(24) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(5)(23) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(5)(22) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(5)(21) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(5)(20) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(5)(19) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(5)(18) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(5)(17) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(5)(16) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(5)(15) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(5)(14) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(5)(13) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(5)(12) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(5)(11) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(5)(10) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(5)(9) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(5)(8) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(5)(7) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(5)(6) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(5)(5) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(5)(4) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(5)(3) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(5)(2) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(5)(1) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(5)(0) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(4) {-height 15 -radix hexadecimal -childformat {{/testbench/cic_lfr_1/sample_out_reg16_s(4)(31) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(4)(30) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(4)(29) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(4)(28) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(4)(27) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(4)(26) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(4)(25) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(4)(24) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(4)(23) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(4)(22) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(4)(21) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(4)(20) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(4)(19) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(4)(18) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(4)(17) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(4)(16) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(4)(15) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(4)(14) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(4)(13) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(4)(12) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(4)(11) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(4)(10) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(4)(9) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(4)(8) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(4)(7) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(4)(6) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(4)(5) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(4)(4) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(4)(3) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(4)(2) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(4)(1) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(4)(0) -radix hexadecimal}}} /testbench/cic_lfr_1/sample_out_reg16_s(4)(31) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(4)(30) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(4)(29) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(4)(28) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(4)(27) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(4)(26) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(4)(25) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(4)(24) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(4)(23) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(4)(22) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(4)(21) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(4)(20) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(4)(19) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(4)(18) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(4)(17) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(4)(16) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(4)(15) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(4)(14) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(4)(13) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(4)(12) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(4)(11) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(4)(10) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(4)(9) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(4)(8) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(4)(7) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(4)(6) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(4)(5) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(4)(4) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(4)(3) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(4)(2) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(4)(1) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(4)(0) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(3) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(2) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(1) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(0) {-height 15 -radix hexadecimal}} /testbench/cic_lfr_1/sample_out_reg16_s
75 add wave -noupdate -group lane0 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(31)
75 add wave -noupdate -group ALL -group temp -radix hexadecimal -childformat {{/testbench/cic_lfr_1/sample_out_reg256_s(5) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg256_s(4) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg256_s(3) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg256_s(2) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg256_s(1) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg256_s(0) -radix hexadecimal}} -subitemconfig {/testbench/cic_lfr_1/sample_out_reg256_s(5) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg256_s(4) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg256_s(3) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg256_s(2) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg256_s(1) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg256_s(0) {-height 15 -radix hexadecimal}} /testbench/cic_lfr_1/sample_out_reg256_s
76 add wave -noupdate -group lane0 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(32)
76 add wave -noupdate -group ALL -group temp -format Analog-Step -height 74 -max 6000000.0 -min 6.0000000000000002e-06 -radix decimal /testbench/cic_lfr_1/sample_out_reg16_s(0)
77 add wave -noupdate -group lane0 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(33)
77 add wave -noupdate -group ALL -group temp -format Analog-Step -height 200 -max 200.0 -min -200.0 -radix decimal /testbench/cic_1/data_out
78 add wave -noupdate -group lane0 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(34)
78 add wave -noupdate -group ALL -group temp -format Analog-Step -height 200 -max 200.0 -min -200.0 -radix decimal -childformat {{/testbench/cic_lfr_1/data_out_16(0)(15) -radix hexadecimal} {/testbench/cic_lfr_1/data_out_16(0)(14) -radix hexadecimal} {/testbench/cic_lfr_1/data_out_16(0)(13) -radix hexadecimal} {/testbench/cic_lfr_1/data_out_16(0)(12) -radix hexadecimal} {/testbench/cic_lfr_1/data_out_16(0)(11) -radix hexadecimal} {/testbench/cic_lfr_1/data_out_16(0)(10) -radix hexadecimal} {/testbench/cic_lfr_1/data_out_16(0)(9) -radix hexadecimal} {/testbench/cic_lfr_1/data_out_16(0)(8) -radix hexadecimal} {/testbench/cic_lfr_1/data_out_16(0)(7) -radix hexadecimal} {/testbench/cic_lfr_1/data_out_16(0)(6) -radix hexadecimal} {/testbench/cic_lfr_1/data_out_16(0)(5) -radix hexadecimal} {/testbench/cic_lfr_1/data_out_16(0)(4) -radix hexadecimal} {/testbench/cic_lfr_1/data_out_16(0)(3) -radix hexadecimal} {/testbench/cic_lfr_1/data_out_16(0)(2) -radix hexadecimal} {/testbench/cic_lfr_1/data_out_16(0)(1) -radix hexadecimal} {/testbench/cic_lfr_1/data_out_16(0)(0) -radix hexadecimal}} -subitemconfig {/testbench/cic_lfr_1/data_out_16(0)(15) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/data_out_16(0)(14) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/data_out_16(0)(13) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/data_out_16(0)(12) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/data_out_16(0)(11) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/data_out_16(0)(10) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/data_out_16(0)(9) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/data_out_16(0)(8) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/data_out_16(0)(7) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/data_out_16(0)(6) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/data_out_16(0)(5) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/data_out_16(0)(4) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/data_out_16(0)(3) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/data_out_16(0)(2) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/data_out_16(0)(1) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/data_out_16(0)(0) {-height 15 -radix hexadecimal}} /testbench/cic_lfr_1/data_out_16(0)
79 add wave -noupdate -group lane0 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(35)
79 add wave -noupdate -group ALL -group temp -radix hexadecimal -childformat {{/testbench/cic_lfr_1/sample_out_reg16_s(5) -radix hexadecimal -childformat {{/testbench/cic_lfr_1/sample_out_reg16_s(5)(31) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(5)(30) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(5)(29) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(5)(28) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(5)(27) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(5)(26) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(5)(25) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(5)(24) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(5)(23) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(5)(22) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(5)(21) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(5)(20) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(5)(19) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(5)(18) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(5)(17) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(5)(16) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(5)(15) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(5)(14) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(5)(13) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(5)(12) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(5)(11) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(5)(10) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(5)(9) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(5)(8) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(5)(7) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(5)(6) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(5)(5) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(5)(4) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(5)(3) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(5)(2) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(5)(1) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(5)(0) -radix hexadecimal}}} {/testbench/cic_lfr_1/sample_out_reg16_s(4) -radix hexadecimal -childformat {{/testbench/cic_lfr_1/sample_out_reg16_s(4)(31) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(4)(30) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(4)(29) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(4)(28) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(4)(27) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(4)(26) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(4)(25) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(4)(24) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(4)(23) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(4)(22) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(4)(21) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(4)(20) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(4)(19) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(4)(18) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(4)(17) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(4)(16) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(4)(15) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(4)(14) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(4)(13) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(4)(12) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(4)(11) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(4)(10) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(4)(9) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(4)(8) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(4)(7) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(4)(6) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(4)(5) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(4)(4) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(4)(3) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(4)(2) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(4)(1) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(4)(0) -radix hexadecimal}}} {/testbench/cic_lfr_1/sample_out_reg16_s(3) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(2) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(1) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(0) -radix hexadecimal}} -subitemconfig {/testbench/cic_lfr_1/sample_out_reg16_s(5) {-height 15 -radix hexadecimal -childformat {{/testbench/cic_lfr_1/sample_out_reg16_s(5)(31) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(5)(30) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(5)(29) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(5)(28) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(5)(27) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(5)(26) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(5)(25) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(5)(24) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(5)(23) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(5)(22) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(5)(21) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(5)(20) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(5)(19) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(5)(18) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(5)(17) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(5)(16) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(5)(15) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(5)(14) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(5)(13) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(5)(12) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(5)(11) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(5)(10) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(5)(9) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(5)(8) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(5)(7) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(5)(6) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(5)(5) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(5)(4) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(5)(3) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(5)(2) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(5)(1) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(5)(0) -radix hexadecimal}}} /testbench/cic_lfr_1/sample_out_reg16_s(5)(31) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(5)(30) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(5)(29) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(5)(28) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(5)(27) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(5)(26) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(5)(25) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(5)(24) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(5)(23) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(5)(22) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(5)(21) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(5)(20) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(5)(19) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(5)(18) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(5)(17) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(5)(16) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(5)(15) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(5)(14) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(5)(13) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(5)(12) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(5)(11) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(5)(10) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(5)(9) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(5)(8) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(5)(7) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(5)(6) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(5)(5) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(5)(4) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(5)(3) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(5)(2) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(5)(1) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(5)(0) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(4) {-height 15 -radix hexadecimal -childformat {{/testbench/cic_lfr_1/sample_out_reg16_s(4)(31) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(4)(30) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(4)(29) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(4)(28) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(4)(27) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(4)(26) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(4)(25) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(4)(24) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(4)(23) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(4)(22) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(4)(21) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(4)(20) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(4)(19) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(4)(18) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(4)(17) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(4)(16) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(4)(15) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(4)(14) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(4)(13) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(4)(12) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(4)(11) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(4)(10) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(4)(9) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(4)(8) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(4)(7) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(4)(6) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(4)(5) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(4)(4) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(4)(3) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(4)(2) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(4)(1) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg16_s(4)(0) -radix hexadecimal}}} /testbench/cic_lfr_1/sample_out_reg16_s(4)(31) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(4)(30) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(4)(29) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(4)(28) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(4)(27) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(4)(26) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(4)(25) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(4)(24) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(4)(23) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(4)(22) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(4)(21) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(4)(20) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(4)(19) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(4)(18) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(4)(17) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(4)(16) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(4)(15) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(4)(14) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(4)(13) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(4)(12) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(4)(11) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(4)(10) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(4)(9) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(4)(8) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(4)(7) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(4)(6) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(4)(5) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(4)(4) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(4)(3) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(4)(2) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(4)(1) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(4)(0) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(3) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(2) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(1) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg16_s(0) {-height 15 -radix hexadecimal}} /testbench/cic_lfr_1/sample_out_reg16_s
80 add wave -noupdate -group lane0 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(36)
80 add wave -noupdate -group ALL -group temp -radix hexadecimal -childformat {{/testbench/cic_lfr_1/sample_out_reg256_s(5) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg256_s(4) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg256_s(3) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg256_s(2) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg256_s(1) -radix hexadecimal} {/testbench/cic_lfr_1/sample_out_reg256_s(0) -radix hexadecimal}} -subitemconfig {/testbench/cic_lfr_1/sample_out_reg256_s(5) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg256_s(4) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg256_s(3) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg256_s(2) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg256_s(1) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/sample_out_reg256_s(0) {-height 15 -radix hexadecimal}} /testbench/cic_lfr_1/sample_out_reg256_s
81 add wave -noupdate -group lane0 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(37)
81 add wave -noupdate -group ALL -group temp -format Analog-Step -height 74 -max 6000000.0 -min 6.0000000000000002e-06 -radix decimal /testbench/cic_lfr_1/sample_out_reg16_s(0)
82 add wave -noupdate -group lane0 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(38)
82 add wave -noupdate -group ALL -group temp -format Analog-Step -height 200 -max 200.0 -min -200.0 -radix decimal /testbench/cic_1/data_out
83 add wave -noupdate -group lane0 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(39)
83 add wave -noupdate -group ALL -radix hexadecimal -childformat {{/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(0) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(1) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(2) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(3) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(4) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(5) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(6) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(7) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(8) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(9) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(10) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(11) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(12) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(13) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(14) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(15) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(16) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(17) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(18) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(19) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(20) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(21) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(22) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(23) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(24) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(25) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(26) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(27) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(28) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(29) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(30) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(31) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(32) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(33) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(34) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(35) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(36) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(37) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(38) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(39) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(40) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(41) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(42) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(43) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(44) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(45) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(46) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(47) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(48) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(49) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(50) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(51) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(52) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(53) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(54) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(55) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(56) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(57) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(58) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(59) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(60) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(61) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(62) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(63) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(64) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(65) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(66) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(67) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(68) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(69) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(70) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(71) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(72) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(73) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(74) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(75) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(76) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(77) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(78) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(79) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(80) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(81) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(82) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(83) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(84) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(85) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(86) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(87) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(88) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(89) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(90) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(91) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(92) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(93) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(94) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(95) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(96) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(97) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(98) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(99) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(100) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(101) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(102) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(103) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(104) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(105) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(106) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(107) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(108) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(109) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(110) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(111) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(112) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(113) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(114) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(115) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(116) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(117) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(118) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(119) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(120) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(121) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(122) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(123) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(124) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(125) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(126) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(127) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(128) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(129) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(130) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(131) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(132) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(133) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(134) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(135) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(136) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(137) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(138) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(139) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(140) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(141) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(142) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(143) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(144) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(145) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(146) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(147) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(148) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(149) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(150) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(151) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(152) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(153) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(154) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(155) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(156) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(157) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(158) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(159) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(160) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(161) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(162) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(163) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(164) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(165) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(166) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(167) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(168) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(169) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(170) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(171) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(172) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(173) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(174) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(175) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(176) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(177) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(178) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(179) -radix hexadecimal} {/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(180) -radix hexadecimal} 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/testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(104) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(105) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(106) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(107) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(108) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(109) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(110) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(111) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(112) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(113) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(114) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(115) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(116) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(117) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(118) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(119) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(120) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(121) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(122) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(123) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(124) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(125) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(126) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(127) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(128) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(129) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(130) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(131) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(132) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(133) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(134) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(135) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(136) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(137) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(138) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(139) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(140) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(141) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(142) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(143) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(144) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(145) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(146) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(147) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(148) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(149) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(150) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(151) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(152) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(153) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(154) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(155) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(156) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(157) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(158) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(159) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(160) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(161) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(162) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(163) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(164) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(165) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(166) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(167) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(168) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(169) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(170) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(171) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(172) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(173) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(174) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(175) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(176) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(177) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(178) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(179) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(180) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(181) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(182) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(183) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(184) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(185) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(186) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(187) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(188) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(189) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(190) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(191) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(192) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(193) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(194) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(195) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(196) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(197) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(198) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(199) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(200) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(201) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(202) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(203) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(204) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(205) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(206) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(207) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(208) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(209) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(210) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(211) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(212) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(213) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(214) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(215) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(216) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(217) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(218) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(219) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(220) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(221) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(222) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(223) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(224) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(225) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(226) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(227) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(228) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(229) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(230) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(231) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(232) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(233) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(234) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(235) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(236) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(237) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(238) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(239) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(240) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(241) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(242) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(243) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(244) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(245) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(246) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(247) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(248) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(249) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(250) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(251) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(252) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(253) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(254) {-height 15 -radix hexadecimal} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray(255) {-height 15 -radix hexadecimal}} /testbench/cic_lfr_1/memCEL/RAMblk/RAMarray
84 add wave -noupdate -group lane0 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(40)
84 add wave -noupdate -group ALL -radix decimal -childformat {{/testbench/cic_lfr_r2_1/data_out_16(5) -radix hexadecimal} {/testbench/cic_lfr_r2_1/data_out_16(4) -radix hexadecimal} {/testbench/cic_lfr_r2_1/data_out_16(3) -radix hexadecimal} {/testbench/cic_lfr_r2_1/data_out_16(2) -radix hexadecimal} {/testbench/cic_lfr_r2_1/data_out_16(1) -radix hexadecimal} {/testbench/cic_lfr_r2_1/data_out_16(0) -radix hexadecimal}} -subitemconfig {/testbench/cic_lfr_r2_1/data_out_16(5) {-height 15 -radix hexadecimal} /testbench/cic_lfr_r2_1/data_out_16(4) {-height 15 -radix hexadecimal} /testbench/cic_lfr_r2_1/data_out_16(3) {-height 15 -radix hexadecimal} /testbench/cic_lfr_r2_1/data_out_16(2) {-height 15 -radix hexadecimal} /testbench/cic_lfr_r2_1/data_out_16(1) {-height 15 -radix hexadecimal} /testbench/cic_lfr_r2_1/data_out_16(0) {-height 15 -radix hexadecimal}} /testbench/cic_lfr_r2_1/data_out_16
85 add wave -noupdate -group lane1 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(40)
85 add wave -noupdate -group ALL -radix decimal -childformat {{/testbench/cic_lfr_r2_1/data_out_256(5) -radix decimal} {/testbench/cic_lfr_r2_1/data_out_256(4) -radix decimal} {/testbench/cic_lfr_r2_1/data_out_256(3) -radix decimal} {/testbench/cic_lfr_r2_1/data_out_256(2) -radix decimal} {/testbench/cic_lfr_r2_1/data_out_256(1) -radix decimal} {/testbench/cic_lfr_r2_1/data_out_256(0) -radix decimal}} -subitemconfig {/testbench/cic_lfr_r2_1/data_out_256(5) {-height 15 -radix decimal} /testbench/cic_lfr_r2_1/data_out_256(4) {-height 15 -radix decimal} /testbench/cic_lfr_r2_1/data_out_256(3) {-height 15 -radix decimal} /testbench/cic_lfr_r2_1/data_out_256(2) {-height 15 -radix decimal} /testbench/cic_lfr_r2_1/data_out_256(1) {-height 15 -radix decimal} /testbench/cic_lfr_r2_1/data_out_256(0) {-height 15 -radix decimal}} /testbench/cic_lfr_r2_1/data_out_256
86 add wave -noupdate -group lane1 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(41)
86 add wave -noupdate -group ALL /testbench/param_r2
87 add wave -noupdate -group lane1 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(42)
87 add wave -noupdate -group ALL -group lane0 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(0)
88 add wave -noupdate -group lane1 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(43)
88 add wave -noupdate -group ALL -group lane0 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(1)
89 add wave -noupdate -group lane1 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(44)
89 add wave -noupdate -group ALL -group lane0 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(2)
90 add wave -noupdate -group lane1 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(45)
90 add wave -noupdate -group ALL -group lane0 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(3)
91 add wave -noupdate -group lane1 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(46)
91 add wave -noupdate -group ALL -group lane0 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(4)
92 add wave -noupdate -group lane1 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(47)
92 add wave -noupdate -group ALL -group lane0 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(5)
93 add wave -noupdate -group lane1 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(48)
93 add wave -noupdate -group ALL -group lane0 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(6)
94 add wave -noupdate -group lane1 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(49)
94 add wave -noupdate -group ALL -group lane0 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(7)
95 add wave -noupdate -group lane1 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(50)
95 add wave -noupdate -group ALL -group lane0 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(8)
96 add wave -noupdate -group lane1 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(51)
96 add wave -noupdate -group ALL -group lane0 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(9)
97 add wave -noupdate -group lane1 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(52)
97 add wave -noupdate -group ALL -group lane0 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(10)
98 add wave -noupdate -group lane1 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(53)
98 add wave -noupdate -group ALL -group lane0 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(11)
99 add wave -noupdate -group lane1 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(54)
99 add wave -noupdate -group ALL -group lane0 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(12)
100 add wave -noupdate -group lane1 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(55)
100 add wave -noupdate -group ALL -group lane0 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(13)
101 add wave -noupdate -group lane1 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(56)
101 add wave -noupdate -group ALL -group lane0 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(14)
102 add wave -noupdate -group lane1 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(57)
102 add wave -noupdate -group ALL -group lane0 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(15)
103 add wave -noupdate -group lane1 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(58)
103 add wave -noupdate -group ALL -group lane0 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(16)
104 add wave -noupdate -group lane1 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(59)
104 add wave -noupdate -group ALL -group lane0 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(17)
105 add wave -noupdate -group lane1 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(60)
105 add wave -noupdate -group ALL -group lane0 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(18)
106 add wave -noupdate -group lane1 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(61)
106 add wave -noupdate -group ALL -group lane0 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(19)
107 add wave -noupdate -group lane1 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(62)
107 add wave -noupdate -group ALL -group lane0 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(20)
108 add wave -noupdate -group lane1 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(63)
108 add wave -noupdate -group ALL -group lane0 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(21)
109 add wave -noupdate -group lane1 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(64)
109 add wave -noupdate -group ALL -group lane0 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(22)
110 add wave -noupdate -group lane1 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(65)
110 add wave -noupdate -group ALL -group lane0 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(23)
111 add wave -noupdate -group lane1 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(66)
111 add wave -noupdate -group ALL -group lane0 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(24)
112 add wave -noupdate -group lane1 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(67)
112 add wave -noupdate -group ALL -group lane0 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(25)
113 add wave -noupdate -group lane1 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(68)
113 add wave -noupdate -group ALL -group lane0 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(26)
114 add wave -noupdate -group lane1 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(69)
114 add wave -noupdate -group ALL -group lane0 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(27)
115 add wave -noupdate -group lane1 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(70)
115 add wave -noupdate -group ALL -group lane0 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(28)
116 add wave -noupdate -group lane1 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(71)
116 add wave -noupdate -group ALL -group lane0 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(29)
117 add wave -noupdate -group lane1 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(72)
117 add wave -noupdate -group ALL -group lane0 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(30)
118 add wave -noupdate -group lane1 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(73)
118 add wave -noupdate -group ALL -group lane0 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(31)
119 add wave -noupdate -group lane1 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(74)
119 add wave -noupdate -group ALL -group lane0 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(32)
120 add wave -noupdate -group lane1 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(75)
120 add wave -noupdate -group ALL -group lane0 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(33)
121 add wave -noupdate -group lane1 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(76)
121 add wave -noupdate -group ALL -group lane0 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(34)
122 add wave -noupdate -group lane1 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(77)
122 add wave -noupdate -group ALL -group lane0 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(35)
123 add wave -noupdate -group lane1 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(78)
123 add wave -noupdate -group ALL -group lane0 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(36)
124 add wave -noupdate -group lane1 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(79)
124 add wave -noupdate -group ALL -group lane0 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(37)
125 add wave -noupdate -group lane2 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(80)
125 add wave -noupdate -group ALL -group lane0 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(38)
126 add wave -noupdate -group lane2 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(81)
126 add wave -noupdate -group ALL -group lane0 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(39)
127 add wave -noupdate -group lane2 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(82)
127 add wave -noupdate -group ALL -group lane0 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(40)
128 add wave -noupdate -group lane2 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(83)
128 add wave -noupdate -group ALL -group lane0 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(0)
129 add wave -noupdate -group lane2 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(84)
129 add wave -noupdate -group ALL -group lane0 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(1)
130 add wave -noupdate -group lane2 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(85)
130 add wave -noupdate -group ALL -group lane0 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(2)
131 add wave -noupdate -group lane2 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(86)
131 add wave -noupdate -group ALL -group lane0 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(3)
132 add wave -noupdate -group lane2 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(87)
132 add wave -noupdate -group ALL -group lane0 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(4)
133 add wave -noupdate -group lane2 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(88)
133 add wave -noupdate -group ALL -group lane0 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(5)
134 add wave -noupdate -group lane2 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(89)
134 add wave -noupdate -group ALL -group lane0 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(6)
135 add wave -noupdate -group lane2 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(90)
135 add wave -noupdate -group ALL -group lane0 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(7)
136 add wave -noupdate -group lane2 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(91)
136 add wave -noupdate -group ALL -group lane0 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(8)
137 add wave -noupdate -group lane2 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(92)
137 add wave -noupdate -group ALL -group lane0 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(9)
138 add wave -noupdate -group lane2 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(93)
138 add wave -noupdate -group ALL -group lane0 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(10)
139 add wave -noupdate -group lane2 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(94)
139 add wave -noupdate -group ALL -group lane0 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(11)
140 add wave -noupdate -group lane2 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(95)
140 add wave -noupdate -group ALL -group lane0 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(12)
141 add wave -noupdate -group lane2 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(96)
141 add wave -noupdate -group ALL -group lane0 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(13)
142 add wave -noupdate -group lane2 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(97)
142 add wave -noupdate -group ALL -group lane0 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(14)
143 add wave -noupdate -group lane2 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(98)
143 add wave -noupdate -group ALL -group lane0 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(15)
144 add wave -noupdate -group lane2 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(99)
144 add wave -noupdate -group ALL -group lane0 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(16)
145 add wave -noupdate -group lane2 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(100)
145 add wave -noupdate -group ALL -group lane0 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(17)
146 add wave -noupdate -group lane2 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(101)
146 add wave -noupdate -group ALL -group lane0 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(18)
147 add wave -noupdate -group lane2 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(102)
147 add wave -noupdate -group ALL -group lane0 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(19)
148 add wave -noupdate -group lane2 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(103)
148 add wave -noupdate -group ALL -group lane0 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(20)
149 add wave -noupdate -group lane2 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(104)
149 add wave -noupdate -group ALL -group lane0 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(21)
150 add wave -noupdate -group lane2 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(105)
150 add wave -noupdate -group ALL -group lane0 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(22)
151 add wave -noupdate -group lane2 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(106)
151 add wave -noupdate -group ALL -group lane0 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(23)
152 add wave -noupdate -group lane2 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(107)
152 add wave -noupdate -group ALL -group lane0 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(24)
153 add wave -noupdate -group lane2 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(108)
153 add wave -noupdate -group ALL -group lane0 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(25)
154 add wave -noupdate -group lane2 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(109)
154 add wave -noupdate -group ALL -group lane0 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(26)
155 add wave -noupdate -group lane2 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(110)
155 add wave -noupdate -group ALL -group lane0 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(27)
156 add wave -noupdate -group lane2 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(111)
156 add wave -noupdate -group ALL -group lane0 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(28)
157 add wave -noupdate -group lane2 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(112)
157 add wave -noupdate -group ALL -group lane0 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(29)
158 add wave -noupdate -group lane2 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(113)
158 add wave -noupdate -group ALL -group lane0 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(30)
159 add wave -noupdate -group lane2 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(114)
159 add wave -noupdate -group ALL -group lane0 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(31)
160 add wave -noupdate -group lane2 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(115)
160 add wave -noupdate -group ALL -group lane0 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(32)
161 add wave -noupdate -group lane2 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(116)
161 add wave -noupdate -group ALL -group lane0 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(33)
162 add wave -noupdate -group lane2 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(117)
162 add wave -noupdate -group ALL -group lane0 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(34)
163 add wave -noupdate -group lane2 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(118)
163 add wave -noupdate -group ALL -group lane0 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(35)
164 add wave -noupdate -group lane2 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(119)
164 add wave -noupdate -group ALL -group lane0 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(36)
165 add wave -noupdate -group lane3 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(120)
165 add wave -noupdate -group ALL -group lane0 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(37)
166 add wave -noupdate -group lane3 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(121)
166 add wave -noupdate -group ALL -group lane0 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(38)
167 add wave -noupdate -group lane3 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(122)
167 add wave -noupdate -group ALL -group lane0 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(39)
168 add wave -noupdate -group lane3 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(123)
168 add wave -noupdate -group ALL -group lane0 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(40)
169 add wave -noupdate -group lane3 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(124)
169 add wave -noupdate -group ALL -group lane1 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(40)
170 add wave -noupdate -group lane3 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(125)
170 add wave -noupdate -group ALL -group lane1 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(41)
171 add wave -noupdate -group lane3 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(126)
171 add wave -noupdate -group ALL -group lane1 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(42)
172 add wave -noupdate -group lane3 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(127)
172 add wave -noupdate -group ALL -group lane1 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(43)
173 add wave -noupdate -group lane3 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(128)
173 add wave -noupdate -group ALL -group lane1 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(44)
174 add wave -noupdate -group lane3 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(129)
174 add wave -noupdate -group ALL -group lane1 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(45)
175 add wave -noupdate -group lane3 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(130)
175 add wave -noupdate -group ALL -group lane1 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(46)
176 add wave -noupdate -group lane3 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(131)
176 add wave -noupdate -group ALL -group lane1 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(47)
177 add wave -noupdate -group lane3 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(132)
177 add wave -noupdate -group ALL -group lane1 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(48)
178 add wave -noupdate -group lane3 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(133)
178 add wave -noupdate -group ALL -group lane1 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(49)
179 add wave -noupdate -group lane3 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(134)
179 add wave -noupdate -group ALL -group lane1 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(50)
180 add wave -noupdate -group lane3 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(135)
180 add wave -noupdate -group ALL -group lane1 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(51)
181 add wave -noupdate -group lane3 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(136)
181 add wave -noupdate -group ALL -group lane1 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(52)
182 add wave -noupdate -group lane3 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(137)
182 add wave -noupdate -group ALL -group lane1 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(53)
183 add wave -noupdate -group lane3 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(138)
183 add wave -noupdate -group ALL -group lane1 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(54)
184 add wave -noupdate -group lane3 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(139)
184 add wave -noupdate -group ALL -group lane1 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(55)
185 add wave -noupdate -group lane3 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(140)
185 add wave -noupdate -group ALL -group lane1 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(56)
186 add wave -noupdate -group lane3 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(141)
186 add wave -noupdate -group ALL -group lane1 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(57)
187 add wave -noupdate -group lane3 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(142)
187 add wave -noupdate -group ALL -group lane1 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(58)
188 add wave -noupdate -group lane3 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(143)
188 add wave -noupdate -group ALL -group lane1 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(59)
189 add wave -noupdate -group lane3 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(144)
189 add wave -noupdate -group ALL -group lane1 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(60)
190 add wave -noupdate -group lane3 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(145)
190 add wave -noupdate -group ALL -group lane1 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(61)
191 add wave -noupdate -group lane3 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(146)
191 add wave -noupdate -group ALL -group lane1 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(62)
192 add wave -noupdate -group lane3 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(147)
192 add wave -noupdate -group ALL -group lane1 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(63)
193 add wave -noupdate -group lane3 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(148)
193 add wave -noupdate -group ALL -group lane1 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(64)
194 add wave -noupdate -group lane3 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(149)
194 add wave -noupdate -group ALL -group lane1 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(65)
195 add wave -noupdate -group lane3 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(150)
195 add wave -noupdate -group ALL -group lane1 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(66)
196 add wave -noupdate -group lane3 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(151)
196 add wave -noupdate -group ALL -group lane1 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(67)
197 add wave -noupdate -group lane3 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(152)
197 add wave -noupdate -group ALL -group lane1 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(68)
198 add wave -noupdate -group lane3 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(153)
198 add wave -noupdate -group ALL -group lane1 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(69)
199 add wave -noupdate -group lane3 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(154)
199 add wave -noupdate -group ALL -group lane1 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(70)
200 add wave -noupdate -group lane3 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(155)
200 add wave -noupdate -group ALL -group lane1 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(71)
201 add wave -noupdate -group lane3 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(156)
201 add wave -noupdate -group ALL -group lane1 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(72)
202 add wave -noupdate -group lane3 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(157)
202 add wave -noupdate -group ALL -group lane1 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(73)
203 add wave -noupdate -group lane3 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(158)
203 add wave -noupdate -group ALL -group lane1 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(74)
204 add wave -noupdate -group lane3 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(159)
204 add wave -noupdate -group ALL -group lane1 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(75)
205 add wave -noupdate -group lane4 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(160)
205 add wave -noupdate -group ALL -group lane1 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(76)
206 add wave -noupdate -group lane4 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(161)
206 add wave -noupdate -group ALL -group lane1 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(77)
207 add wave -noupdate -group lane4 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(162)
207 add wave -noupdate -group ALL -group lane1 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(78)
208 add wave -noupdate -group lane4 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(163)
208 add wave -noupdate -group ALL -group lane1 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(79)
209 add wave -noupdate -group lane4 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(164)
209 add wave -noupdate -group ALL -group lane1 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(40)
210 add wave -noupdate -group lane4 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(165)
210 add wave -noupdate -group ALL -group lane1 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(41)
211 add wave -noupdate -group lane4 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(166)
211 add wave -noupdate -group ALL -group lane1 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(42)
212 add wave -noupdate -group lane4 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(167)
212 add wave -noupdate -group ALL -group lane1 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(43)
213 add wave -noupdate -group lane4 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(168)
213 add wave -noupdate -group ALL -group lane1 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(44)
214 add wave -noupdate -group lane4 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(169)
214 add wave -noupdate -group ALL -group lane1 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(45)
215 add wave -noupdate -group lane4 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(170)
215 add wave -noupdate -group ALL -group lane1 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(46)
216 add wave -noupdate -group lane4 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(171)
216 add wave -noupdate -group ALL -group lane1 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(47)
217 add wave -noupdate -group lane4 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(172)
217 add wave -noupdate -group ALL -group lane1 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(48)
218 add wave -noupdate -group lane4 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(173)
218 add wave -noupdate -group ALL -group lane1 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(49)
219 add wave -noupdate -group lane4 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(174)
219 add wave -noupdate -group ALL -group lane1 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(50)
220 add wave -noupdate -group lane4 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(175)
220 add wave -noupdate -group ALL -group lane1 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(51)
221 add wave -noupdate -group lane4 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(176)
221 add wave -noupdate -group ALL -group lane1 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(52)
222 add wave -noupdate -group lane4 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(177)
222 add wave -noupdate -group ALL -group lane1 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(53)
223 add wave -noupdate -group lane4 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(178)
223 add wave -noupdate -group ALL -group lane1 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(54)
224 add wave -noupdate -group lane4 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(179)
224 add wave -noupdate -group ALL -group lane1 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(55)
225 add wave -noupdate -group lane4 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(180)
225 add wave -noupdate -group ALL -group lane1 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(56)
226 add wave -noupdate -group lane4 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(181)
226 add wave -noupdate -group ALL -group lane1 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(57)
227 add wave -noupdate -group lane4 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(182)
227 add wave -noupdate -group ALL -group lane1 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(58)
228 add wave -noupdate -group lane4 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(183)
228 add wave -noupdate -group ALL -group lane1 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(59)
229 add wave -noupdate -group lane4 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(184)
229 add wave -noupdate -group ALL -group lane1 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(60)
230 add wave -noupdate -group lane4 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(185)
230 add wave -noupdate -group ALL -group lane1 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(61)
231 add wave -noupdate -group lane4 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(186)
231 add wave -noupdate -group ALL -group lane1 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(62)
232 add wave -noupdate -group lane4 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(187)
232 add wave -noupdate -group ALL -group lane1 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(63)
233 add wave -noupdate -group lane4 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(188)
233 add wave -noupdate -group ALL -group lane1 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(64)
234 add wave -noupdate -group lane4 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(189)
234 add wave -noupdate -group ALL -group lane1 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(65)
235 add wave -noupdate -group lane4 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(190)
235 add wave -noupdate -group ALL -group lane1 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(66)
236 add wave -noupdate -group lane4 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(191)
236 add wave -noupdate -group ALL -group lane1 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(67)
237 add wave -noupdate -group lane4 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(192)
237 add wave -noupdate -group ALL -group lane1 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(68)
238 add wave -noupdate -group lane4 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(193)
238 add wave -noupdate -group ALL -group lane1 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(69)
239 add wave -noupdate -group lane4 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(194)
239 add wave -noupdate -group ALL -group lane1 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(70)
240 add wave -noupdate -group lane4 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(195)
240 add wave -noupdate -group ALL -group lane1 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(71)
241 add wave -noupdate -group lane4 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(196)
241 add wave -noupdate -group ALL -group lane1 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(72)
242 add wave -noupdate -group lane4 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(197)
242 add wave -noupdate -group ALL -group lane1 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(73)
243 add wave -noupdate -group lane4 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(198)
243 add wave -noupdate -group ALL -group lane1 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(74)
244 add wave -noupdate -group lane4 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(199)
244 add wave -noupdate -group ALL -group lane1 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(75)
245 add wave -noupdate -group lane5 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(200)
245 add wave -noupdate -group ALL -group lane1 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(76)
246 add wave -noupdate -group lane5 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(201)
246 add wave -noupdate -group ALL -group lane1 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(77)
247 add wave -noupdate -group lane5 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(202)
247 add wave -noupdate -group ALL -group lane1 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(78)
248 add wave -noupdate -group lane5 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(203)
248 add wave -noupdate -group ALL -group lane1 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(79)
249 add wave -noupdate -group lane5 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(204)
249 add wave -noupdate -group ALL -group lane2 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(80)
250 add wave -noupdate -group lane5 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(205)
250 add wave -noupdate -group ALL -group lane2 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(81)
251 add wave -noupdate -group lane5 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(206)
251 add wave -noupdate -group ALL -group lane2 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(82)
252 add wave -noupdate -group lane5 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(207)
252 add wave -noupdate -group ALL -group lane2 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(83)
253 add wave -noupdate -group lane5 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(208)
253 add wave -noupdate -group ALL -group lane2 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(84)
254 add wave -noupdate -group lane5 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(209)
254 add wave -noupdate -group ALL -group lane2 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(85)
255 add wave -noupdate -group lane5 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(210)
255 add wave -noupdate -group ALL -group lane2 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(86)
256 add wave -noupdate -group lane5 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(211)
256 add wave -noupdate -group ALL -group lane2 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(87)
257 add wave -noupdate -group lane5 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(212)
257 add wave -noupdate -group ALL -group lane2 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(88)
258 add wave -noupdate -group lane5 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(213)
258 add wave -noupdate -group ALL -group lane2 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(89)
259 add wave -noupdate -group lane5 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(214)
259 add wave -noupdate -group ALL -group lane2 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(90)
260 add wave -noupdate -group lane5 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(215)
260 add wave -noupdate -group ALL -group lane2 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(91)
261 add wave -noupdate -group lane5 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(216)
261 add wave -noupdate -group ALL -group lane2 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(92)
262 add wave -noupdate -group lane5 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(217)
262 add wave -noupdate -group ALL -group lane2 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(93)
263 add wave -noupdate -group lane5 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(218)
263 add wave -noupdate -group ALL -group lane2 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(94)
264 add wave -noupdate -group lane5 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(219)
264 add wave -noupdate -group ALL -group lane2 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(95)
265 add wave -noupdate -group lane5 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(220)
265 add wave -noupdate -group ALL -group lane2 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(96)
266 add wave -noupdate -group lane5 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(221)
266 add wave -noupdate -group ALL -group lane2 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(97)
267 add wave -noupdate -group lane5 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(222)
267 add wave -noupdate -group ALL -group lane2 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(98)
268 add wave -noupdate -group lane5 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(223)
268 add wave -noupdate -group ALL -group lane2 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(99)
269 add wave -noupdate -group lane5 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(224)
269 add wave -noupdate -group ALL -group lane2 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(100)
270 add wave -noupdate -group lane5 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(225)
270 add wave -noupdate -group ALL -group lane2 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(101)
271 add wave -noupdate -group lane5 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(226)
271 add wave -noupdate -group ALL -group lane2 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(102)
272 add wave -noupdate -group lane5 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(227)
272 add wave -noupdate -group ALL -group lane2 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(103)
273 add wave -noupdate -group lane5 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(228)
273 add wave -noupdate -group ALL -group lane2 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(104)
274 add wave -noupdate -group lane5 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(229)
274 add wave -noupdate -group ALL -group lane2 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(105)
275 add wave -noupdate -group lane5 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(230)
275 add wave -noupdate -group ALL -group lane2 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(106)
276 add wave -noupdate -group lane5 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(231)
276 add wave -noupdate -group ALL -group lane2 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(107)
277 add wave -noupdate -group lane5 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(232)
277 add wave -noupdate -group ALL -group lane2 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(108)
278 add wave -noupdate -group lane5 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(233)
278 add wave -noupdate -group ALL -group lane2 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(109)
279 add wave -noupdate -group lane5 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(234)
279 add wave -noupdate -group ALL -group lane2 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(110)
280 add wave -noupdate -group lane5 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(235)
280 add wave -noupdate -group ALL -group lane2 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(111)
281 add wave -noupdate -group lane5 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(236)
281 add wave -noupdate -group ALL -group lane2 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(112)
282 add wave -noupdate -group lane5 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(237)
282 add wave -noupdate -group ALL -group lane2 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(113)
283 add wave -noupdate -group lane5 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(238)
283 add wave -noupdate -group ALL -group lane2 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(114)
284 add wave -noupdate -group lane5 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(239)
284 add wave -noupdate -group ALL -group lane2 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(115)
285 add wave -noupdate -group lane6 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(240)
285 add wave -noupdate -group ALL -group lane2 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(116)
286 add wave -noupdate -group lane6 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(241)
286 add wave -noupdate -group ALL -group lane2 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(117)
287 add wave -noupdate -group lane6 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(242)
287 add wave -noupdate -group ALL -group lane2 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(118)
288 add wave -noupdate -group lane6 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(243)
288 add wave -noupdate -group ALL -group lane2 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(119)
289 add wave -noupdate -group lane6 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(244)
289 add wave -noupdate -group ALL -group lane2 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(80)
290 add wave -noupdate -group lane6 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(245)
290 add wave -noupdate -group ALL -group lane2 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(81)
291 add wave -noupdate -group lane6 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(246)
291 add wave -noupdate -group ALL -group lane2 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(82)
292 add wave -noupdate -group lane6 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(247)
292 add wave -noupdate -group ALL -group lane2 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(83)
293 add wave -noupdate -group lane6 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(248)
293 add wave -noupdate -group ALL -group lane2 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(84)
294 add wave -noupdate -group lane6 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(249)
294 add wave -noupdate -group ALL -group lane2 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(85)
295 add wave -noupdate -group lane6 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(250)
295 add wave -noupdate -group ALL -group lane2 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(86)
296 add wave -noupdate -group lane6 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(251)
296 add wave -noupdate -group ALL -group lane2 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(87)
297 add wave -noupdate -group lane6 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(252)
297 add wave -noupdate -group ALL -group lane2 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(88)
298 add wave -noupdate -group lane6 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(253)
298 add wave -noupdate -group ALL -group lane2 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(89)
299 add wave -noupdate -group lane6 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(254)
299 add wave -noupdate -group ALL -group lane2 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(90)
300 add wave -noupdate -group lane6 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(255)
300 add wave -noupdate -group ALL -group lane2 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(91)
301 add wave -noupdate -group lane6 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(256)
301 add wave -noupdate -group ALL -group lane2 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(92)
302 add wave -noupdate -group lane6 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(257)
302 add wave -noupdate -group ALL -group lane2 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(93)
303 add wave -noupdate -group lane6 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(258)
303 add wave -noupdate -group ALL -group lane2 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(94)
304 add wave -noupdate -group lane6 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(259)
304 add wave -noupdate -group ALL -group lane2 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(95)
305 add wave -noupdate -group lane6 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(260)
305 add wave -noupdate -group ALL -group lane2 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(96)
306 add wave -noupdate -group lane6 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(261)
306 add wave -noupdate -group ALL -group lane2 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(97)
307 add wave -noupdate -group lane6 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(262)
307 add wave -noupdate -group ALL -group lane2 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(98)
308 add wave -noupdate -group lane6 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(263)
308 add wave -noupdate -group ALL -group lane2 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(99)
309 add wave -noupdate -group lane6 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(264)
309 add wave -noupdate -group ALL -group lane2 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(100)
310 add wave -noupdate -group lane6 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(265)
310 add wave -noupdate -group ALL -group lane2 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(101)
311 add wave -noupdate -group lane6 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(266)
311 add wave -noupdate -group ALL -group lane2 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(102)
312 add wave -noupdate -group lane6 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(267)
312 add wave -noupdate -group ALL -group lane2 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(103)
313 add wave -noupdate -group lane6 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(268)
313 add wave -noupdate -group ALL -group lane2 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(104)
314 add wave -noupdate -group lane6 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(269)
314 add wave -noupdate -group ALL -group lane2 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(105)
315 add wave -noupdate -group lane6 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(270)
315 add wave -noupdate -group ALL -group lane2 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(106)
316 add wave -noupdate -group lane6 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(271)
316 add wave -noupdate -group ALL -group lane2 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(107)
317 add wave -noupdate -group lane6 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(272)
317 add wave -noupdate -group ALL -group lane2 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(108)
318 add wave -noupdate -group lane6 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(273)
318 add wave -noupdate -group ALL -group lane2 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(109)
319 add wave -noupdate -group lane6 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(274)
319 add wave -noupdate -group ALL -group lane2 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(110)
320 add wave -noupdate -group lane6 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(275)
320 add wave -noupdate -group ALL -group lane2 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(111)
321 add wave -noupdate -group lane6 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(276)
321 add wave -noupdate -group ALL -group lane2 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(112)
322 add wave -noupdate -group lane6 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(277)
322 add wave -noupdate -group ALL -group lane2 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(113)
323 add wave -noupdate -group lane6 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(278)
323 add wave -noupdate -group ALL -group lane2 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(114)
324 add wave -noupdate -group lane6 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(279)
324 add wave -noupdate -group ALL -group lane2 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(115)
325 add wave -noupdate -group lane7 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(280)
325 add wave -noupdate -group ALL -group lane2 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(116)
326 add wave -noupdate -group lane7 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(281)
326 add wave -noupdate -group ALL -group lane2 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(117)
327 add wave -noupdate -group lane7 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(282)
327 add wave -noupdate -group ALL -group lane2 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(118)
328 add wave -noupdate -group lane7 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(283)
328 add wave -noupdate -group ALL -group lane2 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(119)
329 add wave -noupdate -group lane7 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(284)
329 add wave -noupdate -group ALL -group lane3 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(120)
330 add wave -noupdate -group lane7 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(285)
330 add wave -noupdate -group ALL -group lane3 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(121)
331 add wave -noupdate -group lane7 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(286)
331 add wave -noupdate -group ALL -group lane3 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(122)
332 add wave -noupdate -group lane7 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(287)
332 add wave -noupdate -group ALL -group lane3 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(123)
333 add wave -noupdate -group lane7 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(288)
333 add wave -noupdate -group ALL -group lane3 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(124)
334 add wave -noupdate -group lane7 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(289)
334 add wave -noupdate -group ALL -group lane3 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(125)
335 add wave -noupdate -group lane7 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(290)
335 add wave -noupdate -group ALL -group lane3 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(126)
336 add wave -noupdate -group lane7 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(291)
336 add wave -noupdate -group ALL -group lane3 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(127)
337 add wave -noupdate -group lane7 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(292)
337 add wave -noupdate -group ALL -group lane3 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(128)
338 add wave -noupdate -group lane7 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(293)
338 add wave -noupdate -group ALL -group lane3 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(129)
339 add wave -noupdate -group lane7 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(294)
339 add wave -noupdate -group ALL -group lane3 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(130)
340 add wave -noupdate -group lane7 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(295)
340 add wave -noupdate -group ALL -group lane3 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(131)
341 add wave -noupdate -group lane7 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(296)
341 add wave -noupdate -group ALL -group lane3 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(132)
342 add wave -noupdate -group lane7 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(297)
342 add wave -noupdate -group ALL -group lane3 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(133)
343 add wave -noupdate -group lane7 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(298)
343 add wave -noupdate -group ALL -group lane3 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(134)
344 add wave -noupdate -group lane7 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(299)
344 add wave -noupdate -group ALL -group lane3 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(135)
345 add wave -noupdate -group lane7 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(300)
345 add wave -noupdate -group ALL -group lane3 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(136)
346 add wave -noupdate -group lane7 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(301)
346 add wave -noupdate -group ALL -group lane3 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(137)
347 add wave -noupdate -group lane7 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(302)
347 add wave -noupdate -group ALL -group lane3 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(138)
348 add wave -noupdate -group lane7 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(303)
348 add wave -noupdate -group ALL -group lane3 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(139)
349 add wave -noupdate -group lane7 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(304)
349 add wave -noupdate -group ALL -group lane3 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(140)
350 add wave -noupdate -group lane7 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(305)
350 add wave -noupdate -group ALL -group lane3 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(141)
351 add wave -noupdate -group lane7 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(306)
351 add wave -noupdate -group ALL -group lane3 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(142)
352 add wave -noupdate -group lane7 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(307)
352 add wave -noupdate -group ALL -group lane3 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(143)
353 add wave -noupdate -group lane7 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(308)
353 add wave -noupdate -group ALL -group lane3 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(144)
354 add wave -noupdate -group lane7 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(309)
354 add wave -noupdate -group ALL -group lane3 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(145)
355 add wave -noupdate -group lane7 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(310)
355 add wave -noupdate -group ALL -group lane3 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(146)
356 add wave -noupdate -group lane7 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(311)
356 add wave -noupdate -group ALL -group lane3 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(147)
357 add wave -noupdate -group lane7 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(312)
357 add wave -noupdate -group ALL -group lane3 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(148)
358 add wave -noupdate -group lane7 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(313)
358 add wave -noupdate -group ALL -group lane3 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(149)
359 add wave -noupdate -group lane7 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(314)
359 add wave -noupdate -group ALL -group lane3 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(150)
360 add wave -noupdate -group lane7 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(315)
360 add wave -noupdate -group ALL -group lane3 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(151)
361 add wave -noupdate -group lane7 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(316)
361 add wave -noupdate -group ALL -group lane3 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(152)
362 add wave -noupdate -group lane7 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(317)
362 add wave -noupdate -group ALL -group lane3 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(153)
363 add wave -noupdate -group lane7 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(318)
363 add wave -noupdate -group ALL -group lane3 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(154)
364 add wave -noupdate -group lane7 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(319)
364 add wave -noupdate -group ALL -group lane3 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(155)
365 add wave -noupdate -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray
365 add wave -noupdate -group ALL -group lane3 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(156)
366 add wave -noupdate -radix hexadecimal /testbench/cic_lfr_r2_1/data_out
366 add wave -noupdate -group ALL -group lane3 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(157)
367 add wave -noupdate /testbench/cic_lfr_r2_1/data_out_16_valid_s
367 add wave -noupdate -group ALL -group lane3 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(158)
368 add wave -noupdate /testbench/cic_lfr_r2_1/data_out_16_valid_s1
368 add wave -noupdate -group ALL -group lane3 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(159)
369 add wave -noupdate /testbench/cic_lfr_r2_1/data_out_16_valid_s2
369 add wave -noupdate -group ALL -group lane3 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(120)
370 add wave -noupdate -radix hexadecimal -childformat {{/testbench/cic_lfr_r2_1/sample_out_reg16(15) -radix hexadecimal} {/testbench/cic_lfr_r2_1/sample_out_reg16(14) -radix hexadecimal} {/testbench/cic_lfr_r2_1/sample_out_reg16(13) -radix hexadecimal} {/testbench/cic_lfr_r2_1/sample_out_reg16(12) -radix hexadecimal} {/testbench/cic_lfr_r2_1/sample_out_reg16(11) -radix hexadecimal} {/testbench/cic_lfr_r2_1/sample_out_reg16(10) -radix hexadecimal} {/testbench/cic_lfr_r2_1/sample_out_reg16(9) -radix hexadecimal} {/testbench/cic_lfr_r2_1/sample_out_reg16(8) -radix hexadecimal} {/testbench/cic_lfr_r2_1/sample_out_reg16(7) -radix hexadecimal} {/testbench/cic_lfr_r2_1/sample_out_reg16(6) -radix hexadecimal} {/testbench/cic_lfr_r2_1/sample_out_reg16(5) -radix hexadecimal} {/testbench/cic_lfr_r2_1/sample_out_reg16(4) -radix hexadecimal} {/testbench/cic_lfr_r2_1/sample_out_reg16(3) -radix hexadecimal} {/testbench/cic_lfr_r2_1/sample_out_reg16(2) -radix hexadecimal} {/testbench/cic_lfr_r2_1/sample_out_reg16(1) -radix hexadecimal} {/testbench/cic_lfr_r2_1/sample_out_reg16(0) -radix hexadecimal}} -expand -subitemconfig {/testbench/cic_lfr_r2_1/sample_out_reg16(15) {-radix hexadecimal} /testbench/cic_lfr_r2_1/sample_out_reg16(14) {-radix hexadecimal} /testbench/cic_lfr_r2_1/sample_out_reg16(13) {-radix hexadecimal} /testbench/cic_lfr_r2_1/sample_out_reg16(12) {-radix hexadecimal} /testbench/cic_lfr_r2_1/sample_out_reg16(11) {-radix hexadecimal} /testbench/cic_lfr_r2_1/sample_out_reg16(10) {-radix hexadecimal} /testbench/cic_lfr_r2_1/sample_out_reg16(9) {-radix hexadecimal} /testbench/cic_lfr_r2_1/sample_out_reg16(8) {-radix hexadecimal} /testbench/cic_lfr_r2_1/sample_out_reg16(7) {-radix hexadecimal} /testbench/cic_lfr_r2_1/sample_out_reg16(6) {-radix hexadecimal} /testbench/cic_lfr_r2_1/sample_out_reg16(5) {-radix hexadecimal} /testbench/cic_lfr_r2_1/sample_out_reg16(4) {-radix hexadecimal} /testbench/cic_lfr_r2_1/sample_out_reg16(3) {-radix hexadecimal} /testbench/cic_lfr_r2_1/sample_out_reg16(2) {-radix hexadecimal} /testbench/cic_lfr_r2_1/sample_out_reg16(1) {-radix hexadecimal} /testbench/cic_lfr_r2_1/sample_out_reg16(0) {-radix hexadecimal}} /testbench/cic_lfr_r2_1/sample_out_reg16
370 add wave -noupdate -group ALL -group lane3 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(121)
371 add wave -noupdate -radix hexadecimal -childformat {{/testbench/cic_lfr_r2_1/sample_valid_reg16(16) -radix hexadecimal} {/testbench/cic_lfr_r2_1/sample_valid_reg16(15) -radix hexadecimal} {/testbench/cic_lfr_r2_1/sample_valid_reg16(14) -radix hexadecimal} {/testbench/cic_lfr_r2_1/sample_valid_reg16(13) -radix hexadecimal} {/testbench/cic_lfr_r2_1/sample_valid_reg16(12) -radix hexadecimal} {/testbench/cic_lfr_r2_1/sample_valid_reg16(11) -radix hexadecimal} {/testbench/cic_lfr_r2_1/sample_valid_reg16(10) -radix hexadecimal} {/testbench/cic_lfr_r2_1/sample_valid_reg16(9) -radix hexadecimal} {/testbench/cic_lfr_r2_1/sample_valid_reg16(8) -radix hexadecimal} {/testbench/cic_lfr_r2_1/sample_valid_reg16(7) -radix hexadecimal} {/testbench/cic_lfr_r2_1/sample_valid_reg16(6) -radix hexadecimal} {/testbench/cic_lfr_r2_1/sample_valid_reg16(5) -radix hexadecimal} {/testbench/cic_lfr_r2_1/sample_valid_reg16(4) -radix hexadecimal} {/testbench/cic_lfr_r2_1/sample_valid_reg16(3) -radix hexadecimal} {/testbench/cic_lfr_r2_1/sample_valid_reg16(2) -radix hexadecimal} {/testbench/cic_lfr_r2_1/sample_valid_reg16(1) -radix hexadecimal} {/testbench/cic_lfr_r2_1/sample_valid_reg16(0) -radix hexadecimal}} -subitemconfig {/testbench/cic_lfr_r2_1/sample_valid_reg16(16) {-radix hexadecimal} /testbench/cic_lfr_r2_1/sample_valid_reg16(15) {-radix hexadecimal} /testbench/cic_lfr_r2_1/sample_valid_reg16(14) {-radix hexadecimal} /testbench/cic_lfr_r2_1/sample_valid_reg16(13) {-radix hexadecimal} /testbench/cic_lfr_r2_1/sample_valid_reg16(12) {-radix hexadecimal} /testbench/cic_lfr_r2_1/sample_valid_reg16(11) {-radix hexadecimal} /testbench/cic_lfr_r2_1/sample_valid_reg16(10) {-radix hexadecimal} /testbench/cic_lfr_r2_1/sample_valid_reg16(9) {-radix hexadecimal} /testbench/cic_lfr_r2_1/sample_valid_reg16(8) {-radix hexadecimal} /testbench/cic_lfr_r2_1/sample_valid_reg16(7) {-radix hexadecimal} /testbench/cic_lfr_r2_1/sample_valid_reg16(6) {-radix hexadecimal} /testbench/cic_lfr_r2_1/sample_valid_reg16(5) {-radix hexadecimal} /testbench/cic_lfr_r2_1/sample_valid_reg16(4) {-radix hexadecimal} /testbench/cic_lfr_r2_1/sample_valid_reg16(3) {-radix hexadecimal} /testbench/cic_lfr_r2_1/sample_valid_reg16(2) {-radix hexadecimal} /testbench/cic_lfr_r2_1/sample_valid_reg16(1) {-radix hexadecimal} /testbench/cic_lfr_r2_1/sample_valid_reg16(0) {-radix hexadecimal}} /testbench/cic_lfr_r2_1/sample_valid_reg16
371 add wave -noupdate -group ALL -group lane3 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(122)
372 add wave -noupdate -group ALL -group lane3 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(123)
373 add wave -noupdate -group ALL -group lane3 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(124)
374 add wave -noupdate -group ALL -group lane3 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(125)
375 add wave -noupdate -group ALL -group lane3 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(126)
376 add wave -noupdate -group ALL -group lane3 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(127)
377 add wave -noupdate -group ALL -group lane3 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(128)
378 add wave -noupdate -group ALL -group lane3 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(129)
379 add wave -noupdate -group ALL -group lane3 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(130)
380 add wave -noupdate -group ALL -group lane3 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(131)
381 add wave -noupdate -group ALL -group lane3 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(132)
382 add wave -noupdate -group ALL -group lane3 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(133)
383 add wave -noupdate -group ALL -group lane3 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(134)
384 add wave -noupdate -group ALL -group lane3 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(135)
385 add wave -noupdate -group ALL -group lane3 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(136)
386 add wave -noupdate -group ALL -group lane3 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(137)
387 add wave -noupdate -group ALL -group lane3 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(138)
388 add wave -noupdate -group ALL -group lane3 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(139)
389 add wave -noupdate -group ALL -group lane3 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(140)
390 add wave -noupdate -group ALL -group lane3 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(141)
391 add wave -noupdate -group ALL -group lane3 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(142)
392 add wave -noupdate -group ALL -group lane3 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(143)
393 add wave -noupdate -group ALL -group lane3 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(144)
394 add wave -noupdate -group ALL -group lane3 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(145)
395 add wave -noupdate -group ALL -group lane3 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(146)
396 add wave -noupdate -group ALL -group lane3 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(147)
397 add wave -noupdate -group ALL -group lane3 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(148)
398 add wave -noupdate -group ALL -group lane3 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(149)
399 add wave -noupdate -group ALL -group lane3 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(150)
400 add wave -noupdate -group ALL -group lane3 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(151)
401 add wave -noupdate -group ALL -group lane3 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(152)
402 add wave -noupdate -group ALL -group lane3 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(153)
403 add wave -noupdate -group ALL -group lane3 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(154)
404 add wave -noupdate -group ALL -group lane3 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(155)
405 add wave -noupdate -group ALL -group lane3 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(156)
406 add wave -noupdate -group ALL -group lane3 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(157)
407 add wave -noupdate -group ALL -group lane3 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(158)
408 add wave -noupdate -group ALL -group lane3 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(159)
409 add wave -noupdate -group ALL -group lane4 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(160)
410 add wave -noupdate -group ALL -group lane4 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(161)
411 add wave -noupdate -group ALL -group lane4 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(162)
412 add wave -noupdate -group ALL -group lane4 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(163)
413 add wave -noupdate -group ALL -group lane4 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(164)
414 add wave -noupdate -group ALL -group lane4 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(165)
415 add wave -noupdate -group ALL -group lane4 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(166)
416 add wave -noupdate -group ALL -group lane4 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(167)
417 add wave -noupdate -group ALL -group lane4 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(168)
418 add wave -noupdate -group ALL -group lane4 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(169)
419 add wave -noupdate -group ALL -group lane4 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(170)
420 add wave -noupdate -group ALL -group lane4 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(171)
421 add wave -noupdate -group ALL -group lane4 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(172)
422 add wave -noupdate -group ALL -group lane4 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(173)
423 add wave -noupdate -group ALL -group lane4 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(174)
424 add wave -noupdate -group ALL -group lane4 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(175)
425 add wave -noupdate -group ALL -group lane4 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(176)
426 add wave -noupdate -group ALL -group lane4 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(177)
427 add wave -noupdate -group ALL -group lane4 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(178)
428 add wave -noupdate -group ALL -group lane4 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(179)
429 add wave -noupdate -group ALL -group lane4 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(180)
430 add wave -noupdate -group ALL -group lane4 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(181)
431 add wave -noupdate -group ALL -group lane4 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(182)
432 add wave -noupdate -group ALL -group lane4 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(183)
433 add wave -noupdate -group ALL -group lane4 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(184)
434 add wave -noupdate -group ALL -group lane4 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(185)
435 add wave -noupdate -group ALL -group lane4 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(186)
436 add wave -noupdate -group ALL -group lane4 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(187)
437 add wave -noupdate -group ALL -group lane4 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(188)
438 add wave -noupdate -group ALL -group lane4 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(189)
439 add wave -noupdate -group ALL -group lane4 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(190)
440 add wave -noupdate -group ALL -group lane4 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(191)
441 add wave -noupdate -group ALL -group lane4 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(192)
442 add wave -noupdate -group ALL -group lane4 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(193)
443 add wave -noupdate -group ALL -group lane4 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(194)
444 add wave -noupdate -group ALL -group lane4 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(195)
445 add wave -noupdate -group ALL -group lane4 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(196)
446 add wave -noupdate -group ALL -group lane4 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(197)
447 add wave -noupdate -group ALL -group lane4 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(198)
448 add wave -noupdate -group ALL -group lane4 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(199)
449 add wave -noupdate -group ALL -group lane4 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(160)
450 add wave -noupdate -group ALL -group lane4 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(161)
451 add wave -noupdate -group ALL -group lane4 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(162)
452 add wave -noupdate -group ALL -group lane4 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(163)
453 add wave -noupdate -group ALL -group lane4 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(164)
454 add wave -noupdate -group ALL -group lane4 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(165)
455 add wave -noupdate -group ALL -group lane4 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(166)
456 add wave -noupdate -group ALL -group lane4 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(167)
457 add wave -noupdate -group ALL -group lane4 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(168)
458 add wave -noupdate -group ALL -group lane4 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(169)
459 add wave -noupdate -group ALL -group lane4 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(170)
460 add wave -noupdate -group ALL -group lane4 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(171)
461 add wave -noupdate -group ALL -group lane4 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(172)
462 add wave -noupdate -group ALL -group lane4 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(173)
463 add wave -noupdate -group ALL -group lane4 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(174)
464 add wave -noupdate -group ALL -group lane4 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(175)
465 add wave -noupdate -group ALL -group lane4 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(176)
466 add wave -noupdate -group ALL -group lane4 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(177)
467 add wave -noupdate -group ALL -group lane4 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(178)
468 add wave -noupdate -group ALL -group lane4 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(179)
469 add wave -noupdate -group ALL -group lane4 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(180)
470 add wave -noupdate -group ALL -group lane4 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(181)
471 add wave -noupdate -group ALL -group lane4 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(182)
472 add wave -noupdate -group ALL -group lane4 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(183)
473 add wave -noupdate -group ALL -group lane4 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(184)
474 add wave -noupdate -group ALL -group lane4 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(185)
475 add wave -noupdate -group ALL -group lane4 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(186)
476 add wave -noupdate -group ALL -group lane4 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(187)
477 add wave -noupdate -group ALL -group lane4 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(188)
478 add wave -noupdate -group ALL -group lane4 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(189)
479 add wave -noupdate -group ALL -group lane4 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(190)
480 add wave -noupdate -group ALL -group lane4 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(191)
481 add wave -noupdate -group ALL -group lane4 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(192)
482 add wave -noupdate -group ALL -group lane4 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(193)
483 add wave -noupdate -group ALL -group lane4 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(194)
484 add wave -noupdate -group ALL -group lane4 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(195)
485 add wave -noupdate -group ALL -group lane4 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(196)
486 add wave -noupdate -group ALL -group lane4 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(197)
487 add wave -noupdate -group ALL -group lane4 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(198)
488 add wave -noupdate -group ALL -group lane4 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(199)
489 add wave -noupdate -group ALL -group lane5 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(200)
490 add wave -noupdate -group ALL -group lane5 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(201)
491 add wave -noupdate -group ALL -group lane5 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(202)
492 add wave -noupdate -group ALL -group lane5 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(203)
493 add wave -noupdate -group ALL -group lane5 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(204)
494 add wave -noupdate -group ALL -group lane5 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(205)
495 add wave -noupdate -group ALL -group lane5 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(206)
496 add wave -noupdate -group ALL -group lane5 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(207)
497 add wave -noupdate -group ALL -group lane5 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(208)
498 add wave -noupdate -group ALL -group lane5 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(209)
499 add wave -noupdate -group ALL -group lane5 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(210)
500 add wave -noupdate -group ALL -group lane5 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(211)
501 add wave -noupdate -group ALL -group lane5 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(212)
502 add wave -noupdate -group ALL -group lane5 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(213)
503 add wave -noupdate -group ALL -group lane5 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(214)
504 add wave -noupdate -group ALL -group lane5 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(215)
505 add wave -noupdate -group ALL -group lane5 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(216)
506 add wave -noupdate -group ALL -group lane5 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(217)
507 add wave -noupdate -group ALL -group lane5 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(218)
508 add wave -noupdate -group ALL -group lane5 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(219)
509 add wave -noupdate -group ALL -group lane5 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(220)
510 add wave -noupdate -group ALL -group lane5 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(221)
511 add wave -noupdate -group ALL -group lane5 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(222)
512 add wave -noupdate -group ALL -group lane5 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(223)
513 add wave -noupdate -group ALL -group lane5 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(224)
514 add wave -noupdate -group ALL -group lane5 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(225)
515 add wave -noupdate -group ALL -group lane5 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(226)
516 add wave -noupdate -group ALL -group lane5 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(227)
517 add wave -noupdate -group ALL -group lane5 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(228)
518 add wave -noupdate -group ALL -group lane5 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(229)
519 add wave -noupdate -group ALL -group lane5 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(230)
520 add wave -noupdate -group ALL -group lane5 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(231)
521 add wave -noupdate -group ALL -group lane5 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(232)
522 add wave -noupdate -group ALL -group lane5 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(233)
523 add wave -noupdate -group ALL -group lane5 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(234)
524 add wave -noupdate -group ALL -group lane5 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(235)
525 add wave -noupdate -group ALL -group lane5 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(236)
526 add wave -noupdate -group ALL -group lane5 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(237)
527 add wave -noupdate -group ALL -group lane5 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(238)
528 add wave -noupdate -group ALL -group lane5 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(239)
529 add wave -noupdate -group ALL -group lane5 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(200)
530 add wave -noupdate -group ALL -group lane5 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(201)
531 add wave -noupdate -group ALL -group lane5 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(202)
532 add wave -noupdate -group ALL -group lane5 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(203)
533 add wave -noupdate -group ALL -group lane5 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(204)
534 add wave -noupdate -group ALL -group lane5 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(205)
535 add wave -noupdate -group ALL -group lane5 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(206)
536 add wave -noupdate -group ALL -group lane5 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(207)
537 add wave -noupdate -group ALL -group lane5 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(208)
538 add wave -noupdate -group ALL -group lane5 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(209)
539 add wave -noupdate -group ALL -group lane5 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(210)
540 add wave -noupdate -group ALL -group lane5 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(211)
541 add wave -noupdate -group ALL -group lane5 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(212)
542 add wave -noupdate -group ALL -group lane5 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(213)
543 add wave -noupdate -group ALL -group lane5 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(214)
544 add wave -noupdate -group ALL -group lane5 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(215)
545 add wave -noupdate -group ALL -group lane5 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(216)
546 add wave -noupdate -group ALL -group lane5 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(217)
547 add wave -noupdate -group ALL -group lane5 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(218)
548 add wave -noupdate -group ALL -group lane5 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(219)
549 add wave -noupdate -group ALL -group lane5 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(220)
550 add wave -noupdate -group ALL -group lane5 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(221)
551 add wave -noupdate -group ALL -group lane5 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(222)
552 add wave -noupdate -group ALL -group lane5 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(223)
553 add wave -noupdate -group ALL -group lane5 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(224)
554 add wave -noupdate -group ALL -group lane5 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(225)
555 add wave -noupdate -group ALL -group lane5 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(226)
556 add wave -noupdate -group ALL -group lane5 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(227)
557 add wave -noupdate -group ALL -group lane5 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(228)
558 add wave -noupdate -group ALL -group lane5 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(229)
559 add wave -noupdate -group ALL -group lane5 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(230)
560 add wave -noupdate -group ALL -group lane5 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(231)
561 add wave -noupdate -group ALL -group lane5 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(232)
562 add wave -noupdate -group ALL -group lane5 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(233)
563 add wave -noupdate -group ALL -group lane5 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(234)
564 add wave -noupdate -group ALL -group lane5 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(235)
565 add wave -noupdate -group ALL -group lane5 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(236)
566 add wave -noupdate -group ALL -group lane5 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(237)
567 add wave -noupdate -group ALL -group lane5 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(238)
568 add wave -noupdate -group ALL -group lane5 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(239)
569 add wave -noupdate -group ALL -group lane6 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(240)
570 add wave -noupdate -group ALL -group lane6 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(241)
571 add wave -noupdate -group ALL -group lane6 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(242)
572 add wave -noupdate -group ALL -group lane6 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(243)
573 add wave -noupdate -group ALL -group lane6 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(244)
574 add wave -noupdate -group ALL -group lane6 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(245)
575 add wave -noupdate -group ALL -group lane6 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(246)
576 add wave -noupdate -group ALL -group lane6 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(247)
577 add wave -noupdate -group ALL -group lane6 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(248)
578 add wave -noupdate -group ALL -group lane6 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(249)
579 add wave -noupdate -group ALL -group lane6 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(250)
580 add wave -noupdate -group ALL -group lane6 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(251)
581 add wave -noupdate -group ALL -group lane6 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(252)
582 add wave -noupdate -group ALL -group lane6 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(253)
583 add wave -noupdate -group ALL -group lane6 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(254)
584 add wave -noupdate -group ALL -group lane6 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(255)
585 add wave -noupdate -group ALL -group lane6 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(256)
586 add wave -noupdate -group ALL -group lane6 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(257)
587 add wave -noupdate -group ALL -group lane6 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(258)
588 add wave -noupdate -group ALL -group lane6 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(259)
589 add wave -noupdate -group ALL -group lane6 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(260)
590 add wave -noupdate -group ALL -group lane6 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(261)
591 add wave -noupdate -group ALL -group lane6 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(262)
592 add wave -noupdate -group ALL -group lane6 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(263)
593 add wave -noupdate -group ALL -group lane6 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(264)
594 add wave -noupdate -group ALL -group lane6 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(265)
595 add wave -noupdate -group ALL -group lane6 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(266)
596 add wave -noupdate -group ALL -group lane6 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(267)
597 add wave -noupdate -group ALL -group lane6 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(268)
598 add wave -noupdate -group ALL -group lane6 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(269)
599 add wave -noupdate -group ALL -group lane6 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(270)
600 add wave -noupdate -group ALL -group lane6 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(271)
601 add wave -noupdate -group ALL -group lane6 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(272)
602 add wave -noupdate -group ALL -group lane6 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(273)
603 add wave -noupdate -group ALL -group lane6 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(274)
604 add wave -noupdate -group ALL -group lane6 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(275)
605 add wave -noupdate -group ALL -group lane6 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(276)
606 add wave -noupdate -group ALL -group lane6 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(277)
607 add wave -noupdate -group ALL -group lane6 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(278)
608 add wave -noupdate -group ALL -group lane6 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(279)
609 add wave -noupdate -group ALL -group lane6 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(240)
610 add wave -noupdate -group ALL -group lane6 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(241)
611 add wave -noupdate -group ALL -group lane6 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(242)
612 add wave -noupdate -group ALL -group lane6 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(243)
613 add wave -noupdate -group ALL -group lane6 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(244)
614 add wave -noupdate -group ALL -group lane6 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(245)
615 add wave -noupdate -group ALL -group lane6 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(246)
616 add wave -noupdate -group ALL -group lane6 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(247)
617 add wave -noupdate -group ALL -group lane6 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(248)
618 add wave -noupdate -group ALL -group lane6 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(249)
619 add wave -noupdate -group ALL -group lane6 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(250)
620 add wave -noupdate -group ALL -group lane6 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(251)
621 add wave -noupdate -group ALL -group lane6 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(252)
622 add wave -noupdate -group ALL -group lane6 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(253)
623 add wave -noupdate -group ALL -group lane6 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(254)
624 add wave -noupdate -group ALL -group lane6 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(255)
625 add wave -noupdate -group ALL -group lane6 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(256)
626 add wave -noupdate -group ALL -group lane6 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(257)
627 add wave -noupdate -group ALL -group lane6 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(258)
628 add wave -noupdate -group ALL -group lane6 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(259)
629 add wave -noupdate -group ALL -group lane6 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(260)
630 add wave -noupdate -group ALL -group lane6 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(261)
631 add wave -noupdate -group ALL -group lane6 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(262)
632 add wave -noupdate -group ALL -group lane6 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(263)
633 add wave -noupdate -group ALL -group lane6 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(264)
634 add wave -noupdate -group ALL -group lane6 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(265)
635 add wave -noupdate -group ALL -group lane6 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(266)
636 add wave -noupdate -group ALL -group lane6 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(267)
637 add wave -noupdate -group ALL -group lane6 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(268)
638 add wave -noupdate -group ALL -group lane6 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(269)
639 add wave -noupdate -group ALL -group lane6 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(270)
640 add wave -noupdate -group ALL -group lane6 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(271)
641 add wave -noupdate -group ALL -group lane6 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(272)
642 add wave -noupdate -group ALL -group lane6 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(273)
643 add wave -noupdate -group ALL -group lane6 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(274)
644 add wave -noupdate -group ALL -group lane6 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(275)
645 add wave -noupdate -group ALL -group lane6 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(276)
646 add wave -noupdate -group ALL -group lane6 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(277)
647 add wave -noupdate -group ALL -group lane6 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(278)
648 add wave -noupdate -group ALL -group lane6 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(279)
649 add wave -noupdate -group ALL -group lane7 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(280)
650 add wave -noupdate -group ALL -group lane7 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(281)
651 add wave -noupdate -group ALL -group lane7 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(282)
652 add wave -noupdate -group ALL -group lane7 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(283)
653 add wave -noupdate -group ALL -group lane7 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(284)
654 add wave -noupdate -group ALL -group lane7 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(285)
655 add wave -noupdate -group ALL -group lane7 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(286)
656 add wave -noupdate -group ALL -group lane7 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(287)
657 add wave -noupdate -group ALL -group lane7 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(288)
658 add wave -noupdate -group ALL -group lane7 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(289)
659 add wave -noupdate -group ALL -group lane7 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(290)
660 add wave -noupdate -group ALL -group lane7 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(291)
661 add wave -noupdate -group ALL -group lane7 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(292)
662 add wave -noupdate -group ALL -group lane7 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(293)
663 add wave -noupdate -group ALL -group lane7 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(294)
664 add wave -noupdate -group ALL -group lane7 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(295)
665 add wave -noupdate -group ALL -group lane7 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(296)
666 add wave -noupdate -group ALL -group lane7 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(297)
667 add wave -noupdate -group ALL -group lane7 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(298)
668 add wave -noupdate -group ALL -group lane7 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(299)
669 add wave -noupdate -group ALL -group lane7 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(300)
670 add wave -noupdate -group ALL -group lane7 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(301)
671 add wave -noupdate -group ALL -group lane7 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(302)
672 add wave -noupdate -group ALL -group lane7 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(303)
673 add wave -noupdate -group ALL -group lane7 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(304)
674 add wave -noupdate -group ALL -group lane7 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(305)
675 add wave -noupdate -group ALL -group lane7 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(306)
676 add wave -noupdate -group ALL -group lane7 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(307)
677 add wave -noupdate -group ALL -group lane7 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(308)
678 add wave -noupdate -group ALL -group lane7 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(309)
679 add wave -noupdate -group ALL -group lane7 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(310)
680 add wave -noupdate -group ALL -group lane7 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(311)
681 add wave -noupdate -group ALL -group lane7 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(312)
682 add wave -noupdate -group ALL -group lane7 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(313)
683 add wave -noupdate -group ALL -group lane7 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(314)
684 add wave -noupdate -group ALL -group lane7 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(315)
685 add wave -noupdate -group ALL -group lane7 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(316)
686 add wave -noupdate -group ALL -group lane7 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(317)
687 add wave -noupdate -group ALL -group lane7 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(318)
688 add wave -noupdate -group ALL -group lane7 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(319)
689 add wave -noupdate -group ALL -group lane7 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(280)
690 add wave -noupdate -group ALL -group lane7 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(281)
691 add wave -noupdate -group ALL -group lane7 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(282)
692 add wave -noupdate -group ALL -group lane7 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(283)
693 add wave -noupdate -group ALL -group lane7 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(284)
694 add wave -noupdate -group ALL -group lane7 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(285)
695 add wave -noupdate -group ALL -group lane7 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(286)
696 add wave -noupdate -group ALL -group lane7 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(287)
697 add wave -noupdate -group ALL -group lane7 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(288)
698 add wave -noupdate -group ALL -group lane7 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(289)
699 add wave -noupdate -group ALL -group lane7 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(290)
700 add wave -noupdate -group ALL -group lane7 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(291)
701 add wave -noupdate -group ALL -group lane7 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(292)
702 add wave -noupdate -group ALL -group lane7 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(293)
703 add wave -noupdate -group ALL -group lane7 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(294)
704 add wave -noupdate -group ALL -group lane7 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(295)
705 add wave -noupdate -group ALL -group lane7 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(296)
706 add wave -noupdate -group ALL -group lane7 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(297)
707 add wave -noupdate -group ALL -group lane7 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(298)
708 add wave -noupdate -group ALL -group lane7 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(299)
709 add wave -noupdate -group ALL -group lane7 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(300)
710 add wave -noupdate -group ALL -group lane7 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(301)
711 add wave -noupdate -group ALL -group lane7 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(302)
712 add wave -noupdate -group ALL -group lane7 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(303)
713 add wave -noupdate -group ALL -group lane7 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(304)
714 add wave -noupdate -group ALL -group lane7 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(305)
715 add wave -noupdate -group ALL -group lane7 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(306)
716 add wave -noupdate -group ALL -group lane7 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(307)
717 add wave -noupdate -group ALL -group lane7 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(308)
718 add wave -noupdate -group ALL -group lane7 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(309)
719 add wave -noupdate -group ALL -group lane7 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(310)
720 add wave -noupdate -group ALL -group lane7 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(311)
721 add wave -noupdate -group ALL -group lane7 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(312)
722 add wave -noupdate -group ALL -group lane7 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(313)
723 add wave -noupdate -group ALL -group lane7 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(314)
724 add wave -noupdate -group ALL -group lane7 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(315)
725 add wave -noupdate -group ALL -group lane7 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(316)
726 add wave -noupdate -group ALL -group lane7 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(317)
727 add wave -noupdate -group ALL -group lane7 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(318)
728 add wave -noupdate -group ALL -group lane7 -radix hexadecimal /testbench/cic_lfr_r2_1/memCEL/RAMblk/RAMarray(319)
729 add wave -noupdate -group ALL -format Analog-Step -height 74 -max 1046131973.9999998 -min -1041945836.0 -radix decimal /testbench/cic_lfr_1/sample_out_reg16_s(0)
730 add wave -noupdate -format Analog-Step -height 45 -max 65534.999999999993 /testbench/chirp_gen/freq_chirp
731 add wave -noupdate -format Analog-Step -height 74 -max 31924.999999999996 -min -31798.0 -radix decimal /testbench/cic_1/data_out
732 add wave -noupdate -format Analog-Step -height 74 -max 100000.0 /testbench/chirp_gen/n
733 add wave -noupdate -format Analog-Step -height 74 -max 33000.0 -min -33000.0 -radix decimal -childformat {{/testbench/chirp_gen/data(15) -radix hexadecimal} {/testbench/chirp_gen/data(14) -radix hexadecimal} {/testbench/chirp_gen/data(13) -radix hexadecimal} {/testbench/chirp_gen/data(12) -radix hexadecimal} {/testbench/chirp_gen/data(11) -radix hexadecimal} {/testbench/chirp_gen/data(10) -radix hexadecimal} {/testbench/chirp_gen/data(9) -radix hexadecimal} {/testbench/chirp_gen/data(8) -radix hexadecimal} {/testbench/chirp_gen/data(7) -radix hexadecimal} {/testbench/chirp_gen/data(6) -radix hexadecimal} {/testbench/chirp_gen/data(5) -radix hexadecimal} {/testbench/chirp_gen/data(4) -radix hexadecimal} {/testbench/chirp_gen/data(3) -radix hexadecimal} {/testbench/chirp_gen/data(2) -radix hexadecimal} {/testbench/chirp_gen/data(1) -radix hexadecimal} {/testbench/chirp_gen/data(0) -radix hexadecimal}} -subitemconfig {/testbench/chirp_gen/data(15) {-height 15 -radix hexadecimal} /testbench/chirp_gen/data(14) {-height 15 -radix hexadecimal} /testbench/chirp_gen/data(13) {-height 15 -radix hexadecimal} /testbench/chirp_gen/data(12) {-height 15 -radix hexadecimal} /testbench/chirp_gen/data(11) {-height 15 -radix hexadecimal} /testbench/chirp_gen/data(10) {-height 15 -radix hexadecimal} /testbench/chirp_gen/data(9) {-height 15 -radix hexadecimal} /testbench/chirp_gen/data(8) {-height 15 -radix hexadecimal} /testbench/chirp_gen/data(7) {-height 15 -radix hexadecimal} /testbench/chirp_gen/data(6) {-height 15 -radix hexadecimal} /testbench/chirp_gen/data(5) {-height 15 -radix hexadecimal} /testbench/chirp_gen/data(4) {-height 15 -radix hexadecimal} /testbench/chirp_gen/data(3) {-height 15 -radix hexadecimal} /testbench/chirp_gen/data(2) {-height 15 -radix hexadecimal} /testbench/chirp_gen/data(1) {-height 15 -radix hexadecimal} /testbench/chirp_gen/data(0) {-height 15 -radix hexadecimal}} /testbench/chirp_gen/data
734 add wave -noupdate -clampanalog 1 -format Analog-Step -height 74 -max 1.0 -radix decimal /testbench/chirp_gen/current_time
372 TreeUpdate [SetDefaultTree]
735 TreeUpdate [SetDefaultTree]
373 WaveRestoreCursors {{Cursor 1} {29237145000 ps} 0} {{Cursor 2} {514701877948 ps} 0} {{Cursor 3} {392261637 ps} 0}
736 WaveRestoreCursors {{Cursor 1} {80993455000 ps} 0} {{Cursor 2} {868711165000 ps} 0} {{Cursor 3} {24393665000 ps} 0}
374 quietly wave cursor active 1
737 quietly wave cursor active 2
375 configure wave -namecolwidth 353
738 configure wave -namecolwidth 353
376 configure wave -valuecolwidth 188
739 configure wave -valuecolwidth 188
377 configure wave -justifyvalue left
740 configure wave -justifyvalue left
378 configure wave -signalnamewidth 0
741 configure wave -signalnamewidth 0
379 configure wave -snapdistance 10
742 configure wave -snapdistance 10
380 configure wave -datasetprefix 0
743 configure wave -datasetprefix 0
381 configure wave -rowmargin 4
744 configure wave -rowmargin 4
382 configure wave -childrowmargin 2
745 configure wave -childrowmargin 2
383 configure wave -gridoffset 0
746 configure wave -gridoffset 0
384 configure wave -gridperiod 1
747 configure wave -gridperiod 1
385 configure wave -griddelta 40
748 configure wave -griddelta 40
386 configure wave -timeline 0
749 configure wave -timeline 0
387 configure wave -timelineunits ns
750 configure wave -timelineunits ns
388 update
751 update
389 WaveRestoreZoom {29232867077 ps} {29241429253 ps}
752 WaveRestoreZoom {0 ps} {2601565800750 ps}
Show file before | Show file after | Hide comments
@@ -1,85 +1,90
1 ------------------------------------------------------------------------------
1 ------------------------------------------------------------------------------
2 -- This file is a part of the LPP VHDL IP LIBRARY
2 -- This file is a part of the LPP VHDL IP LIBRARY
3 -- Copyright (C) 2009 - 2010, Laboratory of Plasmas Physic - CNRS
3 -- Copyright (C) 2009 - 2010, Laboratory of Plasmas Physic - CNRS
4 --
4 --
5 -- This program is free software; you can redistribute it and/or modify
5 -- This program is free software; you can redistribute it and/or modify
6 -- it under the terms of the GNU General Public License as published by
6 -- it under the terms of the GNU General Public License as published by
7 -- the Free Software Foundation; either version 3 of the License, or
7 -- the Free Software Foundation; either version 3 of the License, or
8 -- (at your option) any later version.
8 -- (at your option) any later version.
9 --
9 --
10 -- This program is distributed in the hope that it will be useful,
10 -- This program is distributed in the hope that it will be useful,
11 -- but WITHOUT ANY WARRANTY; without even the implied warranty of
11 -- but WITHOUT ANY WARRANTY; without even the implied warranty of
12 -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 -- GNU General Public License for more details.
13 -- GNU General Public License for more details.
14 --
14 --
15 -- You should have received a copy of the GNU General Public License
15 -- You should have received a copy of the GNU General Public License
16 -- along with this program; if not, write to the Free Software
16 -- along with this program; if not, write to the Free Software
17 -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
17 -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 -------------------------------------------------------------------------------
18 -------------------------------------------------------------------------------
19 -- Author : Jean-christophe Pellion
19 -- Author : Jean-christophe Pellion
20 -- Mail : jean-christophe.pellion@lpp.polytechnique.fr
20 -- Mail : jean-christophe.pellion@lpp.polytechnique.fr
21 -- jean-christophe.pellion@easii-ic.com
21 -- jean-christophe.pellion@easii-ic.com
22 ----------------------------------------------------------------------------
22 ----------------------------------------------------------------------------
23
23
24 LIBRARY ieee;
24 LIBRARY ieee;
25 USE ieee.std_logic_1164.ALL;
25 USE ieee.std_logic_1164.ALL;
26 USE IEEE.std_logic_arith.ALL;
26 use ieee.numeric_std.all;
27 USE IEEE.std_logic_signed.ALL;
27 USE IEEE.std_logic_signed.ALL;
28 USE IEEE.MATH_real.ALL;
28 USE IEEE.MATH_real.ALL;
29
29
30 ENTITY chirp IS
30 ENTITY chirp IS
31
31
32 GENERIC (
32 GENERIC (
33 LOW_FREQUENCY_LIMIT : INTEGER := 0;
33 LOW_FREQUENCY_LIMIT : INTEGER := 0;
34 HIGH_FREQUENCY_LIMIT : INTEGER := 2000;
34 HIGH_FREQUENCY_LIMIT : INTEGER := 2000;
35 NB_POINT_TO_GEN : INTEGER := 10000;
35 NB_POINT_TO_GEN : INTEGER := 10000;
36 AMPLITUDE : INTEGER := 100;
36 AMPLITUDE : INTEGER := 100;
37 NB_BITS : INTEGER := 16);
37 NB_BITS : INTEGER := 16);
38
38
39 PORT (
39 PORT (
40 clk : IN STD_LOGIC;
40 clk : IN STD_LOGIC;
41 rstn : IN STD_LOGIC;
41 rstn : IN STD_LOGIC;
42 run : IN STD_LOGIC;
42 run : IN STD_LOGIC;
43
43
44 data_ack : IN STD_LOGIC;
44 data_ack : IN STD_LOGIC;
45 data : OUT STD_LOGIC_VECTOR(NB_BITS-1 DOWNTO 0)
45 data : OUT STD_LOGIC_VECTOR(NB_BITS-1 DOWNTO 0);
46
47 done : OUT STD_LOGIC
46 );
48 );
47
49
48 END chirp;
50 END chirp;
49
51
50 ARCHITECTURE beh OF chirp IS
52 ARCHITECTURE beh OF chirp IS
51
53
52 SIGNAL reg : STD_LOGIC_VECTOR(NB_BITS-1 DOWNTO 0);
54 SIGNAL reg : STD_LOGIC_VECTOR(NB_BITS-1 DOWNTO 0);
53 SIGNAL n : INTEGER;
55 SIGNAL n : INTEGER;
54 SIGNAL current_time : REAL := REAL(0);
56 SIGNAL current_time : REAL := REAL(0);
55 SIGNAL freq_chirp : REAL := REAL(0);
57 SIGNAL freq_chirp : REAL := REAL(0);
56 BEGIN -- beh
58 BEGIN -- beh
57
59
58 current_time <= REAL(n) / REAL(NB_POINT_TO_GEN);
60 current_time <= REAL(n) / REAL(NB_POINT_TO_GEN);
59 freq_chirp <= REAL(LOW_FREQUENCY_LIMIT) + (REAL(HIGH_FREQUENCY_LIMIT) - REAL(LOW_FREQUENCY_LIMIT))*current_time;
61 freq_chirp <= REAL(LOW_FREQUENCY_LIMIT) + (REAL(HIGH_FREQUENCY_LIMIT) - REAL(LOW_FREQUENCY_LIMIT))*current_time;
60
62
61 PROCESS (clk, rstn)
63 PROCESS (clk, rstn)
62 BEGIN -- PROCESS
64 BEGIN -- PROCESS
63 IF rstn = '0' THEN -- asynchronous reset (active low)
65 IF rstn = '0' THEN -- asynchronous reset (active low)
64 reg <= (OTHERS => '0');
66 reg <= (OTHERS => '0');
65 n <= 0;
67 n <= 0;
68 done <= '0';
66 ELSIF clk'event AND clk = '1' THEN -- rising clock edge
69 ELSIF clk'event AND clk = '1' THEN -- rising clock edge
67 IF run = '0' THEN
70 IF run = '0' THEN
68 reg <= (OTHERS => '0');
71 reg <= (OTHERS => '0');
69 n <= 0;
72 n <= 0;
73 done <= '0';
70 ELSE
74 ELSE
71 IF data_ack = '1' THEN
75 IF data_ack = '1' THEN
72 IF n < NB_POINT_TO_GEN THEN
76 IF n < NB_POINT_TO_GEN THEN
73 n <= n+1;
77 n <= n+1;
74 reg <= conv_std_logic_vector(INTEGER(REAL(AMPLITUDE) * SIN(MATH_2_PI*current_time*freq_chirp)),NB_BITS);
78 reg <= std_logic_vector(to_signed(INTEGER(REAL(AMPLITUDE) * SIN(MATH_2_PI*current_time*freq_chirp) ),NB_BITS));
75 ELSE
79 ELSE
80 done <= '1';
76 reg <= (OTHERS => '0');
81 reg <= (OTHERS => '0');
77 END IF;
82 END IF;
78 END IF;
83 END IF;
79 END IF;
84 END IF;
80 END IF;
85 END IF;
81 END PROCESS;
86 END PROCESS;
82
87
83 data <= reg;
88 data <= reg;
84
89
85 END beh;
90 END beh;
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@@ -1,45 +1,47
1 ------------------------------------------------------------------------------
1 ------------------------------------------------------------------------------
2 -- This file is a part of the LPP VHDL IP LIBRARY
2 -- This file is a part of the LPP VHDL IP LIBRARY
3 -- Copyright (C) 2009 - 2010, Laboratory of Plasmas Physic - CNRS
3 -- Copyright (C) 2009 - 2010, Laboratory of Plasmas Physic - CNRS
4 --
4 --
5 -- This program is free software; you can redistribute it and/or modify
5 -- This program is free software; you can redistribute it and/or modify
6 -- it under the terms of the GNU General Public License as published by
6 -- it under the terms of the GNU General Public License as published by
7 -- the Free Software Foundation; either version 3 of the License, or
7 -- the Free Software Foundation; either version 3 of the License, or
8 -- (at your option) any later version.
8 -- (at your option) any later version.
9 --
9 --
10 -- This program is distributed in the hope that it will be useful,
10 -- This program is distributed in the hope that it will be useful,
11 -- but WITHOUT ANY WARRANTY; without even the implied warranty of
11 -- but WITHOUT ANY WARRANTY; without even the implied warranty of
12 -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 -- GNU General Public License for more details.
13 -- GNU General Public License for more details.
14 --
14 --
15 -- You should have received a copy of the GNU General Public License
15 -- You should have received a copy of the GNU General Public License
16 -- along with this program; if not, write to the Free Software
16 -- along with this program; if not, write to the Free Software
17 -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
17 -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 -------------------------------------------------------------------------------
18 -------------------------------------------------------------------------------
19 -- Author : Jean-christophe Pellion
19 -- Author : Jean-christophe Pellion
20 -- Mail : jean-christophe.pellion@lpp.polytechnique.fr
20 -- Mail : jean-christophe.pellion@lpp.polytechnique.fr
21 -- jean-christophe.pellion@easii-ic.com
21 -- jean-christophe.pellion@easii-ic.com
22 ----------------------------------------------------------------------------
22 ----------------------------------------------------------------------------
23
23
24 LIBRARY ieee;
24 LIBRARY ieee;
25 USE ieee.std_logic_1164.ALL;
25 USE ieee.std_logic_1164.ALL;
26
26
27 PACKAGE chirp_pkg IS
27 PACKAGE chirp_pkg IS
28
28
29 COMPONENT chirp
29 COMPONENT chirp
30 GENERIC (
30 GENERIC (
31 LOW_FREQUENCY_LIMIT : INTEGER;
31 LOW_FREQUENCY_LIMIT : INTEGER;
32 HIGH_FREQUENCY_LIMIT : INTEGER;
32 HIGH_FREQUENCY_LIMIT : INTEGER;
33 NB_POINT_TO_GEN : INTEGER;
33 NB_POINT_TO_GEN : INTEGER;
34 AMPLITUDE : INTEGER;
34 AMPLITUDE : INTEGER;
35 NB_BITS : INTEGER);
35 NB_BITS : INTEGER);
36 PORT (
36 PORT (
37 clk : IN STD_LOGIC;
37 clk : IN STD_LOGIC;
38 rstn : IN STD_LOGIC;
38 rstn : IN STD_LOGIC;
39 run : IN STD_LOGIC;
39 run : IN STD_LOGIC;
40 data_ack : IN STD_LOGIC;
40 data_ack : IN STD_LOGIC;
41 data : OUT STD_LOGIC_VECTOR(NB_BITS-1 DOWNTO 0));
41 data : OUT STD_LOGIC_VECTOR(NB_BITS-1 DOWNTO 0);
42 done : OUT STD_LOGIC
43 );
42 END COMPONENT;
44 END COMPONENT;
43
45
44
46
45 END chirp_pkg;
47 END chirp_pkg;
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