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Modification UART (VHDL)...
martin -
r59:7a2c75e9a56c default
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1 NO CONTENT: new file 100644, binary diff hidden
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@@ -0,0 +1,19
1 #include <stdio.h>
2 #include "lpp_apb_functions.h"
3 #include "apb_uart_Driver.h"
4
5
6 int main()
7 {
8 printf("Debut Main\n\n");
9 UART_Device* dev = openUART(0);
10 printf("addr: %x\n",(unsigned int)dev);
11 printf("cfg: %x\n",dev->ConfigReg);
12 char* a = "hello world\n";
13 uartputs(dev,a);
14 printf("Try #1 done\n");
15 uartputs(dev,"salut monde\n");
16 printf("Try #2 done\n");
17 return 0;
18 }
19
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@@ -0,0 +1,60
1 /*------------------------------------------------------------------------------
2 -- This file is a part of the LPP VHDL IP LIBRARY
3 -- Copyright (C) 2009 - 2010, Laboratory of Plasmas Physic - CNRS
4 --
5 -- This program is free software; you can redistribute it and/or modify
6 -- it under the terms of the GNU General Public License as published by
7 -- the Free Software Foundation; either version 3 of the License, or
8 -- (at your option) any later version.
9 --
10 -- This program is distributed in the hope that it will be useful,
11 -- but WITHOUT ANY WARRANTY; without even the implied warranty of
12 -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 -- GNU General Public License for more details.
14 --
15 -- You should have received a copy of the GNU General Public License
16 -- along with this program; if not, write to the Free Software
17 -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 -------------------------------------------------------------------------------
19 -- Author : Martin Morlot
20 -- Mail : martin.morlot@lpp.polytechnique.fr
21 -----------------------------------------------------------------------------*/
22 #ifndef APB_CNA_DRIVER_H
23 #define APB_CNA_DRIVER_H
24
25 #define DAC_ready 3
26 #define DAC_enable 1
27 #define DAC_disable 0
28
29
30 /*===================================================
31 T Y P E S D E F
32 ====================================================*/
33
34 /** Structure repr�sentant le registre du CNA */
35 struct DAC_Driver
36 {
37 int configReg; /**< Registre de configuration: Flag Ready [1] ; Flag Enable [0] */
38 int dataReg; /**< Registre de donn�e sur 16 bits */
39 };
40
41 typedef struct DAC_Driver DAC_Device;
42
43 /*===================================================
44 F U N C T I O N S
45 ====================================================*/
46
47 /** Ouvre l'acc� au CNA */
48 DAC_Device* DacOpen(int count);
49
50 //DAC_Device* DacClose(int count);
51
52 /** Les donn�es sont lus a partir d'un tableau pour obtenir le signal de CAL (10Khz + 625hz) */
53 int DacTable();
54
55 /** Les donn�es sont entr�e par l'utilisateur, la conversion se fait a chaque nouvelle donn�e */
56 int DacConst();
57
58
59
60 #endif
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1 /*------------------------------------------------------------------------------
2 -- This file is a part of the LPP VHDL IP LIBRARY
3 -- Copyright (C) 2009 - 2010, Laboratory of Plasmas Physic - CNRS
4 --
5 -- This program is free software; you can redistribute it and/or modify
6 -- it under the terms of the GNU General Public License as published by
7 -- the Free Software Foundation; either version 3 of the License, or
8 -- (at your option) any later version.
9 --
10 -- This program is distributed in the hope that it will be useful,
11 -- but WITHOUT ANY WARRANTY; without even the implied warranty of
12 -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 -- GNU General Public License for more details.
14 --
15 -- You should have received a copy of the GNU General Public License
16 -- along with this program; if not, write to the Free Software
17 -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 -------------------------------------------------------------------------------
19 -- Author : Martin Morlot
20 -- Mail : martin.morlot@lpp.polytechnique.fr
21 -----------------------------------------------------------------------------*/
22 #include "apb_uart_Driver.h"
23 #include "lpp_apb_functions.h"
24 #include <stdio.h>
25
26
27 UART_Device* openUART(int count)
28 {
29 UART_Device* uart0;
30 uart0 = (UART_Device*) apbgetdevice(LPP_UART_CTRLR,VENDOR_LPP,count);
31 uart0->ConfigReg = BaudGenOnDuty;
32 return uart0;
33 }
34
35
36 void uartputc(UART_Device* dev,char c)
37 {
38 //while (!(dev->ConfigReg & (1<<5)));
39 while (!((dev->ConfigReg & DataSended) == DataSended));
40 dev->DataWReg = c;
41 printf(" ");
42 }
43
44 void uartputs(UART_Device* dev,char* s)
45 {
46 while (*s) uartputc(dev,*(s++));
47 }
48
49 char uartgetc(UART_Device* dev)
50 {
51 //while (!((dev->ConfigReg & (1<<2))));
52 while (!((dev->ConfigReg & NewData) == NewData));
53 return dev->DataRReg;
54 }
55
56 void uartgets(UART_Device* dev,char* s)
57 {
58 while (*s && (*s!=0xd)) *s++ = uartgetc(dev);
59 }
60
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@@ -0,0 +1,56
1 /*------------------------------------------------------------------------------
2 -- This file is a part of the LPP VHDL IP LIBRARY
3 -- Copyright (C) 2009 - 2010, Laboratory of Plasmas Physic - CNRS
4 --
5 -- This program is free software; you can redistribute it and/or modify
6 -- it under the terms of the GNU General Public License as published by
7 -- the Free Software Foundation; either version 3 of the License, or
8 -- (at your option) any later version.
9 --
10 -- This program is distributed in the hope that it will be useful,
11 -- but WITHOUT ANY WARRANTY; without even the implied warranty of
12 -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 -- GNU General Public License for more details.
14 --
15 -- You should have received a copy of the GNU General Public License
16 -- along with this program; if not, write to the Free Software
17 -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 -------------------------------------------------------------------------------
19 -- Author : Martin Morlot
20 -- Mail : martin.morlot@lpp.polytechnique.fr
21 -----------------------------------------------------------------------------*/
22 #ifndef APB_UART_DRIVER_H
23 #define APB_UART_DRIVER_H
24
25
26 #define BaudGenOnDuty 0
27 #define DataSended 0x10
28 #define NewData 0x100
29
30 /*===================================================
31 T Y P E S D E F
32 ====================================================*/
33
34 struct UART_Driver
35 {
36 int ConfigReg;
37 int DataWReg;
38 int DataRReg;
39 };
40
41 typedef struct UART_Driver UART_Device;
42
43
44 /*===================================================
45 F U N C T I O N S
46 ====================================================*/
47
48
49 UART_Device* openUART(int count);
50 void uartputc(UART_Device* dev,char c);
51 void uartputs(UART_Device* dev,char* s);
52 char uartgetc(UART_Device* dev);
53 void uartgets(UART_Device* dev,char* s);
54
55
56 #endif
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@@ -23,4 +23,5 all:
23 make all -C ScanAPB
23 make all -C ScanAPB
24 make all -C APB_lcd_ctrlr
24 make all -C APB_lcd_ctrlr
25 make all -C BenchFIFO
25 make all -C BenchFIFO
26 make all -C BenchUART
26
27
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@@ -26,6 +26,7 all:
26 make all -C LCD
26 make all -C LCD
27 make all -C DAC
27 make all -C DAC
28 make all -C FIFO
28 make all -C FIFO
29 make all -C UART
29
30
30
31
31 cleanall:
32 cleanall:
@@ -33,4 +34,5 cleanall:
33 make clean -C LCD
34 make clean -C LCD
34 make clean -C DAC
35 make clean -C DAC
35 make clean -C FIFO
36 make clean -C FIFO
37 make clean -C UART
36
38
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@@ -90,9 +90,9 begin
90 if (Serialized_int = '0' and Serialize_reg ='1') then
90 if (Serialized_int = '0' and Serialize_reg ='1') then
91 REG <= SIN & D(Data_sz-1 downto 1);
91 REG <= SIN & D(Data_sz-1 downto 1);
92 SOUT <= D(0);
92 SOUT <= D(0);
93 elsif CptBits_flag ='1' then
93 -- elsif CptBits_flag ='1' then
94 REG <= SIN & D(Data_sz-1 downto 1);
94 -- REG <= SIN & D(Data_sz-1 downto 1);
95 SOUT <= D(0);
95 -- SOUT <= D(0);
96 elsif Serialized_int = '0' then
96 elsif Serialized_int = '0' then
97 REG <= SIN & REG(Data_sz-1 downto 1);
97 REG <= SIN & REG(Data_sz-1 downto 1);
98 SOUT <= REG(0);
98 SOUT <= REG(0);
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@@ -66,15 +66,15 begin
66
66
67 WDATA_int <= '1' & WDATA & '0';
67 WDATA_int <= '1' & WDATA & '0';
68
68
69 BaudGenerator : BaudGen
69 BaudGenerator : entity work.BaudGen
70 port map(clk,reset,Capture,Bclk,RXD,BTrigger);
70 port map(clk,reset,Capture,Bclk,RXD,BTrigger);
71
71
72
72
73 RX_REG : Shift_REG
73 RX_REG : entity work.Shift_REG
74 generic map(Data_sz+2)
74 generic map(Data_sz+2)
75 port map(clk,Bclk,reset,RXD,TXD_Dummy,receive,NwDat_int,zeroVect,RDATA_int);
75 port map(clk,Bclk,reset,RXD,TXD_Dummy,receive,NwDat_int,zeroVect,RDATA_int);
76
76
77 TX_REG : Shift_REG
77 TX_REG : entity work.Shift_REG
78 generic map(Data_sz+2)
78 generic map(Data_sz+2)
79 port map(clk,Bclk,reset,'1',TXD,Send,Sended,WDATA_int);
79 port map(clk,Bclk,reset,'1',TXD,Send,Sended,WDATA_int);
80
80
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