@@ -202,6 +202,7 BEGIN | |||
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202 | 202 | X"4000D000"); |
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203 | 203 | |
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204 | 204 | UART_WRITE(TXD1 ,txp,ADDR_BASE_LFR & ADDR_LFR_WP_LENGTH, X"0000000F"); |
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205 | UART_WRITE(TXD1 ,txp,ADDR_BASE_LFR & ADDR_LFR_WP_DATA_IN_BUFFER, X"00000050"); | |
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205 | 206 | |
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206 | 207 | message_simu <= "4 - GO GO GO !!"; |
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207 | 208 | UART_WRITE (TXD1 ,txp,ADDR_BASE_LFR & ADDR_LFR_WP_START_DATE,X"00000000"); |
@@ -188,6 +188,8 ARCHITECTURE beh OF lpp_waveform IS | |||
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188 | 188 | |
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189 | 189 | SIGNAL fifo_buffer_time : STD_LOGIC_VECTOR(48*4-1 DOWNTO 0); |
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190 | 190 | |
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191 | SIGNAL fifo_buffer_time_s : STD_LOGIC_VECTOR(48*4-1 DOWNTO 0); | |
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192 | ||
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191 | 193 | BEGIN -- beh |
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192 | 194 | |
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193 | 195 | ----------------------------------------------------------------------------- |
@@ -429,12 +431,15 BEGIN -- beh | |||
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429 | 431 | IF run = '0' THEN |
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430 | 432 | fifo_buffer_time(48*(I+1)-1 DOWNTO 48*I) <= (OTHERS => '0'); |
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431 | 433 | ELSE |
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432 |
IF arbiter_time_out_new(I) = ' |
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434 | IF arbiter_time_out_new(I) = '1' THEN -- modif JC 15-01-2015 | |
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433 | 435 | fifo_buffer_time(48*(I+1)-1 DOWNTO 48*I) <= arbiter_time_out; |
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434 | 436 | END IF; |
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435 | 437 | END IF; |
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436 | 438 | END IF; |
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437 | 439 | END PROCESS; |
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440 | ||
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441 | fifo_buffer_time_s(48*(I+1)-1 DOWNTO 48*I) <= arbiter_time_out WHEN arbiter_time_out_new(I) = '1' ELSE | |
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442 | fifo_buffer_time(48*(I+1)-1 DOWNTO 48*I); | |
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438 | 443 | |
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439 | 444 | lpp_waveform_fsmdma_I: lpp_waveform_fsmdma |
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440 | 445 | PORT MAP ( |
@@ -442,7 +447,7 BEGIN -- beh | |||
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442 | 447 | rstn => rstn, |
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443 | 448 | run => run, |
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444 | 449 | |
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445 | fifo_buffer_time => fifo_buffer_time(48*(I+1)-1 DOWNTO 48*I), | |
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450 | fifo_buffer_time => fifo_buffer_time_s(48*(I+1)-1 DOWNTO 48*I), | |
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446 | 451 | |
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447 | 452 | fifo_data => s_rdata_v(32*(I+1)-1 DOWNTO 32*I), |
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448 | 453 | fifo_empty => empty(I), |
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