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Clone from http://pc-instru.lpp.polytechnique.fr:5000/VHD_Lib

Fusion
Alexis Jeandet -
r675:1993321a17d7 merge default draft
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@@ -1,8 +1,8
1 VHDLIB=../..
1 VHDLIB=../..
2 SCRIPTSDIR=$(VHDLIB)/scripts/
2 SCRIPTSDIR=$(VHDLIB)/scripts/
3 GRLIB := $(shell sh $(VHDLIB)/scripts/lpp_relpath.sh)
3 GRLIB := $(shell sh $(VHDLIB)/scripts/lpp_relpath.sh)
4 TOP=testbench
4 TOP=TB
5 BOARD=LFR-EQM
5 BOARD=LFR-FM
6 include $(VHDLIB)/boards/$(BOARD)/Makefile_RTAX.inc
6 include $(VHDLIB)/boards/$(BOARD)/Makefile_RTAX.inc
7 DEVICE=$(PART)-$(PACKAGE)$(SPEED)
7 DEVICE=$(PART)-$(PACKAGE)$(SPEED)
8 UCF=
8 UCF=
@@ -11,8 +11,8 EFFORT=high
11 XSTOPT=
11 XSTOPT=
12 SYNPOPT=
12 SYNPOPT=
13 VHDLSYNFILES=
13 VHDLSYNFILES=
14 VHDLSIMFILES= tb.vhd
14 VHDLSIMFILES= TB.vhd
15 SIMTOP=TB
15 SIMTOP=tb
16 CLEAN=soft-clean
16 CLEAN=soft-clean
17
17
18 TECHLIBS = axcelerator
18 TECHLIBS = axcelerator
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@@ -21,8 +21,11
21 -------------------------------------------------------------------------------
21 -------------------------------------------------------------------------------
22
22
23 LIBRARY IEEE;
23 LIBRARY IEEE;
24 use ieee.std_logic_textio.all;
24 USE IEEE.STD_LOGIC_1164.ALL;
25 USE IEEE.STD_LOGIC_1164.ALL;
25 USE IEEE.NUMERIC_STD.ALL;
26 USE IEEE.NUMERIC_STD.ALL;
27 use std.textio.all;
28
26
29
27 LIBRARY grlib;
30 LIBRARY grlib;
28 USE grlib.amba.ALL;
31 USE grlib.amba.ALL;
@@ -63,7 +66,10 ARCHITECTURE beh OF TB IS
63 SIGNAL ASSERTION_1 : STD_LOGIC;
66 SIGNAL ASSERTION_1 : STD_LOGIC;
64 SIGNAL ASSERTION_2 : STD_LOGIC;
67 SIGNAL ASSERTION_2 : STD_LOGIC;
65 SIGNAL ASSERTION_3 : STD_LOGIC;
68 SIGNAL ASSERTION_3 : STD_LOGIC;
66
69 SIGNAL ASSERTION_3_ERROR : STD_LOGIC;
70
71 SIGNAL end_of_simu : STD_LOGIC := '0';
72
67 BEGIN -- beh
73 BEGIN -- beh
68
74
69 apb_lfr_management_1: apb_lfr_management
75 apb_lfr_management_1: apb_lfr_management
@@ -95,14 +101,28 BEGIN -- beh
95 fine_time => fine_time,
101 fine_time => fine_time,
96
102
97 LFR_soft_rstn => OPEN);
103 LFR_soft_rstn => OPEN);
104
105 -----------------------------------------------------------------------------
106 -- CLOCK GEN
107 PROCESS IS
108 BEGIN -- PROCESS
109 IF end_of_simu /= '1' THEN
110 clk25MHz <= NOT clk25MHz;
111 WAIT FOR 20000 ps;
112 ELSE
113 WAIT FOR 20 ps;
114 ASSERT false REPORT "END OF TEST" SEVERITY note;
115 WAIT;
116 END IF;
117 END PROCESS;
118 -----------------------------------------------------------------------------
98
119
99 clk25MHz <= NOT clk25MHz AFTER 20000 ps;
100
120
101 PROCESS
121 PROCESS
102 BEGIN -- PROCESS
122 BEGIN -- PROCESS
103 WAIT UNTIL clk25MHz = '1';
123 WAIT UNTIL clk25MHz = '1';
104 TB_string <= "RESET ";
124 TB_string <= "RESET "; REPORT "RESET" SEVERITY note;
105
125
106 resetn <= '0';
126 resetn <= '0';
107
127
108 apbi.psel(0) <= '0';
128 apbi.psel(0) <= '0';
@@ -119,25 +139,25 BEGIN -- beh
119 -- DESYNC TO SYNC
139 -- DESYNC TO SYNC
120 ---------------------------------------------------------------------------
140 ---------------------------------------------------------------------------
121 WAIT UNTIL clk25MHz = '1';
141 WAIT UNTIL clk25MHz = '1';
122 TB_string <= "TICK 1 ";
142 TB_string <= "TICK 1 "; REPORT "Tick 1" SEVERITY note;
123 grspw_tick <= '1';------------------------------------------------------1
143 grspw_tick <= '1';------------------------------------------------------1
124 WAIT UNTIL clk25MHz = '1';
144 WAIT UNTIL clk25MHz = '1';
125 grspw_tick <= '0';
145 grspw_tick <= '0';
126 WAIT FOR 53333 us;
146 WAIT FOR 53333 us;
127 WAIT UNTIL clk25MHz = '1';
147 WAIT UNTIL clk25MHz = '1';
128 TB_string <= "TICK 2 ";
148 TB_string <= "TICK 2 "; REPORT "Tick 2" SEVERITY note;
129 grspw_tick <= '1';------------------------------------------------------2
149 grspw_tick <= '1';------------------------------------------------------2
130 WAIT UNTIL clk25MHz = '1';
150 WAIT UNTIL clk25MHz = '1';
131 grspw_tick <= '0';
151 grspw_tick <= '0';
132 WAIT FOR 56000 us;
152 WAIT FOR 56000 us;
133 WAIT UNTIL clk25MHz = '1';
153 WAIT UNTIL clk25MHz = '1';
134 TB_string <= "TICK 3 ";
154 TB_string <= "TICK 3 "; REPORT "Tick 3" SEVERITY note;
135 grspw_tick <= '1';------------------------------------------------------3
155 grspw_tick <= '1';------------------------------------------------------3
136 WAIT UNTIL clk25MHz = '1';
156 WAIT UNTIL clk25MHz = '1';
137 grspw_tick <= '0';
157 grspw_tick <= '0';
138 WAIT FOR 200 ms;
158 WAIT FOR 200 ms;
139 WAIT UNTIL clk25MHz = '1';
159 WAIT UNTIL clk25MHz = '1';
140 TB_string <= "CT new ";
160 TB_string <= "CT new "; REPORT "CT new" SEVERITY note;
141 -- WRITE NEW COARSE_TIME
161 -- WRITE NEW COARSE_TIME
142 apbi.psel(0) <= '1';
162 apbi.psel(0) <= '1';
143 apbi.pwrite <= '1';
163 apbi.pwrite <= '1';
@@ -154,7 +174,7 BEGIN -- beh
154
174
155 WAIT FOR 10 ms;
175 WAIT FOR 10 ms;
156 WAIT UNTIL clk25MHz = '1';
176 WAIT UNTIL clk25MHz = '1';
157 TB_string <= "TICK 4 ";
177 TB_string <= "TICK 4 "; REPORT "Tick 4" SEVERITY note;
158 grspw_tick <= '1';------------------------------------------------------3
178 grspw_tick <= '1';------------------------------------------------------3
159 WAIT UNTIL clk25MHz = '1';
179 WAIT UNTIL clk25MHz = '1';
160 grspw_tick <= '0';
180 grspw_tick <= '0';
@@ -162,7 +182,7 BEGIN -- beh
162
182
163 WAIT FOR 250 ms;
183 WAIT FOR 250 ms;
164 WAIT UNTIL clk25MHz = '1';
184 WAIT UNTIL clk25MHz = '1';
165 TB_string <= "CT new ";
185 TB_string <= "CT new "; REPORT "CT new" SEVERITY note;
166 -- WRITE NEW COARSE_TIME
186 -- WRITE NEW COARSE_TIME
167 apbi.psel(0) <= '1';
187 apbi.psel(0) <= '1';
168 apbi.pwrite <= '1';
188 apbi.pwrite <= '1';
@@ -179,7 +199,7 BEGIN -- beh
179
199
180 WAIT FOR 10 ms;
200 WAIT FOR 10 ms;
181 WAIT UNTIL clk25MHz = '1';
201 WAIT UNTIL clk25MHz = '1';
182 TB_string <= "TICK 5 ";
202 TB_string <= "TICK 5 "; REPORT "Tick 5" SEVERITY note;
183 grspw_tick <= '1';------------------------------------------------------3
203 grspw_tick <= '1';------------------------------------------------------3
184 WAIT UNTIL clk25MHz = '1';
204 WAIT UNTIL clk25MHz = '1';
185 grspw_tick <= '0';
205 grspw_tick <= '0';
@@ -187,7 +207,7 BEGIN -- beh
187
207
188 WAIT FOR 20 ms;
208 WAIT FOR 20 ms;
189 WAIT UNTIL clk25MHz = '1';
209 WAIT UNTIL clk25MHz = '1';
190 TB_string <= "CT new ";
210 TB_string <= "CT new "; REPORT "CT new" SEVERITY note;
191 -- WRITE NEW COARSE_TIME
211 -- WRITE NEW COARSE_TIME
192 apbi.psel(0) <= '1';
212 apbi.psel(0) <= '1';
193 apbi.pwrite <= '1';
213 apbi.pwrite <= '1';
@@ -204,7 +224,7 BEGIN -- beh
204
224
205 WAIT FOR 25 ms;
225 WAIT FOR 25 ms;
206 WAIT UNTIL clk25MHz = '1';
226 WAIT UNTIL clk25MHz = '1';
207 TB_string <= "Soft RST";
227 TB_string <= "Soft RST"; REPORT "Soft Reset" SEVERITY note;
208 -- WRITE SOFT RESET
228 -- WRITE SOFT RESET
209 apbi.psel(0) <= '1';
229 apbi.psel(0) <= '1';
210 apbi.pwrite <= '1';
230 apbi.pwrite <= '1';
@@ -220,7 +240,19 BEGIN -- beh
220 WAIT UNTIL clk25MHz = '1';
240 WAIT UNTIL clk25MHz = '1';
221
241
222 WAIT FOR 250 ms;
242 WAIT FOR 250 ms;
223 TB_string <= "READ 1 ";
243 TB_string <= "READ 1 "; REPORT "Read 1" SEVERITY note;
244 apbi.psel(0) <= '1';
245 apbi.pwrite <= '0';
246 apbi.penable <= '1';
247 apbi.paddr <= X"00000008";
248 WAIT UNTIL clk25MHz = '1';
249 apbi.psel(0) <= '0';
250 apbi.pwrite <= '0';
251 apbi.penable <= '0';
252 apbi.paddr <= (OTHERS => '0');
253 WAIT UNTIL clk25MHz = '1';
254 WAIT FOR 250 ms;
255 TB_string <= "READ 2 "; REPORT "Read 2" SEVERITY note;
224 apbi.psel(0) <= '1';
256 apbi.psel(0) <= '1';
225 apbi.pwrite <= '0';
257 apbi.pwrite <= '0';
226 apbi.penable <= '1';
258 apbi.penable <= '1';
@@ -232,7 +264,7 BEGIN -- beh
232 apbi.paddr <= (OTHERS => '0');
264 apbi.paddr <= (OTHERS => '0');
233 WAIT UNTIL clk25MHz = '1';
265 WAIT UNTIL clk25MHz = '1';
234 WAIT FOR 250 ms;
266 WAIT FOR 250 ms;
235 TB_string <= "READ 2 ";
267 TB_string <= "READ 3 "; REPORT "Read 3" SEVERITY note;
236 apbi.psel(0) <= '1';
268 apbi.psel(0) <= '1';
237 apbi.pwrite <= '0';
269 apbi.pwrite <= '0';
238 apbi.penable <= '1';
270 apbi.penable <= '1';
@@ -243,22 +275,32 BEGIN -- beh
243 apbi.penable <= '0';
275 apbi.penable <= '0';
244 apbi.paddr <= (OTHERS => '0');
276 apbi.paddr <= (OTHERS => '0');
245 WAIT UNTIL clk25MHz = '1';
277 WAIT UNTIL clk25MHz = '1';
246 WAIT FOR 250 ms;
278 WAIT FOR 10 ps;
247 TB_string <= "READ 3 ";
279 end_of_simu <= '1';
248 apbi.psel(0) <= '1';
280 REPORT "end_of_simu set to 1" SEVERITY note;
249 apbi.pwrite <= '0';
281
250 apbi.penable <= '1';
282 IF ASSERTION_1 = '1' THEN
251 apbi.paddr <= X"00000008";
283 REPORT "ASSERTION 1 : **UPDATE(CoarseTime) => RESET(fineTime)** OK" SEVERITY note;
252 WAIT UNTIL clk25MHz = '1';
284 ELSE
253 apbi.psel(0) <= '0';
285 REPORT "ASSERTION 1 : **UPDATE(CoarseTime) => RESET(fineTime)** !! FAILED !!" SEVERITY note;
254 apbi.pwrite <= '0';
286 END IF;
255 apbi.penable <= '0';
256 apbi.paddr <= (OTHERS => '0');
257 WAIT UNTIL clk25MHz = '1';
258
287
288 IF ASSERTION_2 = '1' THEN
289 REPORT "ASSERTION 2 : **Tick => NEXT(fineTime) = RESET(fineTime) OK" SEVERITY note;
290 ELSE
291 REPORT "ASSERTION 2 : **Tick => NEXT(fineTime) = RESET(fineTime) !! FAILED !!" SEVERITY note;
292 END IF;
293
294 IF ASSERTION_3 = '1' THEN
295 REPORT "ASSERTION 3 : **NEXT(TIME) > TIME ** OK" SEVERITY note;
296 ELSE
297 REPORT "ASSERTION 3 : **NEXT(TIME) > TIME ** !! FAILED !!" SEVERITY note;
298 END IF;
259
299
260
300
261 REPORT "*** END simulation ***" SEVERITY failure;
301
302
303 ASSERT false REPORT "*** END simulation ***" SEVERITY note;
262 WAIT;
304 WAIT;
263
305
264 END PROCESS;
306 END PROCESS;
@@ -298,17 +340,26 BEGIN -- beh
298 -- False after a TRANSITION !
340 -- False after a TRANSITION !
299 -----------------------------------------------------------------------------
341 -----------------------------------------------------------------------------
300 PROCESS (clk25MHz, resetn)
342 PROCESS (clk25MHz, resetn)
343 VARIABLE coarse_time_integer : INTEGER;
301 BEGIN -- PROCESS
344 BEGIN -- PROCESS
302 IF resetn = '0' THEN -- asynchronous reset (active low)
345 IF resetn = '0' THEN -- asynchronous reset (active low)
303 ASSERTION_1 <= '1';
346 ASSERTION_1 <= '1';
304 ELSIF clk25MHz'event AND clk25MHz = '1' THEN -- rising clock edge
347 ELSIF clk25MHz'event AND clk25MHz = '1' THEN -- rising clock edge
348 coarse_time_integer := to_integer(UNSIGNED(coarse_time));
349
305 IF coarse_time /= coarse_time_reg THEN
350 IF coarse_time /= coarse_time_reg THEN
306 IF fine_time /= X"0000" THEN
351 IF fine_time /= X"0000" THEN
307 IF fine_time /= X"0041" THEN
352 IF fine_time /= X"0041" THEN
308 ASSERTION_1 <= '0';
353 ASSERTION_1 <= '0';
354 REPORT "ASSERTION 1 : **UPDATE(CoarseTime) => RESET(fineTime)** !! FAILED !! " SEVERITY note;
309 ELSE
355 ELSE
356 REPORT "ASSERTION 1 : **UPDATE(CoarseTime) => RESET(fineTime)** false after a transition" SEVERITY note;
310 ASSERTION_1 <= 'U';
357 ASSERTION_1 <= 'U';
311 END IF;
358 END IF;
359 REPORT "COARSE_TIME_REG= " & integer'IMAGE(to_integer(UNSIGNED(coarse_time_reg))) SEVERITY note;
360 REPORT "COARSE_TIME = " & integer'IMAGE(to_integer(UNSIGNED(coarse_time ))) SEVERITY note;
361 REPORT "FINE_TIME_REG = " & integer'IMAGE(to_integer(UNSIGNED(fine_time_reg ))) SEVERITY note;
362 REPORT "FINE_TIME = " & integer'IMAGE(to_integer(UNSIGNED(fine_time ))) SEVERITY note;
312 ELSE
363 ELSE
313 ASSERTION_1 <= '1';
364 ASSERTION_1 <= '1';
314 END IF;
365 END IF;
@@ -328,7 +379,12 BEGIN -- beh
328 IF tick_ongoing = '1' THEN
379 IF tick_ongoing = '1' THEN
329 IF fine_time_reg /= fine_time OR coarse_time_reg /= coarse_time THEN
380 IF fine_time_reg /= fine_time OR coarse_time_reg /= coarse_time THEN
330 IF fine_time /= X"0000" THEN
381 IF fine_time /= X"0000" THEN
382 REPORT "ASSERTION 2 : **Tick => NEXT(fineTime) = RESET(fineTime) !! FAILED !! " SEVERITY note;
331 ASSERTION_2 <= '0';
383 ASSERTION_2 <= '0';
384 REPORT "COARSE_TIME_REG= " & integer'IMAGE(to_integer(UNSIGNED(coarse_time_reg))) SEVERITY note;
385 REPORT "COARSE_TIME = " & integer'IMAGE(to_integer(UNSIGNED(coarse_time ))) SEVERITY note;
386 REPORT "FINE_TIME_REG = " & integer'IMAGE(to_integer(UNSIGNED(fine_time_reg ))) SEVERITY note;
387 REPORT "FINE_TIME = " & integer'IMAGE(to_integer(UNSIGNED(fine_time ))) SEVERITY note;
332 END IF;
388 END IF;
333 END IF;
389 END IF;
334 END IF;
390 END IF;
@@ -343,15 +399,21 BEGIN -- beh
343 PROCESS (clk25MHz, resetn)
399 PROCESS (clk25MHz, resetn)
344 BEGIN -- PROCESS
400 BEGIN -- PROCESS
345 IF resetn = '0' THEN -- asynchronous reset (active low)
401 IF resetn = '0' THEN -- asynchronous reset (active low)
346 ASSERTION_3 <= '1';
402 ASSERTION_3 <= '1';
347 ELSIF clk25MHz'event AND clk25MHz = '1' THEN -- rising clock edge
403 ELSIF clk25MHz'event AND clk25MHz = '1' THEN -- rising clock edge
348 ASSERTION_3 <= '1';
404 ASSERTION_3 <= '1';
349 IF global_time_reg(46 DOWNTO 0) > global_time(46 DOWNTO 0) THEN
405 IF global_time_reg(46 DOWNTO 0) > global_time(46 DOWNTO 0) THEN
350 IF global_time(47) = '0' AND global_time_reg(47) = '1' THEN
406 IF global_time(47) = '0' AND global_time_reg(47) = '1' THEN
407 REPORT "ASSERTION 3 : **NEXT(TIME) > TIME ** can be false after a resynchro" SEVERITY note;
351 ASSERTION_3 <= 'U'; -- RESYNCHRO ....
408 ASSERTION_3 <= 'U'; -- RESYNCHRO ....
352 ELSE
409 ELSE
410 REPORT "ASSERTION 3 : **NEXT(TIME) > TIME ** can be false after a NEW coarse time" SEVERITY note;
353 ASSERTION_3 <= '0';
411 ASSERTION_3 <= '0';
354 END IF;
412 END IF;
413 REPORT "COARSE_TIME_REG= " & integer'IMAGE(to_integer(UNSIGNED(coarse_time_reg))) SEVERITY note;
414 REPORT "COARSE_TIME = " & integer'IMAGE(to_integer(UNSIGNED(coarse_time ))) SEVERITY note;
415 REPORT "FINE_TIME_REG = " & integer'IMAGE(to_integer(UNSIGNED(fine_time_reg ))) SEVERITY note;
416 REPORT "FINE_TIME = " & integer'IMAGE(to_integer(UNSIGNED(fine_time ))) SEVERITY note;
355 END IF;
417 END IF;
356 END IF;
418 END IF;
357 END PROCESS;
419 END PROCESS;
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