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MINI-LFR 0.1.16
pellion -
r379:5f9dbde02e9a JC
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@@ -172,6 +172,8 ARCHITECTURE beh OF MINI_LFR_top IS
172 SIGNAL bias_fail_sw_sig : STD_LOGIC;
172 SIGNAL bias_fail_sw_sig : STD_LOGIC;
173
173
174 SIGNAL observation_reg : STD_LOGIC_VECTOR(31 DOWNTO 0);
174 SIGNAL observation_reg : STD_LOGIC_VECTOR(31 DOWNTO 0);
175 SIGNAL observation_vector_0: STD_LOGIC_VECTOR(11 DOWNTO 0);
176 SIGNAL observation_vector_1: STD_LOGIC_VECTOR(11 DOWNTO 0);
175 -----------------------------------------------------------------------------
177 -----------------------------------------------------------------------------
176
178
177 BEGIN -- beh
179 BEGIN -- beh
@@ -440,6 +442,8 BEGIN -- beh
440 coarse_time => coarse_time,
442 coarse_time => coarse_time,
441 fine_time => fine_time,
443 fine_time => fine_time,
442 data_shaping_BW => bias_fail_sw_sig,
444 data_shaping_BW => bias_fail_sw_sig,
445 observation_vector_0=> observation_vector_0,
446 observation_vector_1 => observation_vector_1,
443 observation_reg => observation_reg);
447 observation_reg => observation_reg);
444
448
445 all_sample: FOR I IN 7 DOWNTO 0 GENERATE
449 all_sample: FOR I IN 7 DOWNTO 0 GENERATE
@@ -525,8 +529,8 BEGIN -- beh
525 IO10 <= '0';
529 IO10 <= '0';
526 IO11 <= '0';
530 IO11 <= '0';
527 ELSIF clk_25'event AND clk_25 = '1' THEN -- rising clock edge
531 ELSIF clk_25'event AND clk_25 = '1' THEN -- rising clock edge
528 CASE gpioo.dout(1 DOWNTO 0) IS
532 CASE gpioo.dout(2 DOWNTO 0) IS
529 WHEN "00" =>
533 WHEN "000" =>
530 IO0 <= observation_reg(0 );
534 IO0 <= observation_reg(0 );
531 IO1 <= observation_reg(1 );
535 IO1 <= observation_reg(1 );
532 IO2 <= observation_reg(2 );
536 IO2 <= observation_reg(2 );
@@ -539,7 +543,7 BEGIN -- beh
539 IO9 <= observation_reg(9 );
543 IO9 <= observation_reg(9 );
540 IO10 <= observation_reg(10);
544 IO10 <= observation_reg(10);
541 IO11 <= observation_reg(11);
545 IO11 <= observation_reg(11);
542 WHEN "01" =>
546 WHEN "001" =>
543 IO0 <= observation_reg(0 + 12);
547 IO0 <= observation_reg(0 + 12);
544 IO1 <= observation_reg(1 + 12);
548 IO1 <= observation_reg(1 + 12);
545 IO2 <= observation_reg(2 + 12);
549 IO2 <= observation_reg(2 + 12);
@@ -552,7 +556,7 BEGIN -- beh
552 IO9 <= observation_reg(9 + 12);
556 IO9 <= observation_reg(9 + 12);
553 IO10 <= observation_reg(10 + 12);
557 IO10 <= observation_reg(10 + 12);
554 IO11 <= observation_reg(11 + 12);
558 IO11 <= observation_reg(11 + 12);
555 WHEN "10" =>
559 WHEN "010" =>
556 IO0 <= observation_reg(0 + 12 + 12);
560 IO0 <= observation_reg(0 + 12 + 12);
557 IO1 <= observation_reg(1 + 12 + 12);
561 IO1 <= observation_reg(1 + 12 + 12);
558 IO2 <= observation_reg(2 + 12 + 12);
562 IO2 <= observation_reg(2 + 12 + 12);
@@ -565,19 +569,32 BEGIN -- beh
565 IO9 <= '0';
569 IO9 <= '0';
566 IO10 <= '0';
570 IO10 <= '0';
567 IO11 <= '0';
571 IO11 <= '0';
568 WHEN "11" =>
572 WHEN "011" =>
569 IO0 <= '0';
573 IO0 <= observation_vector_0(0 );
570 IO1 <= '0';
574 IO1 <= observation_vector_0(1 );
571 IO2 <= '0';
575 IO2 <= observation_vector_0(2 );
572 IO3 <= '0';
576 IO3 <= observation_vector_0(3 );
573 IO4 <= '0';
577 IO4 <= observation_vector_0(4 );
574 IO5 <= '0';
578 IO5 <= observation_vector_0(5 );
575 IO6 <= '0';
579 IO6 <= observation_vector_0(6 );
576 IO7 <= '0';
580 IO7 <= observation_vector_0(7 );
577 IO8 <= '0';
581 IO8 <= observation_vector_0(8 );
578 IO9 <= '0';
582 IO9 <= observation_vector_0(9 );
579 IO10 <= '0';
583 IO10 <= observation_vector_0(10);
580 IO11 <= '0';
584 IO11 <= observation_vector_0(11);
585 WHEN "100" =>
586 IO0 <= observation_vector_1(0 );
587 IO1 <= observation_vector_1(1 );
588 IO2 <= observation_vector_1(2 );
589 IO3 <= observation_vector_1(3 );
590 IO4 <= observation_vector_1(4 );
591 IO5 <= observation_vector_1(5 );
592 IO6 <= observation_vector_1(6 );
593 IO7 <= observation_vector_1(7 );
594 IO8 <= observation_vector_1(8 );
595 IO9 <= observation_vector_1(9 );
596 IO10 <= observation_vector_1(10);
597 IO11 <= observation_vector_1(11);
581 WHEN OTHERS => NULL;
598 WHEN OTHERS => NULL;
582 END CASE;
599 END CASE;
583
600
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@@ -1,22 +1,24
1 onerror {resume}
1 onerror {resume}
2 quietly WaveActivateNextPane {} 0
2 quietly WaveActivateNextPane {} 0
3 add wave -noupdate -expand -group debug -expand -group FSM_MS_DMA_state /tb/lpp_lfr_ms_1/debug_reg(0)
3 add wave -noupdate -group debug -expand -group FSM_MS_DMA_state /tb/lpp_lfr_ms_1/debug_reg(0)
4 add wave -noupdate -expand -group debug -expand -group FSM_MS_DMA_state /tb/lpp_lfr_ms_1/debug_reg(1)
4 add wave -noupdate -group debug -expand -group FSM_MS_DMA_state /tb/lpp_lfr_ms_1/debug_reg(1)
5 add wave -noupdate -expand -group debug -expand -group FSM_MS_DMA_state /tb/lpp_lfr_ms_1/debug_reg(2)
5 add wave -noupdate -group debug -expand -group FSM_MS_DMA_state /tb/lpp_lfr_ms_1/debug_reg(2)
6 add wave -noupdate -expand -group debug -expand -group status_ready_matrix /tb/lpp_lfr_ms_1/debug_reg(5)
6 add wave -noupdate -group debug -expand -group status_ready_matrix /tb/lpp_lfr_ms_1/debug_reg(5)
7 add wave -noupdate -expand -group debug -expand -group status_ready_matrix /tb/lpp_lfr_ms_1/debug_reg(4)
7 add wave -noupdate -group debug -expand -group status_ready_matrix /tb/lpp_lfr_ms_1/debug_reg(4)
8 add wave -noupdate -expand -group debug -expand -group status_ready_matrix /tb/lpp_lfr_ms_1/debug_reg(3)
8 add wave -noupdate -group debug -expand -group status_ready_matrix /tb/lpp_lfr_ms_1/debug_reg(3)
9 add wave -noupdate -expand -group debug -expand -group matrix_ready /tb/lpp_lfr_ms_1/debug_reg(8)
9 add wave -noupdate -group debug -expand -group matrix_ready /tb/lpp_lfr_ms_1/debug_reg(8)
10 add wave -noupdate -expand -group debug -expand -group matrix_ready /tb/lpp_lfr_ms_1/debug_reg(7)
10 add wave -noupdate -group debug -expand -group matrix_ready /tb/lpp_lfr_ms_1/debug_reg(7)
11 add wave -noupdate -expand -group debug -expand -group matrix_ready /tb/lpp_lfr_ms_1/debug_reg(6)
11 add wave -noupdate -group debug -expand -group matrix_ready /tb/lpp_lfr_ms_1/debug_reg(6)
12 add wave -noupdate -expand -group debug -expand /tb/lpp_lfr_ms_1/debug_reg
12 add wave -noupdate -group debug /tb/lpp_lfr_ms_1/debug_reg
13 add wave -noupdate -expand -group debug /tb/lpp_lfr_apbreg_1/apbi
13 add wave -noupdate -group debug /tb/lpp_lfr_apbreg_1/apbi
14 add wave -noupdate -expand -group debug -subitemconfig {/tb/lpp_lfr_apbreg_1/apbo.pirq {-height 15 -radix hexadecimal}} /tb/lpp_lfr_apbreg_1/apbo
14 add wave -noupdate -group debug /tb/lpp_lfr_apbreg_1/apbo
15 add wave -noupdate -expand -group debug /tb/ready_reg
15 add wave -noupdate -group debug /tb/ready_reg
16 add wave -noupdate -expand -group Logic /tb/lpp_lfr_ms_1/debug_reg(0)
16 add wave -noupdate -group Logic /tb/lpp_lfr_ms_1/debug_reg(0)
17 add wave -noupdate -expand -group Logic /tb/lpp_lfr_ms_1/debug_reg(1)
17 add wave -noupdate -group Logic /tb/lpp_lfr_ms_1/debug_reg(1)
18 add wave -noupdate -expand -group Logic /tb/lpp_lfr_ms_1/debug_reg(2)
18 add wave -noupdate -group Logic /tb/lpp_lfr_ms_1/debug_reg(2)
19 add wave -noupdate -expand /tb/lpp_lfr_apbreg_1/debug_signal
19 add wave -noupdate -expand /tb/lpp_lfr_apbreg_1/debug_signal
20 add wave -noupdate -expand /tb/lpp_lfr_ms_1/observation_vector_0
21 add wave -noupdate -expand /tb/lpp_lfr_ms_1/observation_vector_1
20 add wave -noupdate -divider {New Divider}
22 add wave -noupdate -divider {New Divider}
21 add wave -noupdate /tb/lpp_lfr_ms_1/sample_f0_wen
23 add wave -noupdate /tb/lpp_lfr_ms_1/sample_f0_wen
22 add wave -noupdate -radix hexadecimal /tb/lpp_lfr_ms_1/sample_f0_wdata
24 add wave -noupdate -radix hexadecimal /tb/lpp_lfr_ms_1/sample_f0_wdata
@@ -210,7 +212,7 add wave -noupdate /tb/lpp_lfr_apbreg_1/
210 add wave -noupdate /tb/lpp_lfr_apbreg_1/lpp_apbreg_ms_pointer_f0/matrix_time
212 add wave -noupdate /tb/lpp_lfr_apbreg_1/lpp_apbreg_ms_pointer_f0/matrix_time
211 add wave -noupdate /tb/lpp_lfr_apbreg_1/lpp_apbreg_ms_pointer_f0/current_reg
213 add wave -noupdate /tb/lpp_lfr_apbreg_1/lpp_apbreg_ms_pointer_f0/current_reg
212 TreeUpdate [SetDefaultTree]
214 TreeUpdate [SetDefaultTree]
213 WaveRestoreCursors {{Cursor 1} {123239471127 ps} 0}
215 WaveRestoreCursors {{Cursor 1} {137412164208 ps} 0}
214 configure wave -namecolwidth 486
216 configure wave -namecolwidth 486
215 configure wave -valuecolwidth 112
217 configure wave -valuecolwidth 112
216 configure wave -justifyvalue left
218 configure wave -justifyvalue left
@@ -225,6 +227,6 configure wave -griddelta 40
225 configure wave -timeline 0
227 configure wave -timeline 0
226 configure wave -timelineunits ps
228 configure wave -timelineunits ps
227 update
229 update
228 WaveRestoreZoom {124629370639 ps} {125891337681 ps}
230 WaveRestoreZoom {0 ps} {787501102500 ps}
229 bookmark add wave bookmark0 {{61745287067 ps} {63754655343 ps}} 0
231 bookmark add wave bookmark0 {{61745287067 ps} {63754655343 ps}} 0
230 bookmark add wave bookmark1 {{61745287067 ps} {63754655343 ps}} 0
232 bookmark add wave bookmark1 {{61745287067 ps} {63754655343 ps}} 0
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@@ -676,6 +676,18 BEGIN
676 almost_full => OPEN);
676 almost_full => OPEN);
677
677
678 -----------------------------------------------------------------------------
678 -----------------------------------------------------------------------------
679
680 observation_vector_1(11 DOWNTO 0) <= "0000" &
681 SM_correlation_start & --7
682 status_MS_input(1 DOWNTO 0)& --6..5
683 MEM_IN_SM_locked(4 DOWNTO 0); --4..0
684
685 observation_vector_0(11 DOWNTO 6) <= MEM_IN_SM_locked(0) &
686 SM_correlation_done & --4
687 SM_correlation_auto & --3
688 SM_correlation_start & --2
689 status_component(5 DOWNTO 4); --1..0
690 -----------------------------------------------------------------------------
679 MS_control_1 : MS_control
691 MS_control_1 : MS_control
680 PORT MAP (
692 PORT MAP (
681 clk => clk,
693 clk => clk,
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