diff --git a/designs/MINI-LFR_WFP_MS/MINI_LFR_top.vhd b/designs/MINI-LFR_WFP_MS/MINI_LFR_top.vhd --- a/designs/MINI-LFR_WFP_MS/MINI_LFR_top.vhd +++ b/designs/MINI-LFR_WFP_MS/MINI_LFR_top.vhd @@ -172,6 +172,8 @@ ARCHITECTURE beh OF MINI_LFR_top IS SIGNAL bias_fail_sw_sig : STD_LOGIC; SIGNAL observation_reg : STD_LOGIC_VECTOR(31 DOWNTO 0); + SIGNAL observation_vector_0: STD_LOGIC_VECTOR(11 DOWNTO 0); + SIGNAL observation_vector_1: STD_LOGIC_VECTOR(11 DOWNTO 0); ----------------------------------------------------------------------------- BEGIN -- beh @@ -440,6 +442,8 @@ BEGIN -- beh coarse_time => coarse_time, fine_time => fine_time, data_shaping_BW => bias_fail_sw_sig, + observation_vector_0=> observation_vector_0, + observation_vector_1 => observation_vector_1, observation_reg => observation_reg); all_sample: FOR I IN 7 DOWNTO 0 GENERATE @@ -525,8 +529,8 @@ BEGIN -- beh IO10 <= '0'; IO11 <= '0'; ELSIF clk_25'event AND clk_25 = '1' THEN -- rising clock edge - CASE gpioo.dout(1 DOWNTO 0) IS - WHEN "00" => + CASE gpioo.dout(2 DOWNTO 0) IS + WHEN "000" => IO0 <= observation_reg(0 ); IO1 <= observation_reg(1 ); IO2 <= observation_reg(2 ); @@ -539,7 +543,7 @@ BEGIN -- beh IO9 <= observation_reg(9 ); IO10 <= observation_reg(10); IO11 <= observation_reg(11); - WHEN "01" => + WHEN "001" => IO0 <= observation_reg(0 + 12); IO1 <= observation_reg(1 + 12); IO2 <= observation_reg(2 + 12); @@ -552,7 +556,7 @@ BEGIN -- beh IO9 <= observation_reg(9 + 12); IO10 <= observation_reg(10 + 12); IO11 <= observation_reg(11 + 12); - WHEN "10" => + WHEN "010" => IO0 <= observation_reg(0 + 12 + 12); IO1 <= observation_reg(1 + 12 + 12); IO2 <= observation_reg(2 + 12 + 12); @@ -565,19 +569,32 @@ BEGIN -- beh IO9 <= '0'; IO10 <= '0'; IO11 <= '0'; - WHEN "11" => - IO0 <= '0'; - IO1 <= '0'; - IO2 <= '0'; - IO3 <= '0'; - IO4 <= '0'; - IO5 <= '0'; - IO6 <= '0'; - IO7 <= '0'; - IO8 <= '0'; - IO9 <= '0'; - IO10 <= '0'; - IO11 <= '0'; + WHEN "011" => + IO0 <= observation_vector_0(0 ); + IO1 <= observation_vector_0(1 ); + IO2 <= observation_vector_0(2 ); + IO3 <= observation_vector_0(3 ); + IO4 <= observation_vector_0(4 ); + IO5 <= observation_vector_0(5 ); + IO6 <= observation_vector_0(6 ); + IO7 <= observation_vector_0(7 ); + IO8 <= observation_vector_0(8 ); + IO9 <= observation_vector_0(9 ); + IO10 <= observation_vector_0(10); + IO11 <= observation_vector_0(11); + WHEN "100" => + IO0 <= observation_vector_1(0 ); + IO1 <= observation_vector_1(1 ); + IO2 <= observation_vector_1(2 ); + IO3 <= observation_vector_1(3 ); + IO4 <= observation_vector_1(4 ); + IO5 <= observation_vector_1(5 ); + IO6 <= observation_vector_1(6 ); + IO7 <= observation_vector_1(7 ); + IO8 <= observation_vector_1(8 ); + IO9 <= observation_vector_1(9 ); + IO10 <= observation_vector_1(10); + IO11 <= observation_vector_1(11); WHEN OTHERS => NULL; END CASE; diff --git a/designs/Validation_LFR_SpectralMatrix/wave.do b/designs/Validation_LFR_SpectralMatrix/wave.do --- a/designs/Validation_LFR_SpectralMatrix/wave.do +++ b/designs/Validation_LFR_SpectralMatrix/wave.do @@ -1,22 +1,24 @@ onerror {resume} quietly WaveActivateNextPane {} 0 -add wave -noupdate -expand -group debug -expand -group FSM_MS_DMA_state /tb/lpp_lfr_ms_1/debug_reg(0) -add wave -noupdate -expand -group debug -expand -group FSM_MS_DMA_state /tb/lpp_lfr_ms_1/debug_reg(1) -add wave -noupdate -expand -group debug -expand -group FSM_MS_DMA_state /tb/lpp_lfr_ms_1/debug_reg(2) -add wave -noupdate -expand -group debug -expand -group status_ready_matrix /tb/lpp_lfr_ms_1/debug_reg(5) -add wave -noupdate -expand -group debug -expand -group status_ready_matrix /tb/lpp_lfr_ms_1/debug_reg(4) -add wave -noupdate -expand -group debug -expand -group status_ready_matrix /tb/lpp_lfr_ms_1/debug_reg(3) -add wave -noupdate -expand -group debug -expand -group matrix_ready /tb/lpp_lfr_ms_1/debug_reg(8) -add wave -noupdate -expand -group debug -expand -group matrix_ready /tb/lpp_lfr_ms_1/debug_reg(7) -add wave -noupdate -expand -group debug -expand -group matrix_ready /tb/lpp_lfr_ms_1/debug_reg(6) -add wave -noupdate -expand -group debug -expand /tb/lpp_lfr_ms_1/debug_reg -add wave -noupdate -expand -group debug /tb/lpp_lfr_apbreg_1/apbi -add wave -noupdate -expand -group debug -subitemconfig {/tb/lpp_lfr_apbreg_1/apbo.pirq {-height 15 -radix hexadecimal}} /tb/lpp_lfr_apbreg_1/apbo -add wave -noupdate -expand -group debug /tb/ready_reg -add wave -noupdate -expand -group Logic /tb/lpp_lfr_ms_1/debug_reg(0) -add wave -noupdate -expand -group Logic /tb/lpp_lfr_ms_1/debug_reg(1) -add wave -noupdate -expand -group Logic /tb/lpp_lfr_ms_1/debug_reg(2) +add wave -noupdate -group debug -expand -group FSM_MS_DMA_state /tb/lpp_lfr_ms_1/debug_reg(0) +add wave -noupdate -group debug -expand -group FSM_MS_DMA_state /tb/lpp_lfr_ms_1/debug_reg(1) +add wave -noupdate -group debug -expand -group FSM_MS_DMA_state /tb/lpp_lfr_ms_1/debug_reg(2) +add wave -noupdate -group debug -expand -group status_ready_matrix /tb/lpp_lfr_ms_1/debug_reg(5) +add wave -noupdate -group debug -expand -group status_ready_matrix /tb/lpp_lfr_ms_1/debug_reg(4) +add wave -noupdate -group debug -expand -group status_ready_matrix /tb/lpp_lfr_ms_1/debug_reg(3) +add wave -noupdate -group debug -expand -group matrix_ready /tb/lpp_lfr_ms_1/debug_reg(8) +add wave -noupdate -group debug -expand -group matrix_ready /tb/lpp_lfr_ms_1/debug_reg(7) +add wave -noupdate -group debug -expand -group matrix_ready /tb/lpp_lfr_ms_1/debug_reg(6) +add wave -noupdate -group debug /tb/lpp_lfr_ms_1/debug_reg +add wave -noupdate -group debug /tb/lpp_lfr_apbreg_1/apbi +add wave -noupdate -group debug /tb/lpp_lfr_apbreg_1/apbo +add wave -noupdate -group debug /tb/ready_reg +add wave -noupdate -group Logic /tb/lpp_lfr_ms_1/debug_reg(0) +add wave -noupdate -group Logic /tb/lpp_lfr_ms_1/debug_reg(1) +add wave -noupdate -group Logic /tb/lpp_lfr_ms_1/debug_reg(2) add wave -noupdate -expand /tb/lpp_lfr_apbreg_1/debug_signal +add wave -noupdate -expand /tb/lpp_lfr_ms_1/observation_vector_0 +add wave -noupdate -expand /tb/lpp_lfr_ms_1/observation_vector_1 add wave -noupdate -divider {New Divider} add wave -noupdate /tb/lpp_lfr_ms_1/sample_f0_wen add wave -noupdate -radix hexadecimal /tb/lpp_lfr_ms_1/sample_f0_wdata @@ -210,7 +212,7 @@ add wave -noupdate /tb/lpp_lfr_apbreg_1/ add wave -noupdate /tb/lpp_lfr_apbreg_1/lpp_apbreg_ms_pointer_f0/matrix_time add wave -noupdate /tb/lpp_lfr_apbreg_1/lpp_apbreg_ms_pointer_f0/current_reg TreeUpdate [SetDefaultTree] -WaveRestoreCursors {{Cursor 1} {123239471127 ps} 0} +WaveRestoreCursors {{Cursor 1} {137412164208 ps} 0} configure wave -namecolwidth 486 configure wave -valuecolwidth 112 configure wave -justifyvalue left @@ -225,6 +227,6 @@ configure wave -griddelta 40 configure wave -timeline 0 configure wave -timelineunits ps update -WaveRestoreZoom {124629370639 ps} {125891337681 ps} +WaveRestoreZoom {0 ps} {787501102500 ps} bookmark add wave bookmark0 {{61745287067 ps} {63754655343 ps}} 0 bookmark add wave bookmark1 {{61745287067 ps} {63754655343 ps}} 0 diff --git a/lib/lpp/lpp_top_lfr/lpp_lfr_ms.vhd b/lib/lpp/lpp_top_lfr/lpp_lfr_ms.vhd --- a/lib/lpp/lpp_top_lfr/lpp_lfr_ms.vhd +++ b/lib/lpp/lpp_top_lfr/lpp_lfr_ms.vhd @@ -676,6 +676,18 @@ BEGIN almost_full => OPEN); ----------------------------------------------------------------------------- + + observation_vector_1(11 DOWNTO 0) <= "0000" & + SM_correlation_start & --7 + status_MS_input(1 DOWNTO 0)& --6..5 + MEM_IN_SM_locked(4 DOWNTO 0); --4..0 + + observation_vector_0(11 DOWNTO 6) <= MEM_IN_SM_locked(0) & + SM_correlation_done & --4 + SM_correlation_auto & --3 + SM_correlation_start & --2 + status_component(5 DOWNTO 4); --1..0 + ----------------------------------------------------------------------------- MS_control_1 : MS_control PORT MAP ( clk => clk,