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------------------------------------------------------------------------------
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-- This file is a part of the LPP VHDL IP LIBRARY
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-- Copyright (C) 2009 - 2010, Laboratory of Plasmas Physic - CNRS
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--
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-- This program is free software; you can redistribute it and/or modify
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-- it under the terms of the GNU General Public License as published by
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-- the Free Software Foundation; either version 3 of the License, or
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-- (at your option) any later version.
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--
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-- This program is distributed in the hope that it will be useful,
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-- but WITHOUT ANY WARRANTY; without even the implied warranty of
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-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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-- GNU General Public License for more details.
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--
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-- You should have received a copy of the GNU General Public License
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-- along with this program; if not, write to the Free Software
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-- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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-------------------------------------------------------------------------------
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-- Author : Jean-christophe Pellion
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-- Mail : jean-christophe.pellion@lpp.polytechnique.fr
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-- jean-christophe.pellion@easii-ic.com
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-------------------------------------------------------------------------------
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-- 1.0 - initial version
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-- 1.1 - (01/11/2013) FIX boundary error (1kB address should not be crossed by BURSTS)
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-------------------------------------------------------------------------------
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LIBRARY ieee;
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USE ieee.std_logic_1164.ALL;
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USE ieee.numeric_std.ALL;
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LIBRARY grlib;
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USE grlib.amba.ALL;
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USE grlib.stdlib.ALL;
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USE grlib.devices.ALL;
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USE GRLIB.DMA2AHB_Package.ALL;
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LIBRARY lpp;
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USE lpp.lpp_amba.ALL;
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USE lpp.apb_devices_list.ALL;
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USE lpp.lpp_memory.ALL;
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USE lpp.lpp_dma_pkg.ALL;
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USE lpp.lpp_waveform_pkg.ALL;
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LIBRARY techmap;
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USE techmap.gencomp.ALL;
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ENTITY lpp_debug_dma_singleOrBurst IS
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GENERIC (
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tech : INTEGER := inferred;
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hindex : INTEGER := 2;
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pindex : INTEGER := 4;
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paddr : INTEGER := 4;
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pmask : INTEGER := 16#fff#
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);
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PORT (
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-- AMBA AHB system signals
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HCLK : IN STD_ULOGIC;
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HRESETn : IN STD_ULOGIC;
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-- AMBA AHB Master Interface
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ahbmi : IN AHB_Mst_In_Type;
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ahbmo : OUT AHB_Mst_Out_Type;
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-- AMBA AHB Master Interface
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apbi : IN apb_slv_in_type;
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apbo : OUT apb_slv_out_type;
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-- observation SIGNAL
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out_ren : OUT STD_LOGIC;
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out_send : OUT STD_LOGIC;
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out_done : OUT STD_LOGIC;
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out_dmaout_okay : OUT STD_LOGIC
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);
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END;
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ARCHITECTURE Behavioral OF lpp_debug_dma_singleOrBurst IS
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SIGNAL run : STD_LOGIC;
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SIGNAL send : STD_LOGIC;
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SIGNAL valid_burst : STD_LOGIC;
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SIGNAL done : STD_LOGIC;
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SIGNAL ren : STD_LOGIC;
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SIGNAL address : STD_LOGIC_VECTOR(31 DOWNTO 0);
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SIGNAL data : STD_LOGIC_VECTOR(31 DOWNTO 0);
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--
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CONSTANT REVISION : INTEGER := 1;
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CONSTANT pconfig : apb_config_type := (
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0 => ahb_device_reg (VENDOR_LPP, LPP_DEBUG_DMA, 2, REVISION, 0),
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1 => apb_iobar(paddr, pmask));
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TYPE lpp_debug_dma_regs IS RECORD
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run : STD_LOGIC;
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send : STD_LOGIC;
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valid_burst : STD_LOGIC;
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done : STD_LOGIC;
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ren : STD_LOGIC;
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addr : STD_LOGIC_VECTOR(31 DOWNTO 0);
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data : STD_LOGIC_VECTOR(31 DOWNTO 0);
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nb_ren : STD_LOGIC_VECTOR(31 DOWNTO 0);
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END RECORD;
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SIGNAL reg : lpp_debug_dma_regs;
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SIGNAL prdata : STD_LOGIC_VECTOR(31 DOWNTO 0);
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BEGIN
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out_ren <= ren;
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out_send <= send;
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out_done <= done;
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lpp_dma_singleOrBurst_1 : lpp_dma_singleOrBurst
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GENERIC MAP (
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tech => tech,
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hindex => hindex)
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PORT MAP (
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HCLK => HCLK,
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HRESETn => HRESETn,
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run => run, --
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AHB_Master_In => ahbmi,
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AHB_Master_Out => ahbmo,
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send => send, --
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valid_burst => valid_burst, --
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done => done, -- out
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ren => ren, -- out
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address => address,
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data => data,
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debug_dmaout_okay => out_dmaout_okay);
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run <= reg.run;
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valid_burst <= reg.valid_burst;
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send <= reg.send;
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address <= reg.addr;
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data <= reg.data;
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lpp_lfr_apbreg : PROCESS (HCLK, HRESETn)
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VARIABLE paddr : STD_LOGIC_VECTOR(7 DOWNTO 2);
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BEGIN -- PROCESS lpp_dma_top
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IF HRESETn = '0' THEN -- asynchronous reset (active low)
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reg.run <= '0';
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reg.send <= '0';
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reg.valid_burst <= '0';
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reg.done <= '0';
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reg.ren <= '0';
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reg.addr <= (OTHERS => '0');
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reg.data <= (OTHERS => '0');
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reg.nb_ren <= (OTHERS => '0');
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apbo.pirq <= (OTHERS => '0');
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ELSIF HCLK'EVENT AND HCLK = '1' THEN -- rising clock edge
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paddr := "000000";
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paddr(7 DOWNTO 2) := apbi.paddr(7 DOWNTO 2);
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prdata <= (OTHERS => '0');
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------------------------------------
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reg.send <= '0';
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IF done = '1' THEN
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reg.done <= '1';
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END IF;
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IF ren = '0' THEN
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reg.ren <= '1';
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reg.nb_ren <= STD_LOGIC_VECTOR(UNSIGNED(reg.nb_ren) + 1);
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END IF;
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------------------------------------
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IF apbi.psel(pindex) = '1' THEN
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-- APB DMA READ --
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CASE paddr(7 DOWNTO 2) IS
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--
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WHEN "000000" => prdata(0) <= reg.run;
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prdata(1) <= reg.send;
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prdata(2) <= reg.valid_burst;
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prdata(3) <= reg.done;
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prdata(4) <= reg.ren;
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WHEN "000001" => prdata <= reg.addr;
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WHEN "000010" => prdata <= reg.data;
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WHEN "000011" => prdata <= reg.nb_ren;
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WHEN OTHERS => NULL;
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END CASE;
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IF (apbi.pwrite AND apbi.penable) = '1' THEN
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-- APB DMA WRITE --
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CASE paddr(7 DOWNTO 2) IS
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--
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WHEN "000000" => reg.run <= apbi.pwdata(0);
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reg.send <= apbi.pwdata(1);
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reg.valid_burst <= apbi.pwdata(2);
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reg.done <= apbi.pwdata(3);
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reg.ren <= apbi.pwdata(4);
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WHEN "000001" => reg.addr <= apbi.pwdata;
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WHEN "000010" => reg.data <= apbi.pwdata;
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--WHEN "000011" => reg.nb_ren <= apbi.pwdata;
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WHEN OTHERS => NULL;
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END CASE;
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END IF;
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END IF;
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END IF;
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END PROCESS lpp_lfr_apbreg;
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apbo.pindex <= pindex;
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apbo.pconfig <= pconfig;
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apbo.prdata <= prdata;
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END Behavioral;
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