HG_REPOSITORIES/LPP/INSTRUMENTATION/USERS/PELLION/VHD_Lib Commit - r279:d578015e2f82

WaveFormPicker :...

pellion -

r279:d578015e2f82 LPP-LFR-em-WaveFormPicker-0-0-9 JC

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r279:d578015e2f82

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designs/LFR-em-WaveFormPicker/leon3mp.vhd +1 -1

                   pirq_ms                 => 6,
                   pirq_wfp                => 14,
                   hindex                  => 2,
-                  top_lfr_version         => X"00000008")
+                  top_lfr_version         => X"00000009")
                 PORT MAP (
                   clk               => clkm,
                   rstn              => rstn,

designs/MINI-LFR_waveformPicker/MINI_LFR_top.vhd +14 -5

               SIGNAL  ahbo_s_ext  :  soc_ahb_slv_out_vector(NB_AHB_SLAVE-1+3  DOWNTO 3):= (OTHERS => ahbs_none);
               SIGNAL  ahbi_m_ext  :  AHB_Mst_In_Type;
               SIGNAL  ahbo_m_ext  :  soc_ahb_mst_out_vector(NB_AHB_MASTER-1+1 DOWNTO 1):= (OTHERS => ahbm_none);
+              --
+              SIGNAL IO_s : STD_LOGIC_VECTOR(11 DOWNTO 0);
             BEGIN  -- beh
                   IO5  <= '0';
                   IO6  <= '0';
                   IO7  <= '0';
-                  IO8  <= '1';
+                  IO8  <= '0';
+                  IO9  <= '0';
+                  IO10 <= '0';
+                  IO11 <= '0';
                 ELSIF clk_25'event AND clk_25 = '1' THEN  -- rising clock edge
                   LED0 <= '0';
                   LED1 <= '1';
                   IO5  <= ADC_SDO(3) OR ADC_SDO(4);
                   IO6  <= ADC_SDO(5) OR ADC_SDO(6) OR ADC_SDO(7);
                   IO7  <= BP1 OR  nDTR2 OR nRTS2 OR nRTS1;
-                  IO8  <= '0';
+                  IO8  <= IO_s(8);
+                  IO9  <= IO_s(9);
+                  IO10 <= IO_s(10);
+                  IO11 <= IO_s(11);
                 END IF;
               END PROCESS;
                   ahbmo   => ahbo_m_ext(1),
                   apbi    => apbi_ext,
                   apbo    => apbo_ext(5),
-                  out_ren  => IO11,
+                  out_ren           => IO_s(11),
-                  out_send => IO10,
+                  out_send          => IO_s(10),
-                  out_done => IO9
+                  out_done          => IO_s(9),
+                  out_dmaout_okay   => IO_s(8)
                   );
               -----------------------------------------------------------------------------

lib/lpp/lpp_debug_lfr/lpp_debug_dma_singleOrBurst.vhd +4 -2

                 -- observation SIGNAL
                 out_ren  : OUT STD_LOGIC;
                 out_send : OUT STD_LOGIC;
-                out_done : OUT STD_LOGIC
+                out_done : OUT STD_LOGIC;
+                out_dmaout_okay : OUT STD_LOGIC
                 );
             END;
                   done           => done,           -- out
                   ren            => ren,            -- out
                   address        => address,
-                  data           => data);
+                  data           => data,
+                  debug_dmaout_okay => out_dmaout_okay);
               run         <= reg.run;

lib/lpp/lpp_debug_lfr/lpp_debug_lfr_pkg.vhd +3 -1

                   apbo    : OUT apb_slv_out_type;
                   out_ren  : OUT STD_LOGIC;
                   out_send : OUT STD_LOGIC;
-                  out_done : OUT STD_LOGIC  );
+                  out_done : OUT STD_LOGIC;
+                  out_dmaout_okay : OUT STD_LOGIC
+                  );
               END COMPONENT;
             END;

lib/lpp/lpp_dma/lpp_dma_pkg.vhd +2 -1

                   done           : OUT STD_LOGIC;
                   ren            : OUT STD_LOGIC;
                   address        : IN  STD_LOGIC_VECTOR(31 DOWNTO 0);
-                  data           : IN  STD_LOGIC_VECTOR(31 DOWNTO 0));
+                  data           : IN  STD_LOGIC_VECTOR(31 DOWNTO 0);
+                  debug_dmaout_okay : OUT STD_LOGIC);
               END COMPONENT;
             END;

lib/lpp/lpp_dma/lpp_dma_send_16word.vhd +8 -1

                 --
                 send_ok : OUT STD_LOGIC;
                 send_ko : OUT STD_LOGIC
                 );
             END lpp_dma_send_16word;
               DMAIn.Data <= data;
-              ren <= '0' WHEN DMAOut.OKAY = '1' AND state = SEND_DATA ELSE
+              ren <= '0' WHEN DMAOut.OKAY = '1' ELSE --AND (state = SEND_DATA OR state = WAIT_LAST_READY) ELSE
                      '1';
+              -- \/ JC - 11/12/2013 \/
+              --ren <= '0' WHEN DMAOut.OKAY = '1' AND state = SEND_DATA ELSE
+              --       '1';
+              -- /\ JC - 11/12/2013 /\
               -- \/ JC - 10/12/2013 \/
               --ren <= '0' WHEN DMAOut.OKAY = '1' AND state = SEND_DATA ELSE
               --       '0' WHEN state = REQUEST_BUS AND DMAOut.Grant = '1' ELSE

lib/lpp/lpp_dma/lpp_dma_singleOrBurst.vhd +11 -2

                 done               : OUT STD_LOGIC;
                 ren                : OUT STD_LOGIC;
                 address            : IN  STD_LOGIC_VECTOR(31 DOWNTO 0);
-                data               : IN  STD_LOGIC_VECTOR(31 DOWNTO 0)
+                data               : IN  STD_LOGIC_VECTOR(31 DOWNTO 0);
+                --
+                debug_dmaout_okay : OUT STD_LOGIC
                 );
             END;
               SIGNAL data_2_halfword      : STD_LOGIC_VECTOR(31 DOWNTO 0);
             BEGIN
+              debug_dmaout_okay <= DMAOut.OKAY;
               -----------------------------------------------------------------------------
               -- DMA to AHB interface
               DMA2AHB_1 : DMA2AHB
               --ren   <= burst_ren     WHEN valid_burst = '1' ELSE
               --         NOT single_send_ok;
-              ren   <= burst_ren AND single_ren;
+              --ren   <= burst_ren AND single_ren;
+              ren <= '0' WHEN DMAOut.OKAY = '1' ELSE
+                     '1';
               -----------------------------------------------------------------------------
               -- SEND 1 word by DMA

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