HG_REPOSITORIES/LPP/INSTRUMENTATION/USERS/PELLION/VHD_Lib Files · designs/ProjetBlanc-LeonLPP-M7A3P1k/prom.h

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HG_REPOSITORIES » LPP » INSTRUMENTATION » USERS » PELLION » VHD_Lib

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Clone from http://pc-instru.lpp.polytechnique.fr:5000/VHD_Lib

Fixed bug, now minor and major frame pulses have the good width....

Fixed bug, now minor and major frame pulses have the good width. (one sck period and not one word clock period)

martin - - Load All Authors

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r100:fc97c34d69e3 martin


                r222:b37e19fe4c0b

alexis

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      #define MCFG1 0x10380233

      #define MCFG2 0xe6A26e60

      #define MCFG3 0x000ff000

      #define ASDCFG 0xfff00100

      #define DSDCFG 0xe6A06e60

      #define L2MCTRLIO 0x80000000

      #define IRQCTRL   0x80000200

      #define RAMSTART  0x40000000

      #define RAMSIZE   0x00100000

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				#define MCFG1 0x10380233
				#define MCFG2 0xe6A26e60
				#define MCFG3 0x000ff000
				#define ASDCFG 0xfff00100
				#define DSDCFG 0xe6A06e60
				#define L2MCTRLIO 0x80000000
				#define IRQCTRL 0x80000200
				#define RAMSTART 0x40000000
				#define RAMSIZE 0x00100000