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--
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-- SpaceWire Transmitter
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--
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-- This entity translates outgoing characters and tokens into
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-- data-strobe signalling.
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--
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library ieee;
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use ieee.std_logic_1164.all;
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use ieee.numeric_std.all;
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use work.spwpkg.all;
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entity spwxmit is
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port (
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-- System clock.
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clk: in std_logic;
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-- Synchronous reset (active-high).
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rst: in std_logic;
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-- Scaling factor minus 1, used to scale the system clock into the
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-- transmission bit rate. The system clock is divided by
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-- (unsigned(divcnt) + 1). Changing this signal will immediately
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-- change the transmission rate.
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divcnt: in std_logic_vector(7 downto 0);
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-- Input signals from spwlink.
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xmiti: in spw_xmit_in_type;
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-- Output signals to spwlink.
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xmito: out spw_xmit_out_type;
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-- Data Out signal to SpaceWire bus.
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spw_do: out std_logic;
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-- Strobe Out signal to SpaceWire bus.
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spw_so: out std_logic
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);
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end entity spwxmit;
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architecture spwxmit_arch of spwxmit is
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-- Registers
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type regs_type is record
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-- tx clock
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txclken: std_ulogic; -- high if a bit must be transmitted
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txclkcnt: unsigned(7 downto 0);
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-- output shift register
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bitshift: std_logic_vector(12 downto 0);
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bitcnt: unsigned(3 downto 0);
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-- output signals
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out_data: std_ulogic;
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out_strobe: std_ulogic;
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-- parity flag
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parity: std_ulogic;
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-- pending time tick
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pend_tick: std_ulogic;
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pend_time: std_logic_vector(7 downto 0);
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-- transmitter mode
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allow_fct: std_ulogic; -- allowed to send FCTs
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allow_char: std_ulogic; -- allowed to send data and time
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sent_null: std_ulogic; -- sent at least one NULL token
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sent_fct: std_ulogic; -- sent at least one FCT token
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end record;
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-- Initial state
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constant regs_reset: regs_type := (
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txclken => '0',
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txclkcnt => "00000000",
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bitshift => (others => '0'),
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bitcnt => "0000",
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out_data => '0',
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out_strobe => '0',
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parity => '0',
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pend_tick => '0',
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pend_time => (others => '0'),
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allow_fct => '0',
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allow_char => '0',
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sent_null => '0',
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sent_fct => '0' );
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-- Registers
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signal r: regs_type := regs_reset;
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signal rin: regs_type;
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begin
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-- Combinatorial process
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process (r, rst, divcnt, xmiti) is
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variable v: regs_type;
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begin
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v := r;
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-- Generate TX clock.
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if r.txclkcnt = 0 then
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v.txclkcnt := unsigned(divcnt);
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v.txclken := '1';
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else
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v.txclkcnt := r.txclkcnt - 1;
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v.txclken := '0';
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end if;
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if xmiti.txen = '0' then
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-- Transmitter disabled; reset state.
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v.bitcnt := "0000";
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v.parity := '0';
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v.pend_tick := '0';
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v.allow_fct := '0';
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v.allow_char := '0';
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v.sent_null := '0';
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v.sent_fct := '0';
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-- Gentle reset of spacewire bus signals
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if r.txclken = '1' then
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v.out_data := r.out_data and r.out_strobe;
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v.out_strobe := '0';
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end if;
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else
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-- Transmitter enabled.
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v.allow_fct := (not xmiti.stnull) and r.sent_null;
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v.allow_char := (not xmiti.stnull) and r.sent_null and
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(not xmiti.stfct) and r.sent_fct;
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-- On tick of transmission clock, put next bit on the output.
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if r.txclken = '1' then
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if r.bitcnt = 0 then
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-- Need to start a new character.
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if (r.allow_char = '1') and (r.pend_tick = '1') then
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-- Send Time-Code.
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v.out_data := r.parity;
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v.bitshift(12 downto 5) := r.pend_time;
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v.bitshift(4 downto 0) := "01111";
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v.bitcnt := to_unsigned(13, v.bitcnt'length);
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v.parity := '0';
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v.pend_tick := '0';
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elsif (r.allow_fct = '1') and (xmiti.fct_in = '1') then
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-- Send FCT.
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v.out_data := r.parity;
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v.bitshift(2 downto 0) := "001";
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v.bitcnt := to_unsigned(3, v.bitcnt'length);
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v.parity := '1';
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v.sent_fct := '1';
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elsif (r.allow_char = '1') and (xmiti.txwrite = '1') then
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-- Send N-Char.
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v.bitshift(0) := xmiti.txflag;
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v.parity := xmiti.txflag;
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if xmiti.txflag = '0' then
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-- Data byte
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v.out_data := not r.parity;
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v.bitshift(8 downto 1) := xmiti.txdata;
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v.bitcnt := to_unsigned(9, v.bitcnt'length);
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else
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-- EOP or EEP
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v.out_data := r.parity;
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v.bitshift(1) := xmiti.txdata(0);
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v.bitshift(2) := not xmiti.txdata(0);
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v.bitcnt := to_unsigned(3, v.bitcnt'length);
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end if;
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else
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-- Send NULL.
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v.out_data := r.parity;
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v.bitshift(6 downto 0) := "0010111";
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v.bitcnt := to_unsigned(7, v.bitcnt'length);
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v.parity := '0';
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v.sent_null := '1';
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end if;
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else
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-- Shift next bit to the output.
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v.out_data := r.bitshift(0);
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v.parity := r.parity xor r.bitshift(0);
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v.bitshift(r.bitshift'high-1 downto 0) := r.bitshift(r.bitshift'high downto 1);
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v.bitcnt := r.bitcnt - 1;
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end if;
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-- Data-Strobe encoding.
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v.out_strobe := not (r.out_strobe xor r.out_data xor v.out_data);
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end if;
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-- Store requests for time tick transmission.
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if xmiti.tick_in = '1' then
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v.pend_tick := '1';
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v.pend_time := xmiti.ctrl_in & xmiti.time_in;
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end if;
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end if;
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-- Synchronous reset
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if rst = '1' then
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v := regs_reset;
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end if;
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-- Drive outputs.
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-- Note: the outputs are combinatorially dependent on certain inputs.
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-- Set fctack high if (transmitter enabled) AND
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-- (ready for token) AND (FCTs allowed) AND
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-- ((characters not allowed) OR (no timecode pending)) AND
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-- (FCT requested)
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if (xmiti.txen = '1') and
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(r.txclken = '1') and (r.bitcnt = 0) and (r.allow_fct = '1') and
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((r.allow_char = '0') or (r.pend_tick = '0')) then
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xmito.fctack <= xmiti.fct_in;
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else
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xmito.fctack <= '0';
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end if;
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-- Set txrdy high if (transmitter enabled) AND
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-- (ready for token) AND (characters enabled) AND
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-- (no timecode pending) AND (no FCT requested) AND
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-- (character requested)
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if (xmiti.txen = '1') and
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(r.txclken = '1') and (r.bitcnt = 0) and (r.allow_char = '1') and
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(r.pend_tick = '0') and (xmiti.fct_in = '0') then
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xmito.txack <= xmiti.txwrite;
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else
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xmito.txack <= '0';
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end if;
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-- Update registers
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rin <= v;
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end process;
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-- Synchronous process
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process (clk) is
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begin
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if rising_edge(clk) then
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-- Update registers
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r <= rin;
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-- Drive spacewire output signals
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spw_do <= r.out_data;
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spw_so <= r.out_strobe;
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end if;
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end process;
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end architecture spwxmit_arch;
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