##// END OF EJS Templates
MiniSpartan6:...
MiniSpartan6: added ftdi chip config to switch between UART and Async FIFO. added few WIP designs with either spwlight core, FIFO_deom IP... Libs: added SpaceWire Light IP (Works really well!) started design of ahb_ftdi_fifo -> same protocol than AHBUART but over FTDI's Async FIFO interface. This might lead to much faster transfers UP to 12MB/s.

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tsmc13.rc
8 lines | 309 B | text/x-stsrc | TextLexer
set_attribute lib_search_path {. /usr/local/synlibs/TSMG13F210D3_1.1/lib}
set_attribute library {"tsmg13f210t3_wc_108V_125C.lib" "/home/jiri/ibm/vhdl/temic/atc18/allmem.lib" } /
include leon3mp.rc
include atc18cond.rc
define_clock -period 5000 -name clock1 clk
synthesize -to_mapped
report_area
report_timing