HG_REPOSITORIES/LPP/INSTRUMENTATION/USERS/PELLION/VHD_Lib Files · designs/EGSE_ICI/top_dc.tcl

MiniSpartan6:...

MiniSpartan6: added ftdi chip config to switch between UART and Async FIFO. added few WIP designs with either spwlight core, FIFO_deom IP... Libs: added SpaceWire Light IP (Works really well!) started design of ahb_ftdi_fifo -> same protocol than AHBUART but over FTDI's Async FIFO interface. This might lead to much faster transfers UP to 12MB/s.

Alexis Jeandet - - Load All Authors

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             top_dc.tcl
        
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             | 414 B
            
                | application/x-tcl
            
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                TclLexer
            
             / designs / EGSE_ICI / top_dc.tcl
          
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      sh mkdir synopsys

      set objects synopsys

      set hdlin_ff_always_sync_set_reset true

      set hdlin_ff_always_async_set_reset false

      set hdlin_infer_complex_set_reset true

      set hdlin_translate_off_skip_text true

      set suppress_errors VHDL-2285

      set hdlin_use_carry_in true

      source  compile.dc

      analyze -f VHDL -library work config.vhd

      analyze -f VHDL -library work ahbrom.vhd

      analyze -f VHDL -library work leon3mp.vhd

      elaborate top

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				sh mkdir synopsys
				set objects synopsys
				set hdlin_ff_always_sync_set_reset true
				set hdlin_ff_always_async_set_reset false
				set hdlin_infer_complex_set_reset true
				set hdlin_translate_off_skip_text true
				set suppress_errors VHDL-2285
				set hdlin_use_carry_in true
				source compile.dc
				analyze -f VHDL -library work config.vhd
				analyze -f VHDL -library work ahbrom.vhd
				analyze -f VHDL -library work leon3mp.vhd
				elaborate top