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------------------------------------------------------------------------------
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-- This file is a part of the LPP VHDL IP LIBRARY
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-- Copyright (C) 2009 - 2010, Laboratory of Plasmas Physic - CNRS
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--
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-- This program is free software; you can redistribute it and/or modify
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-- it under the terms of the GNU General Public License as published by
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-- the Free Software Foundation; either version 3 of the License, or
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-- (at your option) any later version.
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--
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-- This program is distributed in the hope that it will be useful,
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-- but WITHOUT ANY WARRANTY; without even the implied warranty of
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-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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-- GNU General Public License for more details.
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--
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-- You should have received a copy of the GNU General Public License
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-- along with this program; if not, write to the Free Software
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-- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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-------------------------------------------------------------------------------
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-- Author : Jean-christophe Pellion
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-- Mail : jean-christophe.pellion@lpp.polytechnique.fr
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-- jean-christophe.pellion@easii-ic.com
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----------------------------------------------------------------------------
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LIBRARY ieee;
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USE ieee.std_logic_1164.ALL;
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USE ieee.numeric_std.ALL;
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LIBRARY lpp;
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USE lpp.cic_pkg.ALL;
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USE lpp.data_type_pkg.ALL;
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ENTITY cic_lfr_control IS
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PORT (
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clk : IN STD_LOGIC;
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rstn : IN STD_LOGIC;
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run : IN STD_LOGIC;
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--
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data_in_valid : IN STD_LOGIC;
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data_out_16_valid : OUT STD_LOGIC;
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data_out_256_valid : OUT STD_LOGIC;
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--
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OPERATION : OUT STD_LOGIC_VECTOR(15 DOWNTO 0)
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);
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END cic_lfr_control;
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ARCHITECTURE beh OF cic_lfr_control IS
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TYPE STATE_CIC_LFR_TYPE IS (IDLE,
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RUN_PROG_I,
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RUN_PROG_C16,
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RUN_PROG_C256
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);
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SIGNAL STATE_CIC_LFR : STATE_CIC_LFR_TYPE;
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SIGNAL nb_data_receipt : INTEGER := 0;
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SIGNAL current_cmd : INTEGER := 0;
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SIGNAL current_channel : INTEGER := 0;
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SIGNAL sample_16_odd : STD_LOGIC;
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SIGNAL sample_256_odd : STD_LOGIC;
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TYPE PROGRAM_ARRAY IS ARRAY (INTEGER RANGE <>) OF STD_LOGIC_VECTOR(13 DOWNTO 0);
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--OPERATION( 8 DOWNTO 0) <= PROGRAM_ARRAY( 8 DOWNTO 0) sauf pour PROG_I(0)
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--OPERATION(13 DOWNTO 12) <= PROGRAM_ARRAY(10 DOWNTO 9)
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--OPERATION(11 DOWNTO 9) <= current_channel
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--OPERATION(14) <= PROGRAM_ARRAY(11) selon sample_X_odd et l'etat
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CONSTANT PROG : PROGRAM_ARRAY(0 TO 28) :=
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(
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-- DCBA 98765 43210
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--PROG I------------------
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"0001" & "00011" & "00000", --0
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"0101" & "00010" & "00001", --1
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"0101" & "00010" & "00001", --2
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"0001" & "00010" & "01011", --3
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"0101" & "00010" & "01001", --4
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"0101" & "00010" & "01001", --5
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"0001" & "00010" & "01011", --6
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"0101" & "00010" & "01001", --7
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"0101" & "00010" & "01001", --8
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--PROG_C16
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"1001" & "00100" & "10010", --9
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"1001" & "10010" & "10101", --10
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"1001" & "10010" & "10101", --11
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"1010" & "10010" & "10101", --12
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"1001" & "01000" & "10010", --13
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"1001" & "10010" & "11101", --14
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"1001" & "10010" & "11101", --15
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"1010" & "10010" & "11101", --16
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--PROG_C256
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"1001" & "00100" & "10010", --17
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"1001" & "10110" & "10101", --18
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"1001" & "10110" & "10101", --19
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"1010" & "10110" & "10101", --20
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"1001" & "01000" & "10010", --21
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"1001" & "10110" & "11101", --22
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"1001" & "10110" & "11101", --23
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"1010" & "10110" & "11101", --24
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"1001" & "01100" & "10010", --25
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"1001" & "10110" & "11101", --26
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"1001" & "10110" & "11101", --27
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"1010" & "10110" & "11101" --28
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);
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CONSTANT PROG_START_I : INTEGER := 0;
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CONSTANT PROG_END_I : INTEGER := 8;
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CONSTANT PROG_START_C16 : INTEGER := 9;
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CONSTANT PROG_END_C16 : INTEGER := 16;
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CONSTANT PROG_START_C256 : INTEGER := 17;
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CONSTANT PROG_END_C256 : INTEGER := 28;
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BEGIN
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OPERATION(2 DOWNTO 0) <= STD_LOGIC_VECTOR(to_unsigned(current_channel, 3)); --SEL_SAMPLE
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OPERATION(4 DOWNTO 3) <= PROG(current_cmd)(1 DOWNTO 0); --SEL_DATA_A
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OPERATION(6 DOWNTO 5) <= "00" WHEN STATE_CIC_LFR = IDLE ELSE PROG(current_cmd)(3 DOWNTO 2); --ALU_CMD
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OPERATION(7) <= '0' WHEN STATE_CIC_LFR = IDLE ELSE PROG(current_cmd)(4); --CARRY_PUSH
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OPERATION(8) <= PROG(current_cmd)(5); --@_init
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OPERATION(9) <= PROG(current_cmd)(6); --@_add_1
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OPERATION(10) <= PROG(current_cmd)(7) AND sample_256_odd WHEN STATE_CIC_LFR = RUN_PROG_C256 AND PROG(current_cmd)(9) = '1' ELSE
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PROG(current_cmd)(7); --@_sel(1..0)
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OPERATION(11) <= PROG(current_cmd)(8);
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OPERATION(12) <= PROG(current_cmd)(9) AND sample_16_odd WHEN STATE_CIC_LFR = RUN_PROG_C16 ELSE
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--PROG(current_cmd)(9) AND sample_256_odd WHEN STATE_CIC_LFR = RUN_PROG_C256 ELSE
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PROG(current_cmd)(9) WHEN STATE_CIC_LFR = RUN_PROG_C256 ELSE
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'0'; --@_sel(2)
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OPERATION(13) <= '0' WHEN STATE_CIC_LFR = IDLE ELSE PROG(current_cmd)(10); --WE
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OPERATION(14) <= PROG(current_cmd)(12); -- SEL_DATA_A = data_b_reg
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OPERATION(15) <= PROG(current_cmd)(13); -- WRITE_ADDR_sel
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data_out_16_valid <= PROG(current_cmd)(11) WHEN STATE_CIC_LFR = RUN_PROG_C16 ELSE '0';
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data_out_256_valid <= PROG(current_cmd)(11) WHEN STATE_CIC_LFR = RUN_PROG_C256 ELSE '0';
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--OPERATION(1 DOWNTO 0) <= PROG(current_cmd)(1 DOWNTO 0);
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--OPERATION(2) <= '0' WHEN STATE_CIC_LFR = IDLE ELSE
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-- PROG(current_cmd)(2);
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--OPERATION(5 DOWNTO 3) <= STD_LOGIC_VECTOR(to_unsigned(current_channel, 3)) WHEN STATE_CIC_LFR = RUN_PROG_I AND current_cmd = 0 ELSE
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-- PROG(current_cmd)(5 DOWNTO 3);
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--OPERATION(8 DOWNTO 6) <= "000" WHEN STATE_CIC_LFR = IDLE ELSE
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-- PROG(current_cmd)(8 DOWNTO 6);
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--OPERATION(11 DOWNTO 9) <= STD_LOGIC_VECTOR(to_unsigned(current_channel, 3));
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--OPERATION(13 DOWNTO 12) <= PROG(current_cmd)(10 DOWNTO 9);
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--OPERATION(14) <= PROG(current_cmd)(11) AND sample_16_odd WHEN STATE_CIC_LFR = RUN_PROG_C16 ELSE
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-- PROG(current_cmd)(11) AND sample_256_odd WHEN STATE_CIC_LFR = RUN_PROG_C256 ELSE '0';
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--OPERATION(15) <= PROG(current_cmd)(12);
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--data_out_16_valid <= PROG(current_cmd)(13) WHEN STATE_CIC_LFR = RUN_PROG_C16 ELSE '0';
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--data_out_256_valid <= PROG(current_cmd)(13) WHEN STATE_CIC_LFR = RUN_PROG_C256 ELSE '0';
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PROCESS (clk, rstn)
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BEGIN
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IF rstn = '0' THEN
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STATE_CIC_LFR <= IDLE;
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nb_data_receipt <= 0;
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current_channel <= 0;
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current_cmd <= 0;
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sample_16_odd <= '0';
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sample_256_odd <= '0';
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ELSIF clk'EVENT AND clk = '1' THEN
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CASE STATE_CIC_LFR IS
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WHEN IDLE =>
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IF data_in_valid = '1' THEN
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STATE_CIC_LFR <= RUN_PROG_I;
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current_cmd <= PROG_START_I;
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current_channel <= 0;
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nb_data_receipt <= nb_data_receipt + 1;
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END IF;
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WHEN RUN_PROG_I =>
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IF current_cmd = PROG_END_I THEN
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IF nb_data_receipt MOD 16 = 15 THEN
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STATE_CIC_LFR <= RUN_PROG_C16;
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current_cmd <= PROG_START_C16;
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IF current_channel = 0 THEN
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sample_16_odd <= NOT sample_16_odd;
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END IF;
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ELSE
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IF current_channel = 5 THEN
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current_channel <= 0;
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STATE_CIC_LFR <= IDLE;
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ELSE
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current_cmd <= PROG_START_I;
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current_channel <= current_channel + 1;
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END IF;
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END IF;
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ELSE
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current_cmd <= current_cmd +1;
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END IF;
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WHEN RUN_PROG_C16 =>
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IF current_cmd = PROG_END_C16 THEN
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IF nb_data_receipt MOD 256 = 255 THEN
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STATE_CIC_LFR <= RUN_PROG_C256;
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current_cmd <= PROG_START_C256;
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IF current_channel = 0 THEN
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sample_256_odd <= NOT sample_256_odd;
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END IF;
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ELSE
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IF current_channel = 5 THEN
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current_channel <= 0;
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STATE_CIC_LFR <= IDLE;
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ELSE
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STATE_CIC_LFR <= RUN_PROG_I;
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current_cmd <= PROG_START_I;
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current_channel <= current_channel + 1;
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END IF;
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END IF;
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ELSE
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current_cmd <= current_cmd +1;
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END IF;
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WHEN RUN_PROG_C256 =>
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IF current_cmd = PROG_END_C256 THEN
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-- data_out_256_valid <= '1';
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IF current_channel = 5 THEN
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current_channel <= 0;
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STATE_CIC_LFR <= IDLE;
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ELSE
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STATE_CIC_LFR <= RUN_PROG_I;
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current_cmd <= PROG_START_I;
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current_channel <= current_channel + 1;
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END IF;
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ELSE
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current_cmd <= current_cmd +1;
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END IF;
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WHEN OTHERS => NULL;
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END CASE;
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END IF;
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END PROCESS;
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END beh;
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