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Moved Validation_LFR_TIME_MANAGEMENT from designs to tests directory...
Moved Validation_LFR_TIME_MANAGEMENT from designs to tests directory Changed test directory Validation_LFR_TIME_MANAGEMENT in LFR_time_management. Added LFR_MANAGMENT_TIME_FINE_DELTA register into apb_lfr_management module at address 0x30 : * LFR_MANAGMENT_TIME_FINE_DELTA ( 8 downto 0) : ft_counter_lsb value * LFR_MANAGMENT_TIME_FINE_DELTA (24 downto 9) : ft value * LFR_MANAGMENT_TIME_FINE_DELTA (26 downto 25) : + ft_counter_lsb_MAX_VALUE = 379 when "00" + ft_counter_lsb_MAX_VALUE = 380 when "01" + ft_counter_lsb_MAX_VALUE = 381 when "10" Updated LFR_time_managment testbench.

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vhdlsyn.txt
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data_type_pkg.vhd
general_purpose.vhd
ADDRcntr.vhd
ALU.vhd
Adder.vhd
Clk_Divider2.vhd
Clk_divider.vhd
MAC.vhd
MAC_CONTROLER.vhd
MAC_MUX.vhd
MAC_MUX2.vhd
MAC_REG.vhd
MUX2.vhd
MUXN.vhd
Multiplier.vhd
REG.vhd
SYNC_FF.vhd
Shifter.vhd
TwoComplementer.vhd
Clock_Divider.vhd
lpp_front_to_level.vhd
lpp_front_detection.vhd
lpp_front_positive_detection.vhd
SYNC_VALID_BIT.vhd
RR_Arbiter_4.vhd
general_counter.vhd
ramp_generator.vhd
TimeGenAdvancedTrigger.vhd