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LFR-EQM 2.1.82 - b...
LFR-EQM 2.1.82 - b > SMP_CLK @ 24576MHz/25 = 983.03Hz > OEn active during one cycle > sample ADC_DATA one cycle after the OEn SMP_CLK --------|___________ CLK_25Mhz-|_|-|_|-|_|-|_|-|_|-|_|-|_|-|_|-|_| ADC_OEn ------------|___|----- ADC_DATA ****************{data} ADC_DATA_reg****************{data}
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r543:cacd7252f42c JC
r600:1d46c91bda8b simu_with_Leon3
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wave.do
46 lines | 14.1 KiB | text/x-stata | StataLexer
/ designs / Validation_FFT_auto / wave.do
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onerror {resume}
quietly WaveActivateNextPane {} 0
add wave -noupdate /testbench/message_simu
add wave -noupdate -radix hexadecimal -childformat {{/testbench/MINI_LFR_top_1/lpp_lfr_1/lpp_lfr_apbreg_1/reg_sp.config_active_interruption_onNewMatrix -radix hexadecimal} {/testbench/MINI_LFR_top_1/lpp_lfr_1/lpp_lfr_apbreg_1/reg_sp.config_active_interruption_onError -radix hexadecimal} {/testbench/MINI_LFR_top_1/lpp_lfr_1/lpp_lfr_apbreg_1/reg_sp.config_ms_run -radix hexadecimal} {/testbench/MINI_LFR_top_1/lpp_lfr_1/lpp_lfr_apbreg_1/reg_sp.status_ready_matrix_f0_0 -radix hexadecimal} {/testbench/MINI_LFR_top_1/lpp_lfr_1/lpp_lfr_apbreg_1/reg_sp.status_ready_matrix_f1_0 -radix hexadecimal} {/testbench/MINI_LFR_top_1/lpp_lfr_1/lpp_lfr_apbreg_1/reg_sp.status_ready_matrix_f2_0 -radix hexadecimal} {/testbench/MINI_LFR_top_1/lpp_lfr_1/lpp_lfr_apbreg_1/reg_sp.status_ready_matrix_f0_1 -radix hexadecimal} {/testbench/MINI_LFR_top_1/lpp_lfr_1/lpp_lfr_apbreg_1/reg_sp.status_ready_matrix_f1_1 -radix hexadecimal} {/testbench/MINI_LFR_top_1/lpp_lfr_1/lpp_lfr_apbreg_1/reg_sp.status_ready_matrix_f2_1 -radix hexadecimal} {/testbench/MINI_LFR_top_1/lpp_lfr_1/lpp_lfr_apbreg_1/reg_sp.status_error_buffer_full -radix hexadecimal} {/testbench/MINI_LFR_top_1/lpp_lfr_1/lpp_lfr_apbreg_1/reg_sp.status_error_input_fifo_write -radix hexadecimal} {/testbench/MINI_LFR_top_1/lpp_lfr_1/lpp_lfr_apbreg_1/reg_sp.addr_matrix_f0_0 -radix hexadecimal} {/testbench/MINI_LFR_top_1/lpp_lfr_1/lpp_lfr_apbreg_1/reg_sp.addr_matrix_f0_1 -radix hexadecimal} {/testbench/MINI_LFR_top_1/lpp_lfr_1/lpp_lfr_apbreg_1/reg_sp.addr_matrix_f1_0 -radix hexadecimal} {/testbench/MINI_LFR_top_1/lpp_lfr_1/lpp_lfr_apbreg_1/reg_sp.addr_matrix_f1_1 -radix hexadecimal} {/testbench/MINI_LFR_top_1/lpp_lfr_1/lpp_lfr_apbreg_1/reg_sp.addr_matrix_f2_0 -radix hexadecimal} {/testbench/MINI_LFR_top_1/lpp_lfr_1/lpp_lfr_apbreg_1/reg_sp.addr_matrix_f2_1 -radix hexadecimal} {/testbench/MINI_LFR_top_1/lpp_lfr_1/lpp_lfr_apbreg_1/reg_sp.length_matrix -radix hexadecimal} {/testbench/MINI_LFR_top_1/lpp_lfr_1/lpp_lfr_apbreg_1/reg_sp.time_matrix_f0_0 -radix hexadecimal} {/testbench/MINI_LFR_top_1/lpp_lfr_1/lpp_lfr_apbreg_1/reg_sp.time_matrix_f0_1 -radix hexadecimal} {/testbench/MINI_LFR_top_1/lpp_lfr_1/lpp_lfr_apbreg_1/reg_sp.time_matrix_f1_0 -radix hexadecimal} {/testbench/MINI_LFR_top_1/lpp_lfr_1/lpp_lfr_apbreg_1/reg_sp.time_matrix_f1_1 -radix hexadecimal} {/testbench/MINI_LFR_top_1/lpp_lfr_1/lpp_lfr_apbreg_1/reg_sp.time_matrix_f2_0 -radix hexadecimal} {/testbench/MINI_LFR_top_1/lpp_lfr_1/lpp_lfr_apbreg_1/reg_sp.time_matrix_f2_1 -radix hexadecimal}} -subitemconfig {/testbench/MINI_LFR_top_1/lpp_lfr_1/lpp_lfr_apbreg_1/reg_sp.config_active_interruption_onNewMatrix {-height 15 -radix hexadecimal} /testbench/MINI_LFR_top_1/lpp_lfr_1/lpp_lfr_apbreg_1/reg_sp.config_active_interruption_onError {-height 15 -radix hexadecimal} /testbench/MINI_LFR_top_1/lpp_lfr_1/lpp_lfr_apbreg_1/reg_sp.config_ms_run {-height 15 -radix hexadecimal} /testbench/MINI_LFR_top_1/lpp_lfr_1/lpp_lfr_apbreg_1/reg_sp.status_ready_matrix_f0_0 {-height 15 -radix hexadecimal} /testbench/MINI_LFR_top_1/lpp_lfr_1/lpp_lfr_apbreg_1/reg_sp.status_ready_matrix_f1_0 {-height 15 -radix hexadecimal} /testbench/MINI_LFR_top_1/lpp_lfr_1/lpp_lfr_apbreg_1/reg_sp.status_ready_matrix_f2_0 {-height 15 -radix hexadecimal} /testbench/MINI_LFR_top_1/lpp_lfr_1/lpp_lfr_apbreg_1/reg_sp.status_ready_matrix_f0_1 {-height 15 -radix hexadecimal} /testbench/MINI_LFR_top_1/lpp_lfr_1/lpp_lfr_apbreg_1/reg_sp.status_ready_matrix_f1_1 {-height 15 -radix hexadecimal} /testbench/MINI_LFR_top_1/lpp_lfr_1/lpp_lfr_apbreg_1/reg_sp.status_ready_matrix_f2_1 {-height 15 -radix hexadecimal} /testbench/MINI_LFR_top_1/lpp_lfr_1/lpp_lfr_apbreg_1/reg_sp.status_error_buffer_full {-height 15 -radix hexadecimal} /testbench/MINI_LFR_top_1/lpp_lfr_1/lpp_lfr_apbreg_1/reg_sp.status_error_input_fifo_write {-height 15 -radix hexadecimal} /testbench/MINI_LFR_top_1/lpp_lfr_1/lpp_lfr_apbreg_1/reg_sp.addr_matrix_f0_0 {-height 15 -radix hexadecimal} /testbench/MINI_LFR_top_1/lpp_lfr_1/lpp_lfr_apbreg_1/reg_sp.addr_matrix_f0_1 {-height 15 -radix hexadecimal} /testbench/MINI_LFR_top_1/lpp_lfr_1/lpp_lfr_apbreg_1/reg_sp.addr_matrix_f1_0 {-height 15 -radix hexadecimal} /testbench/MINI_LFR_top_1/lpp_lfr_1/lpp_lfr_apbreg_1/reg_sp.addr_matrix_f1_1 {-height 15 -radix hexadecimal} /testbench/MINI_LFR_top_1/lpp_lfr_1/lpp_lfr_apbreg_1/reg_sp.addr_matrix_f2_0 {-height 15 -radix hexadecimal} /testbench/MINI_LFR_top_1/lpp_lfr_1/lpp_lfr_apbreg_1/reg_sp.addr_matrix_f2_1 {-height 15 -radix hexadecimal} /testbench/MINI_LFR_top_1/lpp_lfr_1/lpp_lfr_apbreg_1/reg_sp.length_matrix {-height 15 -radix hexadecimal} /testbench/MINI_LFR_top_1/lpp_lfr_1/lpp_lfr_apbreg_1/reg_sp.time_matrix_f0_0 {-height 15 -radix hexadecimal} /testbench/MINI_LFR_top_1/lpp_lfr_1/lpp_lfr_apbreg_1/reg_sp.time_matrix_f0_1 {-height 15 -radix hexadecimal} /testbench/MINI_LFR_top_1/lpp_lfr_1/lpp_lfr_apbreg_1/reg_sp.time_matrix_f1_0 {-height 15 -radix hexadecimal} /testbench/MINI_LFR_top_1/lpp_lfr_1/lpp_lfr_apbreg_1/reg_sp.time_matrix_f1_1 {-height 15 -radix hexadecimal} /testbench/MINI_LFR_top_1/lpp_lfr_1/lpp_lfr_apbreg_1/reg_sp.time_matrix_f2_0 {-height 15 -radix hexadecimal} /testbench/MINI_LFR_top_1/lpp_lfr_1/lpp_lfr_apbreg_1/reg_sp.time_matrix_f2_1 {-height 15 -radix hexadecimal}} /testbench/MINI_LFR_top_1/lpp_lfr_1/lpp_lfr_apbreg_1/reg_sp
add wave -noupdate -radix hexadecimal -childformat {{/testbench/MINI_LFR_top_1/lpp_lfr_1/lpp_lfr_apbreg_1/reg_wp.status_new_err -radix hexadecimal} {/testbench/MINI_LFR_top_1/lpp_lfr_1/lpp_lfr_apbreg_1/reg_wp.data_shaping_BW -radix hexadecimal} {/testbench/MINI_LFR_top_1/lpp_lfr_1/lpp_lfr_apbreg_1/reg_wp.data_shaping_SP0 -radix hexadecimal} {/testbench/MINI_LFR_top_1/lpp_lfr_1/lpp_lfr_apbreg_1/reg_wp.data_shaping_SP1 -radix hexadecimal} {/testbench/MINI_LFR_top_1/lpp_lfr_1/lpp_lfr_apbreg_1/reg_wp.data_shaping_R0 -radix hexadecimal} {/testbench/MINI_LFR_top_1/lpp_lfr_1/lpp_lfr_apbreg_1/reg_wp.data_shaping_R1 -radix hexadecimal} {/testbench/MINI_LFR_top_1/lpp_lfr_1/lpp_lfr_apbreg_1/reg_wp.data_shaping_R2 -radix hexadecimal} {/testbench/MINI_LFR_top_1/lpp_lfr_1/lpp_lfr_apbreg_1/reg_wp.delta_snapshot -radix hexadecimal} {/testbench/MINI_LFR_top_1/lpp_lfr_1/lpp_lfr_apbreg_1/reg_wp.delta_f0 -radix hexadecimal} {/testbench/MINI_LFR_top_1/lpp_lfr_1/lpp_lfr_apbreg_1/reg_wp.delta_f0_2 -radix hexadecimal} {/testbench/MINI_LFR_top_1/lpp_lfr_1/lpp_lfr_apbreg_1/reg_wp.delta_f1 -radix hexadecimal} {/testbench/MINI_LFR_top_1/lpp_lfr_1/lpp_lfr_apbreg_1/reg_wp.delta_f2 -radix hexadecimal} {/testbench/MINI_LFR_top_1/lpp_lfr_1/lpp_lfr_apbreg_1/reg_wp.nb_data_by_buffer -radix hexadecimal} {/testbench/MINI_LFR_top_1/lpp_lfr_1/lpp_lfr_apbreg_1/reg_wp.nb_snapshot_param -radix hexadecimal} {/testbench/MINI_LFR_top_1/lpp_lfr_1/lpp_lfr_apbreg_1/reg_wp.enable_f0 -radix hexadecimal} {/testbench/MINI_LFR_top_1/lpp_lfr_1/lpp_lfr_apbreg_1/reg_wp.enable_f1 -radix hexadecimal} {/testbench/MINI_LFR_top_1/lpp_lfr_1/lpp_lfr_apbreg_1/reg_wp.enable_f2 -radix hexadecimal} {/testbench/MINI_LFR_top_1/lpp_lfr_1/lpp_lfr_apbreg_1/reg_wp.enable_f3 -radix hexadecimal} {/testbench/MINI_LFR_top_1/lpp_lfr_1/lpp_lfr_apbreg_1/reg_wp.burst_f0 -radix hexadecimal} {/testbench/MINI_LFR_top_1/lpp_lfr_1/lpp_lfr_apbreg_1/reg_wp.burst_f1 -radix hexadecimal} {/testbench/MINI_LFR_top_1/lpp_lfr_1/lpp_lfr_apbreg_1/reg_wp.burst_f2 -radix hexadecimal} {/testbench/MINI_LFR_top_1/lpp_lfr_1/lpp_lfr_apbreg_1/reg_wp.run -radix hexadecimal} {/testbench/MINI_LFR_top_1/lpp_lfr_1/lpp_lfr_apbreg_1/reg_wp.status_ready_buffer_f -radix hexadecimal} {/testbench/MINI_LFR_top_1/lpp_lfr_1/lpp_lfr_apbreg_1/reg_wp.addr_buffer_f -radix hexadecimal} {/testbench/MINI_LFR_top_1/lpp_lfr_1/lpp_lfr_apbreg_1/reg_wp.time_buffer_f -radix hexadecimal} {/testbench/MINI_LFR_top_1/lpp_lfr_1/lpp_lfr_apbreg_1/reg_wp.length_buffer -radix hexadecimal} {/testbench/MINI_LFR_top_1/lpp_lfr_1/lpp_lfr_apbreg_1/reg_wp.error_buffer_full -radix hexadecimal} {/testbench/MINI_LFR_top_1/lpp_lfr_1/lpp_lfr_apbreg_1/reg_wp.start_date -radix hexadecimal}} -subitemconfig {/testbench/MINI_LFR_top_1/lpp_lfr_1/lpp_lfr_apbreg_1/reg_wp.status_new_err {-height 15 -radix hexadecimal} /testbench/MINI_LFR_top_1/lpp_lfr_1/lpp_lfr_apbreg_1/reg_wp.data_shaping_BW {-height 15 -radix hexadecimal} /testbench/MINI_LFR_top_1/lpp_lfr_1/lpp_lfr_apbreg_1/reg_wp.data_shaping_SP0 {-height 15 -radix hexadecimal} /testbench/MINI_LFR_top_1/lpp_lfr_1/lpp_lfr_apbreg_1/reg_wp.data_shaping_SP1 {-height 15 -radix hexadecimal} /testbench/MINI_LFR_top_1/lpp_lfr_1/lpp_lfr_apbreg_1/reg_wp.data_shaping_R0 {-height 15 -radix hexadecimal} /testbench/MINI_LFR_top_1/lpp_lfr_1/lpp_lfr_apbreg_1/reg_wp.data_shaping_R1 {-height 15 -radix hexadecimal} /testbench/MINI_LFR_top_1/lpp_lfr_1/lpp_lfr_apbreg_1/reg_wp.data_shaping_R2 {-height 15 -radix hexadecimal} /testbench/MINI_LFR_top_1/lpp_lfr_1/lpp_lfr_apbreg_1/reg_wp.delta_snapshot {-height 15 -radix hexadecimal} /testbench/MINI_LFR_top_1/lpp_lfr_1/lpp_lfr_apbreg_1/reg_wp.delta_f0 {-height 15 -radix hexadecimal} /testbench/MINI_LFR_top_1/lpp_lfr_1/lpp_lfr_apbreg_1/reg_wp.delta_f0_2 {-height 15 -radix hexadecimal} /testbench/MINI_LFR_top_1/lpp_lfr_1/lpp_lfr_apbreg_1/reg_wp.delta_f1 {-height 15 -radix hexadecimal} /testbench/MINI_LFR_top_1/lpp_lfr_1/lpp_lfr_apbreg_1/reg_wp.delta_f2 {-height 15 -radix hexadecimal} /testbench/MINI_LFR_top_1/lpp_lfr_1/lpp_lfr_apbreg_1/reg_wp.nb_data_by_buffer {-height 15 -radix hexadecimal} /testbench/MINI_LFR_top_1/lpp_lfr_1/lpp_lfr_apbreg_1/reg_wp.nb_snapshot_param {-height 15 -radix hexadecimal} /testbench/MINI_LFR_top_1/lpp_lfr_1/lpp_lfr_apbreg_1/reg_wp.enable_f0 {-height 15 -radix hexadecimal} /testbench/MINI_LFR_top_1/lpp_lfr_1/lpp_lfr_apbreg_1/reg_wp.enable_f1 {-height 15 -radix hexadecimal} /testbench/MINI_LFR_top_1/lpp_lfr_1/lpp_lfr_apbreg_1/reg_wp.enable_f2 {-height 15 -radix hexadecimal} /testbench/MINI_LFR_top_1/lpp_lfr_1/lpp_lfr_apbreg_1/reg_wp.enable_f3 {-height 15 -radix hexadecimal} /testbench/MINI_LFR_top_1/lpp_lfr_1/lpp_lfr_apbreg_1/reg_wp.burst_f0 {-height 15 -radix hexadecimal} /testbench/MINI_LFR_top_1/lpp_lfr_1/lpp_lfr_apbreg_1/reg_wp.burst_f1 {-height 15 -radix hexadecimal} /testbench/MINI_LFR_top_1/lpp_lfr_1/lpp_lfr_apbreg_1/reg_wp.burst_f2 {-height 15 -radix hexadecimal} /testbench/MINI_LFR_top_1/lpp_lfr_1/lpp_lfr_apbreg_1/reg_wp.run {-height 15 -radix hexadecimal} /testbench/MINI_LFR_top_1/lpp_lfr_1/lpp_lfr_apbreg_1/reg_wp.status_ready_buffer_f {-height 15 -radix hexadecimal} /testbench/MINI_LFR_top_1/lpp_lfr_1/lpp_lfr_apbreg_1/reg_wp.addr_buffer_f {-height 15 -radix hexadecimal} /testbench/MINI_LFR_top_1/lpp_lfr_1/lpp_lfr_apbreg_1/reg_wp.time_buffer_f {-height 15 -radix hexadecimal} /testbench/MINI_LFR_top_1/lpp_lfr_1/lpp_lfr_apbreg_1/reg_wp.length_buffer {-height 15 -radix hexadecimal} /testbench/MINI_LFR_top_1/lpp_lfr_1/lpp_lfr_apbreg_1/reg_wp.error_buffer_full {-height 15 -radix hexadecimal} /testbench/MINI_LFR_top_1/lpp_lfr_1/lpp_lfr_apbreg_1/reg_wp.start_date {-height 15 -radix hexadecimal}} /testbench/MINI_LFR_top_1/lpp_lfr_1/lpp_lfr_apbreg_1/reg_wp
add wave -noupdate /testbench/MINI_LFR_top_1/lpp_lfr_1/lpp_lfr_ms_1/ongoing
add wave -noupdate -expand -group FIFO_f1_REG_HEAD /testbench/MINI_LFR_top_1/lpp_lfr_1/lpp_lfr_ms_1/lpp_lfr_ms_reg_head_1/out_full
add wave -noupdate -expand -group FIFO_f1_REG_HEAD /testbench/MINI_LFR_top_1/lpp_lfr_1/lpp_lfr_ms_1/lpp_lfr_ms_reg_head_1/out_wen
add wave -noupdate -expand -group FIFO_f1_REG_HEAD /testbench/MINI_LFR_top_1/lpp_lfr_1/lpp_lfr_ms_1/lpp_lfr_ms_reg_head_1/out_write_error
add wave -noupdate -expand -group FIFO_f1_REG_HEAD /testbench/MINI_LFR_top_1/lpp_lfr_1/lpp_lfr_ms_1/lpp_lfr_ms_reg_head_1/out_data
add wave -noupdate -expand -group FIFO_f1_REG_HEAD /testbench/MINI_LFR_top_1/lpp_lfr_1/lpp_lfr_ms_1/lpp_lfr_ms_reg_head_1/fsm_state
add wave -noupdate -expand -group FIFO_f1_REG_HEAD /testbench/MINI_LFR_top_1/lpp_lfr_1/lpp_lfr_ms_1/lpp_lfr_ms_reg_head_1/reg_data2
add wave -noupdate -expand -group FIFO_f1_REG_HEAD /testbench/MINI_LFR_top_1/lpp_lfr_1/lpp_lfr_ms_1/lpp_lfr_ms_reg_head_1/reg_data
add wave -noupdate -expand -group FIFO_f1_REG_HEAD /testbench/MINI_LFR_top_1/lpp_lfr_1/lpp_lfr_ms_1/lpp_lfr_ms_reg_head_1/in_full_s
add wave -noupdate -expand -group FIFO_f1_REG_HEAD /testbench/MINI_LFR_top_1/lpp_lfr_1/lpp_lfr_ms_1/lpp_lfr_ms_reg_head_1/out_wen_s
add wave -noupdate -expand -group FIFO_f1_REG_HEAD /testbench/MINI_LFR_top_1/lpp_lfr_1/lpp_lfr_ms_1/lpp_lfr_ms_reg_head_1/in_empty
add wave -noupdate -expand -group FIFO_f1_REG_HEAD /testbench/MINI_LFR_top_1/lpp_lfr_1/lpp_lfr_ms_1/lpp_lfr_ms_reg_head_1/in_full
add wave -noupdate -expand -group FIFO_f1_REG_HEAD /testbench/MINI_LFR_top_1/lpp_lfr_1/lpp_lfr_ms_1/lpp_lfr_ms_reg_head_1/in_data
add wave -noupdate -expand -group FIFO_f1_REG_HEAD /testbench/MINI_LFR_top_1/lpp_lfr_1/lpp_lfr_ms_1/lpp_lfr_ms_reg_head_1/in_wen
add wave -noupdate -expand -group FIFO_f1 /testbench/MINI_LFR_top_1/lpp_lfr_1/lpp_lfr_ms_1/lppFIFOxN_f1/rdata
add wave -noupdate -expand -group FIFO_f1 /testbench/MINI_LFR_top_1/lpp_lfr_1/lpp_lfr_ms_1/lppFIFOxN_f1/almost_full
add wave -noupdate -expand -group FIFO_f1 /testbench/MINI_LFR_top_1/lpp_lfr_1/lpp_lfr_ms_1/lppFIFOxN_f1/full
add wave -noupdate -expand -group FIFO_f1 /testbench/MINI_LFR_top_1/lpp_lfr_1/lpp_lfr_ms_1/lppFIFOxN_f1/empty
add wave -noupdate -expand -group FIFO_f1 /testbench/MINI_LFR_top_1/lpp_lfr_1/lpp_lfr_ms_1/lppFIFOxN_f1/ren
add wave -noupdate -expand -group FIFO_f1 /testbench/MINI_LFR_top_1/lpp_lfr_1/lpp_lfr_ms_1/lppFIFOxN_f1/wdata
add wave -noupdate -expand -group FIFO_f1 /testbench/MINI_LFR_top_1/lpp_lfr_1/lpp_lfr_ms_1/lppFIFOxN_f1/wen
add wave -noupdate -expand -group FIFO_f1 /testbench/MINI_LFR_top_1/lpp_lfr_1/lpp_lfr_ms_1/lppFIFOxN_f1/run
add wave -noupdate -expand -group FIFO_f1 /testbench/MINI_LFR_top_1/lpp_lfr_1/lpp_lfr_ms_1/lppFIFOxN_f1/ReUse
TreeUpdate [SetDefaultTree]
WaveRestoreCursors {{Cursor 1} {48603668788 ps} 0}
quietly wave cursor active 1
configure wave -namecolwidth 539
configure wave -valuecolwidth 100
configure wave -justifyvalue left
configure wave -signalnamewidth 0
configure wave -snapdistance 10
configure wave -datasetprefix 0
configure wave -rowmargin 4
configure wave -childrowmargin 2
configure wave -gridoffset 0
configure wave -gridperiod 1
configure wave -griddelta 40
configure wave -timeline 0
configure wave -timelineunits ns
update
WaveRestoreZoom {0 ps} {84406089600 ps}