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LFR-EQM 2.1.83 > ad_conv_RH1401_withFilter version idem EM

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r601:1b6a99d2ea09 (LFR-EQM) 2-1-83 simu_with_Leon3
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MinF_Gen.vhd
46 lines | 1.0 KiB | text/x-vhdl | VhdlLexer
-- MinF_Gen.vhd
library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.numeric_std.all;
entity MinF_Gen is
generic(WordCnt : integer :=144);
port(
clk : in std_logic;
reset : in std_logic;
WordCnt_in : in integer range 0 to WordCnt-1;
WordClk : in std_logic;
MinF_Clk : out std_logic
);
end entity;
architecture arMinF_Gen of MinF_Gen is
signal monostable : std_logic := '0';
begin
process(clk)
begin
if reset = '0' then
MinF_Clk <= '0';
monostable <= '1';
elsif clk'event and clk = '0' then
if WordCnt_in = 0 and WordClk = '1' and monostable = '1' then
MinF_Clk <= '1';
else
MinF_Clk <= '0';
end if;
if WordCnt_in = 0 and WordClk = '1' and monostable = '1' then
monostable <= '0';
elsif WordCnt_in /= 0 and monostable = '0' then
monostable <= '1';
end if;
end if;
end process;
end architecture;