@@ -418,7 +418,7 BEGIN -- beh | |||
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418 | 418 | GENERIC MAP ( |
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419 | 419 | Mem_use => use_RAM, |
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420 | 420 | nb_data_by_buffer_size => 32, |
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421 | nb_word_by_buffer_size => 30, | |
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421 | -- nb_word_by_buffer_size => 30, | |
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422 | 422 | nb_snapshot_param_size => 32, |
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423 | 423 | delta_vector_size => 32, |
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424 | 424 | delta_vector_size_f0_2 => 7, -- log2(96) |
@@ -441,10 +441,7 BEGIN -- beh | |||
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441 | 441 | ahbo => ahbo_m_ext(2), |
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442 | 442 | coarse_time => coarse_time, |
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443 | 443 | fine_time => fine_time, |
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444 |
data_shaping_BW => bias_fail_sw_sig |
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445 | observation_vector_0=> observation_vector_0, | |
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446 | observation_vector_1 => observation_vector_1, | |
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447 | observation_reg => observation_reg); | |
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444 | data_shaping_BW => bias_fail_sw_sig); | |
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448 | 445 | |
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449 | 446 | all_sample: FOR I IN 7 DOWNTO 0 GENERATE |
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450 | 447 | sample_s(I) <= sample(I)(11 DOWNTO 0) & '0' & '0' & '0' & '0'; |
@@ -481,11 +481,17 vcom_lpp: | |||
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481 | 481 | $(CMD_VCOM) lpp $(VHDLIB)/lib/lpp/./lpp_dma/lpp_dma_pkg.vhd |
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482 | 482 | $(CMD_VCOM) lpp $(VHDLIB)/lib/lpp/./lpp_dma/fifo_latency_correction.vhd |
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483 | 483 | $(CMD_VCOM) lpp $(VHDLIB)/lib/lpp/./lpp_waveform/lpp_waveform_pkg.vhd |
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484 | $(CMD_VCOM) lpp $(VHDLIB)/lib/lpp/./lpp_top_lfr/lpp_top_lfr_pkg.vhd | |
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485 | $(CMD_VCOM) lpp $(VHDLIB)/lib/lpp/./lpp_top_lfr/lpp_lfr_pkg.vhd | |
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484 | 486 | $(CMD_VCOM) lpp $(VHDLIB)/lib/lpp/./lpp_dma/lpp_dma.vhd |
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485 | 487 | $(CMD_VCOM) lpp $(VHDLIB)/lib/lpp/./lpp_dma/lpp_dma_ip.vhd |
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486 | 488 | $(CMD_VCOM) lpp $(VHDLIB)/lib/lpp/./lpp_dma/lpp_dma_send_16word.vhd |
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487 | 489 | $(CMD_VCOM) lpp $(VHDLIB)/lib/lpp/./lpp_dma/lpp_dma_send_1word.vhd |
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488 | 490 | $(CMD_VCOM) lpp $(VHDLIB)/lib/lpp/./lpp_dma/lpp_dma_singleOrBurst.vhd |
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491 | $(CMD_VCOM) lpp $(VHDLIB)/lib/lpp/./lpp_dma/DMA_SubSystem.vhd | |
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492 | $(CMD_VCOM) lpp $(VHDLIB)/lib/lpp/./lpp_dma/DMA_SubSystem_GestionBuffer.vhd | |
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493 | $(CMD_VCOM) lpp $(VHDLIB)/lib/lpp/./lpp_dma/DMA_SubSystem_Arbiter.vhd | |
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494 | $(CMD_VCOM) lpp $(VHDLIB)/lib/lpp/./lpp_dma/DMA_SubSystem_MUX.vhd | |
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489 | 495 | $(CMD_VCOM) lpp $(VHDLIB)/lib/lpp/./lpp_waveform/lpp_waveform.vhd |
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490 | 496 | $(CMD_VCOM) lpp $(VHDLIB)/lib/lpp/./lpp_waveform/lpp_waveform_burst.vhd |
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491 | 497 | $(CMD_VCOM) lpp $(VHDLIB)/lib/lpp/./lpp_waveform/lpp_waveform_fifo_withoutLatency.vhd |
@@ -499,6 +505,7 vcom_lpp: | |||
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499 | 505 | $(CMD_VCOM) lpp $(VHDLIB)/lib/lpp/./lpp_waveform/lpp_waveform_genaddress.vhd |
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500 | 506 | $(CMD_VCOM) lpp $(VHDLIB)/lib/lpp/./lpp_waveform/lpp_waveform_dma_genvalid.vhd |
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501 | 507 | $(CMD_VCOM) lpp $(VHDLIB)/lib/lpp/./lpp_waveform/lpp_waveform_fifo_arbiter_reg.vhd |
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508 | $(CMD_VCOM) lpp $(VHDLIB)/lib/lpp/./lpp_waveform/lpp_waveform_fsmdma.vhd | |
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502 | 509 | $(CMD_VCOM) lpp $(VHDLIB)/lib/lpp/./lpp_top_lfr/lpp_top_lfr_pkg.vhd |
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503 | 510 | $(CMD_VCOM) lpp $(VHDLIB)/lib/lpp/./lpp_top_lfr/lpp_lfr_pkg.vhd |
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504 | 511 | $(CMD_VCOM) lpp $(VHDLIB)/lib/lpp/./lpp_top_lfr/lpp_lfr_filter.vhd |
@@ -94,26 +94,54 ARCHITECTURE beh OF TB IS | |||
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94 | 94 | CONSTANT ADDR_SPECTRAL_MATRIX_COARSE_TIME_F2_1 : STD_LOGIC_VECTOR(31 DOWNTO 0) := X"00000F48"; |
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95 | 95 | CONSTANT ADDR_SPECTRAL_MATRIX_FINE_TIME_F2_1 : STD_LOGIC_VECTOR(31 DOWNTO 0) := X"00000F4C"; |
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96 | 96 | |
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97 | CONSTANT ADDR_SPECTRAL_MATRIX_LENGTH_MATRIX : STD_LOGIC_VECTOR(31 DOWNTO 0) := X"00000F50"; | |
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97 | 98 | -- REG WAVEFORM |
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98 |
CONSTANT ADDR_WAVEFORM_PICKER_DATASHAPING : STD_LOGIC_VECTOR(31 DOWNTO 0) := X"00000F5 |
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99 |
CONSTANT ADDR_WAVEFORM_PICKER_CONTROL : STD_LOGIC_VECTOR(31 DOWNTO 0) := X"00000F5 |
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100 |
CONSTANT ADDR_WAVEFORM_PICKER_ADDRESS_F0 |
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101 | CONSTANT ADDR_WAVEFORM_PICKER_ADDRESS_F1 : STD_LOGIC_VECTOR(31 DOWNTO 0) := X"00000F5C"; | |
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99 | CONSTANT ADDR_WAVEFORM_PICKER_DATASHAPING : STD_LOGIC_VECTOR(31 DOWNTO 0) := X"00000F54"; | |
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100 | CONSTANT ADDR_WAVEFORM_PICKER_CONTROL : STD_LOGIC_VECTOR(31 DOWNTO 0) := X"00000F58"; | |
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101 | CONSTANT ADDR_WAVEFORM_PICKER_ADDRESS_F0_0 : STD_LOGIC_VECTOR(31 DOWNTO 0) := X"00000F5C"; | |
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102 | ||
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103 | CONSTANT ADDR_WAVEFORM_PICKER_ADDRESS_F0_1 : STD_LOGIC_VECTOR(31 DOWNTO 0) := X"00000F60"; | |
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104 | CONSTANT ADDR_WAVEFORM_PICKER_ADDRESS_F1_0 : STD_LOGIC_VECTOR(31 DOWNTO 0) := X"00000F64"; | |
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105 | CONSTANT ADDR_WAVEFORM_PICKER_ADDRESS_F1_1 : STD_LOGIC_VECTOR(31 DOWNTO 0) := X"00000F68"; | |
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106 | CONSTANT ADDR_WAVEFORM_PICKER_ADDRESS_F2_0 : STD_LOGIC_VECTOR(31 DOWNTO 0) := X"00000F6C"; | |
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107 | ||
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108 | CONSTANT ADDR_WAVEFORM_PICKER_ADDRESS_F2_1 : STD_LOGIC_VECTOR(31 DOWNTO 0) := X"00000F70"; | |
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109 | CONSTANT ADDR_WAVEFORM_PICKER_ADDRESS_F3_0 : STD_LOGIC_VECTOR(31 DOWNTO 0) := X"00000F74"; | |
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110 | CONSTANT ADDR_WAVEFORM_PICKER_ADDRESS_F3_1 : STD_LOGIC_VECTOR(31 DOWNTO 0) := X"00000F78"; | |
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111 | CONSTANT ADDR_WAVEFORM_PICKER_STATUS : STD_LOGIC_VECTOR(31 DOWNTO 0) := X"00000F7C"; | |
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112 | ||
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113 | CONSTANT ADDR_WAVEFORM_PICKER_DELTASNAPSHOT : STD_LOGIC_VECTOR(31 DOWNTO 0) := X"00000F80"; | |
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114 | CONSTANT ADDR_WAVEFORM_PICKER_DELTA_F0 : STD_LOGIC_VECTOR(31 DOWNTO 0) := X"00000F84"; | |
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115 | CONSTANT ADDR_WAVEFORM_PICKER_DELTA_F0_2 : STD_LOGIC_VECTOR(31 DOWNTO 0) := X"00000F88"; | |
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116 | CONSTANT ADDR_WAVEFORM_PICKER_DELTA_F1 : STD_LOGIC_VECTOR(31 DOWNTO 0) := X"00000F8C"; | |
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102 | 117 | |
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103 |
CONSTANT ADDR_WAVEFORM_PICKER_ |
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104 |
CONSTANT ADDR_WAVEFORM_PICKER_ |
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105 |
CONSTANT ADDR_WAVEFORM_PICKER_ |
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106 |
CONSTANT ADDR_WAVEFORM_PICKER_ |
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118 | CONSTANT ADDR_WAVEFORM_PICKER_DELTA_F2 : STD_LOGIC_VECTOR(31 DOWNTO 0) := X"00000F90"; | |
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119 | CONSTANT ADDR_WAVEFORM_PICKER_NB_DATA_IN_BUFFER : STD_LOGIC_VECTOR(31 DOWNTO 0) := X"00000F94"; | |
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120 | CONSTANT ADDR_WAVEFORM_PICKER_NBSNAPSHOT : STD_LOGIC_VECTOR(31 DOWNTO 0) := X"00000F98"; | |
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121 | CONSTANT ADDR_WAVEFORM_PICKER_START_DATE : STD_LOGIC_VECTOR(31 DOWNTO 0) := X"00000F9C"; | |
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122 | ||
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123 | CONSTANT ADDR_WAVEFORM_PICKER_COARSE_TIME_F0_0 : STD_LOGIC_VECTOR(31 DOWNTO 0) := X"00000FA0"; | |
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124 | CONSTANT ADDR_WAVEFORM_PICKER_FINE_TIME_F0_0 : STD_LOGIC_VECTOR(31 DOWNTO 0) := X"00000FA4"; | |
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125 | CONSTANT ADDR_WAVEFORM_PICKER_COARSE_TIME_F0_1 : STD_LOGIC_VECTOR(31 DOWNTO 0) := X"00000FA8"; | |
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126 | CONSTANT ADDR_WAVEFORM_PICKER_FINE_TIME_F0_1 : STD_LOGIC_VECTOR(31 DOWNTO 0) := X"00000FAC"; | |
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107 | 127 | |
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108 |
CONSTANT ADDR_WAVEFORM_PICKER_ |
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109 |
CONSTANT ADDR_WAVEFORM_PICKER_ |
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110 |
CONSTANT ADDR_WAVEFORM_PICKER_ |
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111 |
CONSTANT ADDR_WAVEFORM_PICKER_ |
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128 | CONSTANT ADDR_WAVEFORM_PICKER_COARSE_TIME_F1_0 : STD_LOGIC_VECTOR(31 DOWNTO 0) := X"00000FB0"; | |
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129 | CONSTANT ADDR_WAVEFORM_PICKER_FINE_TIME_F1_0 : STD_LOGIC_VECTOR(31 DOWNTO 0) := X"00000FB4"; | |
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130 | CONSTANT ADDR_WAVEFORM_PICKER_COARSE_TIME_F1_1 : STD_LOGIC_VECTOR(31 DOWNTO 0) := X"00000FB8"; | |
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131 | CONSTANT ADDR_WAVEFORM_PICKER_FINE_TIME_F1_1 : STD_LOGIC_VECTOR(31 DOWNTO 0) := X"00000FBC"; | |
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112 | 132 | |
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113 |
CONSTANT ADDR_WAVEFORM_PICKER_ |
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114 |
CONSTANT ADDR_WAVEFORM_PICKER_ |
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115 |
CONSTANT ADDR_WAVEFORM_PICKER_ |
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116 |
CONSTANT ADDR_WAVEFORM_PICKER_ |
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133 | CONSTANT ADDR_WAVEFORM_PICKER_COARSE_TIME_F2_0 : STD_LOGIC_VECTOR(31 DOWNTO 0) := X"00000FC0"; | |
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134 | CONSTANT ADDR_WAVEFORM_PICKER_FINE_TIME_F2_0 : STD_LOGIC_VECTOR(31 DOWNTO 0) := X"00000FC4"; | |
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135 | CONSTANT ADDR_WAVEFORM_PICKER_COARSE_TIME_F2_1 : STD_LOGIC_VECTOR(31 DOWNTO 0) := X"00000FC8"; | |
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136 | CONSTANT ADDR_WAVEFORM_PICKER_FINE_TIME_F2_1 : STD_LOGIC_VECTOR(31 DOWNTO 0) := X"00000FCC"; | |
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137 | ||
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138 | CONSTANT ADDR_WAVEFORM_PICKER_COARSE_TIME_F3_0 : STD_LOGIC_VECTOR(31 DOWNTO 0) := X"00000FD0"; | |
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139 | CONSTANT ADDR_WAVEFORM_PICKER_FINE_TIME_F3_0 : STD_LOGIC_VECTOR(31 DOWNTO 0) := X"00000FD4"; | |
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140 | CONSTANT ADDR_WAVEFORM_PICKER_COARSE_TIME_F3_1 : STD_LOGIC_VECTOR(31 DOWNTO 0) := X"00000FD8"; | |
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141 | CONSTANT ADDR_WAVEFORM_PICKER_FINE_TIME_F3_1 : STD_LOGIC_VECTOR(31 DOWNTO 0) := X"00000FDC"; | |
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142 | ||
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143 | CONSTANT ADDR_WAVEFORM_PICKER_LENGTH_BUFFER : STD_LOGIC_VECTOR(31 DOWNTO 0) := X"00000FE0"; | |
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144 | ||
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117 | 145 |
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118 | 146 | CONSTANT AHB_RAM_ADDR_0 : INTEGER := 16#000#; |
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119 | 147 | CONSTANT AHB_RAM_ADDR_1 : INTEGER := 16#200#; |
@@ -328,7 +356,7 BEGIN | |||
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328 | 356 | GENERIC MAP ( |
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329 | 357 | Mem_use => use_CEL, -- use_RAM |
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330 | 358 | nb_data_by_buffer_size => 32, |
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331 | nb_word_by_buffer_size => 30, | |
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359 | -- nb_word_by_buffer_size => 30, | |
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332 | 360 | nb_snapshot_param_size => 32, |
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333 | 361 | delta_vector_size => 32, |
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334 | 362 | delta_vector_size_f0_2 => 32, |
@@ -478,18 +506,33 BEGIN | |||
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478 | 506 | WAIT UNTIL clk25MHz = '1'; |
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479 | 507 | rstn <= '1'; |
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480 | 508 | WAIT UNTIL clk25MHz = '1'; |
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509 | --------------------------------------------------------------------------- | |
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510 | -- spectral matrix configuration | |
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511 | --------------------------------------------------------------------------- | |
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512 | APB_WRITE(clk25MHz, INDEX_LFR, apbi, ADDR_SPECTRAL_MATRIX_CONFIG, X"00000000"); | |
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513 | ||
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481 | 514 |
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482 |
APB_WRITE(clk25MHz, INDEX_LFR, apbi, ADDR_SPECTRAL_MATRIX_ADDR_MATRIX_F0_1 , X"400 |
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483 |
APB_WRITE(clk25MHz, INDEX_LFR, apbi, ADDR_SPECTRAL_MATRIX_ADDR_MATRIX_F1_0 , X"400 |
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484 |
APB_WRITE(clk25MHz, INDEX_LFR, apbi, ADDR_SPECTRAL_MATRIX_ADDR_MATRIX_F |
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515 | APB_WRITE(clk25MHz, INDEX_LFR, apbi, ADDR_SPECTRAL_MATRIX_ADDR_MATRIX_F0_1 , X"40001000"); | |
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516 | APB_WRITE(clk25MHz, INDEX_LFR, apbi, ADDR_SPECTRAL_MATRIX_ADDR_MATRIX_F1_0 , X"40002000"); | |
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517 | APB_WRITE(clk25MHz, INDEX_LFR, apbi, ADDR_SPECTRAL_MATRIX_ADDR_MATRIX_F1_1 , X"40003000"); | |
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518 | APB_WRITE(clk25MHz, INDEX_LFR, apbi, ADDR_SPECTRAL_MATRIX_ADDR_MATRIX_F2_0 , X"40004000"); | |
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519 | APB_WRITE(clk25MHz, INDEX_LFR, apbi, ADDR_SPECTRAL_MATRIX_ADDR_MATRIX_F2_1 , X"40005000"); | |
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520 | APB_WRITE(clk25MHz, INDEX_LFR, apbi, ADDR_SPECTRAL_MATRIX_LENGTH_MATRIX, X"000000C8"); | |
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521 | APB_WRITE(clk25MHz, INDEX_LFR, apbi, ADDR_SPECTRAL_MATRIX_STATUS, X"00000000"); | |
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485 | 522 | |
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486 | 523 |
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487 | APB_WRITE(clk25MHz, INDEX_LFR, apbi, ADDR_SPECTRAL_MATRIX_STATUS, X"00000000"); | |
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488 | 524 | |
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489 | APB_WRITE(clk25MHz, INDEX_LFR, apbi, ADDR_WAVEFORM_PICKER_ADDRESS_F0 , X"40000000"); | |
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490 | APB_WRITE(clk25MHz, INDEX_LFR, apbi, ADDR_WAVEFORM_PICKER_ADDRESS_F1 , X"40020000"); | |
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491 | APB_WRITE(clk25MHz, INDEX_LFR, apbi, ADDR_WAVEFORM_PICKER_ADDRESS_F2 , X"40040000"); | |
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492 |
APB_WRITE(clk25MHz, INDEX_LFR, apbi, ADDR_WAVEFORM_PICKER_ADDRESS_F |
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525 | --------------------------------------------------------------------------- | |
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526 | -- waveform picker configuration | |
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527 | --------------------------------------------------------------------------- | |
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528 | APB_WRITE(clk25MHz, INDEX_LFR, apbi, ADDR_WAVEFORM_PICKER_ADDRESS_F0_0 , X"40020000"); | |
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529 | APB_WRITE(clk25MHz, INDEX_LFR, apbi, ADDR_WAVEFORM_PICKER_ADDRESS_F0_1 , X"40020000"); | |
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530 | APB_WRITE(clk25MHz, INDEX_LFR, apbi, ADDR_WAVEFORM_PICKER_ADDRESS_F1_0 , X"40030000"); | |
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531 | APB_WRITE(clk25MHz, INDEX_LFR, apbi, ADDR_WAVEFORM_PICKER_ADDRESS_F1_1 , X"40030000"); | |
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532 | APB_WRITE(clk25MHz, INDEX_LFR, apbi, ADDR_WAVEFORM_PICKER_ADDRESS_F2_0 , X"40040000"); | |
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533 | APB_WRITE(clk25MHz, INDEX_LFR, apbi, ADDR_WAVEFORM_PICKER_ADDRESS_F2_1 , X"40040000"); | |
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534 | APB_WRITE(clk25MHz, INDEX_LFR, apbi, ADDR_WAVEFORM_PICKER_ADDRESS_F3_0 , X"40060000"); | |
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535 | APB_WRITE(clk25MHz, INDEX_LFR, apbi, ADDR_WAVEFORM_PICKER_ADDRESS_F3_1 , X"40060000"); | |
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493 | 536 | |
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494 | 537 | APB_WRITE(clk25MHz, INDEX_LFR, apbi, ADDR_WAVEFORM_PICKER_DELTASNAPSHOT, X"00000020"); --"00000020" |
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495 | 538 | APB_WRITE(clk25MHz, INDEX_LFR, apbi, ADDR_WAVEFORM_PICKER_DELTA_F0 , X"00000019"); --"00000019" |
@@ -497,21 +540,26 BEGIN | |||
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497 | 540 | APB_WRITE(clk25MHz, INDEX_LFR, apbi, ADDR_WAVEFORM_PICKER_DELTA_F1 , X"00000019"); --"00000019" |
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498 | 541 | APB_WRITE(clk25MHz, INDEX_LFR, apbi, ADDR_WAVEFORM_PICKER_DELTA_F2 , X"00000001"); --"00000001" |
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499 | 542 | |
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500 |
APB_WRITE(clk25MHz, INDEX_LFR, apbi, ADDR_WAVEFORM_PICKER_NB_DATA_IN_BUFFER , X"0000000 |
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543 | APB_WRITE(clk25MHz, INDEX_LFR, apbi, ADDR_WAVEFORM_PICKER_NB_DATA_IN_BUFFER , X"00000010"); -- X"00000010" | |
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501 | 544 | -- |
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502 | 545 | APB_WRITE(clk25MHz, INDEX_LFR, apbi, ADDR_WAVEFORM_PICKER_NBSNAPSHOT , X"00000010"); |
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503 | 546 | APB_WRITE(clk25MHz, INDEX_LFR, apbi, ADDR_WAVEFORM_PICKER_START_DATE , X"00000001"); |
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504 | APB_WRITE(clk25MHz, INDEX_LFR, apbi, ADDR_WAVEFORM_PICKER_NB_WORD_IN_BUFFER , X"00000022"); | |
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547 | ||
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548 | APB_WRITE(clk25MHz, INDEX_LFR, apbi, ADDR_WAVEFORM_PICKER_LENGTH_BUFFER , X"00000003"); | |
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505 | 549 | |
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506 | 550 | |
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507 | 551 | APB_WRITE(clk25MHz, INDEX_LFR, apbi, ADDR_WAVEFORM_PICKER_CONTROL, X"00000080"); |
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508 | 552 | WAIT UNTIL clk25MHz = '1'; |
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509 | 553 | --------------------------------------------------------------------------- |
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510 | 554 | -- CONFIGURATION STEP |
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511 |
APB_WRITE(clk25MHz, INDEX_LFR, apbi, ADDR_WAVEFORM_PICKER_ADDRESS_F0 , X"400 |
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512 | APB_WRITE(clk25MHz, INDEX_LFR, apbi, ADDR_WAVEFORM_PICKER_ADDRESS_F1 , X"40020000"); | |
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513 |
APB_WRITE(clk25MHz, INDEX_LFR, apbi, ADDR_WAVEFORM_PICKER_ADDRESS_F |
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514 |
APB_WRITE(clk25MHz, INDEX_LFR, apbi, ADDR_WAVEFORM_PICKER_ADDRESS_F |
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555 | APB_WRITE(clk25MHz, INDEX_LFR, apbi, ADDR_WAVEFORM_PICKER_ADDRESS_F0_0 , X"40020000"); | |
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556 | APB_WRITE(clk25MHz, INDEX_LFR, apbi, ADDR_WAVEFORM_PICKER_ADDRESS_F0_1 , X"40020000"); | |
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557 | APB_WRITE(clk25MHz, INDEX_LFR, apbi, ADDR_WAVEFORM_PICKER_ADDRESS_F1_0 , X"40030000"); | |
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558 | APB_WRITE(clk25MHz, INDEX_LFR, apbi, ADDR_WAVEFORM_PICKER_ADDRESS_F1_1 , X"40030000"); | |
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559 | APB_WRITE(clk25MHz, INDEX_LFR, apbi, ADDR_WAVEFORM_PICKER_ADDRESS_F2_0 , X"40040000"); | |
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560 | APB_WRITE(clk25MHz, INDEX_LFR, apbi, ADDR_WAVEFORM_PICKER_ADDRESS_F2_1 , X"40040000"); | |
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561 | APB_WRITE(clk25MHz, INDEX_LFR, apbi, ADDR_WAVEFORM_PICKER_ADDRESS_F3_0 , X"40060000"); | |
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562 | APB_WRITE(clk25MHz, INDEX_LFR, apbi, ADDR_WAVEFORM_PICKER_ADDRESS_F3_1 , X"40060000"); | |
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515 | 563 | |
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516 | 564 | WAIT UNTIL clk25MHz = '1'; |
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517 | 565 | WAIT UNTIL clk25MHz = '1'; |
@@ -1,57 +1,139 | |||
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1 | 1 | onerror {resume} |
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2 | 2 | quietly WaveActivateNextPane {} 0 |
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3 | add wave -noupdate -expand -group FILTER_OUTPUT /tb/lpp_lfr_1/lpp_lfr_filter_1/sample_f3_wdata | |
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4 | add wave -noupdate -expand -group FILTER_OUTPUT /tb/lpp_lfr_1/lpp_lfr_filter_1/sample_f2_wdata | |
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5 | add wave -noupdate -expand -group FILTER_OUTPUT /tb/lpp_lfr_1/lpp_lfr_filter_1/sample_f1_wdata | |
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6 | add wave -noupdate -expand -group FILTER_OUTPUT /tb/lpp_lfr_1/lpp_lfr_filter_1/sample_f0_wdata | |
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7 | add wave -noupdate -expand -group FILTER_OUTPUT /tb/lpp_lfr_1/lpp_lfr_filter_1/sample_f3_val | |
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8 | add wave -noupdate -expand -group FILTER_OUTPUT /tb/lpp_lfr_1/lpp_lfr_filter_1/sample_f2_val | |
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9 | add wave -noupdate -expand -group FILTER_OUTPUT /tb/lpp_lfr_1/lpp_lfr_filter_1/sample_f1_val | |
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10 | add wave -noupdate -expand -group FILTER_OUTPUT /tb/lpp_lfr_1/lpp_lfr_filter_1/sample_f0_val | |
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11 | add wave -noupdate -expand -group SNAPSHOT_F0 /tb/lpp_lfr_1/lpp_waveform_1/lpp_waveform_snapshot_f0/enable | |
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12 | add wave -noupdate -expand -group SNAPSHOT_F0 /tb/lpp_lfr_1/lpp_waveform_1/lpp_waveform_snapshot_f0/burst_enable | |
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13 | add wave -noupdate -expand -group SNAPSHOT_F0 /tb/lpp_lfr_1/lpp_waveform_1/lpp_waveform_snapshot_f0/start_snapshot | |
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14 | add wave -noupdate /tb/lpp_lfr_1/lpp_waveform_1/lpp_waveform_snapshot_controler_1/state_on | |
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15 | add wave -noupdate /tb/lpp_lfr_1/lpp_waveform_1/lpp_waveform_snapshot_controler_1/wfp_on_s | |
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16 | add wave -noupdate /tb/lpp_lfr_1/lpp_waveform_1/lpp_waveform_snapshot_controler_1/start_snapshot_f0_pre | |
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17 | add wave -noupdate /tb/lpp_lfr_1/lpp_waveform_1/lpp_waveform_snapshot_controler_1/first_decount | |
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18 | add wave -noupdate /tb/lpp_lfr_1/lpp_waveform_1/lpp_waveform_snapshot_controler_1/first_init | |
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19 | add wave -noupdate /tb/lpp_lfr_1/lpp_waveform_1/lpp_waveform_snapshot_controler_1/counter_delta_snapshot | |
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20 | add wave -noupdate /tb/lpp_lfr_1/lpp_waveform_1/lpp_waveform_snapshot_controler_1/counter_delta_f0 | |
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21 | add wave -noupdate /tb/lpp_lfr_1/lpp_waveform_1/lpp_waveform_snapshot_controler_1/send_start_snapshot_f0 | |
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22 | add wave -noupdate /tb/lpp_lfr_1/lpp_waveform_1/lpp_waveform_snapshot_controler_1/data_f0_valid | |
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23 | add wave -noupdate /tb/lpp_lfr_1/lpp_waveform_1/lpp_waveform_snapshot_controler_1/data_f2_valid | |
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24 | add wave -noupdate /tb/lpp_lfr_1/lpp_waveform_1/lpp_waveform_snapshot_controler_1/start_snapshot_f0 | |
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25 | add wave -noupdate /tb/lpp_lfr_1/lpp_waveform_1/lpp_waveform_snapshot_controler_1/start_snapshot_f1 | |
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26 | add wave -noupdate /tb/lpp_lfr_1/lpp_waveform_1/lpp_waveform_snapshot_controler_1/start_snapshot_f2 | |
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27 | add wave -noupdate /tb/lpp_lfr_1/lpp_waveform_1/lpp_waveform_snapshot_controler_1/wfp_on | |
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28 | add wave -noupdate /tb/lpp_lfr_1/lpp_dma_singleorburst_1/ahb_master_in | |
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29 | add wave -noupdate -expand -subitemconfig {/tb/lpp_lfr_1/lpp_dma_singleorburst_1/ahb_master_out.haddr {-height 15 -radix hexadecimal} /tb/lpp_lfr_1/lpp_dma_singleorburst_1/ahb_master_out.hwdata {-height 15 -radix hexadecimal}} /tb/lpp_lfr_1/lpp_dma_singleorburst_1/ahb_master_out | |
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30 | add wave -noupdate /tb/lpp_lfr_1/lpp_dma_singleorburst_1/send | |
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31 | add wave -noupdate /tb/lpp_lfr_1/lpp_dma_singleorburst_1/valid_burst | |
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32 | add wave -noupdate /tb/lpp_lfr_1/lpp_dma_singleorburst_1/done | |
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33 | add wave -noupdate /tb/lpp_lfr_1/lpp_dma_singleorburst_1/ren | |
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34 | add wave -noupdate -radix hexadecimal /tb/lpp_lfr_1/lpp_dma_singleorburst_1/address | |
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35 | add wave -noupdate -radix hexadecimal /tb/lpp_lfr_1/lpp_dma_singleorburst_1/data | |
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36 | add wave -noupdate /tb/lpp_lfr_1/lpp_dma_singleorburst_1/debug_dmaout_okay | |
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37 | add wave -noupdate /tb/async_1mx16_0/ce1_b | |
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38 | add wave -noupdate /tb/async_1mx16_0/ce2 | |
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39 | add wave -noupdate /tb/async_1mx16_0/we_b | |
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40 | add wave -noupdate /tb/async_1mx16_0/oe_b | |
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41 | add wave -noupdate /tb/async_1mx16_0/bhe_b | |
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42 | add wave -noupdate /tb/async_1mx16_0/ble_b | |
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43 |
add wave -noupdate /tb/asy |
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44 |
add wave -noupdate /tb/asy |
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45 | add wave -noupdate -radix hexadecimal -expand -subitemconfig {/tb/async_1mx16_0/mem_array_0(31) {-height 15 -radix hexadecimal} /tb/async_1mx16_0/mem_array_0(30) {-height 15 -radix hexadecimal} /tb/async_1mx16_0/mem_array_0(29) {-height 15 -radix hexadecimal} /tb/async_1mx16_0/mem_array_0(28) {-height 15 -radix hexadecimal} /tb/async_1mx16_0/mem_array_0(27) {-height 15 -radix hexadecimal} /tb/async_1mx16_0/mem_array_0(26) {-height 15 -radix hexadecimal} /tb/async_1mx16_0/mem_array_0(25) {-height 15 -radix hexadecimal} /tb/async_1mx16_0/mem_array_0(24) {-height 15 -radix hexadecimal} /tb/async_1mx16_0/mem_array_0(23) {-height 15 -radix hexadecimal} /tb/async_1mx16_0/mem_array_0(22) {-height 15 -radix hexadecimal} /tb/async_1mx16_0/mem_array_0(21) {-height 15 -radix hexadecimal} /tb/async_1mx16_0/mem_array_0(20) {-height 15 -radix hexadecimal} /tb/async_1mx16_0/mem_array_0(19) {-height 15 -radix hexadecimal} /tb/async_1mx16_0/mem_array_0(18) {-height 15 -radix hexadecimal} /tb/async_1mx16_0/mem_array_0(17) {-height 15 -radix hexadecimal} /tb/async_1mx16_0/mem_array_0(16) {-height 15 -radix hexadecimal} /tb/async_1mx16_0/mem_array_0(15) {-height 15 -radix hexadecimal} /tb/async_1mx16_0/mem_array_0(14) {-height 15 -radix hexadecimal} /tb/async_1mx16_0/mem_array_0(13) {-height 15 -radix hexadecimal} /tb/async_1mx16_0/mem_array_0(12) {-height 15 -radix hexadecimal} /tb/async_1mx16_0/mem_array_0(11) {-height 15 -radix hexadecimal} /tb/async_1mx16_0/mem_array_0(10) {-height 15 -radix hexadecimal} /tb/async_1mx16_0/mem_array_0(9) {-height 15 -radix hexadecimal} /tb/async_1mx16_0/mem_array_0(8) {-height 15 -radix hexadecimal} /tb/async_1mx16_0/mem_array_0(7) {-height 15 -radix hexadecimal} /tb/async_1mx16_0/mem_array_0(6) {-height 15 -radix hexadecimal} /tb/async_1mx16_0/mem_array_0(5) {-height 15 -radix hexadecimal} /tb/async_1mx16_0/mem_array_0(4) {-height 15 -radix hexadecimal} /tb/async_1mx16_0/mem_array_0(3) {-height 15 -radix hexadecimal} /tb/async_1mx16_0/mem_array_0(2) {-height 15 -radix hexadecimal} /tb/async_1mx16_0/mem_array_0(1) {-height 15 -radix hexadecimal} /tb/async_1mx16_0/mem_array_0(0) {-height 15 -radix hexadecimal}} /tb/async_1mx16_0/mem_array_0 | |
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46 | add wave -noupdate -radix hexadecimal -expand -subitemconfig {/tb/async_1mx16_0/mem_array_1(31) {-radix hexadecimal} /tb/async_1mx16_0/mem_array_1(30) {-radix hexadecimal} /tb/async_1mx16_0/mem_array_1(29) {-radix hexadecimal} /tb/async_1mx16_0/mem_array_1(28) {-radix hexadecimal} /tb/async_1mx16_0/mem_array_1(27) {-radix hexadecimal} /tb/async_1mx16_0/mem_array_1(26) {-radix hexadecimal} /tb/async_1mx16_0/mem_array_1(25) {-radix hexadecimal} /tb/async_1mx16_0/mem_array_1(24) {-radix hexadecimal} /tb/async_1mx16_0/mem_array_1(23) {-radix hexadecimal} /tb/async_1mx16_0/mem_array_1(22) {-radix hexadecimal} /tb/async_1mx16_0/mem_array_1(21) {-radix hexadecimal} /tb/async_1mx16_0/mem_array_1(20) {-radix hexadecimal} /tb/async_1mx16_0/mem_array_1(19) {-radix hexadecimal} /tb/async_1mx16_0/mem_array_1(18) {-radix hexadecimal} /tb/async_1mx16_0/mem_array_1(17) {-radix hexadecimal} /tb/async_1mx16_0/mem_array_1(16) {-radix hexadecimal} /tb/async_1mx16_0/mem_array_1(15) {-radix hexadecimal} /tb/async_1mx16_0/mem_array_1(14) {-radix hexadecimal} /tb/async_1mx16_0/mem_array_1(13) {-radix hexadecimal} /tb/async_1mx16_0/mem_array_1(12) {-radix hexadecimal} /tb/async_1mx16_0/mem_array_1(11) {-radix hexadecimal} /tb/async_1mx16_0/mem_array_1(10) {-radix hexadecimal} /tb/async_1mx16_0/mem_array_1(9) {-radix hexadecimal} /tb/async_1mx16_0/mem_array_1(8) {-radix hexadecimal} /tb/async_1mx16_0/mem_array_1(7) {-radix hexadecimal} /tb/async_1mx16_0/mem_array_1(6) {-radix hexadecimal} /tb/async_1mx16_0/mem_array_1(5) {-radix hexadecimal} /tb/async_1mx16_0/mem_array_1(4) {-radix hexadecimal} /tb/async_1mx16_0/mem_array_1(3) {-radix hexadecimal} /tb/async_1mx16_0/mem_array_1(2) {-radix hexadecimal} /tb/async_1mx16_0/mem_array_1(1) {-radix hexadecimal} /tb/async_1mx16_0/mem_array_1(0) {-radix hexadecimal}} /tb/async_1mx16_0/mem_array_1 | |
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47 | add wave -noupdate -radix hexadecimal /tb/async_1mx16_0/mem_array_2 | |
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48 | add wave -noupdate -radix hexadecimal /tb/async_1mx16_0/mem_array_3 | |
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49 | add wave -noupdate -format Analog-Step -height 70 -max 256.0 -radix unsigned -subitemconfig {/tb/lpp_lfr_1/lpp_lfr_ms_1/lppfifoxn_f0_b/fifos(0)/lpp_fifo_1/waddr_vect(7) {-radix unsigned} /tb/lpp_lfr_1/lpp_lfr_ms_1/lppfifoxn_f0_b/fifos(0)/lpp_fifo_1/waddr_vect(6) {-radix unsigned} /tb/lpp_lfr_1/lpp_lfr_ms_1/lppfifoxn_f0_b/fifos(0)/lpp_fifo_1/waddr_vect(5) {-radix unsigned} /tb/lpp_lfr_1/lpp_lfr_ms_1/lppfifoxn_f0_b/fifos(0)/lpp_fifo_1/waddr_vect(4) {-radix unsigned} /tb/lpp_lfr_1/lpp_lfr_ms_1/lppfifoxn_f0_b/fifos(0)/lpp_fifo_1/waddr_vect(3) {-radix unsigned} /tb/lpp_lfr_1/lpp_lfr_ms_1/lppfifoxn_f0_b/fifos(0)/lpp_fifo_1/waddr_vect(2) {-radix unsigned} /tb/lpp_lfr_1/lpp_lfr_ms_1/lppfifoxn_f0_b/fifos(0)/lpp_fifo_1/waddr_vect(1) {-radix unsigned} /tb/lpp_lfr_1/lpp_lfr_ms_1/lppfifoxn_f0_b/fifos(0)/lpp_fifo_1/waddr_vect(0) {-radix unsigned}} /tb/lpp_lfr_1/lpp_lfr_ms_1/lppfifoxn_f0_b/fifos(0)/lpp_fifo_1/waddr_vect | |
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50 | add wave -noupdate -radix hexadecimal -expand -subitemconfig {/tb/lpp_lfr_1/lpp_waveform_1/lpp_fifo_4_shared_1/sram/inf/x0/rfd(0) {-radix hexadecimal} /tb/lpp_lfr_1/lpp_waveform_1/lpp_fifo_4_shared_1/sram/inf/x0/rfd(1) {-radix hexadecimal} /tb/lpp_lfr_1/lpp_waveform_1/lpp_fifo_4_shared_1/sram/inf/x0/rfd(2) {-radix hexadecimal} /tb/lpp_lfr_1/lpp_waveform_1/lpp_fifo_4_shared_1/sram/inf/x0/rfd(3) {-radix hexadecimal} /tb/lpp_lfr_1/lpp_waveform_1/lpp_fifo_4_shared_1/sram/inf/x0/rfd(4) {-radix hexadecimal} /tb/lpp_lfr_1/lpp_waveform_1/lpp_fifo_4_shared_1/sram/inf/x0/rfd(5) {-radix hexadecimal} /tb/lpp_lfr_1/lpp_waveform_1/lpp_fifo_4_shared_1/sram/inf/x0/rfd(6) {-radix hexadecimal} /tb/lpp_lfr_1/lpp_waveform_1/lpp_fifo_4_shared_1/sram/inf/x0/rfd(7) {-radix hexadecimal} /tb/lpp_lfr_1/lpp_waveform_1/lpp_fifo_4_shared_1/sram/inf/x0/rfd(8) {-radix hexadecimal} /tb/lpp_lfr_1/lpp_waveform_1/lpp_fifo_4_shared_1/sram/inf/x0/rfd(9) {-radix hexadecimal} /tb/lpp_lfr_1/lpp_waveform_1/lpp_fifo_4_shared_1/sram/inf/x0/rfd(10) {-radix hexadecimal} /tb/lpp_lfr_1/lpp_waveform_1/lpp_fifo_4_shared_1/sram/inf/x0/rfd(11) {-radix hexadecimal} /tb/lpp_lfr_1/lpp_waveform_1/lpp_fifo_4_shared_1/sram/inf/x0/rfd(12) {-radix hexadecimal} /tb/lpp_lfr_1/lpp_waveform_1/lpp_fifo_4_shared_1/sram/inf/x0/rfd(13) {-radix hexadecimal} /tb/lpp_lfr_1/lpp_waveform_1/lpp_fifo_4_shared_1/sram/inf/x0/rfd(14) {-radix hexadecimal} /tb/lpp_lfr_1/lpp_waveform_1/lpp_fifo_4_shared_1/sram/inf/x0/rfd(15) {-radix hexadecimal} /tb/lpp_lfr_1/lpp_waveform_1/lpp_fifo_4_shared_1/sram/inf/x0/rfd(16) {-radix hexadecimal} /tb/lpp_lfr_1/lpp_waveform_1/lpp_fifo_4_shared_1/sram/inf/x0/rfd(17) {-radix hexadecimal} /tb/lpp_lfr_1/lpp_waveform_1/lpp_fifo_4_shared_1/sram/inf/x0/rfd(18) {-radix hexadecimal} /tb/lpp_lfr_1/lpp_waveform_1/lpp_fifo_4_shared_1/sram/inf/x0/rfd(19) {-radix hexadecimal} /tb/lpp_lfr_1/lpp_waveform_1/lpp_fifo_4_shared_1/sram/inf/x0/rfd(20) {-radix hexadecimal} /tb/lpp_lfr_1/lpp_waveform_1/lpp_fifo_4_shared_1/sram/inf/x0/rfd(21) {-radix hexadecimal} /tb/lpp_lfr_1/lpp_waveform_1/lpp_fifo_4_shared_1/sram/inf/x0/rfd(22) {-radix hexadecimal} /tb/lpp_lfr_1/lpp_waveform_1/lpp_fifo_4_shared_1/sram/inf/x0/rfd(23) {-radix hexadecimal} /tb/lpp_lfr_1/lpp_waveform_1/lpp_fifo_4_shared_1/sram/inf/x0/rfd(24) {-radix hexadecimal} /tb/lpp_lfr_1/lpp_waveform_1/lpp_fifo_4_shared_1/sram/inf/x0/rfd(25) {-radix hexadecimal} /tb/lpp_lfr_1/lpp_waveform_1/lpp_fifo_4_shared_1/sram/inf/x0/rfd(26) {-radix hexadecimal} /tb/lpp_lfr_1/lpp_waveform_1/lpp_fifo_4_shared_1/sram/inf/x0/rfd(27) {-radix hexadecimal} /tb/lpp_lfr_1/lpp_waveform_1/lpp_fifo_4_shared_1/sram/inf/x0/rfd(28) {-radix hexadecimal} /tb/lpp_lfr_1/lpp_waveform_1/lpp_fifo_4_shared_1/sram/inf/x0/rfd(29) {-radix hexadecimal} /tb/lpp_lfr_1/lpp_waveform_1/lpp_fifo_4_shared_1/sram/inf/x0/rfd(30) {-radix hexadecimal} /tb/lpp_lfr_1/lpp_waveform_1/lpp_fifo_4_shared_1/sram/inf/x0/rfd(31) {-radix hexadecimal} /tb/lpp_lfr_1/lpp_waveform_1/lpp_fifo_4_shared_1/sram/inf/x0/rfd(32) {-radix hexadecimal} /tb/lpp_lfr_1/lpp_waveform_1/lpp_fifo_4_shared_1/sram/inf/x0/rfd(33) {-radix hexadecimal} /tb/lpp_lfr_1/lpp_waveform_1/lpp_fifo_4_shared_1/sram/inf/x0/rfd(34) {-radix hexadecimal} /tb/lpp_lfr_1/lpp_waveform_1/lpp_fifo_4_shared_1/sram/inf/x0/rfd(35) {-radix hexadecimal} /tb/lpp_lfr_1/lpp_waveform_1/lpp_fifo_4_shared_1/sram/inf/x0/rfd(36) {-radix hexadecimal} /tb/lpp_lfr_1/lpp_waveform_1/lpp_fifo_4_shared_1/sram/inf/x0/rfd(37) {-radix hexadecimal} /tb/lpp_lfr_1/lpp_waveform_1/lpp_fifo_4_shared_1/sram/inf/x0/rfd(38) {-radix hexadecimal} /tb/lpp_lfr_1/lpp_waveform_1/lpp_fifo_4_shared_1/sram/inf/x0/rfd(39) {-radix hexadecimal} /tb/lpp_lfr_1/lpp_waveform_1/lpp_fifo_4_shared_1/sram/inf/x0/rfd(40) {-radix hexadecimal} /tb/lpp_lfr_1/lpp_waveform_1/lpp_fifo_4_shared_1/sram/inf/x0/rfd(41) {-radix hexadecimal} /tb/lpp_lfr_1/lpp_waveform_1/lpp_fifo_4_shared_1/sram/inf/x0/rfd(42) {-radix hexadecimal} /tb/lpp_lfr_1/lpp_waveform_1/lpp_fifo_4_shared_1/sram/inf/x0/rfd(43) {-radix hexadecimal} /tb/lpp_lfr_1/lpp_waveform_1/lpp_fifo_4_shared_1/sram/inf/x0/rfd(44) {-radix hexadecimal} /tb/lpp_lfr_1/lpp_waveform_1/lpp_fifo_4_shared_1/sram/inf/x0/rfd(45) {-radix hexadecimal} /tb/lpp_lfr_1/lpp_waveform_1/lpp_fifo_4_shared_1/sram/inf/x0/rfd(46) {-radix hexadecimal} /tb/lpp_lfr_1/lpp_waveform_1/lpp_fifo_4_shared_1/sram/inf/x0/rfd(47) {-radix hexadecimal} /tb/lpp_lfr_1/lpp_waveform_1/lpp_fifo_4_shared_1/sram/inf/x0/rfd(48) {-radix hexadecimal} /tb/lpp_lfr_1/lpp_waveform_1/lpp_fifo_4_shared_1/sram/inf/x0/rfd(49) {-radix hexadecimal} /tb/lpp_lfr_1/lpp_waveform_1/lpp_fifo_4_shared_1/sram/inf/x0/rfd(50) {-radix hexadecimal} /tb/lpp_lfr_1/lpp_waveform_1/lpp_fifo_4_shared_1/sram/inf/x0/rfd(51) {-radix hexadecimal} /tb/lpp_lfr_1/lpp_waveform_1/lpp_fifo_4_shared_1/sram/inf/x0/rfd(52) {-radix hexadecimal} /tb/lpp_lfr_1/lpp_waveform_1/lpp_fifo_4_shared_1/sram/inf/x0/rfd(53) {-radix hexadecimal} /tb/lpp_lfr_1/lpp_waveform_1/lpp_fifo_4_shared_1/sram/inf/x0/rfd(54) {-radix hexadecimal} /tb/lpp_lfr_1/lpp_waveform_1/lpp_fifo_4_shared_1/sram/inf/x0/rfd(55) {-radix hexadecimal} /tb/lpp_lfr_1/lpp_waveform_1/lpp_fifo_4_shared_1/sram/inf/x0/rfd(56) {-radix hexadecimal} /tb/lpp_lfr_1/lpp_waveform_1/lpp_fifo_4_shared_1/sram/inf/x0/rfd(57) {-radix hexadecimal} /tb/lpp_lfr_1/lpp_waveform_1/lpp_fifo_4_shared_1/sram/inf/x0/rfd(58) {-radix hexadecimal} /tb/lpp_lfr_1/lpp_waveform_1/lpp_fifo_4_shared_1/sram/inf/x0/rfd(59) {-radix hexadecimal} /tb/lpp_lfr_1/lpp_waveform_1/lpp_fifo_4_shared_1/sram/inf/x0/rfd(60) {-radix hexadecimal} /tb/lpp_lfr_1/lpp_waveform_1/lpp_fifo_4_shared_1/sram/inf/x0/rfd(61) {-radix hexadecimal} /tb/lpp_lfr_1/lpp_waveform_1/lpp_fifo_4_shared_1/sram/inf/x0/rfd(62) {-radix hexadecimal} /tb/lpp_lfr_1/lpp_waveform_1/lpp_fifo_4_shared_1/sram/inf/x0/rfd(63) {-radix hexadecimal} /tb/lpp_lfr_1/lpp_waveform_1/lpp_fifo_4_shared_1/sram/inf/x0/rfd(64) {-radix hexadecimal} /tb/lpp_lfr_1/lpp_waveform_1/lpp_fifo_4_shared_1/sram/inf/x0/rfd(65) {-radix hexadecimal} /tb/lpp_lfr_1/lpp_waveform_1/lpp_fifo_4_shared_1/sram/inf/x0/rfd(66) {-radix hexadecimal} /tb/lpp_lfr_1/lpp_waveform_1/lpp_fifo_4_shared_1/sram/inf/x0/rfd(67) {-radix hexadecimal} /tb/lpp_lfr_1/lpp_waveform_1/lpp_fifo_4_shared_1/sram/inf/x0/rfd(68) {-radix hexadecimal} /tb/lpp_lfr_1/lpp_waveform_1/lpp_fifo_4_shared_1/sram/inf/x0/rfd(69) {-radix hexadecimal} /tb/lpp_lfr_1/lpp_waveform_1/lpp_fifo_4_shared_1/sram/inf/x0/rfd(70) {-radix hexadecimal} /tb/lpp_lfr_1/lpp_waveform_1/lpp_fifo_4_shared_1/sram/inf/x0/rfd(71) {-radix hexadecimal} /tb/lpp_lfr_1/lpp_waveform_1/lpp_fifo_4_shared_1/sram/inf/x0/rfd(72) {-radix hexadecimal} /tb/lpp_lfr_1/lpp_waveform_1/lpp_fifo_4_shared_1/sram/inf/x0/rfd(73) {-radix hexadecimal} /tb/lpp_lfr_1/lpp_waveform_1/lpp_fifo_4_shared_1/sram/inf/x0/rfd(74) {-radix hexadecimal} /tb/lpp_lfr_1/lpp_waveform_1/lpp_fifo_4_shared_1/sram/inf/x0/rfd(75) {-radix hexadecimal} /tb/lpp_lfr_1/lpp_waveform_1/lpp_fifo_4_shared_1/sram/inf/x0/rfd(76) {-radix hexadecimal} /tb/lpp_lfr_1/lpp_waveform_1/lpp_fifo_4_shared_1/sram/inf/x0/rfd(77) {-radix hexadecimal} /tb/lpp_lfr_1/lpp_waveform_1/lpp_fifo_4_shared_1/sram/inf/x0/rfd(78) {-radix hexadecimal} /tb/lpp_lfr_1/lpp_waveform_1/lpp_fifo_4_shared_1/sram/inf/x0/rfd(79) {-radix hexadecimal} /tb/lpp_lfr_1/lpp_waveform_1/lpp_fifo_4_shared_1/sram/inf/x0/rfd(80) {-radix hexadecimal} /tb/lpp_lfr_1/lpp_waveform_1/lpp_fifo_4_shared_1/sram/inf/x0/rfd(81) {-radix hexadecimal} /tb/lpp_lfr_1/lpp_waveform_1/lpp_fifo_4_shared_1/sram/inf/x0/rfd(82) {-radix hexadecimal} /tb/lpp_lfr_1/lpp_waveform_1/lpp_fifo_4_shared_1/sram/inf/x0/rfd(83) {-radix hexadecimal} /tb/lpp_lfr_1/lpp_waveform_1/lpp_fifo_4_shared_1/sram/inf/x0/rfd(84) {-radix hexadecimal} /tb/lpp_lfr_1/lpp_waveform_1/lpp_fifo_4_shared_1/sram/inf/x0/rfd(85) {-radix hexadecimal} /tb/lpp_lfr_1/lpp_waveform_1/lpp_fifo_4_shared_1/sram/inf/x0/rfd(86) {-radix hexadecimal} /tb/lpp_lfr_1/lpp_waveform_1/lpp_fifo_4_shared_1/sram/inf/x0/rfd(87) {-radix hexadecimal} /tb/lpp_lfr_1/lpp_waveform_1/lpp_fifo_4_shared_1/sram/inf/x0/rfd(88) {-radix hexadecimal} /tb/lpp_lfr_1/lpp_waveform_1/lpp_fifo_4_shared_1/sram/inf/x0/rfd(89) {-radix hexadecimal} /tb/lpp_lfr_1/lpp_waveform_1/lpp_fifo_4_shared_1/sram/inf/x0/rfd(90) {-radix hexadecimal} /tb/lpp_lfr_1/lpp_waveform_1/lpp_fifo_4_shared_1/sram/inf/x0/rfd(91) {-radix hexadecimal} /tb/lpp_lfr_1/lpp_waveform_1/lpp_fifo_4_shared_1/sram/inf/x0/rfd(92) {-radix hexadecimal} /tb/lpp_lfr_1/lpp_waveform_1/lpp_fifo_4_shared_1/sram/inf/x0/rfd(93) {-radix hexadecimal} /tb/lpp_lfr_1/lpp_waveform_1/lpp_fifo_4_shared_1/sram/inf/x0/rfd(94) {-radix hexadecimal} /tb/lpp_lfr_1/lpp_waveform_1/lpp_fifo_4_shared_1/sram/inf/x0/rfd(95) {-radix hexadecimal} /tb/lpp_lfr_1/lpp_waveform_1/lpp_fifo_4_shared_1/sram/inf/x0/rfd(96) {-radix hexadecimal} /tb/lpp_lfr_1/lpp_waveform_1/lpp_fifo_4_shared_1/sram/inf/x0/rfd(97) {-radix hexadecimal} /tb/lpp_lfr_1/lpp_waveform_1/lpp_fifo_4_shared_1/sram/inf/x0/rfd(98) {-radix hexadecimal} /tb/lpp_lfr_1/lpp_waveform_1/lpp_fifo_4_shared_1/sram/inf/x0/rfd(99) {-radix hexadecimal} /tb/lpp_lfr_1/lpp_waveform_1/lpp_fifo_4_shared_1/sram/inf/x0/rfd(100) {-radix hexadecimal} /tb/lpp_lfr_1/lpp_waveform_1/lpp_fifo_4_shared_1/sram/inf/x0/rfd(101) {-radix hexadecimal} /tb/lpp_lfr_1/lpp_waveform_1/lpp_fifo_4_shared_1/sram/inf/x0/rfd(102) {-radix hexadecimal} /tb/lpp_lfr_1/lpp_waveform_1/lpp_fifo_4_shared_1/sram/inf/x0/rfd(103) {-radix hexadecimal} /tb/lpp_lfr_1/lpp_waveform_1/lpp_fifo_4_shared_1/sram/inf/x0/rfd(104) {-radix hexadecimal} /tb/lpp_lfr_1/lpp_waveform_1/lpp_fifo_4_shared_1/sram/inf/x0/rfd(105) {-radix hexadecimal} /tb/lpp_lfr_1/lpp_waveform_1/lpp_fifo_4_shared_1/sram/inf/x0/rfd(106) {-radix hexadecimal} /tb/lpp_lfr_1/lpp_waveform_1/lpp_fifo_4_shared_1/sram/inf/x0/rfd(107) {-radix hexadecimal} /tb/lpp_lfr_1/lpp_waveform_1/lpp_fifo_4_shared_1/sram/inf/x0/rfd(108) {-radix hexadecimal} /tb/lpp_lfr_1/lpp_waveform_1/lpp_fifo_4_shared_1/sram/inf/x0/rfd(109) {-radix hexadecimal} /tb/lpp_lfr_1/lpp_waveform_1/lpp_fifo_4_shared_1/sram/inf/x0/rfd(110) {-radix hexadecimal} /tb/lpp_lfr_1/lpp_waveform_1/lpp_fifo_4_shared_1/sram/inf/x0/rfd(111) {-radix hexadecimal} /tb/lpp_lfr_1/lpp_waveform_1/lpp_fifo_4_shared_1/sram/inf/x0/rfd(112) {-radix hexadecimal} /tb/lpp_lfr_1/lpp_waveform_1/lpp_fifo_4_shared_1/sram/inf/x0/rfd(113) {-radix hexadecimal} /tb/lpp_lfr_1/lpp_waveform_1/lpp_fifo_4_shared_1/sram/inf/x0/rfd(114) {-radix hexadecimal} /tb/lpp_lfr_1/lpp_waveform_1/lpp_fifo_4_shared_1/sram/inf/x0/rfd(115) {-radix hexadecimal} /tb/lpp_lfr_1/lpp_waveform_1/lpp_fifo_4_shared_1/sram/inf/x0/rfd(116) {-radix hexadecimal} /tb/lpp_lfr_1/lpp_waveform_1/lpp_fifo_4_shared_1/sram/inf/x0/rfd(117) {-radix hexadecimal} /tb/lpp_lfr_1/lpp_waveform_1/lpp_fifo_4_shared_1/sram/inf/x0/rfd(118) {-radix hexadecimal} /tb/lpp_lfr_1/lpp_waveform_1/lpp_fifo_4_shared_1/sram/inf/x0/rfd(119) {-radix hexadecimal} /tb/lpp_lfr_1/lpp_waveform_1/lpp_fifo_4_shared_1/sram/inf/x0/rfd(120) {-radix hexadecimal} /tb/lpp_lfr_1/lpp_waveform_1/lpp_fifo_4_shared_1/sram/inf/x0/rfd(121) {-radix hexadecimal} /tb/lpp_lfr_1/lpp_waveform_1/lpp_fifo_4_shared_1/sram/inf/x0/rfd(122) {-radix hexadecimal} /tb/lpp_lfr_1/lpp_waveform_1/lpp_fifo_4_shared_1/sram/inf/x0/rfd(123) {-radix hexadecimal} /tb/lpp_lfr_1/lpp_waveform_1/lpp_fifo_4_shared_1/sram/inf/x0/rfd(124) {-radix hexadecimal} /tb/lpp_lfr_1/lpp_waveform_1/lpp_fifo_4_shared_1/sram/inf/x0/rfd(125) {-radix hexadecimal} /tb/lpp_lfr_1/lpp_waveform_1/lpp_fifo_4_shared_1/sram/inf/x0/rfd(126) {-radix hexadecimal} /tb/lpp_lfr_1/lpp_waveform_1/lpp_fifo_4_shared_1/sram/inf/x0/rfd(127) {-radix hexadecimal}} /tb/lpp_lfr_1/lpp_waveform_1/lpp_fifo_4_shared_1/sram/inf/x0/rfd | |
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3 | add wave -noupdate -expand -group FILTER_OUTPUT -radix hexadecimal /tb/lpp_lfr_1/lpp_lfr_filter_1/sample_f3_wdata | |
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4 | add wave -noupdate -expand -group FILTER_OUTPUT -radix hexadecimal /tb/lpp_lfr_1/lpp_lfr_filter_1/sample_f2_wdata | |
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5 | add wave -noupdate -expand -group FILTER_OUTPUT -radix hexadecimal /tb/lpp_lfr_1/lpp_lfr_filter_1/sample_f1_wdata | |
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6 | add wave -noupdate -expand -group FILTER_OUTPUT -radix hexadecimal /tb/lpp_lfr_1/lpp_lfr_filter_1/sample_f0_wdata | |
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7 | add wave -noupdate -expand -group FILTER_OUTPUT -radix hexadecimal /tb/lpp_lfr_1/lpp_lfr_filter_1/sample_f3_val | |
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8 | add wave -noupdate -expand -group FILTER_OUTPUT -radix hexadecimal /tb/lpp_lfr_1/lpp_lfr_filter_1/sample_f2_val | |
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9 | add wave -noupdate -expand -group FILTER_OUTPUT -radix hexadecimal /tb/lpp_lfr_1/lpp_lfr_filter_1/sample_f1_val | |
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10 | add wave -noupdate -expand -group FILTER_OUTPUT -radix hexadecimal /tb/lpp_lfr_1/lpp_lfr_filter_1/sample_f0_val | |
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11 | add wave -noupdate /tb/lpp_lfr_1/rstn | |
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12 | add wave -noupdate /tb/lpp_lfr_1/run | |
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13 | add wave -noupdate /tb/lpp_lfr_1/run_dma | |
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14 | add wave -noupdate /tb/lpp_lfr_1/run_ms | |
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15 | add wave -noupdate -expand -group MS /tb/lpp_lfr_1/lpp_lfr_apbreg_1/reg_sp | |
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16 | add wave -noupdate -expand -group MS -group MS_MEM_OUT_0 /tb/lpp_lfr_1/lpp_lfr_ms_1/all_mem_out_spectralmatrix(0)/mem_out_spectralmatrix_i/reuse | |
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17 | add wave -noupdate -expand -group MS -group MS_MEM_OUT_0 /tb/lpp_lfr_1/lpp_lfr_ms_1/all_mem_out_spectralmatrix(0)/mem_out_spectralmatrix_i/run | |
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18 | add wave -noupdate -expand -group MS -group MS_MEM_OUT_0 /tb/lpp_lfr_1/lpp_lfr_ms_1/all_mem_out_spectralmatrix(0)/mem_out_spectralmatrix_i/ren | |
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19 | add wave -noupdate -expand -group MS -group MS_MEM_OUT_0 /tb/lpp_lfr_1/lpp_lfr_ms_1/all_mem_out_spectralmatrix(0)/mem_out_spectralmatrix_i/rdata | |
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20 | add wave -noupdate -expand -group MS -group MS_MEM_OUT_0 /tb/lpp_lfr_1/lpp_lfr_ms_1/all_mem_out_spectralmatrix(0)/mem_out_spectralmatrix_i/wen | |
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21 | add wave -noupdate -expand -group MS -group MS_MEM_OUT_0 /tb/lpp_lfr_1/lpp_lfr_ms_1/all_mem_out_spectralmatrix(0)/mem_out_spectralmatrix_i/wdata | |
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22 | add wave -noupdate -expand -group MS -group MS_MEM_OUT_0 /tb/lpp_lfr_1/lpp_lfr_ms_1/all_mem_out_spectralmatrix(0)/mem_out_spectralmatrix_i/full | |
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23 | add wave -noupdate -expand -group MS -group MS_MEM_OUT_0 /tb/lpp_lfr_1/lpp_lfr_ms_1/all_mem_out_spectralmatrix(0)/mem_out_spectralmatrix_i/full_threshold | |
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24 | add wave -noupdate -expand -group MS -group MS_MEM_OUT_0 /tb/lpp_lfr_1/lpp_lfr_ms_1/all_mem_out_spectralmatrix(0)/mem_out_spectralmatrix_i/full_almost | |
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25 | add wave -noupdate -expand -group MS -group MS_MEM_OUT_0 /tb/lpp_lfr_1/lpp_lfr_ms_1/all_mem_out_spectralmatrix(0)/mem_out_spectralmatrix_i/empty | |
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26 | add wave -noupdate -expand -group MS -group MS_MEM_OUT_0 /tb/lpp_lfr_1/lpp_lfr_ms_1/all_mem_out_spectralmatrix(0)/mem_out_spectralmatrix_i/empty_threshold | |
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27 | add wave -noupdate -expand -group MS -group MEM_OUT_1 /tb/lpp_lfr_1/lpp_lfr_ms_1/all_mem_out_spectralmatrix(1)/mem_out_spectralmatrix_i/reuse | |
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28 | add wave -noupdate -expand -group MS -group MEM_OUT_1 /tb/lpp_lfr_1/lpp_lfr_ms_1/all_mem_out_spectralmatrix(1)/mem_out_spectralmatrix_i/run | |
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29 | add wave -noupdate -expand -group MS -group MEM_OUT_1 /tb/lpp_lfr_1/lpp_lfr_ms_1/all_mem_out_spectralmatrix(1)/mem_out_spectralmatrix_i/ren | |
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30 | add wave -noupdate -expand -group MS -group MEM_OUT_1 /tb/lpp_lfr_1/lpp_lfr_ms_1/all_mem_out_spectralmatrix(1)/mem_out_spectralmatrix_i/rdata | |
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31 | add wave -noupdate -expand -group MS -group MEM_OUT_1 /tb/lpp_lfr_1/lpp_lfr_ms_1/all_mem_out_spectralmatrix(1)/mem_out_spectralmatrix_i/wen | |
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32 | add wave -noupdate -expand -group MS -group MEM_OUT_1 /tb/lpp_lfr_1/lpp_lfr_ms_1/all_mem_out_spectralmatrix(1)/mem_out_spectralmatrix_i/wdata | |
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33 | add wave -noupdate -expand -group MS -group MEM_OUT_1 /tb/lpp_lfr_1/lpp_lfr_ms_1/all_mem_out_spectralmatrix(1)/mem_out_spectralmatrix_i/empty | |
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34 | add wave -noupdate -expand -group MS -group MEM_OUT_1 /tb/lpp_lfr_1/lpp_lfr_ms_1/all_mem_out_spectralmatrix(1)/mem_out_spectralmatrix_i/full | |
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35 | add wave -noupdate -expand -group MS -group MEM_OUT_1 /tb/lpp_lfr_1/lpp_lfr_ms_1/all_mem_out_spectralmatrix(1)/mem_out_spectralmatrix_i/full_almost | |
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36 | add wave -noupdate -expand -group MS -group MEM_OUT_1 /tb/lpp_lfr_1/lpp_lfr_ms_1/all_mem_out_spectralmatrix(1)/mem_out_spectralmatrix_i/empty_threshold | |
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37 | add wave -noupdate -expand -group MS -group MEM_OUT_1 /tb/lpp_lfr_1/lpp_lfr_ms_1/all_mem_out_spectralmatrix(1)/mem_out_spectralmatrix_i/full_threshold | |
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38 | add wave -noupdate -expand -group MS -group FSM_Dma_FIFO /tb/lpp_lfr_1/lpp_lfr_ms_1/fsm_dma_fifo_ren | |
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39 | add wave -noupdate -expand -group MS -group FSM_Dma_FIFO /tb/lpp_lfr_1/lpp_lfr_ms_1/fsm_dma_fifo_empty | |
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40 | add wave -noupdate -expand -group MS -group FSM_Dma_FIFO /tb/lpp_lfr_1/lpp_lfr_ms_1/fsm_dma_fifo_empty_threshold | |
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41 | add wave -noupdate -expand -group MS -group FSM_Dma_FIFO /tb/lpp_lfr_1/lpp_lfr_ms_1/fsm_dma_fifo_data | |
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42 | add wave -noupdate -expand -group MS -group FSM_Dma_FIFO /tb/lpp_lfr_1/lpp_lfr_ms_1/fsm_dma_fifo_status | |
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43 | add wave -noupdate /tb/lpp_lfr_1/dma_subsystem_1/fifo_ren | |
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44 | add wave -noupdate /tb/lpp_lfr_1/dma_subsystem_1/dma_ren | |
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45 | add wave -noupdate /tb/lpp_lfr_1/dma_subsystem_1/fifo_burst_valid | |
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46 | add wave -noupdate /tb/lpp_lfr_1/dma_subsystem_1/fifo_data | |
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47 | add wave -noupdate /tb/lpp_lfr_1/dma_subsystem_1/fifo_ren | |
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48 | add wave -noupdate -radix hexadecimal -subitemconfig {/tb/lpp_lfr_1/lpp_lfr_apbreg_1/reg_wp.status_new_err {-radix hexadecimal} /tb/lpp_lfr_1/lpp_lfr_apbreg_1/reg_wp.data_shaping_bw {-radix hexadecimal} /tb/lpp_lfr_1/lpp_lfr_apbreg_1/reg_wp.data_shaping_sp0 {-radix hexadecimal} /tb/lpp_lfr_1/lpp_lfr_apbreg_1/reg_wp.data_shaping_sp1 {-radix hexadecimal} /tb/lpp_lfr_1/lpp_lfr_apbreg_1/reg_wp.data_shaping_r0 {-radix hexadecimal} /tb/lpp_lfr_1/lpp_lfr_apbreg_1/reg_wp.data_shaping_r1 {-radix hexadecimal} /tb/lpp_lfr_1/lpp_lfr_apbreg_1/reg_wp.data_shaping_r2 {-radix hexadecimal} /tb/lpp_lfr_1/lpp_lfr_apbreg_1/reg_wp.delta_snapshot {-radix hexadecimal} /tb/lpp_lfr_1/lpp_lfr_apbreg_1/reg_wp.delta_f0 {-radix hexadecimal} /tb/lpp_lfr_1/lpp_lfr_apbreg_1/reg_wp.delta_f0_2 {-radix hexadecimal} /tb/lpp_lfr_1/lpp_lfr_apbreg_1/reg_wp.delta_f1 {-radix hexadecimal} /tb/lpp_lfr_1/lpp_lfr_apbreg_1/reg_wp.delta_f2 {-radix hexadecimal} /tb/lpp_lfr_1/lpp_lfr_apbreg_1/reg_wp.nb_data_by_buffer {-radix hexadecimal} /tb/lpp_lfr_1/lpp_lfr_apbreg_1/reg_wp.nb_snapshot_param {-radix hexadecimal} /tb/lpp_lfr_1/lpp_lfr_apbreg_1/reg_wp.enable_f0 {-radix hexadecimal} /tb/lpp_lfr_1/lpp_lfr_apbreg_1/reg_wp.enable_f1 {-radix hexadecimal} /tb/lpp_lfr_1/lpp_lfr_apbreg_1/reg_wp.enable_f2 {-radix hexadecimal} /tb/lpp_lfr_1/lpp_lfr_apbreg_1/reg_wp.enable_f3 {-radix hexadecimal} /tb/lpp_lfr_1/lpp_lfr_apbreg_1/reg_wp.burst_f0 {-radix hexadecimal} /tb/lpp_lfr_1/lpp_lfr_apbreg_1/reg_wp.burst_f1 {-radix hexadecimal} /tb/lpp_lfr_1/lpp_lfr_apbreg_1/reg_wp.burst_f2 {-radix hexadecimal} /tb/lpp_lfr_1/lpp_lfr_apbreg_1/reg_wp.run {-radix hexadecimal} /tb/lpp_lfr_1/lpp_lfr_apbreg_1/reg_wp.status_ready_buffer_f {-radix hexadecimal -expand} /tb/lpp_lfr_1/lpp_lfr_apbreg_1/reg_wp.status_ready_buffer_f(7) {-radix hexadecimal} /tb/lpp_lfr_1/lpp_lfr_apbreg_1/reg_wp.status_ready_buffer_f(6) {-radix hexadecimal} /tb/lpp_lfr_1/lpp_lfr_apbreg_1/reg_wp.status_ready_buffer_f(5) {-radix hexadecimal} /tb/lpp_lfr_1/lpp_lfr_apbreg_1/reg_wp.status_ready_buffer_f(4) {-radix hexadecimal} /tb/lpp_lfr_1/lpp_lfr_apbreg_1/reg_wp.status_ready_buffer_f(3) {-radix hexadecimal} /tb/lpp_lfr_1/lpp_lfr_apbreg_1/reg_wp.status_ready_buffer_f(2) {-radix hexadecimal} /tb/lpp_lfr_1/lpp_lfr_apbreg_1/reg_wp.status_ready_buffer_f(1) {-radix hexadecimal} /tb/lpp_lfr_1/lpp_lfr_apbreg_1/reg_wp.status_ready_buffer_f(0) {-radix hexadecimal} /tb/lpp_lfr_1/lpp_lfr_apbreg_1/reg_wp.addr_buffer_f {-radix hexadecimal} /tb/lpp_lfr_1/lpp_lfr_apbreg_1/reg_wp.time_buffer_f {-radix hexadecimal} /tb/lpp_lfr_1/lpp_lfr_apbreg_1/reg_wp.length_buffer {-radix hexadecimal} /tb/lpp_lfr_1/lpp_lfr_apbreg_1/reg_wp.error_buffer_full {-radix hexadecimal} /tb/lpp_lfr_1/lpp_lfr_apbreg_1/reg_wp.start_date {-radix hexadecimal}} /tb/lpp_lfr_1/lpp_lfr_apbreg_1/reg_wp | |
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49 | add wave -noupdate -group FIFO_0 /tb/lpp_lfr_1/lpp_waveform_1/generate_all_fifo(0)/lpp_fifo_1/reuse | |
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50 | add wave -noupdate -group FIFO_0 /tb/lpp_lfr_1/lpp_waveform_1/generate_all_fifo(0)/lpp_fifo_1/run | |
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51 | add wave -noupdate -group FIFO_0 /tb/lpp_lfr_1/lpp_waveform_1/generate_all_fifo(0)/lpp_fifo_1/ren | |
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52 | add wave -noupdate -group FIFO_0 /tb/lpp_lfr_1/lpp_waveform_1/generate_all_fifo(0)/lpp_fifo_1/rdata | |
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53 | add wave -noupdate -group FIFO_0 /tb/lpp_lfr_1/lpp_waveform_1/generate_all_fifo(0)/lpp_fifo_1/wen | |
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54 | add wave -noupdate -group FIFO_0 /tb/lpp_lfr_1/lpp_waveform_1/generate_all_fifo(0)/lpp_fifo_1/wdata | |
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55 | add wave -noupdate -group FIFO_0 /tb/lpp_lfr_1/lpp_waveform_1/generate_all_fifo(0)/lpp_fifo_1/empty | |
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56 | add wave -noupdate -group FIFO_0 /tb/lpp_lfr_1/lpp_waveform_1/generate_all_fifo(0)/lpp_fifo_1/full | |
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57 | add wave -noupdate -group FIFO_0 /tb/lpp_lfr_1/lpp_waveform_1/generate_all_fifo(0)/lpp_fifo_1/full_almost | |
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58 | add wave -noupdate -group FIFO_0 /tb/lpp_lfr_1/lpp_waveform_1/generate_all_fifo(0)/lpp_fifo_1/empty_threshold | |
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59 | add wave -noupdate -group FIFO_0 /tb/lpp_lfr_1/lpp_waveform_1/generate_all_fifo(0)/lpp_fifo_1/full_threshold | |
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60 | add wave -noupdate -group FIFO_1 /tb/lpp_lfr_1/lpp_waveform_1/generate_all_fifo(1)/lpp_fifo_1/reuse | |
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61 | add wave -noupdate -group FIFO_1 /tb/lpp_lfr_1/lpp_waveform_1/generate_all_fifo(1)/lpp_fifo_1/run | |
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62 | add wave -noupdate -group FIFO_1 /tb/lpp_lfr_1/lpp_waveform_1/generate_all_fifo(1)/lpp_fifo_1/ren | |
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63 | add wave -noupdate -group FIFO_1 /tb/lpp_lfr_1/lpp_waveform_1/generate_all_fifo(1)/lpp_fifo_1/rdata | |
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64 | add wave -noupdate -group FIFO_1 /tb/lpp_lfr_1/lpp_waveform_1/generate_all_fifo(1)/lpp_fifo_1/wen | |
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65 | add wave -noupdate -group FIFO_1 /tb/lpp_lfr_1/lpp_waveform_1/generate_all_fifo(1)/lpp_fifo_1/wdata | |
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66 | add wave -noupdate -group FIFO_1 /tb/lpp_lfr_1/lpp_waveform_1/generate_all_fifo(1)/lpp_fifo_1/empty | |
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67 | add wave -noupdate -group FIFO_1 /tb/lpp_lfr_1/lpp_waveform_1/generate_all_fifo(1)/lpp_fifo_1/full | |
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68 | add wave -noupdate -group FIFO_1 /tb/lpp_lfr_1/lpp_waveform_1/generate_all_fifo(1)/lpp_fifo_1/full_almost | |
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69 | add wave -noupdate -group FIFO_1 /tb/lpp_lfr_1/lpp_waveform_1/generate_all_fifo(1)/lpp_fifo_1/empty_threshold | |
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70 | add wave -noupdate -group FIFO_1 /tb/lpp_lfr_1/lpp_waveform_1/generate_all_fifo(1)/lpp_fifo_1/full_threshold | |
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71 | add wave -noupdate -group FIFO_2 /tb/lpp_lfr_1/lpp_waveform_1/generate_all_fifo(2)/lpp_fifo_1/reuse | |
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72 | add wave -noupdate -group FIFO_2 /tb/lpp_lfr_1/lpp_waveform_1/generate_all_fifo(2)/lpp_fifo_1/run | |
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73 | add wave -noupdate -group FIFO_2 /tb/lpp_lfr_1/lpp_waveform_1/generate_all_fifo(2)/lpp_fifo_1/ren | |
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74 | add wave -noupdate -group FIFO_2 /tb/lpp_lfr_1/lpp_waveform_1/generate_all_fifo(2)/lpp_fifo_1/rdata | |
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75 | add wave -noupdate -group FIFO_2 /tb/lpp_lfr_1/lpp_waveform_1/generate_all_fifo(2)/lpp_fifo_1/wen | |
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76 | add wave -noupdate -group FIFO_2 /tb/lpp_lfr_1/lpp_waveform_1/generate_all_fifo(2)/lpp_fifo_1/wdata | |
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77 | add wave -noupdate -group FIFO_2 /tb/lpp_lfr_1/lpp_waveform_1/generate_all_fifo(2)/lpp_fifo_1/empty | |
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78 | add wave -noupdate -group FIFO_2 /tb/lpp_lfr_1/lpp_waveform_1/generate_all_fifo(2)/lpp_fifo_1/full | |
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79 | add wave -noupdate -group FIFO_2 /tb/lpp_lfr_1/lpp_waveform_1/generate_all_fifo(2)/lpp_fifo_1/full_almost | |
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80 | add wave -noupdate -group FIFO_2 /tb/lpp_lfr_1/lpp_waveform_1/generate_all_fifo(2)/lpp_fifo_1/empty_threshold | |
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81 | add wave -noupdate -group FIFO_2 /tb/lpp_lfr_1/lpp_waveform_1/generate_all_fifo(2)/lpp_fifo_1/full_threshold | |
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82 | add wave -noupdate -group FIFO_3 /tb/lpp_lfr_1/lpp_waveform_1/generate_all_fifo(3)/lpp_fifo_1/reuse | |
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83 | add wave -noupdate -group FIFO_3 /tb/lpp_lfr_1/lpp_waveform_1/generate_all_fifo(3)/lpp_fifo_1/run | |
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84 | add wave -noupdate -group FIFO_3 /tb/lpp_lfr_1/lpp_waveform_1/generate_all_fifo(3)/lpp_fifo_1/ren | |
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85 | add wave -noupdate -group FIFO_3 /tb/lpp_lfr_1/lpp_waveform_1/generate_all_fifo(3)/lpp_fifo_1/rdata | |
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86 | add wave -noupdate -group FIFO_3 /tb/lpp_lfr_1/lpp_waveform_1/generate_all_fifo(3)/lpp_fifo_1/wen | |
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87 | add wave -noupdate -group FIFO_3 /tb/lpp_lfr_1/lpp_waveform_1/generate_all_fifo(3)/lpp_fifo_1/wdata | |
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88 | add wave -noupdate -group FIFO_3 /tb/lpp_lfr_1/lpp_waveform_1/generate_all_fifo(3)/lpp_fifo_1/empty | |
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89 | add wave -noupdate -group FIFO_3 /tb/lpp_lfr_1/lpp_waveform_1/generate_all_fifo(3)/lpp_fifo_1/full | |
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90 | add wave -noupdate -group FIFO_3 /tb/lpp_lfr_1/lpp_waveform_1/generate_all_fifo(3)/lpp_fifo_1/full_almost | |
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91 | add wave -noupdate -group FIFO_3 /tb/lpp_lfr_1/lpp_waveform_1/generate_all_fifo(3)/lpp_fifo_1/empty_threshold | |
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92 | add wave -noupdate -group FIFO_3 /tb/lpp_lfr_1/lpp_waveform_1/generate_all_fifo(3)/lpp_fifo_1/full_threshold | |
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93 | add wave -noupdate -expand -group WFP_FSMDMA_0 -group WFP_FSMDMA_dma -radix hexadecimal /tb/lpp_lfr_1/lpp_waveform_1/all_channel(0)/lpp_waveform_fsmdma_i/dma_fifo_valid_burst | |
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94 | add wave -noupdate -expand -group WFP_FSMDMA_0 -group WFP_FSMDMA_dma -radix hexadecimal /tb/lpp_lfr_1/lpp_waveform_1/all_channel(0)/lpp_waveform_fsmdma_i/dma_fifo_data | |
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95 | add wave -noupdate -expand -group WFP_FSMDMA_0 -group WFP_FSMDMA_dma -radix hexadecimal /tb/lpp_lfr_1/lpp_waveform_1/all_channel(0)/lpp_waveform_fsmdma_i/dma_fifo_ren | |
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96 | add wave -noupdate -expand -group WFP_FSMDMA_0 -group WFP_FSMDMA_dma -radix hexadecimal /tb/lpp_lfr_1/lpp_waveform_1/all_channel(0)/lpp_waveform_fsmdma_i/dma_buffer_new | |
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97 | add wave -noupdate -expand -group WFP_FSMDMA_0 -group WFP_FSMDMA_dma -radix hexadecimal /tb/lpp_lfr_1/lpp_waveform_1/all_channel(0)/lpp_waveform_fsmdma_i/dma_buffer_addr | |
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98 | add wave -noupdate -expand -group WFP_FSMDMA_0 -group WFP_FSMDMA_dma -radix hexadecimal /tb/lpp_lfr_1/lpp_waveform_1/all_channel(0)/lpp_waveform_fsmdma_i/dma_buffer_length | |
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99 | add wave -noupdate -expand -group WFP_FSMDMA_0 -group WFP_FSMDMA_dma -radix hexadecimal /tb/lpp_lfr_1/lpp_waveform_1/all_channel(0)/lpp_waveform_fsmdma_i/dma_buffer_full | |
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100 | add wave -noupdate -expand -group WFP_FSMDMA_0 -group WFP_FSMDMA_dma -radix hexadecimal /tb/lpp_lfr_1/lpp_waveform_1/all_channel(0)/lpp_waveform_fsmdma_i/dma_buffer_full_err | |
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101 | add wave -noupdate -expand -group WFP_FSMDMA_0 -expand -group WFP_FSMDMA_fifo -radix hexadecimal /tb/lpp_lfr_1/lpp_waveform_1/all_channel(0)/lpp_waveform_fsmdma_i/fifo_buffer_time | |
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102 | add wave -noupdate -expand -group WFP_FSMDMA_0 -expand -group WFP_FSMDMA_fifo /tb/lpp_lfr_1/lpp_waveform_1/all_channel(0)/lpp_waveform_fsmdma_i/fifo_data | |
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103 | add wave -noupdate -expand -group WFP_FSMDMA_0 -expand -group WFP_FSMDMA_fifo /tb/lpp_lfr_1/lpp_waveform_1/all_channel(0)/lpp_waveform_fsmdma_i/fifo_empty | |
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104 | add wave -noupdate -expand -group WFP_FSMDMA_0 -expand -group WFP_FSMDMA_fifo /tb/lpp_lfr_1/lpp_waveform_1/all_channel(0)/lpp_waveform_fsmdma_i/fifo_empty_threshold | |
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105 | add wave -noupdate -expand -group WFP_FSMDMA_0 -expand -group WFP_FSMDMA_fifo /tb/lpp_lfr_1/lpp_waveform_1/all_channel(0)/lpp_waveform_fsmdma_i/fifo_ren | |
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106 | add wave -noupdate -expand -group WFP_FSMDMA_0 -expand -group WFP_FSMDMA_reg /tb/lpp_lfr_1/lpp_waveform_1/all_channel(0)/lpp_waveform_fsmdma_i/status_buffer_ready | |
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107 | add wave -noupdate -expand -group WFP_FSMDMA_0 -expand -group WFP_FSMDMA_reg /tb/lpp_lfr_1/lpp_waveform_1/all_channel(0)/lpp_waveform_fsmdma_i/addr_buffer | |
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108 | add wave -noupdate -expand -group WFP_FSMDMA_0 -expand -group WFP_FSMDMA_reg /tb/lpp_lfr_1/lpp_waveform_1/all_channel(0)/lpp_waveform_fsmdma_i/length_buffer | |
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109 | add wave -noupdate -expand -group WFP_FSMDMA_0 -expand -group WFP_FSMDMA_reg /tb/lpp_lfr_1/lpp_waveform_1/all_channel(0)/lpp_waveform_fsmdma_i/ready_buffer | |
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110 | add wave -noupdate -expand -group WFP_FSMDMA_0 -expand -group WFP_FSMDMA_reg -radix hexadecimal /tb/lpp_lfr_1/lpp_waveform_1/all_channel(0)/lpp_waveform_fsmdma_i/buffer_time | |
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111 | add wave -noupdate -expand -group WFP_FSMDMA_0 -expand -group WFP_FSMDMA_reg /tb/lpp_lfr_1/lpp_waveform_1/all_channel(0)/lpp_waveform_fsmdma_i/error_buffer_full | |
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112 | add wave -noupdate -expand -group WFP_FSMDMA_0 /tb/lpp_lfr_1/lpp_waveform_1/all_channel(0)/lpp_waveform_fsmdma_i/state | |
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113 | add wave -noupdate -expand -group WFP_FSMDMA_0 /tb/lpp_lfr_1/lpp_waveform_1/all_channel(0)/lpp_waveform_fsmdma_i/burst_valid_s | |
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114 | add wave -noupdate /tb/lpp_lfr_1/lpp_lfr_apbreg_1/wfp_status_buffer_ready | |
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115 | add wave -noupdate /tb/lpp_lfr_1/lpp_lfr_apbreg_1/all_wfp_pointer(0)/lpp_apbreg_wfp_pointer_fi/reg0_status_ready_matrix | |
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116 | add wave -noupdate /tb/lpp_lfr_1/lpp_lfr_apbreg_1/all_wfp_pointer(0)/lpp_apbreg_wfp_pointer_fi/reg0_ready_matrix | |
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117 | add wave -noupdate /tb/lpp_lfr_1/lpp_lfr_apbreg_1/all_wfp_pointer(0)/lpp_apbreg_wfp_pointer_fi/reg0_addr_matrix | |
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118 | add wave -noupdate /tb/lpp_lfr_1/lpp_lfr_apbreg_1/all_wfp_pointer(0)/lpp_apbreg_wfp_pointer_fi/reg0_matrix_time | |
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119 | add wave -noupdate /tb/lpp_lfr_1/lpp_lfr_apbreg_1/all_wfp_pointer(0)/lpp_apbreg_wfp_pointer_fi/reg1_status_ready_matrix | |
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120 | add wave -noupdate /tb/lpp_lfr_1/lpp_lfr_apbreg_1/all_wfp_pointer(0)/lpp_apbreg_wfp_pointer_fi/reg1_ready_matrix | |
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121 | add wave -noupdate /tb/lpp_lfr_1/lpp_lfr_apbreg_1/all_wfp_pointer(0)/lpp_apbreg_wfp_pointer_fi/reg1_addr_matrix | |
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122 | add wave -noupdate /tb/lpp_lfr_1/lpp_lfr_apbreg_1/all_wfp_pointer(0)/lpp_apbreg_wfp_pointer_fi/reg1_matrix_time | |
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123 | add wave -noupdate /tb/lpp_lfr_1/lpp_lfr_apbreg_1/all_wfp_pointer(0)/lpp_apbreg_wfp_pointer_fi/ready_matrix | |
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124 | add wave -noupdate /tb/lpp_lfr_1/lpp_lfr_apbreg_1/all_wfp_pointer(0)/lpp_apbreg_wfp_pointer_fi/status_ready_matrix | |
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125 | add wave -noupdate /tb/lpp_lfr_1/lpp_lfr_apbreg_1/all_wfp_pointer(0)/lpp_apbreg_wfp_pointer_fi/addr_matrix | |
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126 | add wave -noupdate /tb/lpp_lfr_1/lpp_lfr_apbreg_1/all_wfp_pointer(0)/lpp_apbreg_wfp_pointer_fi/matrix_time | |
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127 | add wave -noupdate /tb/lpp_lfr_1/lpp_lfr_apbreg_1/all_wfp_pointer(0)/lpp_apbreg_wfp_pointer_fi/current_reg | |
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128 | add wave -noupdate -radix hexadecimal /tb/lpp_lfr_1/lpp_waveform_1/fifo_buffer_time | |
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129 | add wave -noupdate -radix hexadecimal /tb/lpp_lfr_1/lpp_waveform_1/arbiter_time_out | |
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130 | add wave -noupdate /tb/lpp_lfr_1/lpp_waveform_1/arbiter_time_out_new | |
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131 | add wave -noupdate -radix hexadecimal /tb/lpp_lfr_1/lpp_waveform_1/lpp_waveform_fifo_arbiter_1/time_sel | |
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132 | add wave -noupdate -expand -subitemconfig {/tb/lpp_lfr_1/lpp_waveform_1/lpp_waveform_fifo_arbiter_1/time_in(3) {-radix hexadecimal} /tb/lpp_lfr_1/lpp_waveform_1/lpp_waveform_fifo_arbiter_1/time_in(2) {-radix hexadecimal} /tb/lpp_lfr_1/lpp_waveform_1/lpp_waveform_fifo_arbiter_1/time_in(1) {-radix hexadecimal} /tb/lpp_lfr_1/lpp_waveform_1/lpp_waveform_fifo_arbiter_1/time_in(0) {-radix hexadecimal}} /tb/lpp_lfr_1/lpp_waveform_1/lpp_waveform_fifo_arbiter_1/time_in | |
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51 | 133 | TreeUpdate [SetDefaultTree] |
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52 |
WaveRestoreCursors {{Cursor 1} {1 |
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134 | WaveRestoreCursors {{Cursor 1} {111345088346 ps} 0} {{Cursor 2} {50435974615 ps} 0} {{Cursor 3} {4065545 ps} 0} {{Cursor 4} {83087041514 ps} 0} {{Cursor 5} {16894875474 ps} 0} | |
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53 | 135 | configure wave -namecolwidth 618 |
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54 |
configure wave -valuecolwidth |
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136 | configure wave -valuecolwidth 205 | |
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55 | 137 | configure wave -justifyvalue left |
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56 | 138 | configure wave -signalnamewidth 0 |
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57 | 139 | configure wave -snapdistance 10 |
@@ -64,6 +146,6 configure wave -griddelta 40 | |||
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64 | 146 | configure wave -timeline 0 |
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65 | 147 | configure wave -timelineunits ps |
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66 | 148 | update |
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67 |
WaveRestoreZoom {0 ps} { |
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149 | WaveRestoreZoom {4057109 ps} {4131134 ps} | |
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68 | 150 | bookmark add wave bookmark0 {{61745287067 ps} {63754655343 ps}} 0 |
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69 | 151 | bookmark add wave bookmark1 {{61745287067 ps} {63754655343 ps}} 0 |
@@ -60,7 +60,7 BEGIN | |||
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60 | 60 | buffer_full_err <= '0'; |
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61 | 61 | buffer_full <= '0'; |
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62 | 62 | IF burst_send = '1' THEN |
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63 | IF burst_send_counter_add1 < buffer_length THEN | |
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63 | IF unsigned(burst_send_counter_add1) < unsigned(buffer_length) THEN | |
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64 | 64 | burst_send_counter <= burst_send_counter_add1; |
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65 | 65 | ELSE |
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66 | 66 | buffer_full <= '1'; |
@@ -281,6 +281,8 ARCHITECTURE beh OF lpp_lfr IS | |||
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281 | 281 | SIGNAL dma_buffer_full_err : STD_LOGIC_VECTOR(4 DOWNTO 0); |
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282 | 282 | SIGNAL dma_grant_error : STD_LOGIC; |
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283 | 283 | |
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284 | ----------------------------------------------------------------------------- | |
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285 | SIGNAL run_dma : STD_LOGIC; | |
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284 | 286 | BEGIN |
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285 | 287 | |
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286 | 288 | sample_s(4 DOWNTO 0) <= sample_E(4 DOWNTO 0); |
@@ -487,7 +489,9 BEGIN | |||
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487 | 489 | Mem_use => Mem_use) |
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488 | 490 | PORT MAP ( |
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489 | 491 | clk => clk, |
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490 | rstn => ms_softandhard_rstn, --rstn, | |
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492 | --rstn => ms_softandhard_rstn, --rstn, | |
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493 | rstn => rstn, | |
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494 | ||
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491 | 495 |
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492 | 496 | |
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493 | 497 | coarse_time => coarse_time, |
@@ -535,6 +539,7 BEGIN | |||
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535 | 539 | matrix_time_f2 => matrix_time_f2); |
|
536 | 540 | |
|
537 | 541 | ----------------------------------------------------------------------------- |
|
542 | run_dma <= run_ms OR run; | |
|
538 | 543 | |
|
539 | 544 |
|
|
540 | 545 | GENERIC MAP ( |
@@ -542,7 +547,7 BEGIN | |||
|
542 | 547 | PORT MAP ( |
|
543 | 548 | clk => clk, |
|
544 | 549 | rstn => rstn, |
|
545 |
run => run_ |
|
|
550 | run => run_dma, | |
|
546 | 551 | ahbi => ahbi, |
|
547 | 552 | ahbo => ahbo, |
|
548 | 553 |
@@ -307,9 +307,10 BEGIN -- beh | |||
|
307 | 307 | |
|
308 | 308 | start_date <= reg_wp.start_date; |
|
309 | 309 | |
|
310 |
|
|
|
311 |
|
|
|
312 |
|
|
|
310 | length_matrix_f0 <= reg_sp.length_matrix; | |
|
311 | length_matrix_f1 <= reg_sp.length_matrix; | |
|
312 | length_matrix_f2 <= reg_sp.length_matrix; | |
|
313 | wfp_length_buffer <= reg_wp.length_buffer; | |
|
313 | 314 | |
|
314 | 315 | |
|
315 | 316 | lpp_lfr_apbreg : PROCESS (HCLK, HRESETn) |
@@ -318,7 +319,7 BEGIN -- beh | |||
|
318 | 319 | IF HRESETn = '0' THEN -- asynchronous reset (active low) |
|
319 | 320 | reg_sp.config_active_interruption_onNewMatrix <= '0'; |
|
320 | 321 | reg_sp.config_active_interruption_onError <= '0'; |
|
321 |
reg_sp.config_ms_run <= ' |
|
|
322 | reg_sp.config_ms_run <= '0'; | |
|
322 | 323 | reg_sp.status_ready_matrix_f0_0 <= '0'; |
|
323 | 324 | reg_sp.status_ready_matrix_f1_0 <= '0'; |
|
324 | 325 | reg_sp.status_ready_matrix_f2_0 <= '0'; |
@@ -382,6 +383,8 BEGIN -- beh | |||
|
382 | 383 | reg_wp.nb_snapshot_param <= (OTHERS => '0'); |
|
383 | 384 | reg_wp.start_date <= (OTHERS => '0'); |
|
384 | 385 | |
|
386 | reg_wp.status_ready_buffer_f <= (OTHERS => '0'); | |
|
387 | reg_wp.length_buffer <= (OTHERS => '0'); | |
|
385 | 388 | ELSIF HCLK'EVENT AND HCLK = '1' THEN -- rising clock edge |
|
386 | 389 | |
|
387 | 390 | -- status_full_ack <= (OTHERS => '0'); |
@@ -490,13 +493,13 BEGIN -- beh | |||
|
490 | 493 | prdata(7) <= reg_wp.run; |
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491 | 494 | --22 |
|
492 | 495 | --ON GOING \/ |
|
493 | WHEN "010111" => prdata <= reg_wp.addr_buffer_f(32*1-1 DOWNTO 32*0); | |
|
496 | WHEN "010111" => prdata <= reg_wp.addr_buffer_f(32*1-1 DOWNTO 32*0);--0 | |
|
494 | 497 | WHEN "011000" => prdata <= reg_wp.addr_buffer_f(32*2-1 DOWNTO 32*1); |
|
495 | WHEN "011001" => prdata <= reg_wp.addr_buffer_f(32*3-1 DOWNTO 32*2); | |
|
498 | WHEN "011001" => prdata <= reg_wp.addr_buffer_f(32*3-1 DOWNTO 32*2);--1 | |
|
496 | 499 | WHEN "011010" => prdata <= reg_wp.addr_buffer_f(32*4-1 DOWNTO 32*3); |
|
497 | WHEN "011011" => prdata <= reg_wp.addr_buffer_f(32*5-1 DOWNTO 32*4); | |
|
500 | WHEN "011011" => prdata <= reg_wp.addr_buffer_f(32*5-1 DOWNTO 32*4);--2 | |
|
498 | 501 | WHEN "011100" => prdata <= reg_wp.addr_buffer_f(32*6-1 DOWNTO 32*5); |
|
499 | WHEN "011101" => prdata <= reg_wp.addr_buffer_f(32*7-1 DOWNTO 32*6); | |
|
502 | WHEN "011101" => prdata <= reg_wp.addr_buffer_f(32*7-1 DOWNTO 32*6);--3 | |
|
500 | 503 | WHEN "011110" => prdata <= reg_wp.addr_buffer_f(32*8-1 DOWNTO 32*7); |
|
501 | 504 | --ON GOING /\ |
|
502 | 505 | WHEN "011111" => prdata(7 DOWNTO 0) <= reg_wp.status_ready_buffer_f; |
@@ -525,20 +528,23 BEGIN -- beh | |||
|
525 | 528 | WHEN "101001" => prdata(31 DOWNTO 0) <= reg_wp.time_buffer_f(48*0+47 DOWNTO 48*0+16); |
|
526 | 529 | WHEN "101010" => prdata(15 DOWNTO 0) <= reg_wp.time_buffer_f(48*1+15 DOWNTO 48*1); |
|
527 | 530 | WHEN "101011" => prdata(31 DOWNTO 0) <= reg_wp.time_buffer_f(48*1+47 DOWNTO 48*1+16); |
|
531 | ||
|
528 | 532 |
|
|
529 |
WHEN "1011 |
|
|
530 |
WHEN "10111 |
|
|
531 |
WHEN "1 |
|
|
533 | WHEN "101101" => prdata(31 DOWNTO 0) <= reg_wp.time_buffer_f(48*2+47 DOWNTO 48*2+16); | |
|
534 | WHEN "101110" => prdata(15 DOWNTO 0) <= reg_wp.time_buffer_f(48*3+15 DOWNTO 48*3); | |
|
535 | WHEN "101111" => prdata(31 DOWNTO 0) <= reg_wp.time_buffer_f(48*3+47 DOWNTO 48*3+16); | |
|
532 | 536 | |
|
533 |
WHEN "11000 |
|
|
534 |
WHEN "11 |
|
|
535 |
WHEN "11001 |
|
|
536 |
WHEN "110 |
|
|
537 | WHEN "110101" => prdata(15 DOWNTO 0) <= reg_wp.time_buffer_f(48*6+15 DOWNTO 48*6); | |
|
538 |
|
|
|
539 |
WHEN "1101 |
|
|
540 |
WHEN "11 |
|
|
541 |
WHEN "11 |
|
|
537 | WHEN "110000" => prdata(15 DOWNTO 0) <= reg_wp.time_buffer_f(48*4+15 DOWNTO 48*4); | |
|
538 | WHEN "110001" => prdata(31 DOWNTO 0) <= reg_wp.time_buffer_f(48*4+47 DOWNTO 48*4+16); | |
|
539 | WHEN "110010" => prdata(15 DOWNTO 0) <= reg_wp.time_buffer_f(48*5+15 DOWNTO 48*5); | |
|
540 | WHEN "110011" => prdata(31 DOWNTO 0) <= reg_wp.time_buffer_f(48*5+47 DOWNTO 48*5+16); | |
|
541 | ||
|
542 | WHEN "110100" => prdata(15 DOWNTO 0) <= reg_wp.time_buffer_f(48*6+15 DOWNTO 48*6); | |
|
543 | WHEN "110101" => prdata(31 DOWNTO 0) <= reg_wp.time_buffer_f(48*6+47 DOWNTO 48*6+16); | |
|
544 | WHEN "110110" => prdata(15 DOWNTO 0) <= reg_wp.time_buffer_f(48*7+15 DOWNTO 48*7); | |
|
545 | WHEN "110111" => prdata(31 DOWNTO 0) <= reg_wp.time_buffer_f(48*7+47 DOWNTO 48*7+16); | |
|
546 | ||
|
547 | WHEN "111000" => prdata(25 DOWNTO 0) <= reg_wp.length_buffer; | |
|
542 | 548 | |
|
543 | 549 | -- WHEN "100100" => prdata(nb_word_by_buffer_size-1 DOWNTO 0) <= reg_wp.nb_word_by_buffer; |
|
544 | 550 | ---------------------------------------------------- |
@@ -617,7 +623,7 BEGIN -- beh | |||
|
617 | 623 | WHEN "100110" => reg_wp.nb_snapshot_param <= apbi.pwdata(nb_snapshot_param_size-1 DOWNTO 0); |
|
618 | 624 | WHEN "100111" => reg_wp.start_date <= apbi.pwdata(30 DOWNTO 0); |
|
619 | 625 | |
|
620 |
WHEN "11100 |
|
|
626 | WHEN "111000" => reg_wp.length_buffer <= apbi.pwdata(25 DOWNTO 0); | |
|
621 | 627 | |
|
622 | 628 | |
|
623 | 629 | |
@@ -658,7 +664,7 BEGIN -- beh | |||
|
658 | 664 | ----------------------------------------------------------------------------- |
|
659 | 665 | -- IRQ |
|
660 | 666 | ----------------------------------------------------------------------------- |
|
661 |
irq_wfp_reg_s <= wfp_ |
|
|
667 | irq_wfp_reg_s <= wfp_ready_buffer & wfp_error_buffer_full & status_new_err; | |
|
662 | 668 | |
|
663 | 669 | PROCESS (HCLK, HRESETn) |
|
664 | 670 | BEGIN -- PROCESS |
@@ -767,4 +773,4 BEGIN -- beh | |||
|
767 | 773 | END GENERATE all_wfp_pointer; |
|
768 | 774 | ----------------------------------------------------------------------------- |
|
769 | 775 | |
|
770 | END beh; No newline at end of file | |
|
776 | END beh; |
@@ -45,7 +45,7 ENTITY lpp_lfr_ms IS | |||
|
45 | 45 | dma_fifo_burst_valid: OUT STD_LOGIC; --TODO |
|
46 | 46 | dma_fifo_data : OUT STD_LOGIC_VECTOR(31 DOWNTO 0); --TODO |
|
47 | 47 | dma_fifo_ren : IN STD_LOGIC; --TODO |
|
48 | dma_buffer_new : OUT STD_LOGIC; --TODO | |
|
48 | dma_buffer_new : OUT STD_LOGIC; --TODOx | |
|
49 | 49 | dma_buffer_addr : OUT STD_LOGIC_VECTOR(31 DOWNTO 0); --TODO |
|
50 | 50 | dma_buffer_length : OUT STD_LOGIC_VECTOR(25 DOWNTO 0); --TODO |
|
51 | 51 | dma_buffer_full : IN STD_LOGIC; --TODO |
@@ -965,7 +965,7 BEGIN | |||
|
965 | 965 | |
|
966 | 966 | FSM_DMA_fifo_empty_threshold <= MEM_OUT_SM_Empty_Threshold(0) WHEN fifo_ongoing = '0' AND fifo_0_ready = '1' ELSE |
|
967 | 967 | MEM_OUT_SM_Empty_Threshold(1) WHEN fifo_ongoing = '1' AND fifo_1_ready = '1' ELSE |
|
968 |
|
|
|
968 | '1'; | |
|
969 | 969 | |
|
970 | 970 | ----------------------------------------------------------------------------- |
|
971 | 971 | -- fifo_matrix_type => FSM_DMA_fifo_status(5 DOWNTO 4), --IN |
@@ -1141,4 +1141,4 BEGIN | |||
|
1141 | 1141 | |
|
1142 | 1142 | ----------------------------------------------------------------------------- |
|
1143 | 1143 | |
|
1144 | END Behavioral; No newline at end of file | |
|
1144 | END Behavioral; |
@@ -107,7 +107,7 BEGIN | |||
|
107 | 107 | |
|
108 | 108 | fifo_ren <= dma_fifo_ren WHEN state = ONGOING ELSE '1'; |
|
109 | 109 | dma_fifo_data <= fifo_data; |
|
110 |
dma_fifo_valid_burst <= burst_valid_s WHEN state = ONGOING ELSE ' |
|
|
110 | dma_fifo_valid_burst <= burst_valid_s WHEN state = ONGOING ELSE '0'; | |
|
111 | 111 | |
|
112 | 112 | PROCESS (clk, rstn) |
|
113 | 113 | BEGIN -- PROCESS |
@@ -128,6 +128,7 BEGIN | |||
|
128 | 128 | ready_matrix_f1 <= '0'; |
|
129 | 129 | ready_matrix_f2 <= '0'; |
|
130 | 130 | IF run = '1' THEN |
|
131 | dma_buffer_new <= '0'; | |
|
131 | 132 | CASE state IS |
|
132 | 133 | WHEN IDLE => |
|
133 | 134 | IF fifo_empty = '0' THEN |
@@ -188,7 +188,7 PACKAGE lpp_lfr_pkg IS | |||
|
188 | 188 | GENERIC ( |
|
189 | 189 | Mem_use : INTEGER; |
|
190 | 190 | nb_data_by_buffer_size : INTEGER; |
|
191 | nb_word_by_buffer_size : INTEGER; | |
|
191 | -- nb_word_by_buffer_size : INTEGER; | |
|
192 | 192 | nb_snapshot_param_size : INTEGER; |
|
193 | 193 | delta_vector_size : INTEGER; |
|
194 | 194 | delta_vector_size_f0_2 : INTEGER; |
@@ -212,11 +212,7 PACKAGE lpp_lfr_pkg IS | |||
|
212 | 212 | ahbo : OUT AHB_Mst_Out_Type; |
|
213 | 213 | coarse_time : IN STD_LOGIC_VECTOR(31 DOWNTO 0); |
|
214 | 214 | fine_time : IN STD_LOGIC_VECTOR(15 DOWNTO 0); |
|
215 |
data_shaping_BW : OUT STD_LOGIC |
|
|
216 | -- | |
|
217 | observation_vector_0: OUT STD_LOGIC_VECTOR(11 DOWNTO 0); | |
|
218 | observation_vector_1: OUT STD_LOGIC_VECTOR(11 DOWNTO 0); | |
|
219 | observation_reg : OUT STD_LOGIC_VECTOR(31 DOWNTO 0) | |
|
215 | data_shaping_BW : OUT STD_LOGIC | |
|
220 | 216 | ); |
|
221 | 217 | END COMPONENT; |
|
222 | 218 |
@@ -175,7 +175,8 BEGIN | |||
|
175 | 175 | data_2 WHEN sel(2) = '1' ELSE |
|
176 | 176 | data_3; |
|
177 | 177 | |
|
178 |
all_time_bit: FOR I IN |
|
|
178 | all_time_bit: FOR I IN 47 DOWNTO 0 GENERATE | |
|
179 | ||
|
179 | 180 |
|
|
180 | 181 | time_in(1,I) WHEN sel(1) = '1' ELSE |
|
181 | 182 | time_in(2,I) WHEN sel(2) = '1' ELSE |
@@ -30,8 +30,7 USE lpp.general_purpose.ALL; | |||
|
30 | 30 | ENTITY lpp_waveform_fifo_arbiter_reg IS |
|
31 | 31 | GENERIC( |
|
32 | 32 | data_size : INTEGER; |
|
33 | data_nb : INTEGER | |
|
34 | ); | |
|
33 | data_nb : INTEGER); | |
|
35 | 34 | PORT( |
|
36 | 35 |
clk |
|
37 | 36 |
rstn |
@@ -64,7 +63,7 BEGIN | |||
|
64 | 63 | BEGIN -- PROCESS |
|
65 | 64 | IF rstn = '0' THEN -- asynchronous reset (active low) |
|
66 | 65 | reg(I) <= 0; |
|
67 |
ELSIF clk' |
|
|
66 | ELSIF clk'EVENT AND clk = '1' THEN -- rising clock edge | |
|
68 | 67 | IF run = '0' THEN |
|
69 | 68 | reg(I) <= 0; |
|
70 | 69 | ELSE |
@@ -144,26 +144,6 PACKAGE lpp_waveform_pkg IS | |||
|
144 | 144 | data_f2_in : IN STD_LOGIC_VECTOR(data_size-1 DOWNTO 0); |
|
145 | 145 | data_f3_in_valid : IN STD_LOGIC; |
|
146 | 146 | data_f3_in : IN STD_LOGIC_VECTOR(data_size-1 DOWNTO 0); |
|
147 | data_f0_addr_out : OUT STD_LOGIC_VECTOR(31 DOWNTO 0); | |
|
148 | data_f0_data_out : OUT STD_LOGIC_VECTOR(31 DOWNTO 0); | |
|
149 | data_f0_data_out_valid : OUT STD_LOGIC; | |
|
150 | data_f0_data_out_valid_burst : OUT STD_LOGIC; | |
|
151 | data_f0_data_out_ren : IN STD_LOGIC; | |
|
152 | data_f1_addr_out : OUT STD_LOGIC_VECTOR(31 DOWNTO 0); | |
|
153 | data_f1_data_out : OUT STD_LOGIC_VECTOR(31 DOWNTO 0); | |
|
154 | data_f1_data_out_valid : OUT STD_LOGIC; | |
|
155 | data_f1_data_out_valid_burst : OUT STD_LOGIC; | |
|
156 | data_f1_data_out_ren : IN STD_LOGIC; | |
|
157 | data_f2_addr_out : OUT STD_LOGIC_VECTOR(31 DOWNTO 0); | |
|
158 | data_f2_data_out : OUT STD_LOGIC_VECTOR(31 DOWNTO 0); | |
|
159 | data_f2_data_out_valid : OUT STD_LOGIC; | |
|
160 | data_f2_data_out_valid_burst : OUT STD_LOGIC; | |
|
161 | data_f2_data_out_ren : IN STD_LOGIC; | |
|
162 | data_f3_addr_out : OUT STD_LOGIC_VECTOR(31 DOWNTO 0); | |
|
163 | data_f3_data_out : OUT STD_LOGIC_VECTOR(31 DOWNTO 0); | |
|
164 | data_f3_data_out_valid : OUT STD_LOGIC; | |
|
165 | data_f3_data_out_valid_burst : OUT STD_LOGIC; | |
|
166 | data_f3_data_out_ren : IN STD_LOGIC; | |
|
167 | 147 | |
|
168 | 148 | dma_fifo_valid_burst : OUT STD_LOGIC_VECTOR(3 DOWNTO 0); |
|
169 | 149 | dma_fifo_data : OUT STD_LOGIC_VECTOR(32*4-1 DOWNTO 0); |
@@ -358,9 +338,7 PACKAGE lpp_waveform_pkg IS | |||
|
358 | 338 | enable : IN STD_LOGIC; |
|
359 | 339 | sel : IN STD_LOGIC_VECTOR(data_nb-1 DOWNTO 0); |
|
360 | 340 | data : OUT STD_LOGIC_VECTOR(data_size-1 DOWNTO 0); |
|
361 | data_s : OUT STD_LOGIC_VECTOR(data_size-1 DOWNTO 0); | |
|
362 | time_out : OUT STD_LOGIC_VECTOR(47 DOWNTO 0); | |
|
363 | time_out_new : OUT STD_LOGIC_VECTOR(3 DOWNTO 0)); | |
|
341 | data_s : OUT STD_LOGIC_VECTOR(data_size-1 DOWNTO 0)); | |
|
364 | 342 | END COMPONENT; |
|
365 | 343 | |
|
366 | 344 | COMPONENT lpp_waveform_fsmdma |
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