HG_REPOSITORIES/LPP/INSTRUMENTATION/USERS/PELLION/VHD_Lib Commit - r646:c09604c7535a

Make vsim target now works on windows.

Alexis Jeandet -

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r646:c09604c7535a

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tests/Validation_IIR_f0_LFR/generate.py created 644 +7 0

@@ -0,0 +1,7
	1	import numpy as np
	2	import random
	3
	4	W,H=8,100000
	5	test = np.ones((H,W))[(random.random()65535)-32768 for col in range(W)]
	6	np.savetxt("input.txt", test,fmt="%d", delimiter=" ")
	7

tests/Validation_IIR_f1_LFR/generate.py created 644 +7 0

@@ -0,0 +1,7
	1	import numpy as np
	2	import random
	3
	4	W,H=8,100000
	5	test = np.ones((H,W))[(random.random()65535)-32768 for col in range(W)]
	6	np.savetxt("input.txt", test,fmt="%d", delimiter=" ")
	7

tests/Validation_LFR_Filters/generate.py created 644 +7 0

@@ -0,0 +1,7
	1	import numpy as np
	2	import random
	3
	4	W,H=8,100000
	5	test = np.ones((H,W))[(random.random()65535)-32768 for col in range(W)]
	6	np.savetxt("input.txt", test,fmt="%d", delimiter=" ")
	7

tests/Validation_IIR_f0_LFR/Makefile +20 -5

             VHDLIB=../..
             SCRIPTSDIR=$(VHDLIB)/scripts/
             GRLIB := $(shell sh $(VHDLIB)/scripts/lpp_relpath.sh)
             TOP=testbench
             BOARD=LFR-EQM
             include $(VHDLIB)/boards/$(BOARD)/Makefile_RTAX.inc
             DEVICE=$(PART)-$(PACKAGE)$(SPEED)
             UCF=
             QSF=
             EFFORT=high
             XSTOPT=
             SYNPOPT=
             VHDLSYNFILES=
             VHDLSIMFILES= tb.vhd
             SIMTOP=testbench
             CLEAN=soft-clean
             TECHLIBS = axcelerator
             LIBSKIP = core1553bbc core1553brm core1553brt gr1553 corePCIF \
-            	tmtc openchip hynix ihp gleichmann micron usbhc  opencores
+            	tmtc openchip hynix ihp gleichmann micron usbhc  opencores fmf ftlib gsi
             DIRSKIP = b1553 pcif leon2 leon3v3 leon2ft crypto satcan ddr usb ata i2c \
-            	pci grusbhc haps slink ascs can pwm greth coremp7 spi ac97 \
+            	pci grusbhc haps slink ascs can pwm greth coremp7 spi ac97 srmmu atf \
+            	grlfpc \
             	./dsp/lpp_fft_rtax \
             	./amba_lcd_16x2_ctrlr \
             	./general_purpose/lpp_AMR \
             	./general_purpose/lpp_balise \
             	./general_purpose/lpp_delay \
             	./lpp_bootloader \
             	./lfr_management \
             	./lpp_sim/CY7C1061DV33 \
             	./lpp_cna \
             	./lpp_uart \
             	./lpp_usb \
             	./dsp/lpp_fft \
             	./lpp_leon3_soc \
             	./lpp_debug_lfr
             FILESKIP = i2cmst.vhd \
             	APB_MULTI_DIODE.vhd \
             	APB_MULTI_DIODE.vhd \
             	Top_MatrixSpec.vhd \
             	APB_FFT.vhd \
-                    lpp_lfr_ms_FFT.vhd \
+            	lpp_lfr_ms_FFT.vhd \
             	lpp_lfr_apbreg.vhd \
             	CoreFFT.vhd \
             	lpp_lfr_ms.vhd \
-            	lpp_lfr_sim_pkg.vhd
+            	lpp_lfr_sim_pkg.vhd \
+            	mtie_maps.vhd \
+            	ftsrctrlc.vhd \
+            	ftsdctrl.vhd \
+            	ftsrctrl8.vhd \
+            	ftmctrl.vhd \
+            	ftsdctrl64.vhd \
+            	ftahbram.vhd \
+            	ftahbram2.vhd \
+            	sramft.vhd \
+            	nandfctrlx.vhd
             include $(GRLIB)/bin/Makefile
             include $(GRLIB)/software/leon3/Makefile
             ##################  project specific targets ##########################
             distclean:myclean
+            vsim:cp_for_vsim
             myclean:
             	rm -f input.txt output_fx.txt
             	rm -rf ./2016*
             generate :
-            	xonsh ./generate.xsh
+            	python ./generate.py
+            cp_for_vsim: generate
+            	cp ./input.txt simulation/
             archivate:
             	xonsh ./archivate.xsh
             test: | generate ghdl ghdl-run archivate

tests/Validation_IIR_f0_LFR/tb.vhd +1 -1

             LIBRARY ieee;
             USE ieee.std_logic_1164.ALL;
             USE ieee.numeric_std.ALL;
             USE IEEE.std_logic_signed.ALL;
             USE IEEE.MATH_real.ALL;
             LIBRARY techmap;
             USE techmap.gencomp.ALL;
             LIBRARY std;
             USE std.textio.ALL;
             LIBRARY lpp;
             USE lpp.iir_filter.ALL;
             USE lpp.lpp_ad_conv.ALL;
             USE lpp.FILTERcfg.ALL;
             USE lpp.lpp_lfr_filter_coeff.ALL;
             USE lpp.general_purpose.ALL;
             USE lpp.data_type_pkg.ALL;
             USE lpp.lpp_lfr_pkg.ALL;
             USE lpp.general_purpose.ALL;
             USE lpp.lpp_sim_pkg.ALL;
             ENTITY testbench IS
             GENERIC(
                 tech          : INTEGER := 0; --axcel,0
                 Mem_use       : INTEGER := use_CEL --use_RAM,use_CEL
             );
             END;
             ARCHITECTURE behav OF testbench IS
               CONSTANT ChanelCount   : INTEGER := 8;
               CONSTANT Coef_SZ       : INTEGER := 9;
               CONSTANT CoefCntPerCel : INTEGER := 6;
               CONSTANT CoefPerCel    : INTEGER := 5;
               CONSTANT Cels_count    : INTEGER := 5;
               SIGNAL sample     : samplT(ChanelCount-1 DOWNTO 0, 17 DOWNTO 0);
               SIGNAL sample_val : STD_LOGIC;
               SIGNAL sample_fx     : samplT(ChanelCount-1 DOWNTO 0, 17 DOWNTO 0);
               SIGNAL sample_fx_val : STD_LOGIC;
               SIGNAL TSTAMP    : INTEGER   := 0;
               SIGNAL clk       : STD_LOGIC := '0';
               SIGNAL clk_98304Hz   : STD_LOGIC := '0';
               SIGNAL clk_98304Hz_r : STD_LOGIC := '0';
               SIGNAL rstn      : STD_LOGIC;
               SIGNAL signal_gen : sample_vector(0 to ChanelCount-1,17 downto 0);
               SIGNAL sample_fx_wdata : Samples(ChanelCount-1 DOWNTO 0);
               SIGNAL signal_rec : sample_vector(0 to ChanelCount-1,15 downto 0);
               SIGNAL end_of_simu : STD_LOGIC := '0';
-              CONSTANT half_samplig_period : time := INTEGER( REAL(1000**4) / REAL(24576.0*4.0*2)) * 1 ps;
+              CONSTANT half_samplig_period : time :=  5086263 ps;--INTEGER( REAL(1000**4) / REAL(24576.0*4.0*2)) * 1 ps;
             BEGIN
               -----------------------------------------------------------------------------
               -- CLOCK and RESET
               -----------------------------------------------------------------------------
               PROCESS
               BEGIN  -- PROCESS
                 WAIT UNTIL clk = '1';
                 rstn <= '0';
                 WAIT UNTIL clk = '1';
                 WAIT UNTIL clk = '1';
                 WAIT UNTIL clk = '1';
                 rstn <= '1';
                 WAIT UNTIL end_of_simu = '1';
                 WAIT UNTIL clk = '1';
                 assert false report "end of test" severity note;
                 --  Wait forever; this will finish the simulation.
                 wait;
               END PROCESS;
               -----------------------------------------------------------------------------
               clk_98304Hz_gen:PROCESS
               BEGIN
                 IF end_of_simu /= '1' THEN
                   clk_98304Hz <= NOT clk_98304Hz;
                   WAIT FOR half_samplig_period;
                 ELSE
                   assert false report "end of test" severity note;
                   WAIT;
                 END IF;
               END PROCESS;
               clk_25M_gen:PROCESS
               BEGIN
                 IF end_of_simu /= '1' THEN
                   clk <= NOT clk;
                   TSTAMP <= TSTAMP+20;
                   WAIT FOR 20 ns;
                 ELSE
                   assert false report "end of test" severity note;
                   WAIT;
                 END IF;
               END PROCESS;
               -----------------------------------------------------------------------------
               -- LPP_LFR_FILTER f0
               -----------------------------------------------------------------------------
               IIR_CEL_CTRLR_v2_1 : IIR_CEL_CTRLR_v2
                 GENERIC MAP (
                   tech         => tech,
                   Mem_use      => Mem_use,
                   Sample_SZ    => 18,
                   Coef_SZ      => Coef_SZ,
                   Coef_Nb      => 25,
                   Coef_sel_SZ  => 5,
                   Cels_count   => Cels_count,
                   ChanelsCount => ChanelCount,
                   FILENAME     => "")
                 PORT MAP (
                   rstn     => rstn,
                   clk      => clk,
                   virg_pos => 7,
                   coefs    => CoefsInitValCst_v2,
                   sample_in_val  => sample_val,
                   sample_in      => sample,
                   sample_out_val => sample_fx_val,
                   sample_out     => sample_fx);
               -----------------------------------------------------------------------------
               -----------------------------------------------------------------------------
               -- SAMPLE GENERATION
               -----------------------------------------------------------------------------
               PROCESS (clk, rstn)
               BEGIN  -- PROCESS
                 IF rstn = '0' THEN                  -- asynchronous reset (active low)
                   sample_val <= '0';
                   clk_98304Hz_r  <= '0';
                 ELSIF clk'EVENT AND clk = '1' THEN  -- rising clock edge
                   clk_98304Hz_r <= clk_98304Hz;
                   IF clk_98304Hz = '1' AND clk_98304Hz_r = '0' THEN
                     sample_val <= '1';
                   ELSE
                     sample_val <= '0';
                   END IF;
                 END IF;
               END PROCESS;
               -----------------------------------------------------------------------------
               ChanelLoop : FOR i IN 0 TO ChanelCount-1 GENERATE
                 SampleLoop : FOR j IN 0 TO 15 GENERATE
                   sample_fx_wdata(i)(j) <= sample_fx(i,j);
                   signal_rec(i,j) <= sample_fx_wdata(i)(j);
                   sample(i,j) <= signal_gen(i,j);
                 END GENERATE;
                   sample(i,16) <= signal_gen(i,16);
                   sample(i,17) <= signal_gen(i,17);
               END GENERATE;
               -----------------------------------------------------------------------------
               --  READ INPUT SIGNALS
               -----------------------------------------------------------------------------
               gen: sig_reader
               GENERIC MAP(
                     FNAME       => "input.txt",
                     WIDTH       => ChanelCount,
                     RESOLUTION  => 18,
                     GAIN        => 1.0
                 )
                 PORT MAP(
                     clk             => sample_val,
                     end_of_simu     => end_of_simu,
                     out_signal      => signal_gen
                 );
               -----------------------------------------------------------------------------
               --  RECORD OUTPUT SIGNALS
               -----------------------------------------------------------------------------
               rec : sig_recorder
               GENERIC MAP(
                   FNAME       => "output_fx.txt",
                   WIDTH       => ChanelCount,
                   RESOLUTION  => 16
               )
               PORT MAP(
                   clk             => sample_fx_val,
                   end_of_simu     => end_of_simu,
                   timestamp       => TSTAMP,
                   input_signal    => signal_rec
               );
             END;

tests/Validation_IIR_f1_LFR/Makefile +20 -5

             VHDLIB=../..
             SCRIPTSDIR=$(VHDLIB)/scripts/
             GRLIB := $(shell sh $(VHDLIB)/scripts/lpp_relpath.sh)
             TOP=testbench
             BOARD=LFR-EQM
             include $(VHDLIB)/boards/$(BOARD)/Makefile_RTAX.inc
             DEVICE=$(PART)-$(PACKAGE)$(SPEED)
             UCF=
             QSF=
             EFFORT=high
             XSTOPT=
             SYNPOPT=
             VHDLSYNFILES=
             VHDLSIMFILES= tb.vhd
             SIMTOP=testbench
             CLEAN=soft-clean
             TECHLIBS = axcelerator
             LIBSKIP = core1553bbc core1553brm core1553brt gr1553 corePCIF \
-            	tmtc openchip hynix ihp gleichmann micron usbhc  opencores
+            	tmtc openchip hynix ihp gleichmann micron usbhc  opencores fmf ftlib gsi
             DIRSKIP = b1553 pcif leon2 leon3v3 leon2ft crypto satcan ddr usb ata i2c \
-            	pci grusbhc haps slink ascs can pwm greth coremp7 spi ac97 \
+            	pci grusbhc haps slink ascs can pwm greth coremp7 spi ac97 srmmu atf \
+            	grlfpc \
             	./dsp/lpp_fft_rtax \
             	./amba_lcd_16x2_ctrlr \
             	./general_purpose/lpp_AMR \
             	./general_purpose/lpp_balise \
             	./general_purpose/lpp_delay \
             	./lpp_bootloader \
             	./lfr_management \
             	./lpp_sim/CY7C1061DV33 \
             	./lpp_cna \
             	./lpp_uart \
             	./lpp_usb \
             	./dsp/lpp_fft \
             	./lpp_leon3_soc \
             	./lpp_debug_lfr
             FILESKIP = i2cmst.vhd \
             	APB_MULTI_DIODE.vhd \
             	APB_MULTI_DIODE.vhd \
             	Top_MatrixSpec.vhd \
             	APB_FFT.vhd \
-                    lpp_lfr_ms_FFT.vhd \
+            	lpp_lfr_ms_FFT.vhd \
             	lpp_lfr_apbreg.vhd \
             	CoreFFT.vhd \
             	lpp_lfr_ms.vhd \
-            	lpp_lfr_sim_pkg.vhd
+            	lpp_lfr_sim_pkg.vhd \
+            	mtie_maps.vhd \
+            	ftsrctrlc.vhd \
+            	ftsdctrl.vhd \
+            	ftsrctrl8.vhd \
+            	ftmctrl.vhd \
+            	ftsdctrl64.vhd \
+            	ftahbram.vhd \
+            	ftahbram2.vhd \
+            	sramft.vhd \
+            	nandfctrlx.vhd
             include $(GRLIB)/bin/Makefile
             include $(GRLIB)/software/leon3/Makefile
             ##################  project specific targets ##########################
             distclean:myclean
+            vsim:cp_for_vsim
             myclean:
             	rm -f input.txt output_fx.txt
             	rm -rf ./2016*
             generate :
-            	xonsh ./generate.xsh
+            	python ./generate.py
+            cp_for_vsim: generate
+            	cp ./input.txt simulation/
             archivate:
             	xonsh ./archivate.xsh
             test: | generate ghdl ghdl-run archivate

tests/Validation_IIR_f1_LFR/tb.vhd +1 -1

             LIBRARY ieee;
             USE ieee.std_logic_1164.ALL;
             USE ieee.numeric_std.ALL;
             USE IEEE.std_logic_signed.ALL;
             USE IEEE.MATH_real.ALL;
             LIBRARY techmap;
             USE techmap.gencomp.ALL;
             LIBRARY std;
             USE std.textio.ALL;
             LIBRARY lpp;
             USE lpp.iir_filter.ALL;
             USE lpp.lpp_ad_conv.ALL;
             USE lpp.FILTERcfg.ALL;
             USE lpp.lpp_lfr_filter_coeff.ALL;
             USE lpp.general_purpose.ALL;
             USE lpp.data_type_pkg.ALL;
             USE lpp.lpp_lfr_pkg.ALL;
             USE lpp.general_purpose.ALL;
             USE lpp.lpp_sim_pkg.ALL;
             USE lpp.lpp_waveform_pkg.ALL;
             ENTITY testbench IS
             GENERIC(
                 tech          : INTEGER := 0; --axcel,0
                 Mem_use       : INTEGER := use_CEL --use_RAM,use_CEL
             );
             END;
             ARCHITECTURE behav OF testbench IS
              -----------------------------------------------------------------------------
               -- CONFIG FILTER IIR f0 to f1
               -----------------------------------------------------------------------------
               CONSTANT f0_to_f1_CEL_NUMBER           : INTEGER := 5;
               CONSTANT f0_to_f1_COEFFICIENT_SIZE     : INTEGER := 10;
               CONSTANT f0_to_f1_POINT_POSITION       : INTEGER := 8;
               CONSTANT f0_to_f1_sos : COEFF_CEL_ARRAY_REAL(1 TO 5) :=
                 (
                   (1.0, -1.61171504942096,  1.0, 1.0, -1.68876443778669,  0.908610171614583),
                   (1.0, -1.53324505744412,  1.0, 1.0, -1.51088513595779,  0.732564401274351),
                   (1.0, -1.30646173160060,  1.0, 1.0, -1.30571711968384,  0.546869268827102),
                   (1.0, -0.651038739239370, 1.0, 1.0, -1.08747326287406,  0.358436944718464),
                   (1.0,  1.24322747034001,  1.0, 1.0, -0.929530176676438, 0.224862726961691)
                 );
               CONSTANT f0_to_f1_gain : COEFF_CEL_REAL :=
                 ( 0.566196896119831, 0.474937156750133, 0.347712822970540, 0.200868393871900, 0.0910613125308450, 1.0);
               CONSTANT coefs_iir_cel_f0_to_f1 : STD_LOGIC_VECTOR((f0_to_f1_CEL_NUMBER*f0_to_f1_COEFFICIENT_SIZE*5)-1 DOWNTO 0)
                 :=  get_IIR_CEL_FILTER_CONFIG(
                   f0_to_f1_COEFFICIENT_SIZE,
                   f0_to_f1_POINT_POSITION,
                   f0_to_f1_CEL_NUMBER,
                   f0_to_f1_sos,
                   f0_to_f1_gain);
               CONSTANT ChanelCount     : INTEGER := 6;
               -----------------------------------------------------------------------------
               SIGNAL sample     : samplT(ChanelCount-1 DOWNTO 0, 17 DOWNTO 0);
               SIGNAL sample_val : STD_LOGIC;
               SIGNAL sample_fx     : samplT(ChanelCount-1 DOWNTO 0, 17 DOWNTO 0);
               SIGNAL sample_fx_val : STD_LOGIC;
               SIGNAL TSTAMP    : INTEGER   := 0;
               SIGNAL clk       : STD_LOGIC := '0';
               SIGNAL clk_24576Hz   : STD_LOGIC := '0';
               SIGNAL clk_24576Hz_r : STD_LOGIC := '0';
               SIGNAL rstn      : STD_LOGIC;
               SIGNAL signal_gen : sample_vector(0 to ChanelCount-1,17 downto 0);
               SIGNAL sample_fx_wdata : Samples(ChanelCount-1 DOWNTO 0);
               SIGNAL signal_rec : sample_vector(0 to ChanelCount-1,15 downto 0);
               SIGNAL end_of_simu : STD_LOGIC := '0';
-              CONSTANT half_samplig_period : time := INTEGER( REAL(1000**4) / REAL(2.0*24576.0)) * 1 ps;
+              CONSTANT half_samplig_period : time := 20345052 ps; --INTEGER( REAL(1000**4) / REAL(2.0*24576.0)) * 1 ps;
             BEGIN
               -----------------------------------------------------------------------------
               -- CLOCK and RESET
               -----------------------------------------------------------------------------
               PROCESS
               BEGIN  -- PROCESS
                 WAIT UNTIL clk = '1';
                 rstn <= '0';
                 WAIT UNTIL clk = '1';
                 WAIT UNTIL clk = '1';
                 WAIT UNTIL clk = '1';
                 rstn <= '1';
                 WAIT UNTIL end_of_simu = '1';
                 WAIT FOR 10 ps;
                 assert false report "end of test" severity note;
                 --  Wait forever; this will finish the simulation.
                 wait;
               END PROCESS;
               -----------------------------------------------------------------------------
               clk_24576Hz_gen:PROCESS
               BEGIN
                 IF end_of_simu /= '1' THEN
                   clk_24576Hz <= NOT clk_24576Hz;
                   WAIT FOR half_samplig_period;
                 ELSE
                   WAIT FOR 10 ps;
                   assert false report "end of test" severity note;
                   WAIT;
                 END IF;
               END PROCESS;
               clk_25M_gen:PROCESS
               BEGIN
                 IF end_of_simu /= '1' THEN
                   clk <= NOT clk;
                   TSTAMP <= TSTAMP+20;
                   WAIT FOR 20 ns;
                 ELSE
                   WAIT FOR 10 ps;
                   assert false report "end of test" severity note;
                   WAIT;
                 END IF;
               END PROCESS;
               -----------------------------------------------------------------------------
               -- LPP_LFR_FILTER f1
               -----------------------------------------------------------------------------
                 IIR_CEL_f0_to_f1 : IIR_CEL_CTRLR_v2
                 GENERIC MAP (
                   tech         => tech,
                   Mem_use      => Mem_use,          -- use_RAM
                   Sample_SZ    => 18,
                   Coef_SZ      => f0_to_f1_COEFFICIENT_SIZE,
                   Coef_Nb      => f0_to_f1_CEL_NUMBER*5,
                   Coef_sel_SZ  => 5,
                   Cels_count   => f0_to_f1_CEL_NUMBER,
                   ChanelsCount => ChanelCount,
                   FILENAME     => ""
                   )
                 PORT MAP (
                   rstn           => rstn,
                   clk            => clk,
                   virg_pos       => f0_to_f1_POINT_POSITION,
                   coefs          => coefs_iir_cel_f0_to_f1,
                   sample_in_val  => sample_val,
                   sample_in      => sample,
                   sample_out_val => sample_fx_val,
                   sample_out     => sample_fx);
               -----------------------------------------------------------------------------
               -----------------------------------------------------------------------------
               -- SAMPLE GENERATION
               -----------------------------------------------------------------------------
               PROCESS (clk, rstn)
               BEGIN  -- PROCESS
                 IF rstn = '0' THEN                  -- asynchronous reset (active low)
                   sample_val <= '0';
                   clk_24576Hz_r  <= '0';
                 ELSIF clk'EVENT AND clk = '1' THEN  -- rising clock edge
                   clk_24576Hz_r <= clk_24576Hz;
                   IF clk_24576Hz = '1' AND clk_24576Hz_r = '0' THEN
                     sample_val <= '1';
                   ELSE
                     sample_val <= '0';
                   END IF;
                 END IF;
               END PROCESS;
               -----------------------------------------------------------------------------
               ChanelLoop : FOR i IN 0 TO ChanelCount-1 GENERATE
                 SampleLoop : FOR j IN 0 TO 15 GENERATE
                   sample_fx_wdata(i)(j) <= sample_fx(i,j);
                   signal_rec(i,j) <= sample_fx_wdata(i)(j);
                   sample(i,j) <= signal_gen(i,j);
                 END GENERATE;
                   sample(i,16) <= signal_gen(i,16);
                   sample(i,17) <= signal_gen(i,17);
               END GENERATE;
               -----------------------------------------------------------------------------
               --  READ INPUT SIGNALS
               -----------------------------------------------------------------------------
               gen: sig_reader
               GENERIC MAP(
                     FNAME       => "input.txt",
                     WIDTH       => ChanelCount,
                     RESOLUTION  => 18,
                     GAIN        => 1.0
                 )
                 PORT MAP(
                     clk             => sample_val,
                     end_of_simu     => end_of_simu,
                     out_signal      => signal_gen
                 );
               -----------------------------------------------------------------------------
               --  RECORD OUTPUT SIGNALS
               -----------------------------------------------------------------------------
               rec : sig_recorder
               GENERIC MAP(
                   FNAME       => "output_fx.txt",
                   WIDTH       => ChanelCount,
                   RESOLUTION  => 16
               )
               PORT MAP(
                   clk             => sample_fx_val,
                   end_of_simu     => end_of_simu,
                   timestamp       => TSTAMP,
                   input_signal    => signal_rec
               );
             END;

tests/Validation_LFR_Filters/Makefile +20 -5

             VHDLIB=../..
             SCRIPTSDIR=$(VHDLIB)/scripts/
             GRLIB := $(shell sh $(VHDLIB)/scripts/lpp_relpath.sh)
             TOP=testbench
             BOARD=LFR-EQM
             include $(VHDLIB)/boards/$(BOARD)/Makefile_RTAX.inc
             DEVICE=$(PART)-$(PACKAGE)$(SPEED)
             UCF=
             QSF=
             EFFORT=high
             XSTOPT=
             SYNPOPT=
             VHDLSYNFILES=
             VHDLSIMFILES= tb.vhd
             SIMTOP=testbench
             CLEAN=soft-clean
             TECHLIBS = axcelerator
             LIBSKIP = core1553bbc core1553brm core1553brt gr1553 corePCIF \
-            	tmtc openchip hynix ihp gleichmann micron usbhc  opencores
+            	tmtc openchip hynix ihp gleichmann micron usbhc  opencores fmf ftlib gsi
             DIRSKIP = b1553 pcif leon2 leon3v3 leon2ft crypto satcan ddr usb ata i2c \
-            	pci grusbhc haps slink ascs can pwm greth coremp7 spi ac97 \
+            	pci grusbhc haps slink ascs can pwm greth coremp7 spi ac97 srmmu atf \
+            	grlfpc \
             	./dsp/lpp_fft_rtax \
             	./amba_lcd_16x2_ctrlr \
             	./general_purpose/lpp_AMR \
             	./general_purpose/lpp_balise \
             	./general_purpose/lpp_delay \
             	./lpp_bootloader \
             	./lfr_management \
             	./lpp_sim/CY7C1061DV33 \
             	./lpp_cna \
             	./lpp_uart \
             	./lpp_usb \
             	./dsp/lpp_fft \
             	./lpp_leon3_soc \
             	./lpp_debug_lfr
             FILESKIP = i2cmst.vhd \
             	APB_MULTI_DIODE.vhd \
             	APB_MULTI_DIODE.vhd \
             	Top_MatrixSpec.vhd \
             	APB_FFT.vhd \
-                    lpp_lfr_ms_FFT.vhd \
+            	lpp_lfr_ms_FFT.vhd \
             	lpp_lfr_apbreg.vhd \
             	CoreFFT.vhd \
             	lpp_lfr_ms.vhd \
-            	lpp_lfr_sim_pkg.vhd
+            	lpp_lfr_sim_pkg.vhd \
+            	mtie_maps.vhd \
+            	ftsrctrlc.vhd \
+            	ftsdctrl.vhd \
+            	ftsrctrl8.vhd \
+            	ftmctrl.vhd \
+            	ftsdctrl64.vhd \
+            	ftahbram.vhd \
+            	ftahbram2.vhd \
+            	sramft.vhd \
+            	nandfctrlx.vhd
             include $(GRLIB)/bin/Makefile
             include $(GRLIB)/software/leon3/Makefile
             ##################  project specific targets ##########################
             distclean:myclean
+            vsim:cp_for_vsim
             myclean:
             	rm -f input.txt output_f*.txt
             	rm -rf ./2016*
             generate :
-            	xonsh ./generate.xsh
+            	python ./generate.py
+            cp_for_vsim: generate
+            	cp ./input.txt simulation/
             archivate:
             	xonsh ./archivate.xsh
             test: | generate ghdl ghdl-run archivate

tests/Validation_LFR_Filters/plot_results.ipynb +6 -6

             {
              "cells": [
               {
                "cell_type": "code",
-               "execution_count": 4,
+               "execution_count": 2,
                "metadata": {
                 "collapsed": true
                },
                "outputs": [],
                "source": [
                 "import numpy as np\n",
                 "import matplotlib.pyplot as plt\n",
                 "import glob \n",
                 "import pandas as pds"
                ]
               },
               {
                "cell_type": "code",
                "execution_count": null,
                "metadata": {
                 "collapsed": false
                },
                "outputs": [],
                "source": []
               },
               {
                "cell_type": "code",
                "execution_count": 2,
                "metadata": {
                 "collapsed": false
                },
                "outputs": [
                 {
                  "ename": "NameError",
                  "evalue": "name 'glob' is not defined",
                  "output_type": "error",
                  "traceback": [
                   "\u001b[0;31m---------------------------------------------------------------------------\u001b[0m",
                   "\u001b[0;31mNameError\u001b[0m                                 Traceback (most recent call last)",
                   "\u001b[0;32m<ipython-input-2-9719ee11a4bd>\u001b[0m in \u001b[0;36m<module>\u001b[0;34m()\u001b[0m\n\u001b[0;32m----> 1\u001b[0;31m \u001b[0;32mfor\u001b[0m \u001b[0mfolder\u001b[0m \u001b[0;32min\u001b[0m \u001b[0mglob\u001b[0m\u001b[0;34m.\u001b[0m\u001b[0mglob\u001b[0m\u001b[0;34m(\u001b[0m\u001b[0;34m\"./2016*\"\u001b[0m\u001b[0;34m)\u001b[0m\u001b[0;34m:\u001b[0m\u001b[0;34m\u001b[0m\u001b[0m\n\u001b[0m\u001b[1;32m      2\u001b[0m     \u001b[0minputsig\u001b[0m \u001b[0;34m=\u001b[0m \u001b[0mpds\u001b[0m\u001b[0;34m.\u001b[0m\u001b[0mread_csv\u001b[0m\u001b[0;34m(\u001b[0m\u001b[0mfolder\u001b[0m\u001b[0;34m+\u001b[0m\u001b[0;34m\"/input.txt\"\u001b[0m\u001b[0;34m,\u001b[0m\u001b[0msep\u001b[0m\u001b[0;34m=\u001b[0m\u001b[0;34m\" \"\u001b[0m\u001b[0;34m,\u001b[0m\u001b[0mheader\u001b[0m\u001b[0;34m=\u001b[0m\u001b[0;32mNone\u001b[0m\u001b[0;34m)\u001b[0m\u001b[0;34m\u001b[0m\u001b[0m\n\u001b[1;32m      3\u001b[0m     \u001b[0minputsig\u001b[0m\u001b[0;34m.\u001b[0m\u001b[0mcolumns\u001b[0m\u001b[0;34m=\u001b[0m\u001b[0;34m[\u001b[0m \u001b[0;34m\"CH{}\"\u001b[0m\u001b[0;34m.\u001b[0m\u001b[0mformat\u001b[0m\u001b[0;34m(\u001b[0m\u001b[0mi\u001b[0m\u001b[0;34m)\u001b[0m \u001b[0;32mfor\u001b[0m \u001b[0mi\u001b[0m \u001b[0;32min\u001b[0m \u001b[0mrange\u001b[0m\u001b[0;34m(\u001b[0m\u001b[0minputsig\u001b[0m\u001b[0;34m.\u001b[0m\u001b[0mshape\u001b[0m\u001b[0;34m[\u001b[0m\u001b[0;36m1\u001b[0m\u001b[0;34m]\u001b[0m\u001b[0;34m)\u001b[0m\u001b[0;34m]\u001b[0m\u001b[0;34m\u001b[0m\u001b[0m\n\u001b[1;32m      4\u001b[0m     \u001b[0moutputsig\u001b[0m \u001b[0;34m=\u001b[0m \u001b[0mpds\u001b[0m\u001b[0;34m.\u001b[0m\u001b[0mread_csv\u001b[0m\u001b[0;34m(\u001b[0m\u001b[0mfolder\u001b[0m\u001b[0;34m+\u001b[0m\u001b[0;34m\"/output_f0.txt\"\u001b[0m\u001b[0;34m,\u001b[0m\u001b[0msep\u001b[0m\u001b[0;34m=\u001b[0m\u001b[0;34m\" \"\u001b[0m\u001b[0;34m,\u001b[0m\u001b[0mheader\u001b[0m\u001b[0;34m=\u001b[0m\u001b[0;32mNone\u001b[0m\u001b[0;34m)\u001b[0m\u001b[0;34m\u001b[0m\u001b[0m\n\u001b[1;32m      5\u001b[0m     \u001b[0moutputsig\u001b[0m\u001b[0;34m.\u001b[0m\u001b[0mcolumns\u001b[0m\u001b[0;34m=\u001b[0m\u001b[0;34m[\u001b[0m\u001b[0;34m\"Tstamp\"\u001b[0m\u001b[0;34m]\u001b[0m\u001b[0;34m+\u001b[0m\u001b[0;34m[\u001b[0m \u001b[0;34m\"CH{}\"\u001b[0m\u001b[0;34m.\u001b[0m\u001b[0mformat\u001b[0m\u001b[0;34m(\u001b[0m\u001b[0mi\u001b[0m\u001b[0;34m)\u001b[0m \u001b[0;32mfor\u001b[0m \u001b[0mi\u001b[0m \u001b[0;32min\u001b[0m \u001b[0mrange\u001b[0m\u001b[0;34m(\u001b[0m\u001b[0moutputsig\u001b[0m\u001b[0;34m.\u001b[0m\u001b[0mshape\u001b[0m\u001b[0;34m[\u001b[0m\u001b[0;36m1\u001b[0m\u001b[0;34m]\u001b[0m\u001b[0;34m-\u001b[0m\u001b[0;36m1\u001b[0m\u001b[0;34m)\u001b[0m\u001b[0;34m]\u001b[0m\u001b[0;34m\u001b[0m\u001b[0m\n",
                   "\u001b[0;31mNameError\u001b[0m: name 'glob' is not defined"
                  ]
                 }
                ],
                "source": [
                 "for folder in glob.glob(\"./2016*\"):\n",
                 "    inputsig = pds.read_csv(folder+\"/input.txt\",sep=\" \",header=None)\n",
                 "    inputsig.columns=[ \"CH{}\".format(i) for i in range(inputsig.shape[1])]\n",
                 "    outputsig = pds.read_csv(folder+\"/output_f0.txt\",sep=\" \",header=None)\n",
                 "    outputsig.columns=[\"Tstamp\"]+[ \"CH{}\".format(i) for i in range(outputsig.shape[1]-1)]\n",
                 "    f, axarr = plt.subplots(1,2,figsize=(14, 6))\n",
                 "    (outputsig.filter(regex=\"CH*\")- inputsig*0.8912)[150:].plot(ax=axarr[0])\n",
                 "    axarr[0].legend(loc='upper right')\n",
                 "    (outputsig.filter(regex=\"CH*\")[:100]/0.8912).plot(ax=axarr[1])\n",
                 "    axarr[1].legend(loc='upper right')\n",
                 "    plt.show()"
                ]
               },
               {
                "cell_type": "code",
-               "execution_count": 8,
+               "execution_count": 5,
                "metadata": {
                 "collapsed": false
                },
                "outputs": [
                 {
                  "data": {
-                  "image/png": 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R/BRSpOOnNkkcGWMeA64CLrYsa0+tU18BCcaY9Hp3zTI5fnfrK6D+0zt61DoX\n/NmjXptMwG1Zls8Ysx+oaqRN/btodcycOZOMjIw6xyZNmsSkSZOaukxERGJdSkqr3M1qCy6Xi6ys\nLLYEn3keJm63myuvvBK32826devo2bNn8xfV8/zzz/P888/XOXbkyJHWmmJUidX4KbhUreygnTiC\n409W65zUmeS4ZK464yocJtzPeBERkTan+KmBaIifwp44CgQ91wCjLMvaXe/0RqAS+CawLNB+ANAX\nWB9o8w7wE2NMt1rr9K8AjgDbarUZU6/vKwLHsSzLb4zZGBhneWAcE3hf2NT858+fz9B28j9cERGR\nkzV27FgWLFjAhg0bWrzB44nwer2MGzeOTz/9lDfeeIMzzzy5lU6hkg/vv/8+w8Jd1t7GYjl+ClYc\neQ646NTJPpadDVu22Ps/PDn2SYb3af3/jYqIiJyoWImfwnqrxhjze+DbwM1AmTGmR+CVBBC4S7YQ\neMQYc6kxZhjwR+CflmX9K9DN34CtwJ+MMUOMMVcCs4HHLMvyB9oUAbnGmLnGmDONMT8AbgAeqTWd\nR4DvGWMKjDEDA9ekAIvC9ycgIiLSPsyaNYuUlBSmTJlCaWlpg/OfffYZhYVN5goaVV1dzY033si7\n777LSy+9xAUXXHCq0+3QYj1+ClYc4W1YcQRw69m3MqDrgHANLyIi0mKxEj+Fu+Lo+9hr4N+qd/y7\nwDOB32dil0G/BCQCfwXuDDa0LKvaGDMW+ykg64Ey7GDlwVptdhpjrsYObu4CvgButyzr9VptXjTG\ndAN+iV1yvQm40rKsfa30WUVERNqtnJwcFi9eTH5+PoMGDaKgoIC8vDx8Ph/r169nyZIlTJ48+aT6\nvueee3j11VcZP348+/fv57nnnqtz/tvf/nZrfISOJKbjJ4/XQ6IzEW91fJ3E0b59UFYGqanhGllE\nROTExEr8FNbEkWVZzVY0WZblBWYEXo21+RwY20w/a7EfGdtUm99jbzIpIiIi9YwbN47Nmzczb948\nli9fTlFREYmJiQwZMoT58+czZcoUwF4u1NSmjPXPffDBBxhjePXVV3n11VcbtFfiqK5Yj588Pg8p\nznS8UGepGsCuXTB4cFvNREREpHmxED+15VPVREREJMrl5uZSVFTUZJvi4uJGz40aNYqqqqo6x958\n881WmZvEBrfXTbLDxSGoU3EE9nI1JY5ERCTadPT4SY+jEBEREZGo4fF6SDQu4HjiKCsL4uKO73Mk\nIiIibUcFMpjbAAAgAElEQVSJIxERERGJGh6fh3jLThwFl6o5ndC3b+OJI8uyXyejpATq3eQVERGR\nWpQ4EhEREZGo4fF5iKtyER8PSUnHj9d+slptlZWQmwvnnANPPglHj7Z8rDVr7H5vv73pxJPbDd/9\nLrz1Vsv7FhER6SiUOBIRERGRqOHxenBUusjIgNr7hDaWOFqzBnbsgK5d4Qc/sJe1zZgBW7c2Pc7W\nrXDddXDGGfD00/DYY6Hb+f1w442waBGMGQOrVzfe544dkJ8Pzz138hVQIiIi0UabY4uIiIhI1PD4\nPBhfds0ytaDsbAjxUBmef95O/rzxBnz+OTz1FCxYYCeCbrsNCgvB5ap7zd69cPXV9vK3devgwQdh\n5kwYMgRGjTrezrLgzjvtvlesgCeegPHj4aWXYNy4un2uXAm33GInu154wW5bWAhDh9Zt98UX9vxe\nfhnOPBOuvBKuuOL4BuBBbjf85z/w8cf2kr3eve2kWI8e9n5PwfkdO2ZXWZWV2WM7neBw2D+dTrtt\n7d8dDrtKy+c7/qqshPh4SEiAxET7Z3y8fa6iArxe++X3H28XbBsXZ1/v9x9/VVWFHj+4pLC6um5i\nzeGw5x58VVfbr6qqum2DicTaP4Ov4PvayxZrj1G/XRMPNqrz/dd+1RZq7PbcX+0/s8aWfobqq7H+\na18f6vtorP/68z6VOZ9Mf/X7rN1X/T47cn+h+q39s/7vwT5q/wz+fvhw83OR8PJ47O+h/n8zDh1q\neR9KHImIiIhI1PB4PcR502s2xg7KzoZ9++wESWqqfczrhaVL4e677X/E9O0LDz0EDzxgVwjdcw/8\n4x+weDFccIF9TXm5nfzxeuHttyE9HebNgw8+gIkTYeNGOO00u+2vfmUnef7wBzvRdPnldkXRddfZ\nyaHrrrOTGw88AP/933a/Tz8N778Pd90F550Hd9wBs2fDli3w+9/DK6/YS/CuvdauUPrBD+w+BgyA\nSy6Br76y2+7aFfrPx+Gwq6u8XjthVF0djm9BREQ6iksvPfU+lDgSERERkajh9rrJOOYKWXEEdkJl\n8GD799desytz8vPrtk1IgO99D77xDbj5ZrjoIvjFL+Dee+HWW+1KnrffPp4giouzE0HnnWcng95+\n265u+n//D372M3t/o2C/L7wABQX28rXHHrOrj958Ex5+2O7f4bDH3bTJrjp64AH43/+1EzxnnWVX\nId1yi52wAvsu8Jtv2kvg1q+3K4tuugm+9jX7deaZ9mfcs8feyHvPHrtiKikJ0tLsaqq0tOPJtKqq\n45U6wd8rK+1X8H3tqqGEBLsaqHYVUrC6KFhVFHzFxx9v5/XaP/1++88vPv54v05n6LGDlUW1K4xq\nVyAFfwarpoKVU8HKhvqVDKFe9atMalchNVVN05hY6i9UX0H1q0maq1QJ9lf/Z6iKlWj5/Oqv+e88\nVFVR/f5q9wtQXAw/+lHL5yStb+5cyMmxf6/9XZ/Id6PEkYiIiIhEDY/PQ2qZK2TFEdj7HAUTR3/+\ns728LPi+vtNPh3/+E37+c/jpT6GoyF4q9pe/wLBhddt27w7LltlJpmuusZNHt9xiJ5xqi4+HZ5+1\nf06bBpmZ8PrrMHp03XZxcfZeS/n5dhXSBRfAxRc3XN7RqZNdfXTttY3/mSQl2eOcc07jbUREotH7\n70d6BnLZZQ2XTcOJfTfaHFtEREREooJlWRz1HcUfInGUlWUnY4IbZJeV2VVBkyY13Wd8PMyZY1f1\nuFx2ldD48aHbDh1qVwf9/e8wYoT9e6i9QpxOeyncokV24F0/aVRb9+72Hd1LLmnZviMiIiLRRhVH\nIiIiIhIVyv3lVFvVVLhddOpT95zTae9hFEwcLV9u71d0000t63vUKPjww+bbffvb0KcPnHuuvTyr\nMQ4HfOc7LRtbRESkPVPiSERERESigsfnAaDiSMOKI7CXqwUTR3/+s10V1L9/68+j9pPVREREYp2W\nqomIiIhIVPB47cRR+aGmE0eHDtkbY9ffFFtERERanxJHIiIiUqO4uJipU6eSm5tLcnIyGRkZjBw5\nksLCQioqKgDIzs5mfCObxKxduxaHw8HSpUtrjm3dupUbb7yR3NxcUlNT6d69O6NGjWLFihVt8pmk\n/XB73QB43ekNnqoGxxNHy5bZT+q68cY2nZ6IiEhIHT1+0lI1ERERAWDVqlVMnDiRpKQkCgoKyMvL\nw+fzsW7dOmbNmsXWrVspKirCNLPDb/3zu3bt4ujRo9x2221kZWVRXl7Oyy+/zPjx43nqqaeYMmVK\nOD+WtCPBpWp4G6842rcPFi6ESy+FXr3acnYiIiINxUL8pMSRiIiIsHPnTvLz8+nfvz9r1qwhMzOz\n5ty0adOYPXs2K1eubFFflmXVeT9mzBjGjBlT59j06dMZOnQojzzyiBJHUiO4VA1f44kjgPXr4amn\n2mxaIiIiIcVK/KSlaiIiIsLcuXMpKytj4cKFdYKeoJycHGbMmNFq4xljOO200zh8+HCr9SntX+2K\no8aWqgHExcF117XZtEREREKKlfhJFUciIiLCihUryMnJYfjw4S1q7/f7OXDgQIPjTQUy5eXlHDt2\njCNHjvDKK6/w2muvMWnSpJOes3Q8Hq8HBw6q/SkhK46ysuyk0RVXQNeubT8/ERGR2mIlflLiSERE\nJMZ5PB5KSkqYMGFCi69ZvXo13bt3D3musTX8P/zhD3nyyScBcDgcXH/99fzud7878QlLh+XxeUhy\npFGOCZk4cjph1iyoV7kvIiLS5mIpflLiSEREJAzKq6rYXl4e1jEGpqSQ4nSecj9ut/0kK5fL1eJr\nRowYwZw5cxqsx9+0aRP33ntvyGtmzpzJxIkT2bNnDy+++CJVVVV4vd6Tn7h0OB6vh0STTjmETBwB\nzJnTplMSEZE2pPipoWiIn5Q4EhERCYPt5eUM27gxrGNsHDaMoScQrDQmPT0dsO+ctVS3bt0YPXp0\ng+NOp7NBMBQ0YMAABgwYAMAtt9zCt771LcaOHct77713ErOWjsjtdZNguUhJgfj4SM9GRETamuKn\nhqIhflLiSEREJAwGpqSwcdiwsI/RGlwuF1lZWWzZsqVV+mup66+/nu9///t88sknnHHGGW06tkQn\nj89DXFXoJ6qJiEjHp/ipeZGIn5Q4EhERCYMUp7NV7ma1lbFjx7JgwQI2bNjQ4g0eT9WxY8cAOHLk\nSJuMJ9HP4/PgqHSRHuKJaiIi0vEpfmpeJOInR5uNJCIiIlFr1qxZpKSkMGXKFEpLSxuc/+yzzygs\nLDypvvft29fgWGVlJU8//TTJyckMHjz4pPqVjsfj9WD8qjgSEZH2IVbiJ1UciYiICDk5OSxevJj8\n/HwGDRpEQUEBeXl5+Hw+1q9fz5IlS5g8efJJ9T116lTcbjeXXHIJvXv35quvvuK5557jo48+4pFH\nHiGllUrGpf3z+DxYFd3opIojERFpB2IlflLiSERERAAYN24cmzdvZt68eSxfvpyioiISExMZMmQI\n8+fPZ8qUKYD9uNjGHhkbPF9bfn4+CxcupKioiAMHDuByuRg2bBjz5s3j6quvDutnkvbF4/VQXaGK\nIxERaT9iIX5S4khERERq5ObmUlRU1GSb4uLiRs+NGjWKqqqqOsduvPFGbrzxxlaZn3RsHp+HqrJ0\nJY5ERKRd6ejxk/Y4EhEREZGo4Pa68R11aamaiIhIFFHFkYiIiIhEBY/XQ5xHS9VERESiiRJHIiIi\nIhJx/io/3iovlUeUOBIREYkmWqomIiIiIhHn8XkAqCrXUjUREZFoosSRiIiIiEScx2snjvAdrzj6\n4IPL+eqrpyM3KREREVHiSEREREQiL1hxhNdOHFmWxeHD/+Dgwb9GdmIiIiIxTokjEREREYm4mooj\nbzqdOkFVlQfL8nL06ObITkxERCTGKXEkIiIiIhHn9rrtXwJL1Xy+vQCUl39EVVVFBGcmIiIS25Q4\nEhEREZGIq79Uze8vDZyporx8a8TmJSIiEuuUOBIRERGRiKu9ObbLBT5fac05LVcTERGJnLhIT0BE\nRERExOPzEEcSqa44HI7gUjUnSUn9KCv7INLTExERiVmqOBIRERGRiPN4PSRYLjp1st/7/aUkJHQn\nLe1cVRyJiIhEkBJHIiIiUqO4uJipU6eSm5tLcnIyGRkZjBw5ksLCQioq7A2Ks7OzGT9+fMjr165d\ni8PhYOnSpY2O8dBDD+FwOBgyZEhYPoO0Tx6fh7hqe38jsJeqxcdnkpY2hKNHP8CyrMhOUEREpBEd\nPX7SUjUREREBYNWqVUycOJGkpCQKCgrIy8vD5/Oxbt06Zs2axdatWykqKsIY02Q/TZ0vKSlh7ty5\npKWltfb0pZ3zeD04K9NrEkd+/14SEjJJTR1CZeUBfL4vSUzMiuwkRURE6omF+EmJIxEREWHnzp3k\n5+fTv39/1qxZQ2ZmZs25adOmMXv2bFauXNmivpqqDPnhD3/IiBEjqKys5MCBA6c8b+k43D43xnd8\nqZrPV0piYh/S0s4G7A2ylTgSEZFoEivxk5aqiYiICHPnzqWsrIyFCxfWCXqCcnJymDFjximN8fbb\nb7N06VLmz59/Sv1Ix+TxerC8rloVR6UkJPQgKakfTqdLG2SLiEjUiZX4SRVHIiIiwooVK8jJyWH4\n8OEtau/3+0Pe8Tp8+HDI9tXV1dx1113ccccd5OXlndJcpWPy+DxUH+tea4+jvcTHZ2KMg9TUr2mD\nbBERiTqxEj8pcSQiIhLjPB4PJSUlTJgwocXXrF69mu7du4c8F2qN/hNPPMHu3btZs2bNSc9TOjaP\n10NleQ6dekJ1tY/KykMkJNh3b9PSzubw4bcjPEMREZHjYil+UuJIREQkDKrKqyjfXh7WMVIGpuBM\ncZ5yP263GwCXy9Xia0aMGMGcOXMarMfftGkT9957b51jBw8e5MEHH+SBBx6gS5cupzxf6Zg8Pg/+\no/ZSNb9/PwAJCT0ASE0dwp49T1Fd7cXhSIzkNEVEJIwUPx0XTfGTEkciIiJhUL69nI3DNoZ1jGEb\nh+Ea2vJgpTHp6emAfeespbp168bo0aMbHHc6nQ2Cofvvv5+uXbsyffr0U5uodGgerwdfIHHk85UC\nEB9/vOIIqigr24bLdU4EZykiIuGk+Om4aIqflDgSEREJg5SBKQzbOCzsY7QGl8tFVlYWW7ZsaZX+\navv0009ZsGABv/3tbykpKQHsp4ZUVFTg9/vZtWsX6enpdO7cudXHlvbF7XVDRQadOoHfvxegZqla\naqq9r0NZ2QdKHImIdGCKn2zRFj8pcSQiIhIGzhRnq9zNaitjx45lwYIFbNiwocUbPLZESUkJlmVx\n1113hXyqSE5ODnfffTePPPJIq40p7U+1VY3H5wFv6IqjuDgXSUk5jW6QfeDASoyJJyPjEpzOpBaP\nW1VVQUnJb+nS5WrS0predLSs7EOSk0/XUjkRkTBS/GSLtvhJiSMRERFh1qxZPPfcc0yZMoU33nij\nwSNlP/vsM1auXMldd911Qv3m5eWxbNmyBsfvv/9+jh49SmFhITk5Oac0d2n/ynxl9i/e9MAeR6U4\nnS6czuSaNmlpZ3P06AcNry3bzpYt44FqHI5kOnUaTZcuY+jS5VukpJze6JgVFV/w4YfX4/G8x65d\nDzF48It07TqmQbvq6kp27Lifzz//FSkpgxk4cBHp6eeH7NPrLeGrrxaRljaMLl2uwBjHif1BiIhI\nuxIr8ZMSRyIiIkJOTg6LFy8mPz+fQYMGUVBQQF5eHj6fj/Xr17NkyRImT558wv127dqV8ePHNzg+\nf/58jDGMGzeuNaYv7Zzba28wijedTp3A59tbU20UZG+Q/TiWZdV58syuXbNJTOxNXt4rHDr0OgcP\n/pXPPruHTz+dQUbGJWRnP0CnTt+oc83hw+v48MMbcDjiOfvsN/nii0fYsmUsZ5zxO3r3/kFNO59v\nP9u2TeLQoTfp1++nHDiwivffv5C+fX9MdvYDNdVHfv9Bdu9+mJKS32FZ1ViWj6SkbHr1uoOePSeT\nmNgTgGPHijlwYBUHD77GkSPrSEzsg8s1lLS0c0lLG0pq6llUVh6iomIXFRW78Hp34fXuwelMJS6u\nC/HxXYiL60JcXAaW5ae6+hjV1RVUVR3DsryBWTsCCSsHYAK/mzq/W1YVUIVlVWJZVVhWNcbE1Xs5\nA+crsSx/TVtjnBgTH2gTH2hXFaKdA2OcgDNwjSOwf0c1YGFZ1YH5msB346j53T5XXTO34DVAgz1A\nRCS6ffnlF5GeQli1h/jpyy+fYffuhk9lO5HvRokjERERAWDcuHFs3ryZefPmsXz5coqKikhMTGTI\nkCHMnz+fKVOmAPbjYkM9MjaoqXMn0046Po8vsLGoz16qdvhwac3+RkFpaWfj9+/H59tbk4gpK9tG\naenznHHG73G5zsXlOpe+fe+lstLDwYN/ZffuuXzwwWWkp19EdvYDdO58OXv2FPHpp3eRnv51zjrr\nRRISetCp08V8+ukP+eSTOzl27BNyc3/N0aMf8J//XEd1dRlnn/13OnceTb9+D7B791x27folBw4s\n54wzfs+RI2+ze/c8LKuS0067l9NO+yFlZdvYs6eIXbtms3Png3TufAXHjn3KsWMfB5bUjeS0036E\nz/clHs/77Nv3MtXVx+r9qRgSErJITOxNdfUx/P6DVFYeDNEOjEnE4UjAThBV10q81E7SWLVejprk\nkJ3ccdRK/lQCVbX6jquVKAomify12tZuZ7/sJFB1IIkWTFJV0zCRZQKJICvQ3v49OKfjyScTeFHr\np4i0B19+WdV8o3Yu2uOnL79cSHp6w6fInch3o8SRiIiI1MjNzaWoqKjJNsXFxY2eGzVqFFVVzQci\nb7755gnPTTqu+hVH+/aVkpDQo06btLQhgL1BdjBxZFcb9aFXr7p3c+PiXGRmTqR79xs4ePA1du78\nJZs3X0lSUn8qKnbQu/cMcnN/g8MRD4AxTs4441FSUs7gk0/uwu3+F0ePbiQ1NY+zznqbpKS+ADgc\n8WRn/5Ru3cazffttbNp0CcYkkJU1jX79flKT7MrIGEFGxghOP30+e/f+iX37XqZTp0vJyZlL587f\nJC6u7v4d1dWVHDv2EWVl24iP70JSUjaJiX0CyaC6qqqOUVXlxph4HI5kHI7EVl8Sd7wyyNHkP1Ba\n2k5EYldq6vtAeDe7jgbRHD8NHbqWoUOHNjh+It+NEkciIiIiElHBxFFclYukJHupmst1Xp02SUn9\ncTrTOHp0M126XElZ2VZKS//MgAFPhEywgH1XtmvXq+jSZQyHDv2dL74oJDv7QXr2/E7I9r1730lS\nUn+2br2ZzMybOeOMx0Nutp2WNoShQzdw4MByXK7zSErqF7K/+PjO9OlzF336NL23hcMRR2rqWaSm\nntVkOwCnM7nO3k/hYCeBGt6dPtl2IiLSvilxJCIiIiIR5fHaS9XSk9Ixxt4cu/5SNWMcpKZ+rWaD\nbLva6DR69vxus/0bY+jS5Qq6dLmi2bZdu17FRRftx+FoOkx2OOLp3v36ZvsTERFp7/SoBxERERGJ\nqGDFUecUF5Zl4fOVEh/fo0G71NQhlJVtpqzsQ0pLX6Bfv/sbrTY6Fc0ljURERGKJEkciIiIiElFu\nrxunlUgnVwKVlUewLF+DiiOwN8guL9/Gjh0/IzGxLz173tb2kxUREYkxup0iIiIiIhHl8XmIq0on\nI8NepgYQHx8qcTQEy6pk//5lDBjwVFiqjURERKQuVRyJiIiISES5vW4clfYT1Xw+O3FU/6lqAKmp\nXwMgMbFfoxtci4iISOtSxZGIiIiIRJTb68b4XIGKo70AIZeqxcWlk5k5ie7dr1e1kYiISBtR4khE\nREREIsrj80CFvVTNrjhyEhfXOWTbwYMXt+3kREREYpyWqomIiIhIRLm9bqqOHd/jKCEhE2MUpoqI\niEQD/Y0sIiIiIhHl9rqpLHPRuTP4fHtDbowtIiIikaHEkYiIiIhElLvCQ1X58c2xQ+1vJCIiIpGh\nxJGIiIiIRNThY27w2okjv79UFUciIiJRRIkjEREREYkot9cNXletiqMekZ6SiIiIBChxJCIiIjWK\ni4uZOnUqubm5JCcnk5GRwciRIyksLKSiogKA7Oxsxo8fH/L6tWvX4nA4WLp0aYNj9V9Op5P33nuv\nTT6XRLejfk+tiqO9WqomIiLtSkePn+LC2bkx5mLgXmAY0AuYYFnW8nptfglMAToB/wSmWZb1aa3z\nnYHHgLFANfAycLdlWWW12gwJtDkfKAUesyxrXr1xJgK/BLKBj4H/Z1nWa635eUVERNqzVatWMXHi\nRJKSkigoKCAvLw+fz8e6deuYNWsWW7dupaioCGNMk/00dv6//uu/OO+88+ocO/3001tt/h1FrMVP\nldWVVFSVgzedjAwfhw4d1lI1ERFpN2Ihfgpr4ghIBTYBf8AOWOowxvwYmA58B9gBPASsNsYMsizL\nF2i2GOgBfBNIABYBTwK3BPpwAauBvwFTga8BfzTGHLIs638DbS4M9PNjYCVwM/AXY8y5lmVtbf2P\nLSIi0r7s3LmT/Px8+vfvz5o1a8jMPP4P92nTpjF79mxWrlzZor4sywp5fOTIkVx33XWtMt8OLqbi\nJ4/XY//ic5Gaug9AS9VERKRdiJX4KaxL1SzL+qtlWQ9YlvUXIFT67G5gtmVZr1qW9R+gAMgCJgAY\nYwYBVwK3W5b1b8uy1gMzgHxjTM9AH7cA8YE22yzLehEoBO6pN85rlmU9YlnWR5ZlPQi8jx10iYiI\nxLy5c+dSVlbGwoUL6wQ9QTk5OcyYMeOUxzl69ChVVVWn3E9HFmvxk8cXSBx500lI2AtwvOLozjth\n1arWHE5ERKTVxEr8FLE9jowx/YGewBvBY5ZluYENwIWBQyOAQ5Zl/V+tS18HLGB4rTZvW5ZVWavN\nauBMY0xG4P2Fgeuo1+ZCREREhBUrVpCTk8Pw4cObbwz4/X4OHDjQ4HX48OFGr/nud79Leno6SUlJ\nfOMb32Djxo2tNf2Y0RHjJ7fXDUBafDqVlaUA9h5HVVWwYAE8+WRrDiciItJqYiV+CvdStab0xA5g\n9tY7vjdwLtimtPZJy7KqjDEH67UpDtFH8NyRwM+mxhEREWlVVVXllJdvD+sYKSkDcTpTTrkfj8dD\nSUkJEyZMaPE1q1evpnv37iHP1V+jn5CQwA033MBVV11Ft27d2Lp1K7/+9a+55JJLWL9+PWefffYp\nzT/GdLj4KZg4Sk9y4fd/DAQqjvbsAb8f3nwTKishLpJhq4iItAXFT8dFU/wUjX8DG+yA6FTamBa2\naW4cZs6cSUZGRp1jkyZNYtKkSc1dKiIiMay8fDsbNw4L6xjDhm3E5Rp6yv243fY/3F0uV4uvGTFi\nBHPmzGmwHn/Tpk3ce++9dY5deOGFXHjh8SKVsWPHcv311zNkyBDuu+8+Vp3AUqTnn3+e559/vs6x\nI0eOtPj6Dqzdxk/BPY46Jafj8+3F6UzH6UyCHTsCDTzw3nvw9a83N6yIiLRzip+Oi6b4KZKJo6+w\ng48e1L2blQn8X602dRYKGmOcQOfAuWCb+jsoZlL3blxjberfRWtg/vz5DB166v+jEhGR2JKSMpBh\nw8JbSpySMrBV+klPTwfsO2ct1a1bN0aPHt3guNPpbHRzx9pyc3O55pprWLZsGZZlNfukkaBQyYf3\n33+fYcPCG2RGkQ4XPwUrjrqkpOP3l9rL1OB44sjlgr//XYkjEZEYoPipaZGKnyKWOLIsa4cx5ivs\np31sBjDGpGOvvX880OwdoFPg6R3BYOib2AHTe7XaPGSMcVqWFdwt6grgI8uyjtRq803sTR+DLg8c\nFxERaXVOZ0qr3M1qCy6Xi6ysLLZs2dKm45522mn4fD7KyspIS0tr07Hbq44YPwUTR11dafh8pcc3\nxt6xA3r2hAsvhNdfhwcfbM1hRUQkCil+al4k4qewbo5tjEk1xpxtjDkncCgn8P60wPtHgZ8aY8YZ\nY74GPAN8AbwCYFnWduxNGBcYY843xlwE/A543rKs4B2zxYAP+IMxZrAx5ibgLuA3tabyW2CMMeYe\nY8yZxpifA8OAx8L12UVERNqTsWPHUlxczIYNG9pszM8++4ykpCQljeqJtfjJ4/PgqEylcycnPt9e\nEhICRU47d0L//nDZZfDuu/aSNRERkSgSK/FTuJ+qdh522fRG7NLn32A/xvUXAJZl/Qo7kHkS+2kg\nycAYy7J8tfq4GdiO/VSPFcDbwNTgycCTRK4EsoF/A/OAn1uWtbBWm3eAScD3gE3AdcA1lmVtbe0P\nLCIi0h7NmjWLlJQUpkyZQmlpaYPzn332GYWFhSGubN7+/fsbHPvggw949dVXufLKK0+qzw4upuIn\nt9eNw59ORgb4/fUqjvr3h8svtzfHXru2NYcVERE5ZbESP4V1qZplWWtpJjllWdbPgZ83cf4wcEsz\nfWwBRjXT5mXg5abahPLxx9NwOtNP9LIaXbpczWmn/ddJXy8iItIWcnJyWLx4Mfn5+QwaNIiCggLy\n8vLw+XysX7+eJUuWMHny5JPq+6abbiI5OZmvf/3rZGZm8uGHH7JgwQLS0tL4n//5n1b+JO1fR4if\nToTH68HyuujUCXy+enscXXwxnH469Otn73M0dmw4pyIiInJCYiV+isanqkUVpzODuLjOp3B9aivO\nRkREJHzGjRvH5s2bmTdvHsuXL6eoqIjExESGDBnC/PnzmTJlCmA/LrapzRjrn7v22mt57rnnmD9/\nPm63m+7du3PDDTfwwAMPkJOTE9bPJNHP7XVjHUunUz8rsDl2D/D54IsvIDsbjLGXq/3975GeqoiI\nSAOxED8pcdSM3NyHOeus9rE5l4iIyKnKzc2lqKioyTbFxcWNnhs1ahRVVVV1jk2fPp3p06e3yvyk\n4zl8zE31sXS6dDmMZfntpWq7d4Nl2UvVwF6utnAhlJRA796RnbCIiEg9HT1+CvceRyIiIiIijTpU\n7l4fpNoAACAASURBVAGfi06d7L0hEhIy7WVqcDxx9I1v2D9ffz0CMxQREYltShyJiPx/9u49vq6q\nzv//a51zcnJpk9N7S6EXWpGiUKAdBX/6HXQYvHIbR5QqwoiMiA7jD78D+nVEHJCvIirKVx0YRMYL\nrcplGAS0KioOwqBfKvcWsFfE0nubtGmSJlnfP/ZJe5KeNGmb5OyQ1/PxOI+c7P3Ze6+T06ar77PW\n2pKkitnS3AitDTQ0rAOgqmpyEhxlMjCteCO5iRPh+OPLT1fbsgWOOQbmzIH3vheuvRbuvx82b973\nhXfsgM99Ljn3GWfA8uXl62KEn/4U3vEOuPxyWLeu93Pu3Ak/+xns41NlSZKGG6eqSZIkqWK2tTRC\naz11detpbi4ZcTRtGlRV7Sk85RT4zneSIKdrHYgY4YILkvWQ3vc+eOwxuPvuJBQC+Iu/gHe/G846\nK1kvCZI7tH372/DZz8KmTfD+9ydhz6teBR//OHzqU1Bfn9Q+8gh84hPJHd2OPx6uuy4Jps47L6k9\n8kjo6Ej2f//7cPvt0NSUHDtrVtLmU05JFvleuxaWLIE//CH5unQpjB+f1HU9pk1L2r5+/Z7Hpk1Q\nU5O0qb4eRo9OHu3tyVpQpQ9Ifjalj0wmeXQ9DwE6O/d+ZDKQy0E2u+fR0ZFcp709ed7Rsed8pY8Y\nk0dnZ/K1qx09r9v1nnXpOq7nseX0fF0hdD+u57Gla4V0Xb/nseWO60vpcaXH9ta+3trW9eh5zjTo\nb/tejq+ja19aXkdX2/tqX3/rKqHMncY0xL74RZg0ac/3XX9ONmzo9ykMjiRJklQx29uaoLWBmpr1\n7NyZI5cbkwRHXdPUuvz1Xyed36eeSkYYAXzzm3Dnncnjb/4m2dbRAc8/D7//Pdx1F3zmM3DZZfDa\n18Lb3gY//CEsW5YETZ/7XBIoNTcn577mmiSc+vSnk1FLd96ZXOuee+Dtb09GN914I1x/Pdx0E5x8\nchIAvfhiEvxccgm8852walUyOurnP0/qu4QAr3wlzJuXtGXz5mR00m9/C9/7HmzfntSNG5d08idN\nSp63tsLGjUko1dSUhEu5HFRXQz6fPEpDtp7hRs+QKJvtHvx0hUld4VBHx566bHZPoNQVEnWdp6uu\nt4Co57VL/3PbpeexvS0cWxoSdX3t7djS/yiXBkulx/YMefZHuWP7c42eYVLXo1xdJfS3bWl+Db6O\n9L2O5ubKXVuJRx+Furrkeemfk/14bwyOJEmSVDHb25OpalVV66iqmkgImSQ4evWruxe+4Q1JUPKL\nXyRhzmOPJaN+Lr54T2gEScAxZ07yeP/7kzDmnnvgRz9KwqE3vAEWLkxGEHWpq0tGIJ1/Plx6KXz0\nozBjBnz3u8n0t2w2qRs3Dv7X/0qu+/3vJyHTGWfAOefAiSfu+c/Zsccm2yFZ6Puhh5LRRMcem4wW\nKidG2LYNRo3qHgJJ0nC2ZAnMn1/pVoxsP/xh8oFFT/vx3hgcSZIkqWJ2djRCWz2ZzBry+cnJxpUr\n4dRTuxfW1iahz89/nkxPe/e7k3Dp2mv3fYHRo+Hss5NH6TS3cqZPTzrYX/wiTJmSBFXlVFfDBz+Y\nPPoyfXry6EsIMGZM33WSJA0xF8eWJElSRbS2t9JOG7WZBnbtWk9V1aRkhNCGDXtPVYNkvaAHHoAP\nfShZM+iHP+w93Cmnv9M1ZszYv/NKkvQyZnAkSZKkimhqSxaSHl2VBEf5/KRkfSDYs5h1qVNOSdZk\n+MEPkrWDjjhiyNoqSdJI5VQ1SZIkVURjayMA9dX1tLWto77+tbB8VbKz3Iij446DQw9NFpZ+73uH\nrqGSpIOydOnSSjdhxBnIn7nBkSRJkiqiqTUZcVSoaaCtbV2yxtHKlck0sUMO2fuATAaefjq5Lb0k\nKfUmTJhAXV0d55xzTqWbMiLV1dUxYcKEgz6PwZEkSZIqomvE0YT6ajo6GovB0ePJGkOZXlZUKBSG\nsIWSpIMxffp0li5dysaNGyvdlBFpwoQJTO/PDRr6YHAkSZKkiugKjg6b0AJAPj8FVt5VfpqaJGlY\nmj59+oCEF6ocF8eWJEm7rVixggsvvJDZs2dTW1tLoVDgDW94A9dffz0tLcl/7mfOnMnpp59e9vgH\nHniATCbDnXfeude+JUuWcPrppzN+/HhGjx7NMcccw9e//vVBfT1Kt67FsaeOawagqqo4Vc3gSJKk\n1HDEkSRJAuC+++7jrLPOoqamhnPPPZejjz6atrY2HnzwQS677DKeeeYZbrjhBkIftzQvt/9nP/sZ\np59+OvPmzeMzn/kMo0ePZvny5fzpT38arJejYaCxtRFiYNL4bQDkqyYlwZELX0uSlBoGR5IkiVWr\nVnH22Wdz+OGH88tf/pJJkybt3nfRRRdx1VVXce+99/brXDHGbt83NTVx3nnncdppp3HbbbcNaLs1\nvDW2NkJbPWMK64FA1Y4cNDY64kiSpBRxqpokSeKaa65hx44d3Hzzzd1Coy6zZs3i4osvPqBz33rr\nraxfv56rr74agObm5r3CJY1MW3c2QUsD9fXrqKoaT2bVC8kOgyNJklLD4EiSJHHPPfcwa9YsTjjh\nhH7V79q1i02bNu312Lp16161999/Pw0NDbzwwgvMmTOH0aNH09DQwEc+8hFaW1sH+qVoGNnY1Ait\nDdTVrSsujL0y2TFzZkXbJUmS9nCqmiRJI1xTUxMvvvgiZ555Zr+PWbx4MRMnTiy7r+caR88//zy7\ndu3ijDPO4O///u/5whe+wK9//Wuuv/56tm3bxq233npQ7dfwtWl7MlUtn1+3Z2Hs0aNh/PhKN02S\nJBUZHEmSNAiam5tZtmzZoF5jzpw51NXVHfR5GhuTW6LX19f3+5gTTzyRq6++eq8pZ4899hiXXnpp\nt23bt29n586dXHTRRVx33XUAnHnmmbS2tvJv//ZvXHnllcyePfsgX4WGo63NTdDaQC63jnz+sD13\nVOtjAXZJkjR0DI4kSRoEy5YtY/78+YN6jUcffZR58+Yd9HkaGhqAZORRf02YMIE3velNe23PZrN7\nhUm1tbUAnH322d22v/e97+XGG2/k4YcfNjgaobbuTKaqhfAk+fx8WLnU9Y0kSUoZgyNJkgbBnDlz\nePTRRwf9GgOhvr6eqVOn8uSTTw7I+XqaOnUqzzzzDJMnT+62vWsR7i1btgzKdZV+ja2N0HoInZ3r\nyOcnw8r74K1vrXSzJElSCYMjSZIGQV1d3YCMBhoqp556KjfddBOPPPJIvxfI7q/58+fzi1/8ghdf\nfJEjjjhi9/Y///nPAL2ulaSXvx27mqhqr6OzcxtVVZNg9WpHHEmSlDLeVU2SJHHZZZdRV1fHBRdc\nwPr16/fav3z5cq6//voDOve73/1uYozcfPPN3bZ/61vfoqqqije+8Y0HdF4Nfzs6GplUlwUgv6Ma\nWloMjiRJShlHHEmSJGbNmsXChQs5++yzOeqoozj33HM5+uijaWtr46GHHuK2227j/PPPP6BzH3fc\ncZx//vnccsst7Nq1i5NOOolf/epX3HHHHXzqU59iypQpA/xqNFy0dDbxioZkTaz8S23JRoMjSZJS\nxeBIkiQBcNppp/HEE09w7bXXcvfdd3PDDTdQXV3N3Llzue6667jgggsACCEQ9nHXq3L7brzxRmbM\nmMEtt9zCXXfdxYwZM/jqV7/KxRdfPGivR+kWY6SVRibXdwKQf2F7smPmzMo1SpIk7cXgSJIk7TZ7\n9mxuuOGGfdasWLGi130nnXQSHR0de23PZrNcfvnlXH755QfdRr087GzfSQwdTGlIRhpVrdgE48dD\nfX2FWyZJkkq5xpEkSZKGXFNrEwATGlrI5caTWbHGaWqSJKWQwZEkSZKGXGNrIwATRjeTz0+BlSsN\njiRJSiGDI0mSJA25ruBo7Ogm8vnJBkeSJKWUwZEkSZKGXFNbMlWtoW4b+dxEWLMGZs2qcKskSVJP\nBkeSJEkacl0jjkbVbCHfUgudnTB7doVbJUmSejI4kiRJ0pDb3JwER9X5DVRtK3ZJHXEkSVLqGBxJ\nkiRpyG3Y1kRVZ5Zsdiv59e2QzcK0aZVuliRJ6sHgSJIkSUNu/bZGxjAagPyfdsD06VBVVeFWSZKk\nngyOJEmSNOQ2bW9kbKYWgPyKLa5vJElSShkcSZIkacht2dHEuEw1APll61zfSJKklDI4kiRJ0pDb\nurORsdlkalrV42sMjiRJSimDI0mSJA25bS2NjKsK5LJjyWxpMjiSJCmlDI4kSdJuK1as4MILL2T2\n7NnU1tZSKBR4wxvewPXXX09LSwsAM2fO5PTTTy97/AMPPEAmk+HOO+/cve0DH/gAmUym7CObzbJ2\n7doheW1Kl+27mhhfA/nOMckG1ziSJCmVcpVugCRJSof77ruPs846i5qaGs4991yOPvpo2traePDB\nB7nssst45plnuOGGGwgh7PM8Pfd/+MMf5pRTTum2LcbIhRdeyKxZszjkkEMG/LUo/Xa0NzK+roN8\na12ywRFHkiSlksGRJEli1apVnH322Rx++OH88pe/ZNKkSbv3XXTRRVx11VXce++9/TpXjLHb9yec\ncAInnHBCt22//e1vaW5u5n3ve9/BN17D0s6ORsbVtpFvHA1jx8KYMZVukiRJKsOpapIkiWuuuYYd\nO3Zw8803dwuNusyaNYuLL754wK536623kslkWLBgwYCdU8NLK02MrWuhakOH09QkSUoxRxxJkiTu\nueceZs2atdfIoN7s2rWLTZs27bV969atfR7b3t7O7bffzutf/3qmT5++323Vy0NbaKRQ20H+zzth\n1qsr3RxJktQLgyNJkka4pqYmXnzxRc4888x+H7N48WImTpxYdl9fayD99Kc/ZePGjU5TG8E6Yyfk\nmhhdDfmV21zfSJKkFDM4kiRpEDQ3w7Jlg3uNOXOgru7gz9PY2AhAfX19v4858cQTufrqq/daz+ix\nxx7j0ksv3eexCxcuJJ/P8653vWv/G6uXhR1tOxhTlTzPL98MJxkcSZKUVgZHkiQNgmXLYP78wb3G\no4/CvHkHf56GhgYgGXnUXxMmTOBNb3rTXtuz2exeYVKp5uZm7r77bt761rcybty4/W+sXhYaWxsZ\nl0+e5zdH1ziSJCnFDI4kSRoEc+Ykwc5gX2Mg1NfXM3XqVJ588smBOeE+3HnnnezcudNpaiNcY2sj\nY4vBUdVmnKomSVKKGRxJkjQI6uoGZjTQUDn11FO56aabeOSRR/q9QPaBuPXWWxk9ejSnnXbaoF1D\n6beluYmxXVPVtmfhsMMq2yBJktSrTKUbIEmSKu+yyy6jrq6OCy64gPXr1++1f/ny5Vx//fUHdY2N\nGzdy//338853vpOampqDOpeGt5e2JCOOws5qMofOhFz5zzLv2rCBZTt2DG3jJElSN444kiRJzJo1\ni4ULF3L22Wdz1FFHce6553L00UfT1tbGQw89xG233cb5559/UNf4wQ9+QEdHh9PUxEtbkjWOqpqq\nel3f6NnmZv726acp5HL8/Nhjmb8fi7dLkqSBY3AkSZIAOO2003jiiSe49tprufvuu7nhhhuorq5m\n7ty5XHfddVxwwQUAhBAIIfR6nt72LVy4kMmTJ3PyyScPSvs1fGzY1sTYPFRvib2ub3T16tVMyeeZ\nVl3NyY89xuJjj+WE4kLukiRp6BgcSZKk3WbPns0NN9ywz5oVK1b0uu+kk06io6Oj7L6HHnrooNqm\nl48NTY3MGhWoWddaNjj6Y3Mzt65bx1df8QrOmzKFtz/xBKc8/jg/mTuX1xcK3Wqb2tv5yebN7Ojo\nYHQ2S302m3zN5RifyzEpnyef6b46Q3tnJ6taWnh+505WtrQwoaqKOXV1HFFbS202u7suxshLbW27\n68bkcsysqWFmTQ2Fkul1MUYaOzpY29rKhl27qM1kGFdVxdhcjkIuR6YYpnbEyI6ODrZ3dLCjo4Nc\nCNRkMlRnMru/dsRIe4zsKn5tj5EMkAmBbNfXEHbfvTCWPErbUyqEQFecG4q1nTHudWwofRSvUe78\n1r1869LcNuuss25g65ra2+kvgyNJkiQNqc3bmzihIUN+Qzu8ce/g6H+vWcOkfJ4LDjmE2myWn86d\ny2lPPcVbHn+ce+fO5XUNDfx082YWrlvH3Zs2sbOzc5/XG5vLMTmfZ0JVFevb2ljR0kJ7MVzJAl1R\nZwCmV1fzitpaNrW388edO9neSxBayGaZVlPD9o4OXmpro6WXNgSgIZulLcY+2ylJ0pB57rl+lxoc\nSZIkaUht2dnIuHwkv4W91jhasXMn333pJa6dPXv36J/RuRz3HnMMZzz1FG974glqMhm2tLczd9Qo\nrpg5k7MnTWJqPr97NE9T8bFx1y7WtbWxrq2N9bt2sWHXLv6ivp4jamt3P6bV1LCtvZ1nm5tZ1tzM\ns83N/HHnTmbX1vK+SZM4ojgS6fBi3erWVla1tLCqpYUXWlqoz+WYks9zSD7PlHyeiVVV7OzsZEt7\nO5t37WJLeztb29upyWQYXRwNNTqbpS6ToT1GWmOkpbOT1s5OWjo7yYZAVQjkil+zIRBJRit1xkhH\n8Xnpp8qlnzJ36Zoy2vMT5xgjmZJjup6XfiLddUzp+Sl+/3KrKx251fPnyQiviyXbR1Jd19+drrpY\nWjvC69L0d7dSdcPh725/65a3t/NJ+sfgSJIkSUOqqWULo2o7yW8GDj+8277Pr1nD+KoqLpw6tdv2\numyWHx99NP+8ciXVmQzvnTSJo0eP7lYzJpNhTFXVfrdnXFUVrysUeF2PaXA91WazTKmudq0lSdKw\nt2TcOIMjSZIkpVTcCEC+vR5KwprVLS38+0sv8fnDD6euZK2hLjXZLF9+xSuGrJmSJAkyfZdIkiRJ\nAyeXSYKjqtHTum3//OrVjMnluOjQQyvRLEmSVIbBkSRJkoZUTW4LAPlxe9Y3eqGlhW+/9BL/NG0a\no8qMNpIkSZVhcCRJkqQhVZdvBCA/5ajd265Zs4aGbJaP9ljbSJIkVZbBkSRJkoZMR2cH9dWbyDVC\n5vBXArCmpYWb1q7l49OmMTrnEpySJKWJ/zJLkrQfli5dWukmjDj+zF9efvT0j5iW3U5+CzBrFgCf\nW72aQi7HP7q2kSRJqWNwJElSP0yYMIG6ujrOOeecSjdlRKqrq2PChAmVboYOUmfs5PKfX83Hq8ZR\ntWMzvGk2f2xu5ttr13Lt7NmONpIkKYX811mSpH6YPn06S5cuZePGjZVuyog0YcIEpk+fXulm6CDd\ntew/Wd70NFMmTiO/aQsceij/8txzTM7n+bBrG0mSlEoGR5Ik9dP06dMNL6QDFGPksh9/jsyqk5h4\n3GPk1zbwdEsLt65bxzeOOIJa76QmSVIqjbjFsUMIHw0hrAwh7Awh/HcI4TWVbpMkSVJaDVTf6cfL\nfsrynUu44tjxdNQ3MnHtkVyxciUzamr44CGHDHSzJUnSABlRwVEI4T3Al4ErgOOBx4HFIQQXTZAk\nSephoPpOMUY+dsdVvD0/i7887k6O+P4YVkw6mTs2buSKGTPIZ0ZUl1SSpGFlpP0rfQlwY4zxuzHG\nZcCHgWbg/Mo2S5IkKZUGpO9095O/ZvSoh/n4a1dzyK/qmfrjDJe//e0cWVvLOZMnD0a7JUnSABkx\nwVEIoQqYD9zftS3GGIFfAK+rVLskSZLSaCD7Tlfc/c9c88oM456OHHH3TB7+rwe5r72dfzn8cHKO\nNpIkKdVG0r/UE4AssK7H9nXAlKFvjiRJUqoNSN/pB//1c656xcM0bIdV6y7iU4t+xLlbtzJ31CjO\nmjhxINsrSZIGgXdVgwDESjdCkiRpmOiz7/TbO97Nut/XEoFxhS3ECTW8P/dNVp1yOIdu3sxrGhr4\nzIwZZEIYmhZLkqQDNpKCo41AB9BzIv0k9v4kbbdLLrmEQqHQbduCBQtYsGDBgDdQkiTt26JFi1i0\naFG3bdu2batQa172DqjvBHDDog3U1SbdzExHIKyfxTv/pZX/+aHXMbW6elAaK0mSyjvY/lNIpqqP\nDCGE/wYeiTF+rPh9ANYA18cYr+1ROw949NFHH2XevHlD31hJktQvS5YsYf78+QDzY4xLKt2el5P9\n6TsV9+/Vf9q5Yie/O/J3zLxqJjM+OWMIWy9JknqzP/2nkTTiCOArwHdCCI8CvyO5U0gd8O+9HdDe\nnjwOVG6k/YQlSdLLyX73nXqqnVXLIRcewpovrGHqh6ZSNa5qcFoqSZIGxUhaHJsY44+A/wlcCfwB\nmAu8Jca4obdjTjgBqqoO/PGRjwzRi5MkSRpgB9J3Kmfm5TOJ7ZE1X1gzCK2UJEmDacSNh4kxfhP4\nZn/r586F0aOT5yFAz5l9MSbby9m6Fd7ylgNsqCRJUgrsb9+pnPzkPNM+Po0Xrn2BQ//xUGoOqxmg\n1kmSpME24oKj/XXLLeASR5IkSQdn2j9N48//+mdW/8tqjrzpyEo3R5Ik9dOImqomSZKkysg15Jj+\nz9NZ++217Fi2o9LNkSRJ/WRwJEmSpCFx6EWHUj2tmpX/vLLSTZEkSf1kcCRJkqQhkanOcPiVh7Px\nzo00PtJY6eZIkqR+MDiSJEnSkJn8vsnkD82z4fb9ujGbJEmqEIMjSZIkDZmQDVRPraZ9a3ulmyJJ\nkvrB4EiSJElDKlfI0b7N4EiSpOHA4EiSJElDKlvIOuJIkqRhwuBIkiRJQ8oRR5IkDR8GR5IkSRpS\nuTEGR5IkDRcGR5IkSRpSuUKOjm0dlW6GJEnqB4MjSZIkDSmnqkmSNHwYHEmSJGlIZQtZOnd20tnW\nWemmSJKkPhgcSZIkaUjlCjkARx1JkjQMGBxJkiRpSOXGGBxJkjRcGBxJkiRpSHWNOHKBbEmS0s/g\nSJIkSUPKqWqSJA0fBkeSJEkaUtlCFjA4kiRpODA4kiRJ0pDaPeJoq8GRJElpl6t0A9LuJ8//hGVV\nyw7o2KbWJl576Gs5/pDjB7hVkiRJw1emKkOmNuOII0mShgGDoz58+pefhgPLjQD40LwPceNpNw5c\ngyRJkl4GcmNyLo4tSdIwYHDUhwfPf5Djjj/ugI4NIVBXVTfALZIkSRr+coWcI44kSRoGDI76UFtV\ny6j8qEo3Q5Ik6WUlW8gaHEmSNAy4OLYkSZKGXK6Qc3FsSZKGAYMjSZIkDTmnqkmSNDwYHEmSJGnI\nuTi2JEnDg8GRJEmShpwjjiRJGh4MjiRJkjTkXBxbkqThweBIkiRJQ84RR5IkDQ8GR5IkSRpyuUKO\n2BrpaHGdI0mS0szgSJIkSUMuNyYH4ALZkiSlnMGRJEmShlyukARHTleTJCndDI4kSZI05LKFLGBw\nJElS2hkcSZIkacg54kiSpOHB4EiSJElDbndwtNXgSJKkNDM4kiRJ0pDLNiRT1VwcW5KkdDM4kiRJ\n0pDL5DJkR2edqiZJUsoZHEmSJKkisgWDI0mS0s7gSJIkSRWRK+QMjiRJSjmDI0mSJFVErpBzcWxJ\nklLO4EiSJEkVkRuTc3FsSZJSzuBIkiRJFeFUNUmS0s/gSJIkSRXh4tiSJKWfwZEkSZIqwhFHkiSl\nn8GRJEmSKsLFsSVJSj+DI0mSJFVE1+LYMcZKN0WSJPXC4EiSJEkVkSvkiO2Rzp2dlW6KJEnqhcGR\nJEmSKiJbyAK4zpEkSSlmcCRJkqSKyBVygMGRJElpZnAkSZKkiugKjjq2dVS4JZIkqTcGR5IkSaqI\n3JjiiCPvrCZJUmoZHEmSJKkinKomSVL6GRxJkiSpIrL1WQgGR5IkpZnBkSRJkioiZALZ+qzBkSRJ\nKWZwJEmSpIrJFXIuji1JUooZHEmSJKlicoWci2NLkpRiBkeSJEmqmNyYnFPVJElKMYMjSZIkVUy2\n4BpHkiSlmcGRJEmSKiZXcMSRJElpZnAkSZKkinFxbEmS0s3gSJIkSRXj4tiSJKWbwZEkSZIqxsWx\nJUlKN4MjSZIkVUy2kKW9sZ0YY6WbIkmSyjA4kiRJUsXkCjnogI4drnMkSVIaGRxJkiSpYnKFHIAL\nZEuSlFIGR5IkSaqYruDIBbIlSUongyNJkiRVTG5MMThygWxJklJp0IKjEMKnQgi/DSHsCCFs7qVm\nWgjh3mLNSyGEL4YQMj1q3hhCeDSE0BJCeC6EcF6Z83w0hLAyhLAzhPDfIYTX9NhfHUL4RghhYwih\nKYRwewhh0sC+YkmSpIMzEvtP2UIWMDiSJCmtBnPEURXwI+Bfy+0sdnDuA3LAicB5wN8BV5bUzATu\nAe4HjgW+BnwrhHBKSc17gC8DVwDHA48Di0MIE0ou91XgHcDfAn8JTAXuOOhXKEmSNLBGXP9p91Q1\ngyNJklJp0IKjGOO/xBi/BjzZS8lbgDnA+2KMT8YYFwOXAx8NIeSKNRcBK2KMl8UYn40xfgO4Hbik\n5DyXADfGGL8bY1wGfBhoBs4HCCE0FJ9fEmN8IMb4B+ADwOtDCK8d0BctSZJ0EEZi/yk7OgsZF8eW\nJCmtKrnG0YnAkzHGjSXbFgMF4NUlNb/ocdxi4HUAIYQqYD7JJ2oAxBhj8ZjXFTf9BcmncqU1zwJr\nSmokSZKGg5dd/ymEQK4h54gjSZJSqpLB0RRgXY9t60r27aumIYRQDUwAsr3UdJ1jMtAWY2zcR40k\nSdJw8LLsP+XG5LyrmiRJKZXru2SPEMLngU/soyQCR8UYnzuoViXn6bUZ/azZ1/7+1nDJJZdQKBS6\nbVuwYAELFizo61BJkjTAFi1axKJFi7pt27ZtW4Va0z/2nxL76j9lC1lHHEmSNEgOtv+0X8ER8CXg\nlj5qVvTzXC8Br+mxbXLJvq6vk3vUTAIaY4xtIYSNQEcvNV2for0E5EMIDT0+NSut6dV1113HvHnz\n+iqTJElDoFz4sGTJEubPn1+hFvWL/ac+5ApOVZMkabAcbP9pv6aqxRg3xRif6+PR33/1HwaO6XH3\njjcD24ClJTUn9zjuzcXtxBh3AY+W1oQQQvH7h4qbHgXae9S8EpjedR5JkqTBYv+pb7lCzsWxu78P\nBgAAIABJREFUJUlKqf0dcdRvIYRpwDhgBpANIRxb3PXHGOMO4GfAM8D3QgifAA4BrgK+XuzQANwA\n/EMI4Rrg2ySdl3cBby+51FeA74QQHgV+R3KXkDrg3wFijI0hhJuBr4QQtgBNwPXAb2OMvxuUFy9J\nknQARmr/KVfI0bK6ZaBPK0mSBsCgBUfAlcC5Jd8vKX59E/CbGGNnCOFU4F9JPt3aQdJZuaLrgBjj\nqhDCO0g6N/8I/An4YIzxFyU1Pyp+6nYlyZDrx4C3xBg3lFz7EpIh2bcD1cBPgY8O3EuVJEkaECOy\n/5Qbk6P9caeqSZKURoMWHMUYPwB8oI+aF4BT+6h5gOSWsfuq+SbwzX3sbwUuLj4kSZJSaaT2n1wc\nW5Kk9NqvNY4kSZKkgebi2JIkpZfBkSRJkioqV8jR0dhB7IyVbookSerB4EiSJEkVlSvkIELHdu+s\nJklS2hgcSZIkqaJyY5JlN9u3Ol1NkqS0MTiSJElSRWULWQDXOZIkKYUMjiRJklRRuUJxxJHBkSRJ\nqWNwJEmSpIrqCo46trnGkSRJaWNwJEmSpIpyxJEkSellcCRJkqSKytRlCLng4tiSJKWQwZEkSZIq\nKoRAtpB1xJEkSSlkcCRJkqSKyxVyBkeSJKWQwZEkSZIqLteQo6PRxbElSUobgyNJkiRVnFPVJElK\nJ4MjSZIkVZxT1SRJSieDI0mSJFWcU9UkSUongyNJkiRVnFPVJElKJ4MjSZIkVZxT1SRJSieDI0mS\nJFWcU9UkSUongyNJkiRVXLaQpb2xnRhjpZsiSZJKGBxJkiSp4nKFHHRAZ3NnpZsiSZJKGBxJkiSp\n4nINOQDXOZIkKWUMjiRJklRx2UIWMDiSJCltDI4kSZJUcblCMuLIBbIlSUoXgyNJkiRVnFPVJElK\nJ4MjSZIkVZxT1SRJSieDI0mSJFVcrt6papIkpZHBkSRJkiouZAPZ0VlHHEmSlDIGR5IkSUqFbMHg\nSJKktDE4kiRJUirkGnJOVZMkKWUMjiRJkpQKuULOEUeSJKWMwZEkSZJSwalqkiSlj8GRJEmSUsGp\napIkpY/BkSRJklLBqWqSJKWPwZEkSZJSwalqkiSlj8GRJEmSUsGpapIkpY/BkSRJklLBqWqSJKWP\nwZEkSZJSIVvI0rmzk85dnZVuiiRJKjI4kiRJUirkGnIATleTJClFDI4kSZKUCrlCEhw5XU2SpPQw\nOJIkSVIqZAtZANobDY4kSUoLgyNJkiSlwu6patucqiZJUloYHEmSJCkVnKomSVL6GBxJkiQpFbIN\nTlWTJCltDI4kSZKUCpmaDKEqOFVNkqQUMTiSJElSKoQQyBVyTlWTJClFDI4kSZKUGtmGrFPVJElK\nEYMjSZIkpUaukHOqmiRJKWJwJEmSpNRwqpokSelicCRJkqTUcKqaJEnpYnAkSZKk1HCqmiRJ6WJw\nJEmSpNRwqpokSelicCRJkqTUcKqaJEnpYnAkSZKk1HCqmiRJ6WJwJEmSpNTIFXK0N7YTY6x0UyRJ\nEpCrdAPS7rMrVzK+ru6Ajm1qb+edEyfy3smTB7hVkiRJL0/Zhix0QseODnKj9+6qtqxuoWpyFdma\nbAVaJ0nSyGNw1IfVLS1sam4+oGMDsL6tbWAbJEmS9DKWKyTd045t5YOjJf/fEqb83RRmXT1rqJsm\nSdKIZHDUh1uOOop58+ZVuhmSJEkjQldw1L6tnepDq7vta9/eTtuf21j/w/Uc/rnDCSFUoomSJI0o\nrnEkSZKk1Mg2JFPQyt1ZrXVNKwAty1vY/vj2IW2XJEkjlcGRJEmSUqN0qlpPLatbAAj5wIbbNwxp\nuyRJGqkMjiRJkpQafY44ysKksyex4bYN3nlNkqQhYHAkSZKk1MjV71njqKeW1S1UH1rNpLMnsfO5\nnex4esdQN0+SpBHH4EiSJEmpEbKBbH22/FS1NS3UzKhh7MljyRayTleTJGkIGBxJkiQpVbIN2fJT\n1Va3Uj29mkw+w4QzJhgcSZI0BAyOJEmSlCq5Qq78VLXiiCOAie+aSPPTzexY2v/pav1ZEynGyPrb\n19O2oa3/DZYk6WXM4EiSJEmpkivk9pqq1tneSeuLrdRMT4KjsaeMJVufZcMd/Rt1tPHHG3loykOs\nvnr1PuvW/ttanjnrGZ58x5N07Nx7utzu9rR1suaLa2h+trlf15ckabgyOJIkSVKqlJuq1vbnNuiA\n6hnVSU1NlvGnje9zulrnrk6WX7qcp05/iqrxVaz89Mpew6amR5t4/h+fZ/wZ49nx1A6ePf/ZsqOU\nOnd18szZz7DiEyt49LWPsum+Tb1ev21dG6uvXs2W+7d4FzhJ0rCUG6wThxBmAJcDfwVMAV4EbgWu\njjHuKqmbC3wdeA2wHvh6jPHaHuc6C7gSmAk8B3wyxviTHjVXAhcAY4DfAhfFGP9Ysn9s8TqnAp3A\nHcDHYozejkOSJFWcfac9coUcuzbt6ratZXULwO4RR5BMV1u/cD3NzzdTd0TdXudpWdPCM+95hqb/\n28Tsr8zmsI8dxtL3LWXpuUupmVVD/fH1u2t3bd7F0+96mtHHjebVP3w1m+7ZxNPvepq6V9Ux8/KZ\nu+s62ztZes5SNt2ziaMWHsX6het58tQnmfWFWUy7dBohBABiZ2TtTWtZ8ckVdGzvILZHRs0dxWGX\nHMbkBZPJVCef33a0dLD1V1vZdM8mtv1mG9WHVTPq2FGMPnY0o48bTe0RtXTu7KRtbRtta9toXdvK\nro27yFRlyNRlyNZlyYzKkK3NJteNESLQWXzeAbEjEtsjsSNCJ4SqQKgKZPKZ5Hku0NnWSWyNdLZ2\nJs93RTL5DJma5BGqA5mqDJ1tnUlNS/KIu+Luc2WqM4R8cr64K+4+T2xLrh1yofu1syFpW1f72pP2\nkYGQCZAtfs2QvKbio9cArqRm988CkvcksPsRQkj2dXY/35DUdca9Xkca6kIm7PmzM1zrMiXvRdrq\nMj3+rHTVdO75s5z6ukzJ+1Fa17nntaaurhJ/x4fR74wtz2+hvwYtOALmkDTx74HlwNHAt4A64DKA\nEEI9sBj4GXAhcAxwSwhhS4zxW8Wa1wELgU8A9wLvBe4KIRwfY3ymWPMJ4B+A84CVwOeAxSGEo2KM\nXRPUFwKTgZOBPPDvwI3AOYP3I5AkSeo3+05FuUKOlhUt3ba1rmkFoHp69e5t4946jsyoDBvu2MCM\nT87YvT3GyMa7NvLsB58lW5/l+AePp+GEBgCOvPlImv+ymafOeIr5v59PfnKe2BlZeu5S2hvbOe7X\nx5GpzjDxbycy88qZrPrMKurm1DHprEnEjsiy85ax8c6NvOq2VzHxzIlMevckVl6+khWfWMH2x7dz\n5LeOpPnZZp778HM0PdLElA9OYdYXZrHjiR288JUXePYDz7LikyuYct4Udj63k80/30znjk5qZtYw\n9q/H0vZSG+sXrueFa15IXkyG5D8XJUI+CWa6AhJJkvbXcpb3u3bQgqMY42KSjk2XVSGELwEfptj5\nIel4VAEfjDG2A0tDCMcDHyfpKAF8DPhJjPErxe+vCCG8maSz85GSmqtijD8GCCGcC6wDzgR+FEI4\nCngLMD/G+IdizcXAvSGEf4oxvjTAL1+SJGm/2Hfao9xUtZbVLeTG5ciN3tN9zdZmGf+OZLrajE/O\noLOtk/U/WM8LX3mBHY/vYPxp45nz73OoGle155i6LEffdTRLXrOEp/7mKY771XG88OUX2HzfZo65\n75jdi28DzPj0DJqfaWbZecuomVnDi994kfU/XM+rFiWhEUDIBmb971mMPnY0yz6wjMb/bqRlVQuj\nXjWK4x88nsLrCwDk/yrP2L8ay45lO3jxay/y5xv+zKhXj2LGP89g/GnjGfXqUbtHK0EyAmr749tp\nfraZXCFH/pA81YdUkz8kT7Y+GV3U2dpJZ3MnHc0ddDZ3dvtUefcIgmzY/egawRPbY/cRQe2RkA9k\nqjPJSKDq4qihtrj36KJ82D0KKVOdjFiK7TEZrdTWmRyzqzM5Tz4ZpRTyyfXLXjebXCvkSkYYFUc6\ndI2Qip2x+yfnlHztoecn7ED3USBdn7Znuv+chrQuE8q2r3QkwJDXde75maWqrmtUSWeZmjTX9RyF\nVIm60tEsnXv2Vayu56imrrpe/g5Vqq70z2hq6gbpd0HNkzXJv/T9MJgjjsoZA2wu+f5E4DfFjk+X\nxcBlIYRCjHEb8Drgyz3Osxg4AyCEMItkOPf9XTtjjI0hhEeKx/6oeJ0tXR2fol+Q/OhOAP5zAF6b\nJEnSQBuRfadyd1UrvaNaqYnvmsgz736G5Z9YzrrvraNtbRvj3jaO2V+azdiTx3YLY7rUHFbDq//j\n1Tz2xsd44m1PsPWBrcz49AzGv3V8t7oQAkd++0h2nrSTP7z+D8SOyFHfP4pJZ03a65yT3jOJ2iNq\nef6jzzP1wqkcdslhZKr2Xk501JxRvPJfX8kr//WV+/wZVI2rYuybxjL2TWN7rcnWZMnWZLsFY5Ik\n9Ud+bb7ftUMWHIUQXkHySdfHSzZPAVb0KF1Xsm9b8eu6MjVTis8nk3Ri9lUzhWQNgN1ijB0hhM0l\nNZIkSakxkvtO5e6q1rq6tds0tS7j3z6ezKgMf/ran5hy7hQO+/8PY9SrRvV5jcKJBY686UiWnbuM\nsaeMZeYVM8vWZWuTEUpPv/tpDr3oUCYvmNzrOevn1TPv4Xl9XluSpOFkv4OjEMLnSebM9yYCR8UY\nnys55lDgJ8APY4zf7usSxUfso2Zf+weyRpIk6YDZd9p/2YZsMj2qLZnyBMmIo7F/vffom+yoLPN/\nP5+qCVXkJ/b/01OAKe+fQvW0auqPr0+mcvWiemo18x40EJIkjUwHMuLoS8AtfdTs/iQshDAV+CXw\nYIzxwh51L5F86lVqEt0/BeutpnR/KNas61Hzh5KabmOKQwhZYCx7f9rWzSWXXEKhUOi2bcGCBSxY\nsGBfh0mSpEGwaNEiFi1a1G3btm3bKtSafhtRfSc4+P5TrpB0Udsb28lPyBNjpGV1S7c7qpUadVTf\nI4x6M/aNvU8FkyTp5eBg+0/7HRzFGDcBm/pTW/y07JfA74Hzy5Q8DHwuhJCNMXaNR34z8Gxxjn5X\nzcnA9SXHnVLcToxxZQjhpWLNE8XrNpDMv/9GyTnGFO8m0tUhOpmk0/TIvl7Dddddx7x5fsIkSVIa\nlAsflixZwvz58yvUor6NtL4THHz/KdeQdFE7tnXABGjf0k7njk6qZ+w9VU2SJO3bwfaf9l6xb4CE\nEA4Bfg2sIbkTyKQQwuQQQuknYAuBNuDbIYRXhRDeA/wj3Rd0/BrwthDCx0MIR4YQPgvMB75eUvNV\n4NMhhNNCCMcA3wX+RHHhxhjjMpJFIW8KIbwmhPB64P8Ai7yjmiRJSgP7TntkC8ldw7rurNayugWg\n1xFHkiRp8Azm4thvBmYVHy8Ut3XNi8/C7jt4vIWkI/N/gY3AZ2OMN3edJMb4cAhhAXB18fE8cEaM\n8ZmSmi+GEOqAG0nuPvJfwNtijG0l7Xlv8Tq/ILkJ3+0kt6KVJElKA/tORbunqhXvrNa6phWg7F3V\nJEnS4Bq04CjG+B3gO/2oexI4qY+aO4A7+qj5LPDZfezfCpzTV3skSZIqwb7THrunqjUms/FaVrcQ\nqgNVE73tvCRJQ23QpqpJkiRJB2L3VLXiiKOWNcnC2CHT+53PJEnS4DA4kiRJUqpka7KEfNgzVW11\nK9XTXRhbkqRKMDiSJElS6uQacnumqq1pcX0jSZIqxOBIkiRJqZMtZPdMVVvd4h3VJEmqEIMjSZIk\npU6ukKN9WzsdLR3sWreL6hlOVZMkqRIMjiRJkpQ6XVPVWl9oBXDEkSRJFWJwJEmSpNTpmqrWuqYY\nHLnGkSRJFWFwJEmSpNTpmqrWsroFgOrDnKomSVIlGBxJkiQpdbqmqrWsaSF/SJ5Mtd1WSZIqwX+B\nJUmSlDq7p6qtbqV6uqONJEmqFIMjSZIkpc7uqWprWlzfSJKkCjI4kiRJUursnqq2qsU7qkmSVEEG\nR5IkSUqdbCELEVpWtlA9w6lqkiRVisGRJEmSUifXkEueRBxxJElSBRkcSZIkKXV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UcQxqehNF3p4mScpvPSV/8qseSZLEwoULOXjwIIsXLz4h6alXUlLC7Nmz222+\niOCNb3wj+/bta7cxlR/qCo5BdR93HEmS8l5PyZ/ccSRJkli+fDklJSVceumlrYqvqalh7969Tdpb\nSmQOHTrE4cOH2b9/P//5n//JD37wA6ZMmXLGa1Z+qos6qOlNQZGFI0lSfusp+ZOFI0mSergDBw6w\nc+dOrrvuula/Z9WqVZx99tnN9p3sHv5PfvKT3HPPPQAUFBRw/fXX85WvfOX0F6y8VldQB8d6ueNI\nkpTXelL+ZOFIkqQcOFRby7ZDh3I6x/DiYooLC9s8TlVVFQD9+/dv9XvGjBnDggULmtyPv2nTJubO\nndvse+bMmcPkyZN58cUXeeihh6itreXo0aNnvnDlJXccSZJOxvypqa6QP1k4kiQpB7YdOsTojRtz\nOsfG0aMZdRrJyskMGDAAyHxz1lqDBg1i/PjxTdoLCwubJEP1LrroIi666CIAbrrpJv7+7/+eCRMm\n8NRTT53BqpWv6gpTpnDkjiNJUiPmT011hfzJwpEkSTkwvLiYjaNH53yO9tC/f3+GDBnC5s2b22W8\n1rr++uv56Ec/yq9+9Sv+7M/+rEPnVudJhe44kiQ1z/zp1Dojf7JwJElSDhQXFrbLt1kdZcKECdx7\n771s2LCh1Qc8ttXhw4cB2L9/f4fMp66hrjB5xpEkqVnmT6fWGfmTv7ElSRLz5s2juLiY6dOns3v3\n7ib927dvZ9GiRWc09h/+8IcmbceOHePb3/42/fr14y1vecsZjav8VNcrQXUfoqj5Q0AlScoXPSV/\ncseRJEmipKSEBx98kLKyMkaMGMHUqVMpLS2lurqa9evXs3TpUqZNm3ZGY8+YMYOqqiouv/xy/vRP\n/5Rdu3bxwAMP8Nxzz3HXXXdR3E5bxpUfUi93HEmSuoeekj9ZOJIkSQBMnDiRZ599ljvvvJNly5ZR\nUVFBUVERI0eOpLy8nOnTpwOZx8We7JGx9f0NlZWVsXjxYioqKti7dy/9+/dn9OjR3HnnnVx77bU5\nvSZ1MXV1mR1HHo4tSeomekL+ZOFIkiQdN2zYMCoqKlqMqaysPGnfuHHjqK2tPaHtxhtv5MYbb2yX\n9SnP1dSQeuPh2JKkbqW750/+xpYkSVLHqK4m9a5zx5EkSXkkp7+xI+LTEfFURFRFxEsR8WhEXNQo\npigi7o6IPRFxICIejojBjWLeGBErIuJgROyKiC9EREGjmHdGxMaIOBIRv4yIDzSzno9FxG8i4nBE\n/Dwi3p6HpkxaAAAgAElEQVSbK5ckSVITR4++esaRO44kScoLuf6N/Q7gK8ClwN8CvYEfRUS/BjFf\nBq4FrgcuB4YA36vvzBaIVpK5rW4M8AHgZuCOBjFDgeXA48DbgH8HvhkRf9cg5j3Al4DbgL8AngFW\nRcSg9rtcSZIknUw6epTUJ/NUNXccSZKUH3J6xlFK6ZqGryPiZmA3MBpYFxEDgGlAWUppbTbmg8DW\niLgkpfQUcBUwHBifUtoDbI6IW4HPR8TtKaVjwEygMqU0LzvVcxExFpgD/DjbNge4J6V0f3aej5Ip\nWE0DvpCbfwKSJEmql6oPZv5yrBfR++QHhEqSpK6jo7/qeS2QgD9mX48mU7x6vD4gpfQc8DxwWbZp\nDLA5WzSqtwoYCPx5g5jVjeZaVT9GRPTOztVwnpR9z2VIkiQp5+qOHAAgUu8WnywjSZK6jg4rHEUm\nO/gysC6ltCXbfC5QnVKqahT+UravPualZvppRcyAiCgCBgGFJ4k5F0mSJOVcqj4EZApHkiQpP+T0\nVrVGvga8BRjbitggszPpVFqKiVbGtGYeSZIktVFd9la1oE8nr0SSJLVWhxSOIuKrwDXAO1JKLzbo\n2gX0iYgBjXYdDebV3UG7gMZPPzunQV/9n+c0ihkMVKWUqiNiD1B7kpjGu5BOMGfOHAYOHHhC25Qp\nU5gyZUpLb5MkSTmwZMkSlixZckLb/v37O2k1Ol31haOCcMeRJEn5IueFo2zR6F3AuJTS8426NwLH\ngCuAR7PxFwHnA+uzMU8Cn4mIQQ3OOboS2A9sbRBzdaOxr8y2k1KqiYiN2XmWZeeJ7OtFLa2/vLyc\nUaNGtfp6JUlS7jT35c3TTz/N6NGjO2lFOh2pJrvjqMAdR5Ik5YucFo4i4mvAFGAScDAi6nf87E8p\nHUkpVUXEYuCuiHgZOECmkPOzlNJ/ZWN/BGwBvhMRnwLOA+YDX00p1WRjKoBZEbEQ+A8yBaEbyOxy\nqncX8O1sAekpMk9ZKwbuy8GlS5IkqZG6msPQGwqiqLOXIkmSWinXO44+SuYMoScatX8QuD/79zlk\nbiN7GCgCfgh8rD4wpVQXEROAr5PZhXSQTLHntgYxOyLiWjLFoVuA3wEfSimtbhDzUEQMAu4gc8va\nJuCqlNIf2ulaJUmS1IK6mkOZwlGhO44kScoXOS0cpZRO+dS2lNJRYHb252QxLwATTjHOWqDFfeop\npa+ROaRbkiRJHSzVZJ6qVlDYt5NXIkmSWuuUhR1JktRzVFZWMmPGDIYNG0a/fv0YOHAgY8eOZdGi\nRRw5cgSAoUOHMmnSpGbfv3btWgoKCnjkkUdOOsfnPvc5CgoKGDlyZE6uQV1X3bHDABT0snAkSeo+\nunv+1CFPVZMkSV3fypUrmTx5Mn379mXq1KmUlpZSXV3NunXrmDdvHlu2bKGiooLM8yVOrqX+nTt3\nsnDhQs4666z2Xr7yQDqWSZ6jt4UjSVL30BPyJwtHkiSJHTt2UFZWxgUXXMCaNWsYPHjw8b6ZM2cy\nf/58VqxY0aqxUkon7fvkJz/JmDFjOHbsGHv37m3zupVf6nccFfb2cGxJUv7rKfmTt6pJkiQWLlzI\nwYMHWbx48QlJT72SkhJmzz7pcYSt8tOf/pRHHnmE8vLyNo2j/FVXm9lx5K1qkqTuoKfkT+44kiRJ\nLF++nJKSEi699NJWxdfU1DT7jde+ffuaja+rq+OWW27hwx/+MKWlpW1aq/JXyhaO3HEkSeoOekr+\nZOFIkqQe7sCBA+zcuZPrrruu1e9ZtWoVZ599drN9zd2j//Wvf53nn3+eNWvWnPE6lf/qao8CUOAZ\nR5KkPNeT8icLR5Ik5UDtoVoObTuU0zmKhxdTWFzY5nGqqqoA6N+/f6vfM2bMGBYsWNDkfvxNmzYx\nd+7cE9r++Mc/ctttt/HZz36WP/mTP2nzeru7iPg08A/AcOAwsB74VErplw1iioC7gPcARcAq4B9T\nSrsbxLwRqADeCRwA7gf+V0qprkHMO4EvAX8OPA8sSCl9u9F6Pgb8M3Au8AwwO6X0X2dybanuKNQG\nhUW9z+TtkqRuzvzpVV0pf7JwJElSDhzadoiNozfmdI7RG0fTf1Trk5WTGTBgAJD55qy1Bg0axPjx\n45u0FxYWNkmG/uVf/oXXv/71zJo1q20L7TneAXwF+G8yudq/AT+KiBEppcPZmC8DVwPXA1XA3cD3\nsu8lIgqAlcCLwBhgCPAdoBr412zMUGA58DXgvcDfAt+MiBdTSj/OxryHTGHpI8BTwBxgVURclFLa\nc7oXVld3FGp6U9DXYzYlSU2ZP72qK+VPFo4kScqB4uHFjN44OudztIf+/fszZMgQNm/e3C7jNfTr\nX/+ae++9l3//939n586dQOapIUeOHKGmpobf/va3DBgwgNe97nXtPne+Sild0/B1RNwM7AZGA+si\nYgAwDShLKa3NxnwQ2BoRl6SUngKuIrNjaXy2wLM5Im4FPh8Rt6eUjgEzgcqU0rzsVM9FxFgyxaEf\nZ9vmAPeklO7PzvNR4Nrs/F843WurS9VwrBcFRRaOJElNmT9ldLX8ycKRJEk5UFhc2C7fZnWUCRMm\ncO+997Jhw4ZWH/DYGjt37iSlxC233NLsU0VKSkr4+Mc/zl133dVuc3ZDrwUS8Mfs69FkcrjH6wNS\nSs9FxPPAZWR2Bo0BNjfaFbQK+DqZ29KeycasbjTXKqAcICJ6Z+f63w3mSRGxOjvPaUt1R6GmjzuO\nJEnNMn/K6Gr5k4UjSZLEvHnzeOCBB5g+fTqPP/54k0fKbt++nRUrVnDLLbec1rilpaU8+uijTdr/\n5V/+hVdeeYVFixZRUlLSprV3Z5E5KfPLwLqU0pZs87lAdUqpqlH4S9m++piXmumv73umhZgB2TOU\n/gQoPEnMm0//arI7jmp6EUVNDwCVJCnf9JT8ycKRJEmipKSEBx98kLKyMkaMGMHUqVMpLS2lurqa\n9evXs3TpUqZNm3ba477+9a9n0qRJTdrLy8uJCCZOnNgey+/Ovga8BRjbitggszPpVFqKiVbGtDjP\nnDlzGDhw4AltU6ZM4RJq3HEkSeo28iV/WrJkCUuWLDmhbf/+/a1+v4UjSZIEwMSJE3n22We58847\nWbZsGRUVFRQVFTFy5EjKy8uZPn06kHlcbHOPjK3XUt+ZxPVUEfFV4BrgHSmlFxt07QL6RMSARruO\nBvPq7qBdwNsbDXlOg776P89pFDMYqEopVUfEHqD2JDGNdyGdoLy8nFGjRjVp/9WiOzKHY3vGkSSp\nm8iH/GnKlClMmTLlhLann36a0aNbd56UhSNJknTcsGHDqKioaDGmsrLypH3jxo2jtrb2lPP85Cc/\nOe219STZotG7gHEppecbdW8EjgFXAI9m4y8CzgfWZ2OeBD4TEYManHN0JbAf2Nog5upGY1+ZbSel\nVBMRG7PzLMvOE9nXi87kuurSsczh2K+xcCRJ6j66e/5k4UiSJKkLiYivAVOAScDBiKjf8bM/pXQk\npVQVEYuBuyLiZeAAmULOz1JK/5WN/RGwBfhORHwKOA+YD3w1pVSTjakAZkXEQuA/yBSEbiCzy6ne\nXcC3swWkp8g8Za0YuO9Mrq2OWqgpcseRJEl5xMKRJElS1/JRMmcIPdGo/YPA/dm/zyFzG9nDQBHw\nQ+Bj9YEppbqImEDmKWrrgYNkij23NYjZERHXkikO3QL8DvhQSml1g5iHImIQcAeZW9Y2AVellP5w\nJhdWS23mVjXPOJIkKW9YOJIkSepCUkqnrKqklI4Cs7M/J4t5AZhwinHWAi0ecJBS+hqZQ7rbrK6+\ncOSOI0mS8oa/tSVJktQh6grq3HEkSVKe8be2JEmSOkRdZHYcRZFP1JMkKV9YOJIkSVKHqCuoyzxV\nzR1HkiTlDX9rS5IkqUOkwjrPOJIkKc/4W1uSJEkdoq7QM44kSco3/taWJElSh0gF7jiSJCnf+Ftb\nkiRJHaKulzuOJEnKN/7WliRJUodIvZI7jiRJyjP+1pYkSVKHSL0yT1WLPtHZS5EkSa1k4UiSJEkd\nIvWqI2p7E2HhSJKkfGHhSJIkHVdZWcmMGTMYNmwY/fr1Y+DAgYwdO5ZFixZx5MgRAIYOHcqkSZOa\nff/atWspKCjgkUceadLW+KewsJCnnnqqQ65LXUBtLal3HdQVdvZKJElqV909f+rVobNJkqQua+XK\nlUyePJm+ffsydepUSktLqa6uZt26dcybN48tW7ZQUVFxyt0iJ+v/p3/6J/7yL//yhLYLL7yw3dav\nLu7oUVLvOqKuT2evRJKkdtMT8icLR5IkiR07dlBWVsYFF1zAmjVrGDx48PG+mTNnMn/+fFasWNGq\nsVJKzbaPHTuWd7/73e2yXuWh6mpS7zoKk+mnJKl76Cn5k7eqSZIkFi5cyMGDB1m8ePEJSU+9kpIS\nZs+e3eZ5XnnlFWpra9s8jvJPOnoYChPh95aSpG6ip+RPFo4kSRLLly+npKSESy+9tFXxNTU17N27\nt8nPvn37TvqeD37wgwwYMIC+ffvyN3/zN2zcuLG9lq88UHf0FQAKkreqSZK6h56SP/mVjyRJOVBb\ne4hDh7bldI7i4uEUFha3eZwDBw6wc+dOrrvuula/Z9WqVZx99tnN9jW+R79Pnz7ccMMNXHPNNQwa\nNIgtW7bwxS9+kcsvv5z169fztre9rU3rV36oLxxF9O7klUiSuirzp1d1pfzJwpEkSTlw6NA2Nm4c\nndM5Ro/eSP/+o9o8TlVVFQD9+/dv9XvGjBnDggULmtyPv2nTJubOnXtC22WXXcZll112/PWECRO4\n/vrrGTlyJJ/+9KdZuXJlG1avfJGqDwJQEEWdvBJJUldl/vSqrpQ/WTiSJCkHiouHM3p0brcSFxcP\nb5dxBgwYAGS+OWutQYMGMX78+CbthYWFJz3csaFhw4bxrne9i0cffZSU0imfNKL8V1dfOCpwx5Ek\nqXnmTy3rrPzJwpEkSTlQWFjcLt9mdYT+/fszZMgQNm/e3KHzvvGNb6S6upqDBw9y1llndejc6njp\naKZwFAV9O3klkqSuyvzp1Dojf/JwbEmSxIQJE6isrGTDhg0dNuf27dvp27evRaMeoq4mu+Oo0MOx\nJUndQ0/JnywcSZIk5s2bR3FxMdOnT2f37t1N+rdv386iRYvOaOw9e/Y0aXvmmWd47LHHuOqqq85o\nTOWfuprDABT0cseRJKl76Cn5k7eqSZIkSkpKePDBBykrK2PEiBFMnTqV0tJSqqurWb9+PUuXLmXa\ntGlnNPZ73vMe+vXrx1/91V8xePBg/ud//od7772Xs846i3/7t39r5ytRV5WqD0JfKOjl4diSpO6h\np+RPFo4kSRIAEydO5Nlnn+XOO+9k2bJlVFRUUFRUxMiRIykvL2f69OlA5nGxLR3G2LjvH/7hH3jg\ngQcoLy+nqqqKs88+mxtuuIHPfvazlJSU5PSa1HXUHcvsOCrs3a+TVyJJUvvpCfmThSNJknTcsGHD\nqKioaDGmsrLypH3jxo2jtrb2hLZZs2Yxa9asdlmf8ld94aigj7eqSZK6l+6eP3nGkSRJknIuHTsC\nQEGRO44kSconFo4kSZKUc8dvVetb3MkrkSRJp8PCkSRJknIu1WZ3HPVxx5EkSfnEwpEkSZJyri5b\nOCos8qlqkiTlEwtHkiRJyrm64zuOPBxbkqR8YuFIkiRJOVd3rBpqelHYt7CzlyJJkk5DTgtHEfGO\niFgWETsjoi4iJjUTc0dEvBgRhyLixxFxYaP+10XEAxGxPyJejohvRsRrGsWMjIifRsThiPhtRMxt\nZp7JEbE1G/NMRFzd/lcsSZKk5tTVVsOxXhT09XtLSZLySa5/c78G2AR8DEiNOyPiU8AsYAZwCXAQ\nWBURfRqEPQiMAK4ArgUuB+5pMEZ/YBXwG2AUMBe4PSKmN4i5LDvOvcDFwPeB70fEW9rrQiVJknRy\ntcdqoLoPBUUWjiRJyie9cjl4SumHwA8BIiKaCfk4MD+l9Fg2ZirwEnAd8FBEjACuAkanlH6RjZkN\nrIiIf04p7QJuAnoDH0opHQO2RsRfAJ8Avtlgnh+klO7Kvr4tIq4kU7T6x/a+bkmSJJ2oti6746if\nhSNJ6mm2bt3a2Uvocdrzn3lOC0ctiYgLgHOBx+vbUkpVEbEBuAx4CBgDvFxfNMpaTWb30qXAf2Zj\nfpotGtVbBcyLiIEppf3Z8b7UaAmrgHe171VJkiSpOXV1x6CmNwWvtXAkST3FoEGDKC4u5qabburs\npfRIxcXFDBo0qM3jdFrhiEzRKJHZYdTQS9m++pjdDTtTSrUR8cdGMZXNjFHftz/7Z0vzSJIkKYfq\n6moyhSPPOJKkHuP8889n69at7Nmzp7OX0iMNGjSI888/v83jdGbh6GSCZs5DOs2YaGXMqeaRJElS\nO6ijFmp6E0XNnV4gSequzj///HYpXqjzdGbhaBeZ4s05nLgbaDDwiwYxgxu+KSIKgddl++pjzmk0\n9mBO3M10spjGu5CamDNnDgMHDjyhbcqUKUyZMuVUb5UkKe9UVlaycOFCVq9ezYsvvkifPn1461vf\nyo033shHPvIR+vbty9ChQxk5ciTLli1r8v61a9cyfvx4Hn74Yd797nef0Pf0009z++2387Of/Yyj\nR49ywQUXMGPGDGbNmtXq9S1ZsoQlS5ac0LZ///4zu1h1qFqO+VQ1SZLyUKcVjlJKv4mIXWSelvYs\nQEQMIHN20d3ZsCeB10bEXzQ45+gKMgWnpxrEfC4iClNKtdm2K4Hnsucb1cdcASxqsIS/y7a3qLy8\nnFGjRp3JJUqSlFdWrlzJ5MmT6du3L1OnTqW0tJTq6mrWrVvHvHnz2LJlCxUVFTT/vItXNdf/ox/9\niEmTJjFq1Cg++9nPctZZZ7F9+3Z+97vfndYam/vy5umnn2b06NGnNY46XqLWp6pJkpSHclo4iojX\nABeSKfQAlETE24A/ppReAL4M/GtE/BrYAcwHfkfm0GtSStsiYhVwb0TMBPoAXwGWZJ+oBvAg8Fng\nPyJiIfBW4BYyT1Kr9+/A2oj4BLACmAKMBj6ckwuXJCnP7Nixg7KyMi644ALWrFnD4MGvbvidOXMm\n8+fPZ8WKFa0aK6UT7wQ/cOAAH/jAB5g4cSJLly5t13Urf9TFMThW7I4jSZLyTK5/c/8lmdvONpK5\ndexLwNPA/weQUvoCmULQPcAGoB9wdUqpusEY7wW2kXma2nLgp8CM+s6UUhVwFTAU+G/gTuD2lNLi\nBjFPkikWfQTYBLwbeFdKacspr2D9+tO+aEmS8s3ChQs5ePAgixcvPqFoVK+kpITZs2ef0dgPPPAA\nu3fvZsGCBQAcOnSoSXFJ3V9d1GUOx3bHkSRJeSWnO45SSms5RXEqpXQ7cHsL/fuAFp/dl1LaDIw7\nRcz3gO+1FNMsD/GSJPUAy5cvp6SkhEsvvbRV8TU1Nezdu7dJ+759+5q0Pf744wwYMIAXXniBSZMm\n8ctf/pLXvOY1vP/976e8vJyioqI2r19dX11BrU9VkyQpD3XFp6p1LW94Q2evQJKknDpw4AA7d+7k\nuuuua/V7Vq1axdlnn91sX+Mzjn71q19RU1PDu971Lj784Q/z+c9/nieeeIJFixaxf/9+HnjggTat\nX/kh1ReO3HEkSVJesXAkSVIOHDp0iG3btuV0juHDh1NcXNzmcaqqqgDo379/q98zZswYFixY0OSW\ns02bNjF37twT2l555RUOHz7MzJkzKS8vB+C6667j6NGjfOMb3+COO+5g2LBhbbwKdXV1hbVwrBfR\np+XD1SVJUtdi4UiSpBzYtm1bzp/0tXHjxnZ58ueAAQOAzM6j1ho0aBDjx49v0l5YWNikmNSvXz8A\nysrKTmh/73vfyz333MOTTz5p4agHSAWZM45O9VQ+SZLUtVg4OoW9NTWdvQRJUh4aPnw4GzduzPkc\n7aF///4MGTKEzZs3t8t4jQ0ZMoQtW7ZwzjnnnNBefwj3yy+/nJN51bXU9aol6go7exmSJOk0WTg6\nhS0HD/J3nb0ISVLeKS4ubpfdQB1lwoQJ3HvvvWzYsKHVB2S31ujRo1m9ejU7d+7kz/7sz463v/ji\niwAnPStJ3UsqrCOOmXpKkpRvPJ3wFC7Nbt+XJKk7mzdvHsXFxUyfPp3du3c36d++fTuLFi06o7Fv\nvPFGUkosXrz4hPZvfvOb9O7dm3e+851nNK7yS+pVS9RZOJIkKd/42/sU+hRYW5MkdX8lJSU8+OCD\nlJWVMWLECKZOnUppaSnV1dWsX7+epUuXMm3atDMa++KLL2batGl861vfoqamhnHjxvGTn/yE733v\ne3zmM5/h3HPPbeerUVeUetVZOJIkKQ/521uSJAEwceJEnn32We68806WLVtGRUUFRUVFjBw5kvLy\ncqZPnw5ARLR4wHFzfffccw9vetOb+Na3vsX3v/993vSmN/HlL3+Z2bNn5+x61LWkXrUU1PXu7GVI\nkqTTZOFIkiQdN2zYMCoqKlqMqaysPGnfuHHjqK2tbdJeWFjIrbfeyq233trmNSo/pd51RDL1lCQp\n33gfliRJknIrJehVS0Fyx5EkSfnGwpEkSZJyq6aG1LuWwMKRJEn5xsKRJEmSciodPQp9LBxJkpSP\nLBxJkiQpp9LRgwAURJ9OXokkSTpdFo4kSZKUU3VHXwGgINxxJElSvrFwJEmS1IVExDsiYllE7IyI\nuoiY1EzMHRHxYkQciogfR8SFjfpfFxEPRMT+iHg5Ir4ZEa9pFDMyIn4aEYcj4rcRMbeZeSZHxNZs\nzDMRcfWZXFOqLxwVFJ3J2yVJUieycCRJktS1vAbYBHwMSI07I+JTwCxgBnAJcBBYFXHCfWAPAiOA\nK4BrgcuBexqM0R9YBfwGGAXMBW6PiOkNYi7LjnMvcDHwfeD7EfGW072guursrWoF3qomSVK+6dXZ\nC5AkSdKrUko/BH4IEBHRTMjHgfkppceyMVOBl4DrgIciYgRwFTA6pfSLbMxsYEVE/HNKaRdwE9Ab\n+FBK6RiwNSL+AvgE8M0G8/wgpXRX9vVtEXElmaLVP57ONR0vHPVyx5EkSfnGHUeSJEl5IiIuAM4F\nHq9vSylVARuAy7JNY4CX64tGWavJ7F66tEHMT7NFo3qrgDdHxMDs68uy76NRzGWcpuOHY/fqe7pv\nlSRJnczCkSRJUv44l0wB6KVG7S9l++pjdjfsTCnVAn9sFNPcGLQi5lxOU11NtnDU2x1HkiTlGwtH\nkiRJ+S9o5jyk04yJVsacap4mUs1hAAp6u+NIkqR84xlHkiRJ+WMXmeLNOZy4G2gw8IsGMYMbviki\nCoHXZfvqY85pNPZgTtzNdLKYxruQmpgzZw4DBw48/rrmD5X85d/CzWdZOJIkqaMtWbKEJUuWnNC2\nf//+Vr/fHUeSJOm4yspKZsyYwbBhw+jXrx8DBw5k7NixLFq0iCNHjgAwdOhQJk1q8oR4ANauXUtB\nQQGPPPLI8bYPfvCDFBQUNPtTWFjI73//+w65tu4gpfQbMgWdK+rbImIAmbOL1mebngRemz3sut4V\nZApOTzWIuTxbUKp3JfBcSml/g5grONHfZdtbVF5ezrJly47/PPjZ93HFFVDQp7hV1ylJktrPlClT\nTvi9vGzZMv5fe/cepldd33v//c0kuUMgGfCKSaQVEa0cVJREBC73g9oUKFV23R4qo2ysaIsUD1d8\nCuz2aR9S2NZDlQhVCxvQqg9Mi9B6tqlgN1RAqAQQNyFowVMt0QBOIKfJzHyfP9a6w8pkMofkPsxi\n3q/rWtfkXuu71vrd9wqTH5/7t35r9erVk97fEUeSJAmAr3/967zpTW9i3rx5nHnmmbzoRS9icHCQ\nb3/725x//vncf//9XH755Yz9oK+njN7+rne9i5NOOmmXdZnJ2WefzWGHHcaznvWslr+XOouI/YHn\nUwQ9AIdFxEuAxzLzp8DHgT+LiB8CPwIuBn4GfAkgMx+IiDXAlRFxDjAX+Gugv3yiGsC1wP8LfDoi\nPgy8GHgvxZPUmi4Fbo6I9wNfA/qA5cAfTPU9DQ9uhf2gZz+DI0mS6sbgSJIk8aMf/YjTTz+d5z73\nuXzrW99i8eKn7nQ655xzuPjii/na1742qWNl7joFznHHHcdxxx23y7pbb72VLVu28Na3vnXfG//0\n8zLgXyhuG0vgY+X6zwJnZeZHImI+cAVwIPCvwKmZOVg5xluAT1A8FW0EuJ5KKJSZmyLilLLmu8BG\nYFVmXl2puT0i+oAPlMsPgN/NzPun+oZGtm2DXuiZZ3AkSVLdGBxJkiQ+/OEPs3nzZq6++updQqOm\nww47jPe85z0tO98111zDrFmz6Ovra9kxny4y82YmmE4gM1cBq8bZ/ivgjAmOcR/wyglqbgBuGK9m\nMoYHi9sce/Y/YF8PJUmSOszgSJIk8dWvfpXDDjtst5FBe7Jjxw4effTR3db/6le/mnDfoaEhrr/+\nel7xildwyCGHTLmtqp/hHdsBb1WTJKmODI4kSZrhnnjiCf7jP/6D173udZPeZ82aNTzzmc8cc9tE\ncyD90z/9Exs3bvQ2tRlkZNDgSJKkujI4kiSpDbZsgQceaO85jjgC5rfg/8M3bdoEwIIFCya9z/HH\nH88HPvCB3eYzuueeezjvvPPG3feaa65h7ty5vPGNb5x6Y1VLw8PbYSSIuXY9JUmqG//1liSpDR54\nAJYvb+857roLli3b9+MsXLgQKEYeTdaiRYt49atfvdv6np6e3cKkqi1btvCVr3yF3/7t3+YZz3jG\n1BurWhoZ2gE75tCzsKfbTZEkSVNkcCRJUhsccUQR7LT7HK2wYMECDj74YO67777WHHAc//AP/8DW\nrVu9TW2GGR4ugqNZ88ad81uSJE1DBkeSJLXB/PmtGQ3UKa997Wu58sorueOOOyY9QfbeuOaaazjg\ngAM47bTT2nYOTT85MlgERw2DI0mS6sZ/vSVJEueffz7z58/nne98J7/4xS922/7v//7vXHbZZft0\njhZ72CUAACAASURBVI0bN3LTTTfx+te/nnnz5u3TsVQvw7kDhmY74kiSpBpyxJEkSeKwww7j2muv\n5fTTT+fII4/kzDPP5EUvehGDg4PcdtttfOELX+Css87ap3P83d/9HcPDw96mNgON5BAMznXEkSRJ\nNWRwJEmSADjttNP43ve+x1/91V/x5S9/mcsvv5xGo8HRRx/N6tWreec73wlARBARezzOnrZde+21\nLFmyhBUrVrSl/Zq+RnLIEUeSJNWUwZEkSdrpec97Hpdffvm4NQ899NAet73yla9keHh4zG233Xbb\nPrVN9TXCkHMcSZJUU/7rLUmSpLYaiSI4irl7HqkmSZKmJ4MjSZIktVXGMAzNHvcWR0mSND0ZHEmS\nJKmtRmYNwVBPt5shSZL2gsGRJEmS2ipjmNgxp9vNkCRJe8HgSJIkSW2VPUPEsCOOJEmqI4MjSZIk\ntdXIrBGDI0mSasrgSJIkSW2Vs4dgyFvVJEmqI4MjSZIktVX2jDBrxBFHkiTV0exuN0CSpDpZt25d\nt5sw4/iZ11/OHmLWsCOOJEmqI4MjSZImYdGiRcyfP58zzjij202ZkebPn8+iRYu63QztpewZgXTE\nkSRJdWRwJEnSJBxyyCGsW7eOjRs3drspM9KiRYs45JBDut0M7aWcM8SsEUccSZJURwZHkiRN0iGH\nHGJ4Ie2FnD1MpN1OSZLqaMZNjh0R50bEwxGxNSK+ExHHdrtNkiRJT2uzh5mVjjiSJKmOZlRwFBFv\nBj4GXAgcA9wLrIkIJ02QJElqk5wzRDjQXZKkWppRwRGwErgiMz+XmQ8A7wK2AGd1t1mSJElPY7OH\nmcXcbrdCkiTthRkTHEXEHGA5cFNzXWYmcCNwQrfaJUmS9LQ2MgJzh5g1y1vVJEmqoxkTHAGLgB5g\nw6j1G4ClnW+OJEnS019u3wo9I8wKRxxJklRHMyk42pMAck8bv//9DrZEkiTpaWZk+5MAjjiSJKmm\nZtIshRuBYWDJqPWL2X0U0k4f//hKrr++d5d1fX199PX1tbyBkiRpfP39/fT39++ybmBgoEut0WTk\ntmZw1OhySyRJ0t6YMcFRZu6IiLuAFcCXASIiyteX7Wm/q65azbJlyzrTSEmSNK6xvrxZu3Yty5cv\n71KLNJGdI47meKuaJEl1NGOCo9IlwGfLAOlOiqeszQf+tpuNkiRJeroaGdwMwKyeeV1uiSRJ2hsz\nKjjKzOsiYhFwEcUta/cAp2TmL7vbMkmSpKen4S1PADBrrreqSZJURzMqOALIzE8Bn+p2OyRJkmaC\nkc1bAOiZY3AkSVId+VQ1SZIktc3Q1jI4aszvckskSdLeMDiSJElS2wxvLec4auzX5ZZIkqS9YXAk\nSZKkthnethWAnnkGR5Ik1ZHBkSRJktpmZNs2AGbtt3+XWyJJkvaGwZEkSZLaZniwHHE03+BIkqQ6\nMjiSJElS2wwPbgegZ3+DI0mS6sjgSJIkSW0zsqO4VW32ggVdbokkSdobBkeSJElqm5GhQQB6Djig\nyy2RJEl7w+BIkiRJbTM85K1qkiTVmcGRJEmS2mZkeAcM9dCz35xuN0WSJO0FgyNJkiS1zcjIIOyY\nw6x5djslSaoj/wWXJElS2zSDo5gb3W6KJEnaCwZHkiRJapuRHCqCozA4kiSpjgyOJEmS1DYjFHMc\nSZKkejI4kiRJUtuMUIw4kiRJ9WRwJEmSpLZJdhCOOJIkqbYMjiRJktQ2IzEMQ7O73QxJkrSXDI4k\nSZLUNjlriNhhcCRJUl0ZHEmSJKltRmYNEcPeqiZJUl0ZHEmSJKltctYw4a1qkiTVlsHRBJ6454lu\nN0GSJKm2smcIHHEkSVJtGRxNoGd/OzqSJEl7K3uGHHEkSVKNGRxNYP5vzO92EyRJkmore4aJEb+I\nkySprgyOJEmStEcRcW5EPBwRWyPiOxFx7FT2z9nDzBpxxJEkSXVlcCRJkqQxRcSbgY8BFwLHAPcC\nayJi0WSPUYw4MjiSJKmuDI4kSZK0JyuBKzLzc5n5APAuYAtw1qSPMGfIEUeSJNWYwZEkSZJ2ExFz\ngOXATc11mZnAjcAJ4+27Zd2/se5Db+DW//VsRp77U2YNH9DexkqSpLYxOJIkSdJYFgE9wIZR6zcA\nS8fb8f7N72LDsq+w/fFns/0bf8Kz+i5vVxslSVKbOW5YkiRJUxFAjldw8Yd+nUcPehZb5wVwM4tv\n/xc+fs576evr60wLJUnSTv39/fT39++ybmBgYNL7GxxJkiRpLBuBYWDJqPWL2X0U0i7e8JYrufPh\nudz54/UMn/Mrti78DfpOe2O72ilJksbR19e325c3a9euZfny5ZPa31vVJEmStJvM3AHcBaxorouI\nKF/fNt6+Z75+Mbdd85sMrDmH2Ruf4Mn9ehnOcQcpSZKkacrgSJIkSXtyCfCHEXFmRBwBXA7MB/52\nMjvvvz80Ht9Ezp7Dv2/d2sZmSpKkdvFWNUmSJI0pM6+LiEXARRS3rN0DnJKZv5zsMeY9vo3NwN1P\nPskL5s9vU0slSVK7OOJIkiRJe5SZn8rMQzNzv8w8ITO/O5X9521rENt+xT1PPtmuJkqSpDYyOJIk\nSVLbNFhIPPEjgyNJkmrK4EiSJEltM49eeOKHBkeSJNWUwZEkSZLaZt6shYxsuZ9HBgd5ZPv2bjdH\nkiRNkcGRJEmS2mb+rF7YvB7AUUeSJNWQwZEkSZLaZn7PQtj2nyzomWVwJElSDRkcSZIkqW327+kF\nksMbsw2OJEmqIYMjSZIktc0BcxYC8Ly5yd0GR5Ik1Y7BkSRJktpmwZxeAA7p2c4Ptm7lyaGhLrdI\nkiRNhcGRJEmS2mbB3GLE0ZJ8kgTu27y5uw2SJElTYnAkSZKktlnYKIKj3uHHmR3h7WqSJNWMwZEk\nSZLaZv68ObBjP7YMDnDU/PlOkC1JUs0YHEmSJKlt5s0Dti9k0/ZNHHPAAQZHkiTVjMGRJEmS2qbR\nALb18vjWAV56wAHct3kzQyMj3W6WJEmaJIMjSZIktU2jAWxfyK+2bOKlBxzAtpER1m/d2u1mSZKk\nSWpbcBQRfxoRt0bE5oh4bA81z46Ir5U1j0TERyJi1qiaV0XEXRGxLSIejIi3jXGccyPi4YjYGhHf\niYhjR21vRMQnI2JjRDwREddHxOLWvmNJkiSNVgRHT404ArxdTZKkGmnniKM5wHXA34y1sQyIvg7M\nBo4H3gb8PnBRpeZQ4KvATcBLgEuBqyLipErNm4GPARcCxwD3AmsiYlHldB8HXgO8ATgROBi4YZ/f\noSRJksbVHHE0sG0TB86Zw6Hz5hkcSZJUI20LjjLzLzLzUuC+PZScAhwBvDUz78vMNcCfA+dGxOyy\n5hzgocw8PzPXZ+YngeuBlZXjrASuyMzPZeYDwLuALcBZABGxsPzzysy8OTPvBt4OvCIiXt7SNy1J\nkqRdNOc4Gtg+AMBLnSBbkqRa6eYcR8cD92Xmxsq6NUAv8MJKzY2j9lsDnAAQEXOA5RQjkgDIzCz3\nOaFc9TKKUU3VmvXATyo1kiRJaoPmiKMntm8C4JgDDuDuJ56g6LJJkqTprpvB0VJgw6h1GyrbxqtZ\nGBENYBHQs4ea5jGWAIOZuWmcGkmSJLVBc46jJwaLrthLDziAR4eG+I/t27vbMEmSNCmzJy55SkR8\nELhgnJIEjszMB/epVcVx9tiMSdZM9DXWZGpYuXIlvb29u6zr6+ujr69vol0lSVKL9ff309/fv8u6\ngYGBLrVGk7FzxNGOp25Vg2KC7F+fN6+LLZMkSZMxpeAI+CjwmQlqHprksR4Bjh21bkllW/PnklE1\ni4FNmTkYERuB4T3UNEchPQLMjYiFo0YdVWv2aPXq1SxbtmyiMkmS1AFjfXmzdu1ali9f3qUWaSLN\n4Gjz0CYyk2c3Gjxj9mzOWLeO/Xt6pnSs5reHEbHL+uptb/t6A9xMOUerju85Zt45nu7/bXiOyZ+j\nTn9vPcfuBtevn3TtlIKjzHwUeHSK7dmT24E/jYhFlXmOTgYGgHWVmlNH7XdyuZ7M3BERdwErgC8D\nRPEprgAuK+vvAobKdf9Y1rwAOKR5HEmSJLVHc3LsJHly8EkWNBbwmSOO4O7KBNmx5913anaI9zQ3\nUrUjPZnjeY59P77nmHnnmA5/bz3H9DpHHf7eeo6x/fyxx7hikrVTHXE0aRHxbOAZwHOAnoh4Sbnp\nh5m5Gfhn4H7g8xFxAfAs4GLgE5m5o6y9HHh3RHwY+DRF+PNG4Hcqp7oE+GwZIN1J8ZS1+cDfAmTm\npoi4GrgkIh4HnqAIlW7NzDvb8uYlSZIEPDXiCGDT9k0saCzgvy5axH9dtKi7DZMkaQZbOx2CI+Ai\n4MzK67Xlz1cDt2TmSES8Fvgb4DZgM0XYc2Fzh8z8UUS8hiIcei/wM+AdmXljpea6iFhUnm8JcA9w\nSmb+snLulRS3tF0PNIB/As5t3VuVJEnSWJqTYwMMbB/g1/i17jZIkiRNSduCo8x8O/D2CWp+Crx2\ngpqbgXEnLsjMTwGfGmf7duA95SJJkqQOGT3iSJIk1cusbjdAkiRJT1/NOY4ABrb5BDxJkurG4EiS\nJEltM2cOjjiSJKnGDI4kSZLUNhEwlwVAMceRJEmql3ZOji1JkiQxrzGLYIEjjiRJqiGDI0mSJLVV\nowHQa3AkSVINGRxJkiSprRoNyFzo5NiSJNWQwZEkSZLaqtGAkRFHHEmSVEcGR5IkSWqrRgOGRhY6\nObYkSTXkU9UkSZLUVo0G9AwtdMSRJEk1ZHAkSZKktmo0YPZQryOOJEmqIYMjSZIktVWjAbN2OOJI\nkqQ6MjiSJElSWxXBUa9PVZMkqYYMjiRJktRWjQaw3RFHkiTVkcGRJEmS2qoIjnrZvGMzQyND3W6O\nJEmaAoMjSZIktVWjAbltIQBPbH+iy62RJElTYXAkSZKktmo0ILf2AvhkNUmSasbgSJIkSW3VaMDw\nlmLEkfMcSZJULwZHkiRJaqt582B4SzHiyOBIkqR6MTiSJElSWzUaMLS5GHE0sM1b1SRJqhODI0mS\nJLVVowE7nvRWNUmS6sjgSJIkSW3VaMDg5vn0RI+TY0uSVDMGR5IkSWqrRgMGtwcLGwsdcSRJUs0Y\nHEmSJKmtGg3Yvh165/U6x5EkSTVjcCRJkqS2ajRgcBBHHEmSVEMGR5IkSWqrRqP4uWBOr3McSZJU\nMwZHkiRJaqtmcHTAHEccSZJUNwZHkiRJaqtmcLT/bEccSZJUNwZHkiRJaqtmcDS/xxFHkiTVjcGR\nJEmS2uqp4MinqkmSVDcGR5IkSWqrZnC0XzjiSJKkujE4kiRJmiYi4k8j4taI2BwRj+2h5tkR8bWy\n5pGI+EhEzBpV86qIuCsitkXEgxHxtjGOc25EPBwRWyPiOxFx7KjtjYj4ZERsjIgnIuL6iFi8N++r\nGRw1DI4kSaodgyNJkqTpYw5wHfA3Y20sA6KvA7OB44G3Ab8PXFSpORT4KnAT8BLgUuCqiDipUvNm\n4GPAhcAxwL3AmohYVDndx4HXAG8ATgQOBm7YmzfVDI7m0cv24e1sH9q+N4eRJEldYHAkSZI0TWTm\nX2TmpcB9eyg5BTgCeGtm3peZa4A/B86NiNllzTnAQ5l5fmauz8xPAtcDKyvHWQlckZmfy8wHgHcB\nW4CzACJiYfnnlZl5c2beDbwdeEVEvHyq76sZHM3NhQCOOpIkqUYMjiRJkurjeOC+zNxYWbcG6AVe\nWKm5cdR+a4ATACJiDrCcYkQSAJmZ5T4nlKteRjGqqVqzHvhJpWbSmsHRnOFeAAa2O0G2JEl1YXAk\nSZJUH0uBDaPWbahsG69mYUQ0gEVAzx5qmsdYAgxm5uihQdWaSdsZHI044kiSpLoxOJIkSWqjiPhg\nRIyMswxHxAtacKocrxmTrBlv+2RrdtMMjmY3Rxxtc8SRJEl1MXviEkmSJO2DjwKfmaDmoUke6xHg\n2FHrllS2NX8uGVWzGNiUmYMRsREY3kNNcxTSI8DciFg4atRRtWaPVq5cSW9v787Xw8MAffQM/Rbg\niCNJkjqpv7+f/v7+XdYNDEz+SxyDI0mSpDbKzEeBR1t0uNuBP42IRZV5jk4GBoB1lZpTR+13crme\nzNwREXcBK4AvA0RElK8vK+vvAobKdf9Y1rwAOKR5nPGsXr2aZcuW7Xw9MgI9PTBrR/E0Nec4kiSp\nc/r6+ujr69tl3dq1a1m+fPmk9jc4kiRJmiYi4tnAM4DnAD0R8ZJy0w8zczPwz8D9wOcj4gLgWcDF\nwCcyc0dZeznw7oj4MPBpivDnjcDvVE51CfDZMkC6k+Ipa/OBvwXIzE0RcTVwSUQ8DjxBESrdmpl3\nTvV9zZoFs2fDyGCDRk/DEUeSJNWIwZEkSdL0cRFwZuX12vLnq4FbMnMkIl4L/A1wG7CZIuy5sLlD\nZv4oIl5DEQ69F/gZ8I7MvLFSc11ELCrPtwS4BzglM39ZOfdKilvargcawD8B5+7tG2s0YPt26J3X\n6xxHkiTViMGRJEnSNJGZbwfePkHNT4HXTlBzMzDu+PPM/BTwqXG2bwfeUy77rBkcLdx/oSOOJEmq\nEZ+qJkmSpLbbOeKo0escR5Ik1YjBkSRJktpu54ijhiOOJEmqE4MjSZIktZ3BkSRJ9WRwJEmSpLbb\nZXJsb1WTJKk2DI4kSZLUdjtHHM11xJEkSXVicCRJkqS222XE0TZHHEmSVBdtC44i4jkRcVVEPBQR\nWyLiBxGxKiLmjKo7OiJuiYitEfHjiDhvjGO9KSLWlTX3RsSpY9RcFBE/L8/1zYh4/qjtB0XENREx\nEBGPl23bv/XvXJIkSaM5x5EkSfXUzhFHRwAB/AFwFLASeBfwgWZBRCwA1gAPA8uA84BVEfHOSs0J\nwLXAlcBLgS8CX4yIoyo1FwDvBs4GXg5sBtZExNxKe64FjgRWAK8BTgSuaOk7liRJ0pjmzStHHDV6\n2bR9E5nZ7SZJkqRJaFtwlJlrMvMdmXlTZv4oM78KfBR4faXsDGAO8I7MXJeZ1wGXAe+v1LwP+EZm\nXpKZ6zPzQmAtRVBUrbk4M7+Smd8HzgQOBl4HEBFHAqeU5/luZt4GvAc4PSKWtuP9S5Ik6SnVEUfD\nOcyWHVu63SRJkjQJnZ7j6EDgscrr44FbMnOosm4NcHhE9JavTwBuHHWcNeV6IuIwYClwU3NjZm4C\n7mjWlOd5PDPvrhzjRiCB4/blDUmSJGli1TmOAJ+sJklSTXQsOCrnHHo3cHll9VJgw6jSDZVt49U0\nty+hCIDGq1kK/KK6MTOHKUIsRxxJkiS1WXXEEeA8R5Ik1cTsqe4QER8ELhinJIEjM/PByj6/BnwD\n+PvM/PREpyiX8W58n2h7y2pWrlxJb2/vLuv6+vro6+ub4NCSJKnV+vv76e/v32XdwIAjV+pg54ij\nRjniyCerSZJUC1MOjijmKfrMBDUPNf8QEQcD3wK+nZlnj6p7hGLEUNVidh1BtKea6vYoazaMqrm7\nUrO4eoCI6AEOYveRSrtYvXo1y5YtG69EkiR1yFhf3qxdu5bly5d3qUWaLEccSZJUT1O+VS0zH83M\nBydYhmDnSKN/Af4NOGuMw90OnFiGOE0nA+szc6BSs2LUfieV68nMhymCoZ01EbGQYu6i2yrHODAi\njqkcYwVF4HTHVD8DSZIkTc3o4Mg5jiRJqoe2zXEUEc8C/jfwE+B8YHFELImI6uiha4FB4NMRcVRE\nvBl4L/CxSs2lwKkR8f6IODwiVgHLgU9Uaj4O/FlEnBYRLwY+B/wM+BJAZj5AMaH2lRFxbES8Avhr\noD8zH2n1e5ckSdKuHHEkSVI97c2tapN1MnBYufy0XNecU6gHiqefRcQpFCHQd4GNwKrMvLp5kMy8\nPSL6gA+Uyw+A383M+ys1H4mI+cAVFE9u+1fg1MwcrLTnLeV5bgRGgOuB97X6TUuSJGl3zeCoZ1YP\n+8/Z3+BIkqSaaFtwlJmfBT47ibr7gFdOUHMDcMMENauAVeNs/xVwxkTtkSRJUus1gyOA3nm99H+/\nnwcffZDMiZ5lIkmSWu2XP/zlpGvbOeJIkiRJAnYNjn7vqN/j5h/fzHd+9h0AIqKLLZMkaebZsnHL\npGsNjiRJktR21eBo9W+v7m5jJEma4dauXcvyD0zuqbRtmxxbkiRJamo0YGQEhoa63RJJkjQVBkeS\nJElqu0aj+NkcdSRJkurB4EiSJEltZ3AkSVI9GRxJkiSp7QyOJEmqJ4MjSZIktZ3BkSRJ9WRwJEmS\npLYzOJIkqZ4MjiRJktR2BkeSJNWTwZEkSZLazuBIkqR6MjiSJElS2xkcSZJUTwZHkiRJartmcLRt\nW3fbIUmSpsbgSJIkSW3niCNJkurJ4EiSJEltZ3AkSVI9GRxJkiSp7QyOJEmqJ4MjSZIktZ3BkSRJ\n9WRwJEmSpLabPRsiDI4kSaobgyNJkiS1XUQx6sjgSJKkejE4kiRJUkcYHEmSVD8GR5IkSeoIgyNJ\nkurH4EiSJEkdYXAkSVL9GBxJkiSpI+bNMziSJKluDI4kSZLUEY44kiSpfgyOJEmS1BEGR5Ik1Y/B\nkSRJkjrC4EiSpPoxOJIkSVJHGBxJklQ/BkeSJEnqCIMjSZLqx+BIkiRJHWFwJElS/RgcSZIkqSMM\njiRJqh+DI0mSJHWEwZEkSfVjcCRJkqSOMDiSJKl+DI4kSZLUEQZHkiTVj8GRJEmSOsLgSJKk+jE4\nkiRJUkcYHEmSVD8GR5IkSeoIgyNJkurH4EiSJEkdYXAkSVL9GBxJkiSpIwyOJEmqH4MjSZIkdYTB\nkSRJ9WNwJEmSpI5oNGDHDhgZ6XZLJEnSZBkcSZIkTQMR8ZyIuCoiHoqILRHxg4hYFRFzRtUdHRG3\nRMTWiPhxRJw3xrHeFBHrypp7I+LUMWouioifl+f6ZkQ8f9T2gyLimogYiIjHy7btvy/vsdEofg4O\n7stRJElSJxkcSZIkTQ9HAAH8AXAUsBJ4F/CBZkFELADWAA8Dy4DzgFUR8c5KzQnAtcCVwEuBLwJf\njIijKjUXAO8GzgZeDmwG1kTE3Ep7rgWOBFYArwFOBK7YlzfYDI68XU2SpPowOJIkSZoGMnNNZr4j\nM2/KzB9l5leBjwKvr5SdAcwB3pGZ6zLzOuAy4P2VmvcB38jMSzJzfWZeCKylCIqqNRdn5lcy8/vA\nmcDBwOsAIuJI4JTyPN/NzNuA9wCnR8TSvX2PBkeSJNWPwZEkSdL0dSDwWOX18cAtmTlUWbcGODwi\nesvXJwA3jjrOmnI9EXEYsBS4qbkxMzcBdzRryvM8npl3V45xI5DAcXv7ZgyOJEmqH4MjSZKkaaic\nc+jdwOWV1UuBDaNKN1S2jVfT3L6EIgAar2Yp8IvqxswcpgixHHEkSdIMMrvbDZAkSXo6i4gPAheM\nU5LAkZn5YGWfXwO+Afx9Zn56olOUS05QM972VtawcuVKent7d1nX19fHoYf2AQZHkiR1Un9/P/39\n/busGxgYmPT+BkeSJEnt9VHgMxPUPNT8Q0QcDHwL+HZmnj2q7hGKEUNVi9l1BNGeaqrbo6zZMKrm\n7krN4uoBIqIHOIjdRyrtZvXq1Sxbtmy39WvXFj8NjiRJ6py+vj76+vp2Wbd27VqWL18+qf29VU2S\nJKmNMvPRzHxwgmUIdo40+hfg34Czxjjc7cCJZYjTdDKwPjMHKjUrRu13UrmezHyYIhjaWRMRCynm\nLrqtcowDI+KYyjFWUAROd0z1M2jyVjVJkuqnrcFRRHwpIn4cEVsj4ucR8bmIeNaomqMj4pay5scR\ncd4Yx3lTRKwra+6NiFPHqLmoPMeWiPhmOS9AdftBEXFNRAxExOMRcVVE7N/6dy1JkjR1ZR/pfwM/\nAc4HFkfEkoiojh66FhgEPh0RR0XEm4H3Ah+r1FwKnBoR74+IwyNiFbAc+ESl5uPAn0XEaRHxYuBz\nwM+ALwFk5gMUE2pfGRHHRsQrgL8G+jPzkb19j83gaNu2vT2CJEnqtHaPOPoW8CbgBRSPkn0e8IXm\nxohYQNEpeRhYBpwHrIqId1ZqTqDoJF0JvBT4IvDFiDiqUnMBxeSRZwMvBzYDayJibqUt1wJHUnxb\n9hrgROCK1r5dSZKkvXYycBjwm8BPgZ8D/1n+BHY+/ewU4FDgu8BfAasy8+pKze1AH/CHwD0UfbDf\nzcz7KzUfoQiCrqAYQbQfcGpmDlba8xbgAYqnqX0VuIWir7XXHHEkSVL9tHWOo8y8tPLypxHxIeAf\nI6KnfDLHGcAc4B3lEO115ZDo9wNXlfu9D/hGZl5Svr4wIk6mCIr+qFJzcWZ+BSAizqS4//51wHUR\ncSRFJ2t587GyEfEe4GsR8cf78s2ZJElSK2TmZ4HPTqLuPuCVE9TcANwwQc0qYNU4239F0VdrGYMj\nSZLqp2NzHEXEM4C3AreWoRHA8cAtzfv6S2uAwyOi+SiOEyi+6WJUzQnlcQ+jeCzsTc2N5bdxdzRr\nyvM83gyNSjdSTCR53D6+NUmSJE2CwZEkSfXT9uAoIj4UEU8CG4FnU4wCalrK7k/m2FDZNl5Nc/sS\ndn2SyFg1S4FfVDeW4dVjlRpJkiS1kcGRJEn1M+Vb1SLig8AF45QkcGRmPli+/gjFbWfPAS4EPg+8\ndrxTlEtOUDPe9pbVrFy5kt7e3l3WjfUoO0mS1H79/f309/fvsm5gYGAP1ZpuDI4kSaqfvZnj6KPA\nZyaoeaj5h8x8jGJkzw8j4gGKuY6Oy8w7KB4Fu2TUvovZdQTRnmqq26Os2TCq5u5KzeLqAcrH2B7E\n7iOVdrF69WqWLVs2XokkSeqQsb68Wbt2LcuXL+9SizQVETB3rsGRJEl1MuVb1TLz0cx8cIJlaA+7\n95Q/y++buB04sQxxmk4G1mfmQKVmxajjnFSuJzMfpgiGdtZExEKKuYtuqxzjwHLi7aYVFIHTHZN8\n65IkSdpHjYbBkSRJddK2OY4i4tiIODciXhIRh0TEbwLXAj+gDH3K14PApyPiqIh4M/Be4GOVsmRP\nSgAAD/VJREFUQ10KnBoR74+IwyNiFbAc+ESl5uPAn0XEaRHxYuBzwM+ALwFk5gMUE2pfWbbrFRSP\noO33iWqSJEmdY3AkSVK9tHNy7K3A6ymeXvYAcCVwD/CqzNwBO59+dgpwKPBd4K+AVZl5dfMgmXk7\n0Af8Ybn/64Hfzcz7KzUfoQiCrqAYQbQfcGpmDlba85ayHTcCXwVuAc5u9ZuWJEnSnhkcSZJUL3sz\nx9GkZOb32f0Ws7Hq7gNeOUHNDcANE9SsAlaNs/1XwBkTtUeSJEntY3AkSVK9tHPEkSRJkrQLgyNJ\nkurF4EiSJEkdY3AkSVK9GBxJkiSpYwyOJEmqF4MjSZIkdYzBkSRJ9WJwJEmSpI4xOJIkqV4MjiRJ\nktQxBkeSJNWLwZEkSZI6xuBIkqR6MTiSJElSxxgcSZJULwZHkiRJ6hiDI0mS6sXgSJIkSR1jcCRJ\nUr0YHEmSJKljDI4kSaoXgyNJkiR1jMGRJEn1YnAkSZKkjjE4kiSpXgyOJEmS1DEGR5Ik1YvBkSRJ\nkjrG4EiSpHoxOJIkSVLHGBxJklQvBkeSJEnqmGZwlNntlkiSpMkwOJIkSVLHNBpFaDQ01O2WSJKk\nyTA4kiRJUsc0GsVPb1eTJKkeDI4kSZLUMQZHkiTVi8GRJEmSOsbgSJKkejE4kiRJUscYHEmSVC8G\nR5IkSeoYgyNJkurF4EiSJEkdY3AkSVK9GBxJkiSpY5rB0bZt3W2HJEmaHIMjSZIkdcy8ecVPRxxJ\nklQPBkeSJEnqGG9VkySpXgyOJEmS1DEGR5Ik1YvBkSRJkjrG4EiSpHoxOJIkSVLHGBxJklQvBkeS\nJEnqGIMjSZLqxeBIkiRJHdPTUywGR5Ik1YPBkSRJkjqq0TA4kiSpLgyOJEmS1FEGR5Ik1YfBkSRJ\nkjrK4EiSpPqY3e0GSJIkaWZpNOCGG+Dhh7vdEkmSZqaNGydfa3AkSZKkjnrLW+Dmm2H9+m63RJKk\nmenJJydfa3AkSZKkjvrLv+x2CyRJmtnWroXlyydX6xxHkiRJkiRJGpPBkSRJkiRJksZkcCRJkiRJ\nkqQxGRxJkiRJkiRpTAZHkiRJkiRJGpPB0QTW/XJdt5sgSZIkSZLUFQZHExjO4W43QZIkSZIkqSsM\njibwosUv6nYTJEmSJEmSusLgSNNef39/t5ugktdi+vBaTA9eB0nTnb+npg+vxfTi9Zg+vBbTX0eC\no4iYGxH3RMRIRBw9atvREXFLRGyNiB9HxHlj7P+miFhX1twbEaeOUXNRRPw8IrZExDcj4vmjth8U\nEddExEBEPB4RV0XE/q1/t2o1f5FMH16L6cNrMT14HdRqEfGlsj+0tezXfC4injWqxr6TJs3fU9OH\n12J68XpMH16L6a9TI44+AvwMyOrKiFgArAEeBpYB5wGrIuKdlZoTgGuBK4GXAl8EvhgRR1VqLgDe\nDZwNvBzYDKyJiLmV010LHAmsAF4DnAhc0dJ3KUmStG++BbwJeAHweuB5wBeaG+07SZKkTmt7cFR+\nw3US8MdAjNp8BjAHeEdmrsvM64DLgPdXat4HfCMzL8nM9Zl5IbCWorNTrbk4M7+Smd8HzgQOBl5X\ntuFI4JTyPN/NzNuA9wCnR8TSFr9lSZKkvZKZl2bmnZn508z8DvAh4PiI6ClL7DtJkqSOamtwFBFL\ngP9F0cnZOkbJ8cAtmTlUWbcGODwiesvXJwA3jtpvTbmeiDgMWArc1NyYmZuAO5o15Xkez8y7K8e4\nkWIE1HFTf2eSJEntFRHPAN4K3Jq58zGv9p0kSVJHzW7z8T8DfCoz746I54yxfSnw0Kh1GyrbBsqf\nG8aoaX7btYSiEzNezVLgF9WNmTkcEY9VakabB7Bu3bo9bFanDAwMsHbt2m43Q3gtphOvxfTgdZge\nKv9Wz+tmO1olIj5EMTpoPnA78NrK5uncdwL7T9OOv6emD6/F9OL1mD68Ft0xlf7TlIOjiPggcME4\nJUlxP/xvAwuADzd3newpyiUnqBlveytqDgU444wzJjiEOmH58uXdboJKXovpw2sxPXgdppVDgdu6\n3YjRJtt3yswHy9cfAa4CngNcCHyeXcOj3U7B9Og7gf2nacnfU9OH12J68XpMH16LrjqUCfpPezPi\n6KMUI4nG8zDwaophztsjdsmMvhsR12Tm24FHKL71qlrMrt+C7ammuj3Kmg2jau6u1CyuHqCcK+Ag\ndv+2rWkNxfDwHwHb9lAjSZK6bx5Fp2dNl9uxJ5PpO+0cRZSZjwGPAT+MiAeAn0bEcZl5B9O77wT2\nnyRJqotJ95+mHBxl5qPAoxPVRcR7gP+nsurgskG/B9xZrrsd+J8R0VO5d/9kYH1mDlRqVlBM/Nh0\nUrmezHw4Ih4pa75Xnnshxf33n6wc48CIOKZyr/4Kik7THeO8z2snep+SJGlamHYjjZom23fag+ak\n2I3y57TtO5XHtv8kSVJ9TKr/FJkTjUhujXKOo4eBl2ZmtZPyAPBNilvaXgxcDbwvM68ua04Abgb+\nB/A1oK/887LMvL+sOZ9iCPjvU3zDdTHwQuCFmTlY1nyd4puzc4C5wKeBOzPzv7f5rUuSJE0oIo4F\nXg58G3gceD5wEfBM4EWZucO+kyRJ6rROB0cPAcc0g6Ny/YuBTwDHAhuByzLzo6P2fQPwAYp7/X8A\nnJeZa0bVrAL+EDgQ+Ffg3Mz8YWX7geV5TgNGgOspOllbWvtOJUmSpi4iXgRcChwN7A/8J/AN4AOZ\n+Z+VOvtOkiSpYzoWHEmSJEmSJKleZnW7AZIkSZIkSZqeDI4kSZIkSZI0JoMjtVRE/ElE3BkRmyJi\nQ0T8Y0S8YFRNIyI+GREbI+KJiLg+IkY/8vfZEfG1iNgcEY9ExEciYtaomldFxF0RsS0iHoyIt43R\nnnMj4uGI2BoR3yknHp2RymszEhGXVNZ5LTokIg6OiM+Xn/WWiLg3IpaNqrkoIn5ebv9mRDx/1PaD\nIuKaiBiIiMcj4qqI2H9UzdERcUv5Of84Is4boy1vioh1Zc29EXFqe9719BMRsyLi4oh4qPycfxgR\nfzZGnddCmqKZ/nu+W1rV91Lr7W3fS63Tiv6XWqNVfTB1h8GRWu3/Av6a4pG+vwXMAf45Ivar1Hwc\neA3wBuBE4GDghubGMpT4OjAbOB54G8VTXy6q1BwKfBW4CXgJxWSiV0XESZWaNwMfAy4EjgHuBdZE\nxKLWvd16KDvvf0DxGVR5LTogiglmbwW2A6cARwL/N8VTk5o1FwDvBs6meKrSZorPaG7lUNeW+66g\nuG4nAldUjrEAWEPxBMtlwHnAqoh4Z6XmhPI4VwIvBb4IfDEijmrpm56+/gfFZ/xHwBHA+cD5EfHu\nZoHXQpq6mf57vsv2ue+l1tvbvpdap4X9L7VGq/pg6obMdHFp2wIsongSy38pXy+k+OX93yo1h5c1\nLy9fnwrsABZVas6m+CU/u3z9YeB7o87VD3y98vo7wKWV1wH8DDi/259Lh6/BAcB64DeBfwEu8Vp0\n/Bp8CLh5gpqfAysrrxcCW4HfK18fWV6bYyo1pwBDwNLy9TkUT1iaXan5IHB/5fXfAV8ede7bgU91\n+3Pq0LX4CnDlqHXXA5/zWri47P0y03/PT6eFveh7ubT8Gux138ulpddhn/tfLi29HvvcB3Pp3uKI\nI7XbgUACj5Wvl1OMXrmpWZCZ64GfACeUq44H7svMjZXjrAF6gRdWam4cda41zWNExJzyXNXzZLnP\nCcwsnwS+kpnfGrX+ZXgtOuU04LsRcV15G8HaUSNPngssZdfPaBNwB7tei8cz8+7KcW+k+O/ruErN\nLZk5VKlZAxweEb3l6xMY53rNALcBKyLiNwAi4iXAKyhG1nktpL3g7/lpZ2/6Xmqtfel7qXVa0f9S\n67SiD6YuMThS20REUAzH/XZm3l+uXgoMlr8EqjaU25o1G8bYziRqFkZEg+Lbtp491CxlhoiI0ylu\nGfiTMTYvwWvRKYdRjEBZD5wMXA5cFhFnlNuXUnTyx/uMlgK/qG7MzGGK/zFoxfWaKdfiQ8DfAw9E\nxCBwF/DxzPy7crvXQpo6f89PE/vQ91KLtKDvpdZpRf9LrdOKPpi6ZHa3G6CntU8BRwH/ZRK1QfGL\nYiLj1cQkayZzntqLiF+n6DyelJk7prIrXotWmwXcmZl/Xr6+NyJeSNGZ+f/G2W8yn9FENTHJmply\nLd4MvAU4HbifYm6hSyPi55n5+XH281pIU+ff585rR99Lk9SBvpempp39L01dO/tgajNHHKktIuIT\nwO8Ar8rMn1c2PQLMjYiFo3ZZzFPp8iMU38hULals21PNYmBTZg5SzC0yvIea0Sn209Vy4JnAXRGx\nIyJ2AK8E3lem/BuAhteiI/4TWDdq3TrgkPLPj1D8ozjeZ/RI+XqniOgBDmLia1H99mZPNTPlWnwE\n+GBmfiEz/09mXgOs5qlvhr0W0tT5e34a2Me+l1qjFX0vtU4r+l9qnVb0wdQlBkdqubLj8rvAqzPz\nJ6M230UxgeyKSv0LKH6B31auuh148agnsZwMDPDUL//bq8eo1NwOUH7Lc9eo80T5+jZmhhuBF1Ok\n+S8pl+9SfMPS/PMOvBadcCvF5JdVhwM/BsjMhyn+sax+Rgsp5supXosDI+KYyjFWUPwDe2el5sQy\nxGg6GVifmQOVmtHX66Ry/Uwwn92/tRqh/PfQayFNnb/nu28f+l7+vmmtfel7eS1arxX9L7VOK/pg\n6pZuz87t8vRaKIZIP07xaNgllWXeqJqHgVdRfDNzK/Cvle2zKB5d+g3gaIqnFW0ALq7UHAo8SfFE\nr8MpHus4CPxWpeb3KGbhP5PikY9XAI8Cz+z259TF67PzyR5ei45+7i+jeIrKnwDPoxim+wRweqXm\n/PIzOY2i0/lF4AfA3ErN1yk6ncdSTCa4Hvh8ZftCiqdRfJbiVoU3l9fmHZWaE8rr8/7yeq0CtgFH\ndftz6tC1+AzFJKS/AzwH+G8U8xX9pdfCxWXvl5n+e77Ln/0+971c2np9ptT3cmnpZ9+S/pdLy65H\nS/pgLl26ft1ugMvTa6FIjYfHWM6s1DSAv6YY2v4E8AVg8ajjPBv4avk/WhsoQolZo2peSfEt2tby\nF8p/H6M9fwT8qKy5HXhZtz+jLl+fb43qvHgtOvfZ/w7wPWAL8H+As8aoWUURNmyheLrW80dtP5Di\nW8sBiv9JuBKYP6rmxcDN5TF+AvzxGOd5A/BAeS2+B5zS7c+ng9dhf+ASik775vLv618As70WLi77\ntsz03/Nd/Nxb0vdyadv1mXLfy6Wln/8+979cWnYtWtIHc+nOEuXFkSRJkiRJknbhHEeSJEmSJEka\nk8GRJEmSJEmSxmRwJEmSJEmSpDEZHEmSJEmSJGlMBkeSJEmSJEkak8GRJEmSJEmSxmRwJEmSJEmS\npDEZHEmSJEmSJGlMBkeSJEmSJEkak8GRJEmSJEmSxmRwJEmSJEmSpDH9/56eoIAGcFG6AAAAAElF\nTkSuQmCC\n",
                   "text/plain": [
-                   "<matplotlib.figure.Figure at 0x7fd46e04ad30>"
+                   "<matplotlib.figure.Figure at 0x8c1def0>"
                   ]
                  },
                  "metadata": {},
                  "output_type": "display_data"
                 }
                ],
                "source": [
-                "folder=\"./\"\n",
+                "folder=\"./simulation/\"\n",
                 "inputsig = pds.read_csv(folder+\"/input.txt\",sep=\" \",header=None)\n",
                 "inputsig.columns=[ \"CH{}\".format(i) for i in range(inputsig.shape[1])]\n",
-                "outputsig = pds.read_csv(folder+\"/output_f1.txt\",sep=\" \",header=None)\n",
+                "outputsig = pds.read_csv(folder+\"/output_f2.txt\",sep=\" \",header=None)\n",
                 "outputsig.columns=[\"Tstamp\"]+[ \"CH{}\".format(i) for i in range(outputsig.shape[1]-1)]\n",
                 "f, axarr = plt.subplots(1,2,figsize=(14, 6))\n",
                 "(outputsig.filter(regex=\"CH*\")- inputsig*0.8912)[150:].plot(ax=axarr[0])\n",
                 "axarr[0].legend(loc='upper right')\n",
                 "(outputsig.filter(regex=\"CH*\")[:100]/0.8912).plot(ax=axarr[1])\n",
                 "axarr[1].legend(loc='upper right')\n",
                 "plt.show()"
                ]
               }
              ],
              "metadata": {
               "kernelspec": {
                "display_name": "Python 3",
                "language": "python",
                "name": "python3"
               },
               "language_info": {
                "codemirror_mode": {
                 "name": "ipython",
                 "version": 3
                },
                "file_extension": ".py",
                "mimetype": "text/x-python",
                "name": "python",
                "nbconvert_exporter": "python",
                "pygments_lexer": "ipython3",
                "version": "3.5.2"
               }
              },
              "nbformat": 4,
              "nbformat_minor": 1
             }

tests/Validation_LFR_Filters/tb.vhd +1 -1

             LIBRARY ieee;
             USE ieee.std_logic_1164.ALL;
             use ieee.numeric_std.all;
             USE IEEE.std_logic_signed.ALL;
             USE IEEE.MATH_real.ALL;
             LIBRARY techmap;
             USE techmap.gencomp.ALL;
             library std;
             use std.textio.all;
             LIBRARY lpp;
             USE lpp.iir_filter.ALL;
             USE lpp.lpp_ad_conv.ALL;
             USE lpp.FILTERcfg.ALL;
             USE lpp.lpp_lfr_filter_coeff.ALL;
             USE lpp.general_purpose.ALL;
             USE lpp.data_type_pkg.ALL;
             USE lpp.lpp_lfr_pkg.ALL;
             USE lpp.general_purpose.ALL;
             USE lpp.lpp_sim_pkg.ALL;
             ENTITY testbench IS
             GENERIC(
                 tech          : INTEGER := 0; --axcel,0
                 Mem_use       : INTEGER := use_CEL --use_RAM,use_CEL
             );
             END;
             ARCHITECTURE behav OF testbench IS
               CONSTANT ChanelCount   : INTEGER := 8;
               SIGNAL TSTAMP         : INTEGER:=0;
               SIGNAL clk            : STD_LOGIC := '0';
               SIGNAL clk_98304Hz        : STD_LOGIC := '0';
               SIGNAL clk_98304Hz_r      : STD_LOGIC := '0';
               SIGNAL rstn           : STD_LOGIC;
               SIGNAL signal_gen     :  sample_vector(0 to ChanelCount-1,15 downto 0);
               SIGNAL sample       : Samples(7 DOWNTO 0);
               SIGNAL sample_val   : STD_LOGIC;
               SIGNAL sample_f0_val   : STD_LOGIC;
               SIGNAL sample_f1_val   : STD_LOGIC;
               SIGNAL sample_f2_val   : STD_LOGIC;
               SIGNAL sample_f3_val   : STD_LOGIC;
               SIGNAL sample_f0_wdata : STD_LOGIC_VECTOR((6*16)-1 DOWNTO 0);
               SIGNAL sample_f1_wdata : STD_LOGIC_VECTOR((6*16)-1 DOWNTO 0);
               SIGNAL sample_f2_wdata : STD_LOGIC_VECTOR((6*16)-1 DOWNTO 0);
               SIGNAL sample_f3_wdata : STD_LOGIC_VECTOR((6*16)-1 DOWNTO 0);
               SIGNAL signal_f0_rec : sample_vector(0 to 5,15 downto 0);
               SIGNAL signal_f1_rec : sample_vector(0 to 5,15 downto 0);
               SIGNAL signal_f2_rec : sample_vector(0 to 5,15 downto 0);
               SIGNAL signal_f3_rec : sample_vector(0 to 5,15 downto 0);
               SIGNAL end_of_simu : STD_LOGIC := '0';
-              CONSTANT half_samplig_period : time := INTEGER( REAL(1000**4) / REAL(2.0*4.0*24576.0)) * 1 ps;
+              CONSTANT half_samplig_period : time :=  5086263 ps;--INTEGER( REAL(REAL(1000**4) / REAL(2.0*4.0*24576.0))) * 1 ps;
             BEGIN
               -----------------------------------------------------------------------------
               -- CLOCK and RESET
               -----------------------------------------------------------------------------
               PROCESS
               BEGIN  -- PROCESS
                 WAIT UNTIL clk = '1';
                 rstn <= '0';
                 WAIT UNTIL clk = '1';
                 WAIT UNTIL clk = '1';
                 WAIT UNTIL clk = '1';
                 rstn <= '1';
                 WAIT UNTIL end_of_simu = '1';
                 WAIT FOR 10 ps;
                 assert false report "end of test" severity note;
                 --  Wait forever; this will finish the simulation.
                 wait;
               END PROCESS;
               -----------------------------------------------------------------------------
               clk_98304Hz_gen:PROCESS
               BEGIN
                 IF end_of_simu /= '1' THEN
                   clk_98304Hz <= NOT clk_98304Hz;
                   WAIT FOR half_samplig_period;
                 ELSE
                   WAIT FOR 10 ps;
                   assert false report "end of test" severity note;
                   WAIT;
                 END IF;
               END PROCESS;
               clk_25M_gen:PROCESS
               BEGIN
                 IF end_of_simu /= '1' THEN
                   clk <= NOT clk;
                   TSTAMP <= TSTAMP+20;
                   WAIT FOR 20 ns;
                 ELSE
                   WAIT FOR 10 ps;
                   assert false report "end of test" severity note;
                   WAIT;
                 END IF;
               END PROCESS;
               -----------------------------------------------------------------------------
               -- LPP_LFR_FILTER
               -----------------------------------------------------------------------------
               lpp_lfr_filter_1: lpp_lfr_filter
                 GENERIC MAP (
                   tech    => tech,
                   Mem_use => Mem_use,
                   RTL_DESIGN_LIGHT =>1
                   )
                 PORT MAP (
                   sample           => sample,
                   sample_val       => sample_val,
                   sample_time      => (others=>'0'),
                   clk              => clk,
                   rstn             => rstn,
                   data_shaping_SP0 => '0',
                   data_shaping_SP1 => '0',
                   data_shaping_R0  => '0',
                   data_shaping_R1  => '0',
                   data_shaping_R2  => '0',
                   sample_f0_val    => sample_f0_val,
                   sample_f1_val    => sample_f1_val,
                   sample_f2_val    => sample_f2_val,
                   sample_f3_val    => sample_f3_val,
                   sample_f0_wdata  => sample_f0_wdata,
                   sample_f1_wdata  => sample_f1_wdata,
                   sample_f2_wdata  => sample_f2_wdata,
                   sample_f3_wdata  => sample_f3_wdata
                   );
               -----------------------------------------------------------------------------
               -----------------------------------------------------------------------------
               -- SAMPLE PULSE GENERATION
               -----------------------------------------------------------------------------
               PROCESS (clk, rstn)
               BEGIN  -- PROCESS
                 IF rstn = '0' THEN                  -- asynchronous reset (active low)
                   sample_val <= '0';
                   clk_98304Hz_r  <= '0';
                 ELSIF clk'EVENT AND clk = '1' THEN  -- rising clock edge
                   clk_98304Hz_r <= clk_98304Hz;
                   IF clk_98304Hz = '1' AND clk_98304Hz_r = '0' THEN
                     sample_val <= '1';
                   ELSE
                     sample_val <= '0';
                   END IF;
                 END IF;
               END PROCESS;
               -----------------------------------------------------------------------------
               -----------------------------------------------------------------------------
               --  READ INPUT SIGNALS
               -----------------------------------------------------------------------------
             gen: sig_reader
               GENERIC MAP(
                     FNAME       => "input.txt",
                     WIDTH       => ChanelCount,
                     RESOLUTION  => 16,
                     GAIN        => 1.0
                 )
                 PORT MAP(
                     clk             => sample_val,
                     end_of_simu     => end_of_simu,
                     out_signal      => signal_gen
                 );
             ChanelLoop : FOR i IN 0 TO ChanelCount-1 GENERATE
                 SampleLoop : FOR j IN 0 TO 15 GENERATE
                   sample(I)(J)  <= signal_gen(I,J);
               END GENERATE;
             END GENERATE;
             output_splitter: FOR CHAN IN 0 TO 5 GENERATE
                 bits_splitter: FOR BIT IN 0 TO 15 GENERATE
                     signal_f0_rec(CHAN,BIT)  <= sample_f0_wdata((CHAN*16) + BIT);
                     signal_f1_rec(CHAN,BIT)  <= sample_f1_wdata((CHAN*16) + BIT);
                     signal_f2_rec(CHAN,BIT)  <= sample_f2_wdata((CHAN*16) + BIT);
                     signal_f3_rec(CHAN,BIT)  <= sample_f3_wdata((CHAN*16) + BIT);
                 END GENERATE bits_splitter;
             END GENERATE output_splitter;
               -----------------------------------------------------------------------------
               --  RECORD SIGNALS
               -----------------------------------------------------------------------------
             f0_rec : sig_recorder
               GENERIC MAP(
                   FNAME       => "output_f0.txt",
                   WIDTH       => 6,
                   RESOLUTION  => 16
               )
               PORT MAP(
                   clk             => sample_f0_val,
                   end_of_simu     => end_of_simu,
                   timestamp       => TSTAMP,
                   input_signal    => signal_f0_rec
               );
             f1_rec : sig_recorder
               GENERIC MAP(
                   FNAME       => "output_f1.txt",
                   WIDTH       => 6,
                   RESOLUTION  => 16
               )
               PORT MAP(
                   clk             => sample_f1_val,
                   end_of_simu     => end_of_simu,
                   timestamp       => TSTAMP,
                   input_signal    => signal_f1_rec
               );
             f2_rec : sig_recorder
               GENERIC MAP(
                   FNAME       => "output_f2.txt",
                   WIDTH       => 6,
                   RESOLUTION  => 16
               )
               PORT MAP(
                   clk             => sample_f2_val,
                   end_of_simu     => end_of_simu,
                   timestamp       => TSTAMP,
                   input_signal    => signal_f2_rec
               );
             f3_rec : sig_recorder
               GENERIC MAP(
                   FNAME       => "output_f3.txt",
                   WIDTH       => 6,
                   RESOLUTION  => 16
               )
               PORT MAP(
                   clk             => sample_f3_val,
                   end_of_simu     => end_of_simu,
                   timestamp       => TSTAMP,
                   input_signal    => signal_f3_rec
               );
             END;

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