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Changed design MINI-LFR_WFP_MS to SOLO_LFR_MINI-LFR....
Alexis Jeandet -
r656:a69a331fccb2 SOLO_LFR_01-5A (MINI-LFR) default draft
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@@ -0,0 +1,10
1 SOLO\_LFR\_MINI-LFR is the implementation of Solar Orbiter LFR analyser for the board MINI-LFR.
2
3 You can find information about :
4
5 - MINI-LFR board in the redmine here :
6 [Mini_LFR](https://hephaistos.lpp.polytechnique.fr/redmine/projects/mini-lfr/wiki)
7 - the bistream Generation :
8 [Bitstream_Generation](https://hephaistos.lpp.polytechnique.fr/redmine/projects/vhdlib/wiki/Mini_LFR_-_Bitstream_Generation)
9
10
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1 NO CONTENT: file renamed from boards/MINI-LFR/MINI-LFR.sdc to boards/MINI-LFR/MINI-LFR_PlaceAndRoute.sdc
NO CONTENT: file renamed from boards/MINI-LFR/MINI-LFR.sdc to boards/MINI-LFR/MINI-LFR_PlaceAndRoute.sdc
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@@ -494,7 +494,7 BEGIN -- beh
494 pirq_ms => 6,
494 pirq_ms => 6,
495 pirq_wfp => 14,
495 pirq_wfp => 14,
496 hindex => 2,
496 hindex => 2,
497 top_lfr_version => X"000159") -- aa.bb.cc version
497 top_lfr_version => LPP_LFR_BOARD_MINI_LFR & X"015A") -- aa.bb.cc version
498 PORT MAP (
498 PORT MAP (
499 clk => clk_25,
499 clk => clk_25,
500 rstn => LFR_rstn,
500 rstn => LFR_rstn,
@@ -629,4 +629,4 BEGIN -- beh
629 END GENERATE ahbo_m_ext_not_used;
629 END GENERATE ahbo_m_ext_not_used;
630 END GENERATE all_ahbo_m_ext;
630 END GENERATE all_ahbo_m_ext;
631
631
632 END beh;
632 END beh; No newline at end of file
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@@ -14,8 +14,8 VHDLSYNFILES= MINI_LFR_top.vhd
14 VHDLSIMFILES= testbench.vhd
14 VHDLSIMFILES= testbench.vhd
15 SIMTOP=testbench
15 SIMTOP=testbench
16 PDC=$(VHDLIB)/boards/$(BOARD)/default.pdc
16 PDC=$(VHDLIB)/boards/$(BOARD)/default.pdc
17 SDCFILE=$(VHDLIB)/boards/$(BOARD)/MINI-LFR.sdc
17 SDCFILE=$(VHDLIB)/boards/$(BOARD)/MINI-LFR_PlaceAndRoute.sdc
18 SDC=$(VHDLIB)/boards/$(BOARD)/MINI-LFR.sdc
18 SDC=$(VHDLIB)/boards/$(BOARD)/MINI-LFR_PlaceAndRoute.sdc
19 BITGEN=$(VHDLIB)/boards/$(BOARD)/default.ut
19 BITGEN=$(VHDLIB)/boards/$(BOARD)/default.ut
20 CLEAN=soft-clean
20 CLEAN=soft-clean
21
21
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1 NO CONTENT: file renamed from designs/MINI-LFR_WFP_MS/run.do to designs/SOLO_LFR_MINI-LFR/run.do
NO CONTENT: file renamed from designs/MINI-LFR_WFP_MS/run.do to designs/SOLO_LFR_MINI-LFR/run.do
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1 NO CONTENT: file renamed from designs/MINI-LFR_WFP_MS/testbench.vhd to designs/SOLO_LFR_MINI-LFR/testbench.vhd
NO CONTENT: file renamed from designs/MINI-LFR_WFP_MS/testbench.vhd to designs/SOLO_LFR_MINI-LFR/testbench.vhd
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1 NO CONTENT: file renamed from designs/MINI-LFR_WFP_MS/wave.do to designs/SOLO_LFR_MINI-LFR/wave.do
NO CONTENT: file renamed from designs/MINI-LFR_WFP_MS/wave.do to designs/SOLO_LFR_MINI-LFR/wave.do
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@@ -13,6 +13,13 LIBRARY techmap;
13 USE techmap.gencomp.ALL;
13 USE techmap.gencomp.ALL;
14
14
15 PACKAGE lpp_lfr_pkg IS
15 PACKAGE lpp_lfr_pkg IS
16
17 constant LPP_LFR_BOARD_MINI_LFR : std_logic_vector(7 downto 0) := X"00"; -- with fpga A3PE3000
18 constant LPP_LFR_BOARD_LFR_EM : std_logic_vector(7 downto 0) := X"01"; -- with fpga A3PE3000
19 constant LPP_LFR_BOARD_LFR_EQM : std_logic_vector(7 downto 0) := X"02"; -- with fpga A3PE3000
20 constant LPP_LFR_BOARD_LFR_FM : std_logic_vector(7 downto 0) := X"03"; -- with fpga RTAX4000D
21 constant LPP_LFR_BOARD_DISCOSPACE : std_logic_vector(7 downto 0) := X"04"; -- with fpga A3PE3000
22
16 -----------------------------------------------------------------------------
23 -----------------------------------------------------------------------------
17 -- TEMP
24 -- TEMP
18 -----------------------------------------------------------------------------
25 -----------------------------------------------------------------------------
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