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(MINI-LFR) WFP_MS-0.1-51
pellion -
r516:6e28a8480606 JC
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@@ -518,7 +518,7 BEGIN -- beh
518 pirq_ms => 6,
518 pirq_ms => 6,
519 pirq_wfp => 14,
519 pirq_wfp => 14,
520 hindex => 2,
520 hindex => 2,
521 top_lfr_version => X"000131") -- aa.bb.cc version
521 top_lfr_version => X"000133") -- aa.bb.cc version
522 PORT MAP (
522 PORT MAP (
523 clk => clk_25,
523 clk => clk_25,
524 rstn => LFR_rstn,
524 rstn => LFR_rstn,
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@@ -15,7 +15,7 VHDLSIMFILES= testbench.vhd
15 SIMTOP=testbench
15 SIMTOP=testbench
16 PDC=$(VHDLIB)/boards/$(BOARD)/default.pdc
16 PDC=$(VHDLIB)/boards/$(BOARD)/default.pdc
17 ##SDC=$(VHDLIB)/boards/$(BOARD)/default.sdc
17 ##SDC=$(VHDLIB)/boards/$(BOARD)/default.sdc
18 SDCFILE=$(VHDLIB)/boards/$(BOARD)/MINI_LFR_synthesis.sdc
18 ##SDCFILE=$(VHDLIB)/boards/$(BOARD)/MINI_LFR_synthesis.sdc
19 SDC=$(VHDLIB)/boards/$(BOARD)/MINI_LFR_place_and_route.sdc
19 SDC=$(VHDLIB)/boards/$(BOARD)/MINI_LFR_place_and_route.sdc
20 BITGEN=$(VHDLIB)/boards/$(BOARD)/default.ut
20 BITGEN=$(VHDLIB)/boards/$(BOARD)/default.ut
21 CLEAN=soft-clean
21 CLEAN=soft-clean
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@@ -33,7 +33,7 USE lpp.general_purpose.ALL;
33
33
34 ENTITY IIR_CEL_CTRLR_v2 IS
34 ENTITY IIR_CEL_CTRLR_v2 IS
35 GENERIC (
35 GENERIC (
36 tech : INTEGER := apa3;
36 tech : INTEGER := 0;
37 Mem_use : INTEGER := use_RAM;
37 Mem_use : INTEGER := use_RAM;
38 Sample_SZ : INTEGER := 18;
38 Sample_SZ : INTEGER := 18;
39 Coef_SZ : INTEGER := 9;
39 Coef_SZ : INTEGER := 9;
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@@ -32,6 +32,7 USE lpp.lpp_memory.ALL;
32 USE lpp.lpp_waveform_pkg.ALL;
32 USE lpp.lpp_waveform_pkg.ALL;
33 USE lpp.cic_pkg.ALL;
33 USE lpp.cic_pkg.ALL;
34 USE lpp.data_type_pkg.ALL;
34 USE lpp.data_type_pkg.ALL;
35 USE lpp.lpp_lfr_filter_coeff.ALL;
35
36
36 LIBRARY techmap;
37 LIBRARY techmap;
37 USE techmap.gencomp.ALL;
38 USE techmap.gencomp.ALL;
@@ -122,8 +123,10 ARCHITECTURE tb OF lpp_lfr_filter IS
122 SIGNAL sample_f0_s : sample_vector(5 DOWNTO 0, 15 DOWNTO 0);
123 SIGNAL sample_f0_s : sample_vector(5 DOWNTO 0, 15 DOWNTO 0);
123 --
124 --
124 -- SIGNAL sample_f1_val : STD_LOGIC;
125 -- SIGNAL sample_f1_val : STD_LOGIC;
125 SIGNAL sample_f1 : samplT(ChanelCount-1 DOWNTO 0, 15 DOWNTO 0);
126
126 SIGNAL sample_f1_s : samplT(5 DOWNTO 0, 15 DOWNTO 0);
127 SIGNAL sample_f0_f1_s : samplT(5 DOWNTO 0, 17 DOWNTO 0);
128 SIGNAL sample_f1_s : samplT(5 DOWNTO 0, 17 DOWNTO 0);
129 SIGNAL sample_f1 : samplT(5 DOWNTO 0, 17 DOWNTO 0);
127 --
130 --
128 -- SIGNAL sample_f2_val : STD_LOGIC;
131 -- SIGNAL sample_f2_val : STD_LOGIC;
129 SIGNAL sample_f2 : samplT(5 DOWNTO 0, 15 DOWNTO 0);
132 SIGNAL sample_f2 : samplT(5 DOWNTO 0, 15 DOWNTO 0);
@@ -150,6 +153,35 ARCHITECTURE tb OF lpp_lfr_filter IS
150
153
151 SIGNAL sample_f0_val_s : STD_LOGIC;
154 SIGNAL sample_f0_val_s : STD_LOGIC;
152 SIGNAL sample_f1_val_s : STD_LOGIC;
155 SIGNAL sample_f1_val_s : STD_LOGIC;
156
157 -----------------------------------------------------------------------------
158 -- CONFIG FILTER IIR f0 to f1
159 -----------------------------------------------------------------------------
160 CONSTANT f0_to_f1_CEL_NUMBER : INTEGER := 5;
161 CONSTANT f0_to_f1_COEFFICIENT_SIZE : INTEGER := 10;
162 CONSTANT f0_to_f1_POINT_POSITION : INTEGER := 8;
163
164 CONSTANT f0_to_f1_sos : COEFF_CEL_ARRAY_REAL(1 TO 5) :=
165 (
166 (1.0, -1.61171504942096, 1.0, 1.0, -1.68876443778669, 0.908610171614583),
167 (1.0, -1.53324505744412, 1.0, 1.0, -1.51088513595779, 0.732564401274351),
168 (1.0, -1.30646173160060, 1.0, 1.0, -1.30571711968384, 0.546869268827102),
169 (1.0, -0.651038739239370, 1.0, 1.0, -1.08747326287406, 0.358436944718464),
170 (1.0, 1.24322747034001, 1.0, 1.0, -0.929530176676438, 0.224862726961691)
171 );
172 CONSTANT f0_to_f1_gain : COEFF_CEL_REAL :=
173 ( 0.566196896119831, 0.474937156750133, 0.347712822970540, 0.200868393871900, 0.0910613125308450, 1.0);
174
175 CONSTANT coefs_iir_cel_f0_to_f1 : STD_LOGIC_VECTOR((f0_to_f1_CEL_NUMBER*f0_to_f1_COEFFICIENT_SIZE*5)-1 DOWNTO 0)
176 := get_IIR_CEL_FILTER_CONFIG(
177 f0_to_f1_COEFFICIENT_SIZE,
178 f0_to_f1_POINT_POSITION,
179 f0_to_f1_CEL_NUMBER,
180 f0_to_f1_sos,
181 f0_to_f1_gain);
182 -----------------------------------------------------------------------------
183
184
153 BEGIN
185 BEGIN
154
186
155 -----------------------------------------------------------------------------
187 -----------------------------------------------------------------------------
@@ -257,6 +289,7 BEGIN
257 -----------------------------------------------------------------------------
289 -----------------------------------------------------------------------------
258 -- F0 -- @24.576 kHz
290 -- F0 -- @24.576 kHz
259 -----------------------------------------------------------------------------
291 -----------------------------------------------------------------------------
292
260 Downsampling_f0 : Downsampling
293 Downsampling_f0 : Downsampling
261 GENERIC MAP (
294 GENERIC MAP (
262 ChanelCount => 8,
295 ChanelCount => 8,
@@ -270,7 +303,7 BEGIN
270 sample_out_val => sample_f0_val_s,
303 sample_out_val => sample_f0_val_s,
271 sample_out => sample_f0);
304 sample_out => sample_f0);
272
305
273 sample_f0_val <= sample_f0_val_s;
306 sample_f0_val <= sample_f0_val_s;
274
307
275 all_bit_sample_f0 : FOR I IN 15 DOWNTO 0 GENERATE
308 all_bit_sample_f0 : FOR I IN 15 DOWNTO 0 GENERATE
276 sample_f0_wdata_s(I) <= sample_f0(0, I); -- V
309 sample_f0_wdata_s(I) <= sample_f0(0, I); -- V
@@ -281,47 +314,69 BEGIN
281 sample_f0_wdata_s(16*5+I) <= sample_f0(7, I); -- B3
314 sample_f0_wdata_s(16*5+I) <= sample_f0(7, I); -- B3
282 END GENERATE all_bit_sample_f0;
315 END GENERATE all_bit_sample_f0;
283
316
284 --sample_f0_wen <= NOT(sample_f0_val) &
285 -- NOT(sample_f0_val) &
286 -- NOT(sample_f0_val) &
287 -- NOT(sample_f0_val) &
288 -- NOT(sample_f0_val) &
289 -- NOT(sample_f0_val);
290
291 -----------------------------------------------------------------------------
317 -----------------------------------------------------------------------------
292 -- F1 -- @4096 Hz
318 -- F1 -- @4096 Hz
293 -----------------------------------------------------------------------------
319 -----------------------------------------------------------------------------
320
321 all_bit_sample_f0_f1 : FOR I IN 15 DOWNTO 0 GENERATE
322 sample_f0_f1_s(0,I) <= sample_f0(0,I); --V
323 sample_f0_f1_s(1,I) <= sample_f0(1,I) WHEN data_shaping_R1 = '1' ELSE sample_f0(3,I); --E1
324 sample_f0_f1_s(2,I) <= sample_f0(2,I) WHEN data_shaping_R1 = '1' ELSE sample_f0(4,I); --E2
325 sample_f0_f1_s(3,I) <= sample_f0(5,I); --B1
326 sample_f0_f1_s(4,I) <= sample_f0(6,I); --B2
327 sample_f0_f1_s(5,I) <= sample_f0(7,I); --B3
328 END GENERATE all_bit_sample_f0_f1;
329 all_bit_sample_f0_f1_extended : FOR I IN 17 DOWNTO 16 GENERATE
330 sample_f0_f1_s(0,I) <= sample_f0(0,15);
331 sample_f0_f1_s(1,I) <= sample_f0(1,15) WHEN data_shaping_R1 = '1' ELSE sample_f0(3,15); --E1
332 sample_f0_f1_s(2,I) <= sample_f0(2,15) WHEN data_shaping_R1 = '1' ELSE sample_f0(4,15); --E2
333 sample_f0_f1_s(3,I) <= sample_f0(5,15); --B1
334 sample_f0_f1_s(4,I) <= sample_f0(6,15); --B2
335 sample_f0_f1_s(5,I) <= sample_f0(7,15); --B3
336 END GENERATE all_bit_sample_f0_f1_extended;
337
338
339 IIR_CEL_f0_to_f1 : IIR_CEL_CTRLR_v2
340 GENERIC MAP (
341 tech => 0,
342 Mem_use => Mem_use, -- use_RAM
343 Sample_SZ => 18,
344 Coef_SZ => f0_to_f1_COEFFICIENT_SIZE,
345 Coef_Nb => f0_to_f1_CEL_NUMBER*5,
346 Coef_sel_SZ => 5,
347 Cels_count => f0_to_f1_CEL_NUMBER,
348 ChanelsCount => 6)
349 PORT MAP (
350 rstn => rstn,
351 clk => clk,
352 virg_pos => f0_to_f1_POINT_POSITION,
353 coefs => coefs_iir_cel_f0_to_f1,
354
355 sample_in_val => sample_f0_val_s,
356 sample_in => sample_f0_f1_s,
357
358 sample_out_val => sample_f1_val_s,
359 sample_out => sample_f1_s);
360
294 Downsampling_f1 : Downsampling
361 Downsampling_f1 : Downsampling
295 GENERIC MAP (
362 GENERIC MAP (
296 ChanelCount => 8,
363 ChanelCount => 6,
297 SampleSize => 16,
364 SampleSize => 18,
298 DivideParam => 6)
365 DivideParam => 6)
299 PORT MAP (
366 PORT MAP (
300 clk => clk,
367 clk => clk,
301 rstn => rstn,
368 rstn => rstn,
302 sample_in_val => sample_f0_val_s ,
369 sample_in_val => sample_f1_val_s,
303 sample_in => sample_f0,
370 sample_in => sample_f1_s,
304 sample_out_val => sample_f1_val_s,
371 sample_out_val => sample_f1_val,
305 sample_out => sample_f1);
372 sample_out => sample_f1);
306
307 sample_f1_val <= sample_f1_val_s;
308
373
309 all_bit_sample_f1 : FOR I IN 15 DOWNTO 0 GENERATE
374 all_bit_sample_f1 : FOR I IN 15 DOWNTO 0 GENERATE
310 sample_f1_wdata_s(I) <= sample_f1(0, I); -- V
375 all_channel_sample_f1: FOR J IN 5 DOWNTO 0 GENERATE
311 sample_f1_wdata_s(16*1+I) <= sample_f1(1, I) WHEN data_shaping_R1 = '1' ELSE sample_f1(3, I); -- E1
376 sample_f1_wdata_s(16*J+I) <= sample_f1(J, I);
312 sample_f1_wdata_s(16*2+I) <= sample_f1(2, I) WHEN data_shaping_R1 = '1' ELSE sample_f1(4, I); -- E2
377 END GENERATE all_channel_sample_f1;
313 sample_f1_wdata_s(16*3+I) <= sample_f1(5, I); -- B1
314 sample_f1_wdata_s(16*4+I) <= sample_f1(6, I); -- B2
315 sample_f1_wdata_s(16*5+I) <= sample_f1(7, I); -- B3
316 END GENERATE all_bit_sample_f1;
378 END GENERATE all_bit_sample_f1;
317
379
318 --sample_f1_wen <= NOT(sample_f1_val) &
319 -- NOT(sample_f1_val) &
320 -- NOT(sample_f1_val) &
321 -- NOT(sample_f1_val) &
322 -- NOT(sample_f1_val) &
323 -- NOT(sample_f1_val);
324
325 -----------------------------------------------------------------------------
380 -----------------------------------------------------------------------------
326 -- F2 -- @256 Hz
381 -- F2 -- @256 Hz
327 -- F3 -- @16 Hz
382 -- F3 -- @16 Hz
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@@ -1,6 +1,7
1 lpp_top_lfr_pkg.vhd
1 lpp_top_lfr_pkg.vhd
2 lpp_lfr_pkg.vhd
2 lpp_lfr_pkg.vhd
3 lpp_lfr_apbreg_pkg.vhd
3 lpp_lfr_apbreg_pkg.vhd
4 lpp_lfr_filter_coeff.vhd
4 lpp_lfr_filter.vhd
5 lpp_lfr_filter.vhd
5 lpp_lfr_apbreg.vhd
6 lpp_lfr_apbreg.vhd
6 lpp_lfr_apbreg_ms_pointer.vhd
7 lpp_lfr_apbreg_ms_pointer.vhd
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