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APB_SIMPLE_DIODE Vendor ID Added
martin -
r3:63fe0f21a403 default
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@@ -1,37 +1,37
1 1 all: help
2 2
3 3 help:
4 4 @echo
5 5 @echo " batch targets:"
6 6 @echo
7 7 @echo " make Patch-GRLIB : install library into $(GRLIB)"
8 8 @echo " make dist : create a tar file for using into an other computer"
9 9 @echo " make Patched-dist : create a tar file for with a patched grlib for using into an other computer"
10 10 @echo " make allGPL : add a GPL HEADER in all vhdl Files"
11 11 @echo " make init : add a GPL HEADER in all vhdl Files, init all files"
12 12 @echo " make doc : make documentation for VHDL IPs"
13 13 @echo
14 14
15 15 allGPL:
16 16 sh lib/GPL_Patcher.sh -R
17 17
18 18 init: allGPL
19 19 sh lib/lpp/vhdlsynPatcher.sh
20 20 sh lib/lpp/makeDirs.sh lib/lpp
21 21
22 22
23 Patch-GRLIB: init doc
23 Patch-GRLIB: init
24 24 sh patch.sh $(GRLIB)
25 25
26 26
27 27 dist: init
28 28 tar -cvzf ./../lpp-lib.tgz ./../lib_lpp/*
29 29
30 30 Patched-dist: Patch-GRLIB
31 31 tar -cvzf ./../lpp-patched-GRLIB.tgz $(GRLIB)/*
32 32
33 33
34 34 doc:
35 35 doxygen lib/lpp/Doxyfile
36 36 make lib/lpp/doc/latex
37 37 cp lib/lpp/doc/latex/refman.pdf lib/lpp/doc/VHD_lib.pdf
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@@ -1,7 +1,9
1 amba_lcd_16x2_ctrlr.vhd
2 1 FRAME_CLK.vhd
3 2 LCD_16x2_CFG.vhd
3 LCD_16x2_DRIVER
4 .vhd
4 5 LCD_16x2_ENGINE.vhd
5 6 LCD_2x16_DRIVER.vhd
6 7 LCD_CLK_GENERATOR.vhd
7 8 Top_LCD.vhd
9 amba_lcd_16x2_ctrlr.vhd
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@@ -1,4 +1,4
1 ./amba_lcd_16x2_ctrlr
2 ./dsp/iir_filter
1 3 ./general_purpose
2 4 ./lpp_amba
3 ./dsp/iir_filter
4 ./amba_lcd_16x2_ctrlr
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@@ -1,12 +1,12
1 1 APB_IIR_CEL.vhd
2 FILTER.vhd
3 FILTER_RAM_CTRLR.vhd
2 4 FILTERcfg.vhd
3 5 FilterCTRLR.vhd
4 FILTER_RAM_CTRLR.vhd
5 FILTER.vhd
6 6 IIR_CEL_CTRLR.vhd
7 7 IIR_CEL_FILTER.vhd
8 iir_filter.vhd
8 RAM.vhd
9 9 RAM_CEL.vhd
10 10 RAM_CTRLR2.vhd
11 RAM.vhd
12 11 Top_Filtre_IIR.vhd
12 iir_filter.vhd
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@@ -1,13 +1,13
1 Adder.vhd
2 1 ADDRcntr.vhd
3 2 ALU.vhd
4 general_purpose.vhd
3 Adder.vhd
4 MAC.vhd
5 5 MAC_CONTROLER.vhd
6 MAC_MUX2.vhd
7 6 MAC_MUX.vhd
7 MAC_MUX2.vhd
8 8 MAC_REG.vhd
9 MAC.vhd
9 MUX2.vhd
10 10 Multiplier.vhd
11 MUX2.vhd
12 11 REG.vhd
13 12 Shifter.vhd
13 general_purpose.vhd
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@@ -1,129 +1,129
1 1 ------------------------------------------------------------------------------
2 2 -- This file is a part of the LPP VHDL IP LIBRARY
3 3 -- Copyright (C) 2009 - 2010, Laboratory of Plasmas Physic - CNRS
4 4 --
5 5 -- This program is free software; you can redistribute it and/or modify
6 6 -- it under the terms of the GNU General Public License as published by
7 7 -- the Free Software Foundation; either version 2 of the License, or
8 8 -- (at your option) any later version.
9 9 --
10 10 -- This program is distributed in the hope that it will be useful,
11 11 -- but WITHOUT ANY WARRANTY; without even the implied warranty of
12 12 -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 13 -- GNU General Public License for more details.
14 14 --
15 15 -- You should have received a copy of the GNU General Public License
16 16 -- along with this program; if not, write to the Free Software
17 17 -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 18 -------------------------------------------------------------------------------
19 19 -- APB_SIMPLE_DIODE.vhd
20 20
21 21 library ieee;
22 22 use ieee.std_logic_1164.all;
23 23 --use ieee.numeric_std.all;
24 24 library grlib;
25 25 use grlib.amba.all;
26 26 use grlib.stdlib.all;
27 27 use grlib.devices.all;
28 28 library lpp;
29 29 use lpp.lpp_amba.all;
30 30
31 31
32 32 entity APB_SIMPLE_DIODE is
33 33 generic (
34 34 pindex : integer := 0;
35 35 paddr : integer := 0;
36 36 pmask : integer := 16#fff#;
37 37 pirq : integer := 0;
38 38 abits : integer := 8);
39 39 port (
40 40 rst : in std_ulogic;
41 41 clk : in std_ulogic;
42 42 apbi : in apb_slv_in_type;
43 43 apbo : out apb_slv_out_type;
44 44 LED : out std_ulogic
45 45 );
46 46 end;
47 47
48 48
49 49 architecture AR_APB_SIMPLE_DIODE of APB_SIMPLE_DIODE is
50 50
51 51 constant REVISION : integer := 1;
52 52
53 53 constant pconfig : apb_config_type := (
54 0 => ahb_device_reg (VENDOR_LPP, ROCKET_TM, 0, REVISION, 0),
54 0 => ahb_device_reg (VENDOR_LPP, LPP_SIMPLE_DIODE, 0, REVISION, 0),
55 55 1 => apb_iobar(paddr, pmask));
56 56
57 57
58 58
59 59 type LEDregs is record
60 60 DATAin : std_logic_vector(31 downto 0);
61 61 DATAout : std_logic_vector(31 downto 0);
62 62 end record;
63 63
64 64 signal r : LEDregs;
65 65
66 66
67 67 begin
68 68
69 69 r.DATAout <= r.DATAin xor X"FFFFFFFF";
70 70
71 71 process(rst,clk)
72 72 begin
73 73 if rst = '0' then
74 74 LED <= '0';
75 75 r.DATAin <= (others => '0');
76 76 apbo.prdata <= (others => '0');
77 77 elsif clk'event and clk = '1' then
78 78
79 79 LED <= r.DATAin(0);
80 80
81 81 --APB Write OP
82 82 if (apbi.psel(pindex) and apbi.penable and apbi.pwrite) = '1' then
83 83 case apbi.paddr(abits-1 downto 2) is
84 84 when "000000" =>
85 85 r.DATAin <= apbi.pwdata;
86 86 when others =>
87 87 null;
88 88 end case;
89 89 end if;
90 90
91 91 --APB READ OP
92 92 if (apbi.psel(pindex) and apbi.penable and (not apbi.pwrite)) = '1' then
93 93 case apbi.paddr(abits-1 downto 2) is
94 94 when "000000" =>
95 95 apbo.prdata <= r.DATAin;
96 96 when others =>
97 97 apbo.prdata <= r.DATAout;
98 98 end case;
99 99 end if;
100 100
101 101 end if;
102 102 apbo.pconfig <= pconfig;
103 103 end process;
104 104
105 105
106 106
107 107 -- pragma translate_off
108 bootmsg : report_version
109 generic map ("apbuart" & tost(pindex) &
110 ": Generic UART rev " & tost(REVISION) & ", fifo " & tost(fifosize) &
111 ", irq " & tost(pirq));
108 -- bootmsg : report_version
109 -- generic map ("apbuart" & tost(pindex) &
110 -- ": Generic UART rev " & tost(REVISION) & ", fifo " & tost(fifosize) &
111 -- ", irq " & tost(pirq));
112 112 -- pragma translate_on
113 113
114 114
115 115
116 116 end ar_APB_SIMPLE_DIODE;
117 117
118 118
119 119
120 120
121 121
122 122
123 123
124 124
125 125
126 126
127 127
128 128
129 129
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@@ -1,59 +1,60
1 1 ------------------------------------------------------------------------------
2 2 -- This file is a part of the LPP VHDL IP LIBRARY
3 3 -- Copyright (C) 2009 - 2010, Laboratory of Plasmas Physic - CNRS
4 4 --
5 5 -- This program is free software; you can redistribute it and/or modify
6 6 -- it under the terms of the GNU General Public License as published by
7 7 -- the Free Software Foundation; either version 2 of the License, or
8 8 -- (at your option) any later version.
9 9 --
10 10 -- This program is distributed in the hope that it will be useful,
11 11 -- but WITHOUT ANY WARRANTY; without even the implied warranty of
12 12 -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 13 -- GNU General Public License for more details.
14 14 --
15 15 -- You should have received a copy of the GNU General Public License
16 16 -- along with this program; if not, write to the Free Software
17 17 -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 18 -------------------------------------------------------------------------------
19 19
20 20 library ieee;
21 21 use ieee.std_logic_1164.all;
22 22 library grlib;
23 23 use grlib.amba.all;
24 24 -- pragma translate_off
25 25 use std.textio.all;
26 26 -- pragma translate_on
27 27
28 28
29 29
30 30
31 31
32 32 package lpp_amba is
33 33
34 34 constant VENDOR_LPP : amba_vendor_type := 16#19#;
35 35
36 36 -- LPP device ids
37 37
38 38 constant ROCKET_TM : amba_device_type := 16#001#;
39 39 constant otherCore : amba_device_type := 16#002#;
40 constant LPP_SIMPLE_DIODE : amba_device_type := 16#003#;
40 41
41 42
42 43 component APB_SIMPLE_DIODE is
43 44 generic (
44 45 pindex : integer := 0;
45 46 paddr : integer := 0;
46 47 pmask : integer := 16#fff#;
47 48 pirq : integer := 0;
48 49 abits : integer := 8);
49 50 port (
50 51 rst : in std_ulogic;
51 52 clk : in std_ulogic;
52 53 apbi : in apb_slv_in_type;
53 54 apbo : out apb_slv_out_type;
54 55 LED : out std_ulogic
55 56 );
56 57 end component;
57 58
58 59
59 60 end;
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