##// END OF EJS Templates
Improved IIR filter configuration
Alexis -
r35:56441034bcde default
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1 DEFAULT_SEARCH_ORDER
1 NO CONTENT: new file 100644
NO CONTENT: new file 100644
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1 set -tmpdir "/opt/GRLIB/grlib-gpl-1.1.0-b4104/designs/leon3-APB_LCD-digilent-xc3s1600e/xst/projnav.tmp"
2 set -xsthdpdir "/opt/GRLIB/grlib-gpl-1.1.0-b4104/designs/leon3-APB_LCD-digilent-xc3s1600e/xst"
3 elaborate
4 -ifn APB_IIR_CEL.prj
5 -ifmt mixed
1 NO CONTENT: new file 100644
NO CONTENT: new file 100644
@@ -0,0 +1,5
1 set -tmpdir "/opt/GRLIB/grlib-gpl-1.1.0-b4104/designs/leon3-APB_LCD-digilent-xc3s1600e/xst/projnav.tmp"
2 set -xsthdpdir "/opt/GRLIB/grlib-gpl-1.1.0-b4104/designs/leon3-APB_LCD-digilent-xc3s1600e/xst"
3 elaborate
4 -ifn IIR_CEL_CTRLR.prj
5 -ifmt mixed
1 NO CONTENT: new file 100644
NO CONTENT: new file 100644
@@ -0,0 +1,5
1 set -tmpdir "/opt/GRLIB/grlib-gpl-1.1.0-b4104/designs/leon3-APB_LCD-digilent-xc3s1600e/xst/projnav.tmp"
2 set -xsthdpdir "/opt/GRLIB/grlib-gpl-1.1.0-b4104/designs/leon3-APB_LCD-digilent-xc3s1600e/xst"
3 elaborate
4 -ifn IIR_CEL_FILTER.prj
5 -ifmt mixed
@@ -0,0 +1,24
1 vhdl grlib "/opt/GRLIB/grlib-gpl-1.1.0-b4104/lib/grlib/stdlib/version.vhd"
2 vhdl grlib "/opt/GRLIB/grlib-gpl-1.1.0-b4104/lib/grlib/stdlib/stdlib.vhd"
3 vhdl grlib "/opt/GRLIB/grlib-gpl-1.1.0-b4104/lib/grlib/stdlib/config.vhd"
4 vhdl lpp "/opt/GRLIB/grlib-gpl-1.1.0-b4104/lib/lpp/general_purpose/general_purpose.vhd"
5 vhdl grlib "/opt/GRLIB/grlib-gpl-1.1.0-b4104/lib/grlib/amba/amba.vhd"
6 vhdl lpp "/opt/GRLIB/grlib-gpl-1.1.0-b4104/lib/lpp/general_purpose/Multiplier.vhd"
7 vhdl lpp "/opt/GRLIB/grlib-gpl-1.1.0-b4104/lib/lpp/general_purpose/MAC_REG.vhd"
8 vhdl lpp "/opt/GRLIB/grlib-gpl-1.1.0-b4104/lib/lpp/general_purpose/MAC_MUX2.vhd"
9 vhdl lpp "/opt/GRLIB/grlib-gpl-1.1.0-b4104/lib/lpp/general_purpose/MAC_MUX.vhd"
10 vhdl lpp "/opt/GRLIB/grlib-gpl-1.1.0-b4104/lib/lpp/general_purpose/MAC_CONTROLER.vhd"
11 vhdl lpp "/opt/GRLIB/grlib-gpl-1.1.0-b4104/lib/lpp/general_purpose/Adder.vhd"
12 vhdl lpp "/opt/GRLIB/grlib-gpl-1.1.0-b4104/lib/lpp/dsp/iir_filter/FILTERcfg.vhd"
13 vhdl grlib "/opt/GRLIB/grlib-gpl-1.1.0-b4104/lib/grlib/amba/devices.vhd"
14 vhdl lpp "/opt/GRLIB/grlib-gpl-1.1.0-b4104/lib/lpp/general_purpose/REG.vhd"
15 vhdl lpp "/opt/GRLIB/grlib-gpl-1.1.0-b4104/lib/lpp/general_purpose/MUX2.vhd"
16 vhdl lpp "/opt/GRLIB/grlib-gpl-1.1.0-b4104/lib/lpp/general_purpose/MAC.vhd"
17 vhdl lpp "/opt/GRLIB/grlib-gpl-1.1.0-b4104/lib/lpp/general_purpose/ADDRcntr.vhd"
18 vhdl lpp "/opt/GRLIB/grlib-gpl-1.1.0-b4104/lib/lpp/dsp/iir_filter/RAM_CEL.vhd"
19 vhdl lpp "/opt/GRLIB/grlib-gpl-1.1.0-b4104/lib/lpp/dsp/iir_filter/RAM.vhd"
20 vhdl lpp "/opt/GRLIB/grlib-gpl-1.1.0-b4104/lib/lpp/dsp/iir_filter/iir_filter.vhd"
21 vhdl lpp "/opt/GRLIB/grlib-gpl-1.1.0-b4104/lib/lpp/general_purpose/ALU.vhd"
22 vhdl lpp "/opt/GRLIB/grlib-gpl-1.1.0-b4104/lib/lpp/dsp/iir_filter/RAM_CTRLR2.vhd"
23 vhdl lpp "/opt/GRLIB/grlib-gpl-1.1.0-b4104/lib/lpp/dsp/iir_filter/IIR_CEL_CTRLR.vhd"
24 vhdl lpp "/opt/GRLIB/grlib-gpl-1.1.0-b4104/lib/lpp/dsp/iir_filter/IIR_CEL_FILTER.vhd"
@@ -0,0 +1,214
1 # GRLIB Makefile generated settings
2 set design leon3mp
3 set pnc
4 set device
5 set package
6 set top_hdl
7
8 ### Project Settings
9 #
10 # The parameters in this section are for documentation purposes mostly
11 # and can be changed by the user without affecting synthesis results
12 # Multi-word strings (e.g. eASIC Corp) must be enwrapped in double
13 # quotes, so "eASIC Corp."
14
15 # project: string; Project name
16 set project "leon3"
17
18 # company: string; Company name
19 set company "gaisler"
20
21 # designer: string; Designer name
22 set designer ""
23
24 # email: string; Designer's email address
25 set email "${designer}@${company}.com"
26
27 # email_notification: enumerated [on,off]
28 # When 'on' CDB sends an email to the designer's email address
29 # with the status of the last run and the log file attached
30 set email_notification off
31
32
33 ### Design
34 #
35 # The parameters in this section define the eASIC Structured ASIC
36 # the design will be implemented on
37
38 # pnc: number; Part Number Code, unique project identifier
39 # provided by eASIC
40 #set pnc 50123
41
42 # design: string; Top Level name
43 #set design leon3mp
44
45 # device: enumerated [NX750,NX1500,NX2500,NX4000,NX5000]
46 # Device selects the eASIC Structured ASIC platform
47 #set device NX1500
48
49 # package: string; package for selected device
50 #
51 #set package FC480
52
53 # device_type: enumerated [sl,vl]
54 # sl: SRAM configured Lookup table device
55 # vl: Via configured Lookup table device
56 set device_type sl
57
58 # technology; enumerated [std,hp]
59 # std: 1.2V standard device
60 # hp : 1.3V high performance device
61 set technology std
62
63
64 ### Flow
65 #
66 # The parameters in this section provide various options
67 # to guide the synthesis flow
68
69 # fsm_optimization: enumerated [on,off]
70 # fsm_encoding : enumerated [auto,binary,gray,one_hot]
71 # These parameters turn on/off Finite State Machine recoding with the
72 # method defined by 'fsm_encoding'.
73 # Turning on this option can result in smaller and/or faster FSM
74 # implementations, but may lead to formal verification errors
75 set fsm_optimization off
76 set fsm_encoding auto
77
78 # boolean_mapper: enumerated [on,off]
79 # Turn on/off Magma boolean mapper technology
80 # Turning on this option generally yields a smaller and faster design
81 set boolean_mapper on
82
83 # use_rtbuf: enumerated [on,off]
84 # Turn on/off long net buffering using high-drive buffers (rtbuf)
85 # Setting use_rtbuf to 'off' disables 'fix fj90 rtbuf'
86 set use_rtbuf on
87
88 # effort: enumerated [low,medium,high]; (area) synthesis effort
89 set effort medium
90
91 # timing_effort: enumerated [low,medium,high]; timing effort
92 set timing_effort medium
93
94 # timing_slack: real; initial positive timing slack target
95 set timing_slack 1n
96
97 # clock_effort: enumerated [low,high]
98 # Should be set to 'low' for 2008 Magma releases, can be set to 'high' for older releases
99 set clock_effort low
100
101 # utilization: real; area utilization
102 # Maximum area utilization during placement. Typical values range
103 # from 0.7 to 1.0. Lower values may improve timing or relax placement
104 # effort, but lead to less area efficient implementations.
105 set utilization 0.8
106
107 # clone_ff: enumerated [on,off]
108 # Turn on/off replication of flipflops to drive large loads.
109 # It is recommended to set this parameter to 'on'.
110 # Set it to 'off' if encountering formal verification issues.
111 set clone_ff on
112
113 # fanout_limit: integer;
114 # fanout_strict: enumerated [strict,noworse]
115 # Sets the maximum fanout per cell (fanout_limit) and how the
116 # synthesis tool resolves the fanout; always buffer if the load is
117 # higher than the fanout (strict), or only buffer if the load is
118 # higher than the fanout AND buffering doesn't affect timing (noworse)
119 set fanout_limit 10
120 set fanout_strict strict
121
122 # timing_paths: integer
123 # Sets the number of timing paths reported during the various timing
124 # analysis reports
125 set timing_paths 10
126
127
128 ### Directories
129 #
130 # The parameters in this section set multiple directories.
131 # There should be no need to change any of the following parameters
132
133 # proj_rootdir: string
134 # Sets the path to the project root, as seen from the 'run' directory
135 set proj_rootdir ../../..
136
137 # srcdir: string
138 # Sets the directory containing user files (e.g. design and constraints)
139 # This typically points to 'src'
140 set srcdir $proj_rootdir/src
141
142 # rtldir: string
143 # Sets the directory containing RTL files
144 # This typically points to 'src/rtl'
145 set rtldir $srcdir/rtl
146
147 # constraintsdir: string
148 # Sets the directory containing design constraints (.sdc, .pad) files
149 # This typically points to 'src/constraints'
150 set constraintsdir $srcdir/constraints
151
152 # snap: enumerated [on|off]
153 # Enables or disabled Magma synthesis snap-shot generation.
154 # snap must be on if the CDB 'start_at' option is to be used.
155 set snap on
156
157 # volcano_compression: enumerated [none,min,med,max]
158 # Sets the Magma library volcano compression level
159 set volcano_compression none
160
161
162 ### Constraints
163 #
164 # The parameters in this section set/point to synthesis constraints
165
166 # pad_file: string
167 # Points to an eWizard generated file containing pad and macro placement commands
168 # Typically points to 'src/constraints/<design>.pad
169 set pad_file $constraintsdir/${design}.pad
170
171 # sdc_file: string
172 # Points to a user generated file containing timing constraints in
173 # Synopsys Design Constraints (sdc) format.
174 # Typically points to 'src/constraints/<design>.sdc
175 set sdc_file $constraintsdir/${design}.sdc
176
177 # verilog2k: enumerated [on|off]
178 # Enables/disabled Verilog2001 support
179 set verilog2k on
180
181 # undriven: enumerated [0,1,X,U,reset]
182 # Sets the physical synthesis tool's behaviour with regards to undriven
183 # pins. By default this is set to 'U', meaning leave undriven pins
184 # floating so they can be detected and fixed in RTL.
185 set undriven U
186
187 # topfile: string
188 # The name of the file containing the top level RTL module
189 #set topfile $rtldir/<top file>
190 #if {[regexp {\.v$} $topfile]} {set top_hdl verilog} else {set top_hdl vhdl}
191
192
193 ### Design files
194 #
195 set includeList {}
196 set defineList {}
197 set netlistList {}
198 set vhdllibList {}
199 set read_netlist {}
200 set read_rtl {}
201 set read_plan {}
202
203 # GRLIB Makefile generated HDL list
204 set vhdlList {
205 {grlib ../../../../../../lib/grlib/stdlib/version.vhd ../../../../../../lib/grlib/stdlib/config.vhd ../../../../../../lib/grlib/stdlib/stdlib.vhd ../../../../../../lib/grlib/sparc/sparc.vhd ../../../../../../lib/grlib/sparc/sparc_disas.vhd ../../../../../../lib/grlib/sparc/cpu_disas.vhd ../../../../../../lib/grlib/modgen/multlib.vhd ../../../../../../lib/grlib/modgen/leaves.vhd ../../../../../../lib/grlib/amba/amba.vhd ../../../../../../lib/grlib/amba/devices.vhd ../../../../../../lib/grlib/amba/defmst.vhd ../../../../../../lib/grlib/amba/apbctrl.vhd ../../../../../../lib/grlib/amba/ahbctrl.vhd ../../../../../../lib/grlib/amba/dma2ahb_pkg.vhd ../../../../../../lib/grlib/amba/dma2ahb.vhd}
206 {techmap ../../../../../../lib/techmap/gencomp/gencomp.vhd ../../../../../../lib/techmap/gencomp/netcomp.vhd ../../../../../../lib/techmap/inferred/memory_inferred.vhd ../../../../../../lib/techmap/inferred/ddr_inferred.vhd ../../../../../../lib/techmap/inferred/mul_inferred.vhd ../../../../../../lib/techmap/inferred/ddr_phy_inferred.vhd ../../../../../../lib/techmap/dw02/mul_dw_gen.vhd ../../../../../../lib/techmap/maps/allclkgen.vhd ../../../../../../lib/techmap/maps/allddr.vhd ../../../../../../lib/techmap/maps/allmem.vhd ../../../../../../lib/techmap/maps/allpads.vhd ../../../../../../lib/techmap/maps/alltap.vhd ../../../../../../lib/techmap/maps/clkgen.vhd ../../../../../../lib/techmap/maps/clkmux.vhd ../../../../../../lib/techmap/maps/clkand.vhd ../../../../../../lib/techmap/maps/ddr_ireg.vhd ../../../../../../lib/techmap/maps/ddr_oreg.vhd ../../../../../../lib/techmap/maps/ddrphy.vhd ../../../../../../lib/techmap/maps/syncram.vhd ../../../../../../lib/techmap/maps/syncram64.vhd ../../../../../../lib/techmap/maps/syncram_2p.vhd ../../../../../../lib/techmap/maps/syncram_dp.vhd ../../../../../../lib/techmap/maps/syncfifo.vhd ../../../../../../lib/techmap/maps/regfile_3p.vhd ../../../../../../lib/techmap/maps/tap.vhd ../../../../../../lib/techmap/maps/techbuf.vhd ../../../../../../lib/techmap/maps/nandtree.vhd ../../../../../../lib/techmap/maps/clkpad.vhd ../../../../../../lib/techmap/maps/clkpad_ds.vhd ../../../../../../lib/techmap/maps/inpad.vhd ../../../../../../lib/techmap/maps/inpad_ds.vhd ../../../../../../lib/techmap/maps/iodpad.vhd ../../../../../../lib/techmap/maps/iopad.vhd ../../../../../../lib/techmap/maps/iopad_ds.vhd ../../../../../../lib/techmap/maps/lvds_combo.vhd ../../../../../../lib/techmap/maps/odpad.vhd ../../../../../../lib/techmap/maps/outpad.vhd ../../../../../../lib/techmap/maps/outpad_ds.vhd ../../../../../../lib/techmap/maps/toutpad.vhd ../../../../../../lib/techmap/maps/skew_outpad.vhd ../../../../../../lib/techmap/maps/grspwc_net.vhd ../../../../../../lib/techmap/maps/grspwc2_net.vhd ../../../../../../lib/techmap/maps/grlfpw_net.vhd ../../../../../../lib/techmap/maps/grfpw_net.vhd ../../../../../../lib/techmap/maps/mul_61x61.vhd ../../../../../../lib/techmap/maps/cpu_disas_net.vhd ../../../../../../lib/techmap/maps/ringosc.vhd ../../../../../../lib/techmap/maps/system_monitor.vhd ../../../../../../lib/techmap/maps/grgates.vhd ../../../../../../lib/techmap/maps/inpad_ddr.vhd ../../../../../../lib/techmap/maps/outpad_ddr.vhd ../../../../../../lib/techmap/maps/iopad_ddr.vhd ../../../../../../lib/techmap/maps/syncram128bw.vhd ../../../../../../lib/techmap/maps/syncram128.vhd ../../../../../../lib/techmap/maps/syncram156bw.vhd}
207 {eth ../../../../../../lib/eth/comp/ethcomp.vhd ../../../../../../lib/eth/core/greth_pkg.vhd ../../../../../../lib/eth/core/eth_rstgen.vhd ../../../../../../lib/eth/core/eth_ahb_mst.vhd ../../../../../../lib/eth/core/greth_tx.vhd ../../../../../../lib/eth/core/greth_rx.vhd ../../../../../../lib/eth/core/grethc.vhd ../../../../../../lib/eth/wrapper/greth_gen.vhd ../../../../../../lib/eth/wrapper/greth_gbit_gen.vhd}
208 {gaisler ../../../../../../lib/gaisler/arith/arith.vhd ../../../../../../lib/gaisler/arith/mul32.vhd ../../../../../../lib/gaisler/arith/div32.vhd ../../../../../../lib/gaisler/memctrl/memctrl.vhd ../../../../../../lib/gaisler/memctrl/sdctrl.vhd ../../../../../../lib/gaisler/memctrl/sdctrl64.vhd ../../../../../../lib/gaisler/memctrl/sdmctrl.vhd ../../../../../../lib/gaisler/memctrl/srctrl.vhd ../../../../../../lib/gaisler/memctrl/spimctrl.vhd ../../../../../../lib/gaisler/leon3/leon3.vhd ../../../../../../lib/gaisler/leon3/mmuconfig.vhd ../../../../../../lib/gaisler/leon3/mmuiface.vhd ../../../../../../lib/gaisler/leon3/libmmu.vhd ../../../../../../lib/gaisler/leon3/libiu.vhd ../../../../../../lib/gaisler/leon3/libcache.vhd ../../../../../../lib/gaisler/leon3/libproc3.vhd ../../../../../../lib/gaisler/leon3/cachemem.vhd ../../../../../../lib/gaisler/leon3/mmu_icache.vhd ../../../../../../lib/gaisler/leon3/mmu_dcache.vhd ../../../../../../lib/gaisler/leon3/mmu_acache.vhd ../../../../../../lib/gaisler/leon3/mmutlbcam.vhd ../../../../../../lib/gaisler/leon3/mmulrue.vhd ../../../../../../lib/gaisler/leon3/mmulru.vhd ../../../../../../lib/gaisler/leon3/mmutlb.vhd ../../../../../../lib/gaisler/leon3/mmutw.vhd ../../../../../../lib/gaisler/leon3/mmu.vhd ../../../../../../lib/gaisler/leon3/mmu_cache.vhd ../../../../../../lib/gaisler/leon3/cpu_disasx.vhd ../../../../../../lib/gaisler/leon3/iu3.vhd ../../../../../../lib/gaisler/leon3/grfpwx.vhd ../../../../../../lib/gaisler/leon3/mfpwx.vhd ../../../../../../lib/gaisler/leon3/grlfpwx.vhd ../../../../../../lib/gaisler/leon3/tbufmem.vhd ../../../../../../lib/gaisler/leon3/dsu3x.vhd ../../../../../../lib/gaisler/leon3/dsu3.vhd ../../../../../../lib/gaisler/leon3/proc3.vhd ../../../../../../lib/gaisler/leon3/leon3s.vhd ../../../../../../lib/gaisler/leon3/leon3cg.vhd ../../../../../../lib/gaisler/leon3/irqmp.vhd ../../../../../../lib/gaisler/leon3/grfpwxsh.vhd ../../../../../../lib/gaisler/leon3/grfpushwx.vhd ../../../../../../lib/gaisler/leon3/leon3sh.vhd ../../../../../../lib/gaisler/misc/misc.vhd ../../../../../../lib/gaisler/misc/rstgen.vhd ../../../../../../lib/gaisler/misc/gptimer.vhd ../../../../../../lib/gaisler/misc/ahbram.vhd ../../../../../../lib/gaisler/misc/ahbdpram.vhd ../../../../../../lib/gaisler/misc/ahbtrace.vhd ../../../../../../lib/gaisler/misc/ahbtrace_mb.vhd ../../../../../../lib/gaisler/misc/ahbmst.vhd ../../../../../../lib/gaisler/misc/grgpio.vhd ../../../../../../lib/gaisler/misc/ahbstat.vhd ../../../../../../lib/gaisler/misc/logan.vhd ../../../../../../lib/gaisler/misc/apbps2.vhd ../../../../../../lib/gaisler/misc/charrom_package.vhd ../../../../../../lib/gaisler/misc/charrom.vhd ../../../../../../lib/gaisler/misc/apbvga.vhd ../../../../../../lib/gaisler/misc/svgactrl.vhd ../../../../../../lib/gaisler/misc/i2cmst_gen.vhd ../../../../../../lib/gaisler/misc/spictrl.vhd ../../../../../../lib/gaisler/misc/i2cslv.vhd ../../../../../../lib/gaisler/misc/wild.vhd ../../../../../../lib/gaisler/misc/wild2ahb.vhd ../../../../../../lib/gaisler/misc/grsysmon.vhd ../../../../../../lib/gaisler/misc/gracectrl.vhd ../../../../../../lib/gaisler/misc/grgpreg.vhd ../../../../../../lib/gaisler/misc/ahbmst2.vhd ../../../../../../lib/gaisler/misc/ahb_mst_iface.vhd ../../../../../../lib/gaisler/net/net.vhd ../../../../../../lib/gaisler/uart/uart.vhd ../../../../../../lib/gaisler/uart/libdcom.vhd ../../../../../../lib/gaisler/uart/apbuart.vhd ../../../../../../lib/gaisler/uart/dcom.vhd ../../../../../../lib/gaisler/uart/dcom_uart.vhd ../../../../../../lib/gaisler/uart/ahbuart.vhd ../../../../../../lib/gaisler/jtag/jtag.vhd ../../../../../../lib/gaisler/jtag/libjtagcom.vhd ../../../../../../lib/gaisler/jtag/jtagcom.vhd ../../../../../../lib/gaisler/jtag/ahbjtag.vhd ../../../../../../lib/gaisler/jtag/ahbjtag_bsd.vhd ../../../../../../lib/gaisler/greth/ethernet_mac.vhd ../../../../../../lib/gaisler/greth/greth.vhd ../../../../../../lib/gaisler/greth/greth_gbit.vhd ../../../../../../lib/gaisler/greth/grethm.vhd ../../../../../../lib/gaisler/ddr/ddr_phy.vhd ../../../../../../lib/gaisler/ddr/ddrsp16a.vhd ../../../../../../lib/gaisler/ddr/ddrsp32a.vhd ../../../../../../lib/gaisler/ddr/ddrsp64a.vhd ../../../../../../lib/gaisler/ddr/ddrspa.vhd ../../../../../../lib/gaisler/ddr/ddr2spa.vhd ../../../../../../lib/gaisler/ddr/ddr2buf.vhd ../../../../../../lib/gaisler/ddr/ddr2spax.vhd ../../../../../../lib/gaisler/ddr/ddr2spax_ahb.vhd ../../../../../../lib/gaisler/ddr/ddr2spax_ddr.vhd}
209 {esa ../../../../../../lib/esa/memoryctrl/memoryctrl.vhd ../../../../../../lib/esa/memoryctrl/mctrl.vhd}
210 {lpp ../../../../../../lib/lpp/./general_purpose/Adder.vhd ../../../../../../lib/lpp/./general_purpose/ADDRcntr.vhd ../../../../../../lib/lpp/./general_purpose/ALU.vhd ../../../../../../lib/lpp/./general_purpose/Clk_divider.vhd ../../../../../../lib/lpp/./general_purpose/general_purpose.vhd ../../../../../../lib/lpp/./general_purpose/MAC_CONTROLER.vhd ../../../../../../lib/lpp/./general_purpose/MAC_MUX2.vhd ../../../../../../lib/lpp/./general_purpose/MAC_MUX.vhd ../../../../../../lib/lpp/./general_purpose/MAC_REG.vhd ../../../../../../lib/lpp/./general_purpose/MAC.vhd ../../../../../../lib/lpp/./general_purpose/Multiplier.vhd ../../../../../../lib/lpp/./general_purpose/MUX2.vhd ../../../../../../lib/lpp/./general_purpose/REG.vhd ../../../../../../lib/lpp/./general_purpose/Shifter.vhd ../../../../../../lib/lpp/./lpp_ad_Conv/AD7688_drvr.vhd ../../../../../../lib/lpp/./lpp_ad_Conv/AD7688_spi_if.vhd ../../../../../../lib/lpp/./lpp_ad_Conv/ADS7886_drvr.vhd ../../../../../../lib/lpp/./lpp_ad_Conv/lpp_ad_Conv.vhd ../../../../../../lib/lpp/./lpp_ad_Conv/lpp_apb_ad_conv.vhd ../../../../../../lib/lpp/./lpp_CNA_amba/APB_CNA.vhd ../../../../../../lib/lpp/./lpp_CNA_amba/clock.vhd ../../../../../../lib/lpp/./lpp_CNA_amba/CNA_TabloC.vhd ../../../../../../lib/lpp/./lpp_CNA_amba/Convertisseur_config.vhd ../../../../../../lib/lpp/./lpp_CNA_amba/GeneSYNC_flag.vhd ../../../../../../lib/lpp/./lpp_CNA_amba/lpp_CNA_amba.vhd ../../../../../../lib/lpp/./lpp_CNA_amba/Serialize.vhd ../../../../../../lib/lpp/./lpp_uart/APB_UART.vhd ../../../../../../lib/lpp/./lpp_uart/BaudGen.vhd ../../../../../../lib/lpp/./lpp_uart/lpp_uart.vhd ../../../../../../lib/lpp/./lpp_uart/Shift_REG.vhd ../../../../../../lib/lpp/./lpp_uart/UART.vhd ../../../../../../lib/lpp/./lpp_amba/APB_MULTI_DIODE.vhd ../../../../../../lib/lpp/./lpp_amba/APB_SIMPLE_DIODE.vhd ../../../../../../lib/lpp/./lpp_amba/lpp_amba.vhd ../../../../../../lib/lpp/./dsp/iir_filter/APB_IIR_CEL.vhd ../../../../../../lib/lpp/./dsp/iir_filter/FILTERcfg.vhd ../../../../../../lib/lpp/./dsp/iir_filter/FilterCTRLR.vhd ../../../../../../lib/lpp/./dsp/iir_filter/FILTER_RAM_CTRLR.vhd ../../../../../../lib/lpp/./dsp/iir_filter/FILTER.vhd ../../../../../../lib/lpp/./dsp/iir_filter/IIR_CEL_CTRLR.vhd ../../../../../../lib/lpp/./dsp/iir_filter/IIR_CEL_FILTER.vhd ../../../../../../lib/lpp/./dsp/iir_filter/iir_filter.vhd ../../../../../../lib/lpp/./dsp/iir_filter/RAM_CEL.vhd ../../../../../../lib/lpp/./dsp/iir_filter/RAM_CTRLR2.vhd ../../../../../../lib/lpp/./dsp/iir_filter/RAM.vhd ../../../../../../lib/lpp/./dsp/iir_filter/Top_Filtre_IIR.vhd ../../../../../../lib/lpp/./amba_lcd_16x2_ctrlr/amba_lcd_16x2_ctrlr.vhd ../../../../../../lib/lpp/./amba_lcd_16x2_ctrlr/apb_lcd_ctrlr.vhd ../../../../../../lib/lpp/./amba_lcd_16x2_ctrlr/FRAME_CLK.vhd ../../../../../../lib/lpp/./amba_lcd_16x2_ctrlr/LCD_16x2_CFG.vhd ../../../../../../lib/lpp/./amba_lcd_16x2_ctrlr/LCD_16x2_DRVR.vhd ../../../../../../lib/lpp/./amba_lcd_16x2_ctrlr/LCD_16x2_ENGINE.vhd ../../../../../../lib/lpp/./amba_lcd_16x2_ctrlr/LCD_2x16_DRIVER.vhd ../../../../../../lib/lpp/./amba_lcd_16x2_ctrlr/LCD_CLK_GENERATOR.vhd ../../../../../../lib/lpp/./amba_lcd_16x2_ctrlr/Top_LCD.vhd}
211 {work ../../../../config.vhd ../../../../ahbrom.vhd ../../../../leon3mp.vhd}
212 }
213 set verilogList {
214 }
@@ -0,0 +1,17
1 include $CDS_INST_DIR/tools/inca/files/cds.lib
2 DEFINE grlib xncsim/grlib
3 DEFINE unisim xncsim/unisim
4 DEFINE dw02 xncsim/dw02
5 DEFINE synplify xncsim/synplify
6 DEFINE techmap xncsim/techmap
7 DEFINE eth xncsim/eth
8 DEFINE gaisler xncsim/gaisler
9 DEFINE esa xncsim/esa
10 DEFINE fmf xncsim/fmf
11 DEFINE spansion xncsim/spansion
12 DEFINE gsi xncsim/gsi
13 DEFINE lpp xncsim/lpp
14 DEFINE cypress xncsim/cypress
15 DEFINE hynix xncsim/hynix
16 DEFINE micron xncsim/micron
17 DEFINE work xncsim/work
@@ -0,0 +1,303
1 acom -quiet -accept87 -work grlib ../../../../lib/grlib/stdlib/version.vhd
2 acom -quiet -accept87 -work grlib ../../../../lib/grlib/stdlib/config.vhd
3 acom -quiet -accept87 -work grlib ../../../../lib/grlib/stdlib/stdlib.vhd
4 acom -quiet -accept87 -work grlib ../../../../lib/grlib/stdlib/stdio.vhd
5 acom -quiet -accept87 -work grlib ../../../../lib/grlib/stdlib/testlib.vhd
6 acom -quiet -accept87 -work grlib ../../../../lib/grlib/util/util.vhd
7 acom -quiet -accept87 -work grlib ../../../../lib/grlib/sparc/sparc.vhd
8 acom -quiet -accept87 -work grlib ../../../../lib/grlib/sparc/sparc_disas.vhd
9 acom -quiet -accept87 -work grlib ../../../../lib/grlib/sparc/cpu_disas.vhd
10 acom -quiet -accept87 -work grlib ../../../../lib/grlib/modgen/multlib.vhd
11 acom -quiet -accept87 -work grlib ../../../../lib/grlib/modgen/leaves.vhd
12 acom -quiet -accept87 -work grlib ../../../../lib/grlib/amba/amba.vhd
13 acom -quiet -accept87 -work grlib ../../../../lib/grlib/amba/devices.vhd
14 acom -quiet -accept87 -work grlib ../../../../lib/grlib/amba/defmst.vhd
15 acom -quiet -accept87 -work grlib ../../../../lib/grlib/amba/apbctrl.vhd
16 acom -quiet -accept87 -work grlib ../../../../lib/grlib/amba/ahbctrl.vhd
17 acom -quiet -accept87 -work grlib ../../../../lib/grlib/amba/dma2ahb_pkg.vhd
18 acom -quiet -accept87 -work grlib ../../../../lib/grlib/amba/dma2ahb.vhd
19 acom -quiet -accept87 -work grlib ../../../../lib/grlib/amba/dma2ahb_tp.vhd
20 acom -quiet -accept87 -work grlib ../../../../lib/grlib/amba/amba_tp.vhd
21 acom -quiet -accept87 -work grlib ../../../../lib/grlib/amba/at/at_pkg.vhd
22 acom -quiet -accept87 -work grlib ../../../../lib/grlib/amba/at/at_ahb_mst_pkg.vhd
23 acom -quiet -accept87 -work grlib ../../../../lib/grlib/amba/at/at_ahb_slv_pkg.vhd
24 acom -quiet -accept87 -work grlib ../../../../lib/grlib/amba/at/at_util.vhd
25 acom -quiet -accept87 -work grlib ../../../../lib/grlib/amba/at/at_ahb_mst.vhd
26 acom -quiet -accept87 -work grlib ../../../../lib/grlib/amba/at/at_ahb_slv.vhd
27 acom -quiet -accept87 -work grlib ../../../../lib/grlib/amba/at/at_ahbs.vhd
28 acom -quiet -accept87 -work grlib ../../../../lib/grlib/amba/at/at_ahb_ctrl.vhd
29 acom -quiet -accept87 -work unisim ../../../../lib/tech/unisim/ise/unisim_VPKG.vhd
30 acom -quiet -accept87 -work unisim ../../../../lib/tech/unisim/ise/unisim_VCOMP.vhd
31 acom -quiet -accept87 -work unisim ../../../../lib/tech/unisim/ise/simple_simprim.vhd
32 acom -quiet -accept87 -work unisim ../../../../lib/tech/unisim/ise/unisim_VITAL.vhd
33 acom -quiet -accept87 -work dw02 ../../../../lib/tech/dw02/comp/DW02_components.vhd
34 acom -quiet -accept87 -work synplify ../../../../lib/synplify/sim/synplify.vhd
35 acom -quiet -accept87 -work synplify ../../../../lib/synplify/sim/synattr.vhd
36 acom -quiet -accept87 -work techmap ../../../../lib/techmap/gencomp/gencomp.vhd
37 acom -quiet -accept87 -work techmap ../../../../lib/techmap/gencomp/netcomp.vhd
38 acom -quiet -accept87 -work techmap ../../../../lib/techmap/inferred/memory_inferred.vhd
39 acom -quiet -accept87 -work techmap ../../../../lib/techmap/inferred/ddr_inferred.vhd
40 acom -quiet -accept87 -work techmap ../../../../lib/techmap/inferred/mul_inferred.vhd
41 acom -quiet -accept87 -work techmap ../../../../lib/techmap/inferred/ddr_phy_inferred.vhd
42 acom -quiet -accept87 -work techmap ../../../../lib/techmap/dw02/mul_dw_gen.vhd
43 acom -quiet -accept87 -work techmap ../../../../lib/techmap/unisim/memory_unisim.vhd
44 acom -quiet -accept87 -work techmap ../../../../lib/techmap/unisim/buffer_unisim.vhd
45 acom -quiet -accept87 -work techmap ../../../../lib/techmap/unisim/pads_unisim.vhd
46 acom -quiet -accept87 -work techmap ../../../../lib/techmap/unisim/clkgen_unisim.vhd
47 acom -quiet -accept87 -work techmap ../../../../lib/techmap/unisim/tap_unisim.vhd
48 acom -quiet -accept87 -work techmap ../../../../lib/techmap/unisim/ddr_unisim.vhd
49 acom -quiet -accept87 -work techmap ../../../../lib/techmap/unisim/ddr_phy_unisim.vhd
50 acom -quiet -accept87 -work techmap ../../../../lib/techmap/unisim/grspwc_unisim.vhd
51 acom -quiet -accept87 -work techmap ../../../../lib/techmap/unisim/grspwc2_unisim.vhd
52 acom -quiet -accept87 -work techmap ../../../../lib/techmap/unisim/grusbhc_unisim.vhd
53 acom -quiet -accept87 -work techmap ../../../../lib/techmap/unisim/ssrctrl_unisim.vhd
54 acom -quiet -accept87 -work techmap ../../../../lib/techmap/unisim/sysmon_unisim.vhd
55 acom -quiet -accept87 -work techmap ../../../../lib/techmap/unisim/mul_unisim.vhd
56 acom -quiet -accept87 -work techmap ../../../../lib/techmap/unisim/grfpw_0_unisim.vhd
57 acom -quiet -accept87 -work techmap ../../../../lib/techmap/maps/allclkgen.vhd
58 acom -quiet -accept87 -work techmap ../../../../lib/techmap/maps/allddr.vhd
59 acom -quiet -accept87 -work techmap ../../../../lib/techmap/maps/allmem.vhd
60 acom -quiet -accept87 -work techmap ../../../../lib/techmap/maps/allpads.vhd
61 acom -quiet -accept87 -work techmap ../../../../lib/techmap/maps/alltap.vhd
62 acom -quiet -accept87 -work techmap ../../../../lib/techmap/maps/clkgen.vhd
63 acom -quiet -accept87 -work techmap ../../../../lib/techmap/maps/clkmux.vhd
64 acom -quiet -accept87 -work techmap ../../../../lib/techmap/maps/clkand.vhd
65 acom -quiet -accept87 -work techmap ../../../../lib/techmap/maps/ddr_ireg.vhd
66 acom -quiet -accept87 -work techmap ../../../../lib/techmap/maps/ddr_oreg.vhd
67 acom -quiet -accept87 -work techmap ../../../../lib/techmap/maps/ddrphy.vhd
68 acom -quiet -accept87 -work techmap ../../../../lib/techmap/maps/syncram.vhd
69 acom -quiet -accept87 -work techmap ../../../../lib/techmap/maps/syncram64.vhd
70 acom -quiet -accept87 -work techmap ../../../../lib/techmap/maps/syncram_2p.vhd
71 acom -quiet -accept87 -work techmap ../../../../lib/techmap/maps/syncram_dp.vhd
72 acom -quiet -accept87 -work techmap ../../../../lib/techmap/maps/syncfifo.vhd
73 acom -quiet -accept87 -work techmap ../../../../lib/techmap/maps/regfile_3p.vhd
74 acom -quiet -accept87 -work techmap ../../../../lib/techmap/maps/tap.vhd
75 acom -quiet -accept87 -work techmap ../../../../lib/techmap/maps/techbuf.vhd
76 acom -quiet -accept87 -work techmap ../../../../lib/techmap/maps/nandtree.vhd
77 acom -quiet -accept87 -work techmap ../../../../lib/techmap/maps/clkpad.vhd
78 acom -quiet -accept87 -work techmap ../../../../lib/techmap/maps/clkpad_ds.vhd
79 acom -quiet -accept87 -work techmap ../../../../lib/techmap/maps/inpad.vhd
80 acom -quiet -accept87 -work techmap ../../../../lib/techmap/maps/inpad_ds.vhd
81 acom -quiet -accept87 -work techmap ../../../../lib/techmap/maps/iodpad.vhd
82 acom -quiet -accept87 -work techmap ../../../../lib/techmap/maps/iopad.vhd
83 acom -quiet -accept87 -work techmap ../../../../lib/techmap/maps/iopad_ds.vhd
84 acom -quiet -accept87 -work techmap ../../../../lib/techmap/maps/lvds_combo.vhd
85 acom -quiet -accept87 -work techmap ../../../../lib/techmap/maps/odpad.vhd
86 acom -quiet -accept87 -work techmap ../../../../lib/techmap/maps/outpad.vhd
87 acom -quiet -accept87 -work techmap ../../../../lib/techmap/maps/outpad_ds.vhd
88 acom -quiet -accept87 -work techmap ../../../../lib/techmap/maps/toutpad.vhd
89 acom -quiet -accept87 -work techmap ../../../../lib/techmap/maps/skew_outpad.vhd
90 acom -quiet -accept87 -work techmap ../../../../lib/techmap/maps/grspwc_net.vhd
91 acom -quiet -accept87 -work techmap ../../../../lib/techmap/maps/grspwc2_net.vhd
92 acom -quiet -accept87 -work techmap ../../../../lib/techmap/maps/grlfpw_net.vhd
93 acom -quiet -accept87 -work techmap ../../../../lib/techmap/maps/grfpw_net.vhd
94 acom -quiet -accept87 -work techmap ../../../../lib/techmap/maps/mul_61x61.vhd
95 acom -quiet -accept87 -work techmap ../../../../lib/techmap/maps/cpu_disas_net.vhd
96 acom -quiet -accept87 -work techmap ../../../../lib/techmap/maps/ringosc.vhd
97 acom -quiet -accept87 -work techmap ../../../../lib/techmap/maps/system_monitor.vhd
98 acom -quiet -accept87 -work techmap ../../../../lib/techmap/maps/grgates.vhd
99 acom -quiet -accept87 -work techmap ../../../../lib/techmap/maps/inpad_ddr.vhd
100 acom -quiet -accept87 -work techmap ../../../../lib/techmap/maps/outpad_ddr.vhd
101 acom -quiet -accept87 -work techmap ../../../../lib/techmap/maps/iopad_ddr.vhd
102 acom -quiet -accept87 -work techmap ../../../../lib/techmap/maps/syncram128bw.vhd
103 acom -quiet -accept87 -work techmap ../../../../lib/techmap/maps/syncram128.vhd
104 acom -quiet -accept87 -work techmap ../../../../lib/techmap/maps/syncram156bw.vhd
105 acom -quiet -accept87 -work eth ../../../../lib/eth/comp/ethcomp.vhd
106 acom -quiet -accept87 -work eth ../../../../lib/eth/core/greth_pkg.vhd
107 acom -quiet -accept87 -work eth ../../../../lib/eth/core/eth_rstgen.vhd
108 acom -quiet -accept87 -work eth ../../../../lib/eth/core/eth_ahb_mst.vhd
109 acom -quiet -accept87 -work eth ../../../../lib/eth/core/greth_tx.vhd
110 acom -quiet -accept87 -work eth ../../../../lib/eth/core/greth_rx.vhd
111 acom -quiet -accept87 -work eth ../../../../lib/eth/core/grethc.vhd
112 acom -quiet -accept87 -work eth ../../../../lib/eth/wrapper/greth_gen.vhd
113 acom -quiet -accept87 -work eth ../../../../lib/eth/wrapper/greth_gbit_gen.vhd
114 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/arith/arith.vhd
115 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/arith/mul32.vhd
116 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/arith/div32.vhd
117 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/memctrl/memctrl.vhd
118 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/memctrl/sdctrl.vhd
119 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/memctrl/sdctrl64.vhd
120 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/memctrl/sdmctrl.vhd
121 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/memctrl/srctrl.vhd
122 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/memctrl/spimctrl.vhd
123 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/leon3/leon3.vhd
124 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/leon3/mmuconfig.vhd
125 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/leon3/mmuiface.vhd
126 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/leon3/libmmu.vhd
127 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/leon3/libiu.vhd
128 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/leon3/libcache.vhd
129 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/leon3/libproc3.vhd
130 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/leon3/cachemem.vhd
131 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/leon3/mmu_icache.vhd
132 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/leon3/mmu_dcache.vhd
133 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/leon3/mmu_acache.vhd
134 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/leon3/mmutlbcam.vhd
135 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/leon3/mmulrue.vhd
136 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/leon3/mmulru.vhd
137 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/leon3/mmutlb.vhd
138 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/leon3/mmutw.vhd
139 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/leon3/mmu.vhd
140 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/leon3/mmu_cache.vhd
141 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/leon3/cpu_disasx.vhd
142 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/leon3/iu3.vhd
143 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/leon3/grfpwx.vhd
144 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/leon3/mfpwx.vhd
145 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/leon3/grlfpwx.vhd
146 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/leon3/tbufmem.vhd
147 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/leon3/dsu3x.vhd
148 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/leon3/dsu3.vhd
149 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/leon3/proc3.vhd
150 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/leon3/leon3s.vhd
151 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/leon3/leon3cg.vhd
152 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/leon3/irqmp.vhd
153 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/leon3/grfpwxsh.vhd
154 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/leon3/grfpushwx.vhd
155 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/leon3/leon3sh.vhd
156 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/misc/misc.vhd
157 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/misc/rstgen.vhd
158 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/misc/gptimer.vhd
159 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/misc/ahbram.vhd
160 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/misc/ahbdpram.vhd
161 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/misc/ahbtrace.vhd
162 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/misc/ahbtrace_mb.vhd
163 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/misc/ahbmst.vhd
164 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/misc/grgpio.vhd
165 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/misc/ahbstat.vhd
166 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/misc/logan.vhd
167 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/misc/apbps2.vhd
168 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/misc/charrom_package.vhd
169 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/misc/charrom.vhd
170 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/misc/apbvga.vhd
171 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/misc/svgactrl.vhd
172 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/misc/i2cmst_gen.vhd
173 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/misc/spictrl.vhd
174 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/misc/i2cslv.vhd
175 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/misc/wild.vhd
176 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/misc/wild2ahb.vhd
177 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/misc/grsysmon.vhd
178 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/misc/gracectrl.vhd
179 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/misc/grgpreg.vhd
180 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/misc/ahbmst2.vhd
181 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/misc/ahb_mst_iface.vhd
182 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/net/net.vhd
183 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/uart/uart.vhd
184 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/uart/libdcom.vhd
185 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/uart/apbuart.vhd
186 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/uart/dcom.vhd
187 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/uart/dcom_uart.vhd
188 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/uart/ahbuart.vhd
189 alog -quiet -work gaisler ../../../../lib/gaisler/sim/i2c_slave_model.v
190 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/sim/sim.vhd
191 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/sim/sram.vhd
192 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/sim/ata_device.vhd
193 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/sim/sram16.vhd
194 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/sim/phy.vhd
195 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/sim/ahbrep.vhd
196 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/sim/delay_wire.vhd
197 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/sim/spi_flash.vhd
198 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/sim/pwm_check.vhd
199 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/sim/usbsim.vhd
200 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/sim/grusbdcsim.vhd
201 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/sim/grusb_dclsim.vhd
202 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/jtag/jtag.vhd
203 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/jtag/libjtagcom.vhd
204 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/jtag/jtagcom.vhd
205 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/jtag/ahbjtag.vhd
206 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/jtag/ahbjtag_bsd.vhd
207 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/jtag/jtagtst.vhd
208 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/greth/ethernet_mac.vhd
209 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/greth/greth.vhd
210 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/greth/greth_gbit.vhd
211 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/greth/grethm.vhd
212 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/ddr/ddr_phy.vhd
213 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/ddr/ddrsp16a.vhd
214 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/ddr/ddrsp32a.vhd
215 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/ddr/ddrsp64a.vhd
216 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/ddr/ddrspa.vhd
217 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/ddr/ddr2spa.vhd
218 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/ddr/ddr2buf.vhd
219 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/ddr/ddr2spax.vhd
220 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/ddr/ddr2spax_ahb.vhd
221 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/ddr/ddr2spax_ddr.vhd
222 acom -quiet -accept87 -work esa ../../../../lib/esa/memoryctrl/memoryctrl.vhd
223 acom -quiet -accept87 -work esa ../../../../lib/esa/memoryctrl/mctrl.vhd
224 acom -quiet -accept87 -work fmf ../../../../lib/fmf/utilities/conversions.vhd
225 acom -quiet -accept87 -work fmf ../../../../lib/fmf/utilities/gen_utils.vhd
226 acom -quiet -accept87 -work fmf ../../../../lib/fmf/flash/flash.vhd
227 acom -quiet -accept87 -work fmf ../../../../lib/fmf/flash/s25fl064a.vhd
228 acom -quiet -accept87 -work fmf ../../../../lib/fmf/flash/m25p80.vhd
229 acom -quiet -accept87 -work fmf ../../../../lib/fmf/fifo/idt7202.vhd
230 acom -quiet -accept87 -work gsi ../../../../lib/gsi/ssram/functions.vhd
231 acom -quiet -accept87 -work gsi ../../../../lib/gsi/ssram/core_burst.vhd
232 acom -quiet -accept87 -work gsi ../../../../lib/gsi/ssram/g880e18bt.vhd
233 acom -quiet -accept87 -work lpp ../../../../lib/lpp/./general_purpose/Adder.vhd
234 acom -quiet -accept87 -work lpp ../../../../lib/lpp/./general_purpose/ADDRcntr.vhd
235 acom -quiet -accept87 -work lpp ../../../../lib/lpp/./general_purpose/ALU.vhd
236 acom -quiet -accept87 -work lpp ../../../../lib/lpp/./general_purpose/Clk_divider.vhd
237 acom -quiet -accept87 -work lpp ../../../../lib/lpp/./general_purpose/general_purpose.vhd
238 acom -quiet -accept87 -work lpp ../../../../lib/lpp/./general_purpose/MAC_CONTROLER.vhd
239 acom -quiet -accept87 -work lpp ../../../../lib/lpp/./general_purpose/MAC_MUX2.vhd
240 acom -quiet -accept87 -work lpp ../../../../lib/lpp/./general_purpose/MAC_MUX.vhd
241 acom -quiet -accept87 -work lpp ../../../../lib/lpp/./general_purpose/MAC_REG.vhd
242 acom -quiet -accept87 -work lpp ../../../../lib/lpp/./general_purpose/MAC.vhd
243 acom -quiet -accept87 -work lpp ../../../../lib/lpp/./general_purpose/Multiplier.vhd
244 acom -quiet -accept87 -work lpp ../../../../lib/lpp/./general_purpose/MUX2.vhd
245 acom -quiet -accept87 -work lpp ../../../../lib/lpp/./general_purpose/REG.vhd
246 acom -quiet -accept87 -work lpp ../../../../lib/lpp/./general_purpose/Shifter.vhd
247 acom -quiet -accept87 -work lpp ../../../../lib/lpp/./lpp_ad_Conv/AD7688_drvr.vhd
248 acom -quiet -accept87 -work lpp ../../../../lib/lpp/./lpp_ad_Conv/AD7688_spi_if.vhd
249 acom -quiet -accept87 -work lpp ../../../../lib/lpp/./lpp_ad_Conv/ADS7886_drvr.vhd
250 acom -quiet -accept87 -work lpp ../../../../lib/lpp/./lpp_ad_Conv/lpp_ad_Conv.vhd
251 acom -quiet -accept87 -work lpp ../../../../lib/lpp/./lpp_ad_Conv/lpp_apb_ad_conv.vhd
252 acom -quiet -accept87 -work lpp ../../../../lib/lpp/./lpp_CNA_amba/APB_CNA.vhd
253 acom -quiet -accept87 -work lpp ../../../../lib/lpp/./lpp_CNA_amba/clock.vhd
254 acom -quiet -accept87 -work lpp ../../../../lib/lpp/./lpp_CNA_amba/CNA_TabloC.vhd
255 acom -quiet -accept87 -work lpp ../../../../lib/lpp/./lpp_CNA_amba/Convertisseur_config.vhd
256 acom -quiet -accept87 -work lpp ../../../../lib/lpp/./lpp_CNA_amba/GeneSYNC_flag.vhd
257 acom -quiet -accept87 -work lpp ../../../../lib/lpp/./lpp_CNA_amba/lpp_CNA_amba.vhd
258 acom -quiet -accept87 -work lpp ../../../../lib/lpp/./lpp_CNA_amba/Serialize.vhd
259 acom -quiet -accept87 -work lpp ../../../../lib/lpp/./lpp_uart/APB_UART.vhd
260 acom -quiet -accept87 -work lpp ../../../../lib/lpp/./lpp_uart/BaudGen.vhd
261 acom -quiet -accept87 -work lpp ../../../../lib/lpp/./lpp_uart/lpp_uart.vhd
262 acom -quiet -accept87 -work lpp ../../../../lib/lpp/./lpp_uart/Shift_REG.vhd
263 acom -quiet -accept87 -work lpp ../../../../lib/lpp/./lpp_uart/UART.vhd
264 acom -quiet -accept87 -work lpp ../../../../lib/lpp/./lpp_amba/APB_MULTI_DIODE.vhd
265 acom -quiet -accept87 -work lpp ../../../../lib/lpp/./lpp_amba/APB_SIMPLE_DIODE.vhd
266 acom -quiet -accept87 -work lpp ../../../../lib/lpp/./lpp_amba/lpp_amba.vhd
267 acom -quiet -accept87 -work lpp ../../../../lib/lpp/./dsp/iir_filter/APB_IIR_CEL.vhd
268 acom -quiet -accept87 -work lpp ../../../../lib/lpp/./dsp/iir_filter/FILTERcfg.vhd
269 acom -quiet -accept87 -work lpp ../../../../lib/lpp/./dsp/iir_filter/FilterCTRLR.vhd
270 acom -quiet -accept87 -work lpp ../../../../lib/lpp/./dsp/iir_filter/FILTER_RAM_CTRLR.vhd
271 acom -quiet -accept87 -work lpp ../../../../lib/lpp/./dsp/iir_filter/FILTER.vhd
272 acom -quiet -accept87 -work lpp ../../../../lib/lpp/./dsp/iir_filter/IIR_CEL_CTRLR.vhd
273 acom -quiet -accept87 -work lpp ../../../../lib/lpp/./dsp/iir_filter/IIR_CEL_FILTER.vhd
274 acom -quiet -accept87 -work lpp ../../../../lib/lpp/./dsp/iir_filter/iir_filter.vhd
275 acom -quiet -accept87 -work lpp ../../../../lib/lpp/./dsp/iir_filter/RAM_CEL.vhd
276 acom -quiet -accept87 -work lpp ../../../../lib/lpp/./dsp/iir_filter/RAM_CTRLR2.vhd
277 acom -quiet -accept87 -work lpp ../../../../lib/lpp/./dsp/iir_filter/RAM.vhd
278 acom -quiet -accept87 -work lpp ../../../../lib/lpp/./dsp/iir_filter/Top_Filtre_IIR.vhd
279 acom -quiet -accept87 -work lpp ../../../../lib/lpp/./amba_lcd_16x2_ctrlr/amba_lcd_16x2_ctrlr.vhd
280 acom -quiet -accept87 -work lpp ../../../../lib/lpp/./amba_lcd_16x2_ctrlr/apb_lcd_ctrlr.vhd
281 acom -quiet -accept87 -work lpp ../../../../lib/lpp/./amba_lcd_16x2_ctrlr/FRAME_CLK.vhd
282 acom -quiet -accept87 -work lpp ../../../../lib/lpp/./amba_lcd_16x2_ctrlr/LCD_16x2_CFG.vhd
283 acom -quiet -accept87 -work lpp ../../../../lib/lpp/./amba_lcd_16x2_ctrlr/LCD_16x2_DRVR.vhd
284 acom -quiet -accept87 -work lpp ../../../../lib/lpp/./amba_lcd_16x2_ctrlr/LCD_16x2_ENGINE.vhd
285 acom -quiet -accept87 -work lpp ../../../../lib/lpp/./amba_lcd_16x2_ctrlr/LCD_2x16_DRIVER.vhd
286 acom -quiet -accept87 -work lpp ../../../../lib/lpp/./amba_lcd_16x2_ctrlr/LCD_CLK_GENERATOR.vhd
287 acom -quiet -accept87 -work lpp ../../../../lib/lpp/./amba_lcd_16x2_ctrlr/Top_LCD.vhd
288 acom -quiet -accept87 -work cypress ../../../../lib/cypress/ssram/components.vhd
289 acom -quiet -accept87 -work cypress ../../../../lib/cypress/ssram/package_utility.vhd
290 acom -quiet -accept87 -work cypress ../../../../lib/cypress/ssram/cy7c1354b.vhd
291 acom -quiet -accept87 -work cypress ../../../../lib/cypress/ssram/cy7c1380d.vhd
292 acom -quiet -accept87 -work hynix ../../../../lib/hynix/ddr2/HY5PS121621F_PACK.vhd
293 acom -quiet -accept87 -work hynix ../../../../lib/hynix/ddr2/HY5PS121621F.vhd
294 acom -quiet -accept87 -work hynix ../../../../lib/hynix/ddr2/components.vhd
295 alog -quiet -work micron ../../../../lib/micron/sdram/mobile_sdr.v
296 acom -quiet -accept87 -work micron ../../../../lib/micron/sdram/components.vhd
297 acom -quiet -accept87 -work micron ../../../../lib/micron/sdram/mt48lc16m16a2.vhd
298 alog -quiet -work micron ../../../../lib/micron/ddr/ddr2.v
299 alog -quiet -work micron ../../../../lib/micron/ddr/mobile_ddr.v
300 acom -quiet -accept87 -work micron ../../../../lib/micron/ddr/mt46v16m16.vhd
301 acom -quiet -accept87 -work work ../../../../lib/work/debug/debug.vhd
302 acom -quiet -accept87 -work work ../../../../lib/work/debug/grtestmod.vhd
303 acom -quiet -accept87 -work work ../../../../lib/work/debug/cpu_disas.vhd
@@ -0,0 +1,259
1 sh mkdir synopsys
2 sh mkdir synopsys/grlib
3 define_design_lib grlib -path synopsys/grlib
4 analyze -f VHDL -library grlib ../../lib/grlib/stdlib/version.vhd
5 analyze -f VHDL -library grlib ../../lib/grlib/stdlib/config.vhd
6 analyze -f VHDL -library grlib ../../lib/grlib/stdlib/stdlib.vhd
7 analyze -f VHDL -library grlib ../../lib/grlib/sparc/sparc.vhd
8 analyze -f VHDL -library grlib ../../lib/grlib/modgen/multlib.vhd
9 analyze -f VHDL -library grlib ../../lib/grlib/modgen/leaves.vhd
10 analyze -f VHDL -library grlib ../../lib/grlib/amba/amba.vhd
11 analyze -f VHDL -library grlib ../../lib/grlib/amba/devices.vhd
12 analyze -f VHDL -library grlib ../../lib/grlib/amba/defmst.vhd
13 analyze -f VHDL -library grlib ../../lib/grlib/amba/apbctrl.vhd
14 analyze -f VHDL -library grlib ../../lib/grlib/amba/ahbctrl.vhd
15 analyze -f VHDL -library grlib ../../lib/grlib/amba/dma2ahb_pkg.vhd
16 analyze -f VHDL -library grlib ../../lib/grlib/amba/dma2ahb.vhd
17 sh mkdir synopsys/unisim
18 define_design_lib unisim -path synopsys/unisim
19 sh mkdir synopsys/synplify
20 define_design_lib synplify -path synopsys/synplify
21 sh mkdir synopsys/techmap
22 define_design_lib techmap -path synopsys/techmap
23 analyze -f VHDL -library techmap ../../lib/techmap/gencomp/gencomp.vhd
24 analyze -f VHDL -library techmap ../../lib/techmap/gencomp/netcomp.vhd
25 analyze -f VHDL -library techmap ../../lib/techmap/inferred/memory_inferred.vhd
26 analyze -f VHDL -library techmap ../../lib/techmap/inferred/ddr_inferred.vhd
27 analyze -f VHDL -library techmap ../../lib/techmap/inferred/mul_inferred.vhd
28 analyze -f VHDL -library techmap ../../lib/techmap/inferred/ddr_phy_inferred.vhd
29 analyze -f VHDL -library techmap ../../lib/techmap/dw02/mul_dw_gen.vhd
30 analyze -f VHDL -library techmap ../../lib/techmap/maps/allclkgen.vhd
31 analyze -f VHDL -library techmap ../../lib/techmap/maps/allddr.vhd
32 analyze -f VHDL -library techmap ../../lib/techmap/maps/allmem.vhd
33 analyze -f VHDL -library techmap ../../lib/techmap/maps/allpads.vhd
34 analyze -f VHDL -library techmap ../../lib/techmap/maps/alltap.vhd
35 analyze -f VHDL -library techmap ../../lib/techmap/maps/clkgen.vhd
36 analyze -f VHDL -library techmap ../../lib/techmap/maps/clkmux.vhd
37 analyze -f VHDL -library techmap ../../lib/techmap/maps/clkand.vhd
38 analyze -f VHDL -library techmap ../../lib/techmap/maps/ddr_ireg.vhd
39 analyze -f VHDL -library techmap ../../lib/techmap/maps/ddr_oreg.vhd
40 analyze -f VHDL -library techmap ../../lib/techmap/maps/ddrphy.vhd
41 analyze -f VHDL -library techmap ../../lib/techmap/maps/syncram.vhd
42 analyze -f VHDL -library techmap ../../lib/techmap/maps/syncram64.vhd
43 analyze -f VHDL -library techmap ../../lib/techmap/maps/syncram_2p.vhd
44 analyze -f VHDL -library techmap ../../lib/techmap/maps/syncram_dp.vhd
45 analyze -f VHDL -library techmap ../../lib/techmap/maps/syncfifo.vhd
46 analyze -f VHDL -library techmap ../../lib/techmap/maps/regfile_3p.vhd
47 analyze -f VHDL -library techmap ../../lib/techmap/maps/tap.vhd
48 analyze -f VHDL -library techmap ../../lib/techmap/maps/techbuf.vhd
49 analyze -f VHDL -library techmap ../../lib/techmap/maps/nandtree.vhd
50 analyze -f VHDL -library techmap ../../lib/techmap/maps/clkpad.vhd
51 analyze -f VHDL -library techmap ../../lib/techmap/maps/clkpad_ds.vhd
52 analyze -f VHDL -library techmap ../../lib/techmap/maps/inpad.vhd
53 analyze -f VHDL -library techmap ../../lib/techmap/maps/inpad_ds.vhd
54 analyze -f VHDL -library techmap ../../lib/techmap/maps/iodpad.vhd
55 analyze -f VHDL -library techmap ../../lib/techmap/maps/iopad.vhd
56 analyze -f VHDL -library techmap ../../lib/techmap/maps/iopad_ds.vhd
57 analyze -f VHDL -library techmap ../../lib/techmap/maps/lvds_combo.vhd
58 analyze -f VHDL -library techmap ../../lib/techmap/maps/odpad.vhd
59 analyze -f VHDL -library techmap ../../lib/techmap/maps/outpad.vhd
60 analyze -f VHDL -library techmap ../../lib/techmap/maps/outpad_ds.vhd
61 analyze -f VHDL -library techmap ../../lib/techmap/maps/toutpad.vhd
62 analyze -f VHDL -library techmap ../../lib/techmap/maps/skew_outpad.vhd
63 analyze -f VHDL -library techmap ../../lib/techmap/maps/grspwc_net.vhd
64 analyze -f VHDL -library techmap ../../lib/techmap/maps/grspwc2_net.vhd
65 analyze -f VHDL -library techmap ../../lib/techmap/maps/grlfpw_net.vhd
66 analyze -f VHDL -library techmap ../../lib/techmap/maps/grfpw_net.vhd
67 analyze -f VHDL -library techmap ../../lib/techmap/maps/mul_61x61.vhd
68 analyze -f VHDL -library techmap ../../lib/techmap/maps/cpu_disas_net.vhd
69 analyze -f VHDL -library techmap ../../lib/techmap/maps/ringosc.vhd
70 analyze -f VHDL -library techmap ../../lib/techmap/maps/system_monitor.vhd
71 analyze -f VHDL -library techmap ../../lib/techmap/maps/grgates.vhd
72 analyze -f VHDL -library techmap ../../lib/techmap/maps/inpad_ddr.vhd
73 analyze -f VHDL -library techmap ../../lib/techmap/maps/outpad_ddr.vhd
74 analyze -f VHDL -library techmap ../../lib/techmap/maps/iopad_ddr.vhd
75 analyze -f VHDL -library techmap ../../lib/techmap/maps/syncram128bw.vhd
76 analyze -f VHDL -library techmap ../../lib/techmap/maps/syncram128.vhd
77 analyze -f VHDL -library techmap ../../lib/techmap/maps/syncram156bw.vhd
78 sh mkdir synopsys/eth
79 define_design_lib eth -path synopsys/eth
80 analyze -f VHDL -library eth ../../lib/eth/comp/ethcomp.vhd
81 analyze -f VHDL -library eth ../../lib/eth/core/greth_pkg.vhd
82 analyze -f VHDL -library eth ../../lib/eth/core/eth_rstgen.vhd
83 analyze -f VHDL -library eth ../../lib/eth/core/eth_ahb_mst.vhd
84 analyze -f VHDL -library eth ../../lib/eth/core/greth_tx.vhd
85 analyze -f VHDL -library eth ../../lib/eth/core/greth_rx.vhd
86 analyze -f VHDL -library eth ../../lib/eth/core/grethc.vhd
87 analyze -f VHDL -library eth ../../lib/eth/wrapper/greth_gen.vhd
88 analyze -f VHDL -library eth ../../lib/eth/wrapper/greth_gbit_gen.vhd
89 sh mkdir synopsys/gaisler
90 define_design_lib gaisler -path synopsys/gaisler
91 analyze -f VHDL -library gaisler ../../lib/gaisler/arith/arith.vhd
92 analyze -f VHDL -library gaisler ../../lib/gaisler/arith/mul32.vhd
93 analyze -f VHDL -library gaisler ../../lib/gaisler/arith/div32.vhd
94 analyze -f VHDL -library gaisler ../../lib/gaisler/memctrl/memctrl.vhd
95 analyze -f VHDL -library gaisler ../../lib/gaisler/memctrl/sdctrl.vhd
96 analyze -f VHDL -library gaisler ../../lib/gaisler/memctrl/sdctrl64.vhd
97 analyze -f VHDL -library gaisler ../../lib/gaisler/memctrl/sdmctrl.vhd
98 analyze -f VHDL -library gaisler ../../lib/gaisler/memctrl/srctrl.vhd
99 analyze -f VHDL -library gaisler ../../lib/gaisler/memctrl/spimctrl.vhd
100 analyze -f VHDL -library gaisler ../../lib/gaisler/leon3/leon3.vhd
101 analyze -f VHDL -library gaisler ../../lib/gaisler/leon3/mmuconfig.vhd
102 analyze -f VHDL -library gaisler ../../lib/gaisler/leon3/mmuiface.vhd
103 analyze -f VHDL -library gaisler ../../lib/gaisler/leon3/libmmu.vhd
104 analyze -f VHDL -library gaisler ../../lib/gaisler/leon3/libiu.vhd
105 analyze -f VHDL -library gaisler ../../lib/gaisler/leon3/libcache.vhd
106 analyze -f VHDL -library gaisler ../../lib/gaisler/leon3/libproc3.vhd
107 analyze -f VHDL -library gaisler ../../lib/gaisler/leon3/cachemem.vhd
108 analyze -f VHDL -library gaisler ../../lib/gaisler/leon3/mmu_icache.vhd
109 analyze -f VHDL -library gaisler ../../lib/gaisler/leon3/mmu_dcache.vhd
110 analyze -f VHDL -library gaisler ../../lib/gaisler/leon3/mmu_acache.vhd
111 analyze -f VHDL -library gaisler ../../lib/gaisler/leon3/mmutlbcam.vhd
112 analyze -f VHDL -library gaisler ../../lib/gaisler/leon3/mmulrue.vhd
113 analyze -f VHDL -library gaisler ../../lib/gaisler/leon3/mmulru.vhd
114 analyze -f VHDL -library gaisler ../../lib/gaisler/leon3/mmutlb.vhd
115 analyze -f VHDL -library gaisler ../../lib/gaisler/leon3/mmutw.vhd
116 analyze -f VHDL -library gaisler ../../lib/gaisler/leon3/mmu.vhd
117 analyze -f VHDL -library gaisler ../../lib/gaisler/leon3/mmu_cache.vhd
118 analyze -f VHDL -library gaisler ../../lib/gaisler/leon3/cpu_disasx.vhd
119 analyze -f VHDL -library gaisler ../../lib/gaisler/leon3/iu3.vhd
120 analyze -f VHDL -library gaisler ../../lib/gaisler/leon3/grfpwx.vhd
121 analyze -f VHDL -library gaisler ../../lib/gaisler/leon3/mfpwx.vhd
122 analyze -f VHDL -library gaisler ../../lib/gaisler/leon3/grlfpwx.vhd
123 analyze -f VHDL -library gaisler ../../lib/gaisler/leon3/tbufmem.vhd
124 analyze -f VHDL -library gaisler ../../lib/gaisler/leon3/dsu3x.vhd
125 analyze -f VHDL -library gaisler ../../lib/gaisler/leon3/dsu3.vhd
126 analyze -f VHDL -library gaisler ../../lib/gaisler/leon3/proc3.vhd
127 analyze -f VHDL -library gaisler ../../lib/gaisler/leon3/leon3s.vhd
128 analyze -f VHDL -library gaisler ../../lib/gaisler/leon3/leon3cg.vhd
129 analyze -f VHDL -library gaisler ../../lib/gaisler/leon3/irqmp.vhd
130 analyze -f VHDL -library gaisler ../../lib/gaisler/leon3/grfpwxsh.vhd
131 analyze -f VHDL -library gaisler ../../lib/gaisler/leon3/grfpushwx.vhd
132 analyze -f VHDL -library gaisler ../../lib/gaisler/leon3/leon3sh.vhd
133 analyze -f VHDL -library gaisler ../../lib/gaisler/misc/misc.vhd
134 analyze -f VHDL -library gaisler ../../lib/gaisler/misc/rstgen.vhd
135 analyze -f VHDL -library gaisler ../../lib/gaisler/misc/gptimer.vhd
136 analyze -f VHDL -library gaisler ../../lib/gaisler/misc/ahbram.vhd
137 analyze -f VHDL -library gaisler ../../lib/gaisler/misc/ahbdpram.vhd
138 analyze -f VHDL -library gaisler ../../lib/gaisler/misc/ahbtrace.vhd
139 analyze -f VHDL -library gaisler ../../lib/gaisler/misc/ahbtrace_mb.vhd
140 analyze -f VHDL -library gaisler ../../lib/gaisler/misc/ahbmst.vhd
141 analyze -f VHDL -library gaisler ../../lib/gaisler/misc/grgpio.vhd
142 analyze -f VHDL -library gaisler ../../lib/gaisler/misc/ahbstat.vhd
143 analyze -f VHDL -library gaisler ../../lib/gaisler/misc/logan.vhd
144 analyze -f VHDL -library gaisler ../../lib/gaisler/misc/apbps2.vhd
145 analyze -f VHDL -library gaisler ../../lib/gaisler/misc/charrom_package.vhd
146 analyze -f VHDL -library gaisler ../../lib/gaisler/misc/charrom.vhd
147 analyze -f VHDL -library gaisler ../../lib/gaisler/misc/apbvga.vhd
148 analyze -f VHDL -library gaisler ../../lib/gaisler/misc/svgactrl.vhd
149 analyze -f VHDL -library gaisler ../../lib/gaisler/misc/i2cmst_gen.vhd
150 analyze -f VHDL -library gaisler ../../lib/gaisler/misc/spictrl.vhd
151 analyze -f VHDL -library gaisler ../../lib/gaisler/misc/i2cslv.vhd
152 analyze -f VHDL -library gaisler ../../lib/gaisler/misc/wild.vhd
153 analyze -f VHDL -library gaisler ../../lib/gaisler/misc/wild2ahb.vhd
154 analyze -f VHDL -library gaisler ../../lib/gaisler/misc/grsysmon.vhd
155 analyze -f VHDL -library gaisler ../../lib/gaisler/misc/gracectrl.vhd
156 analyze -f VHDL -library gaisler ../../lib/gaisler/misc/grgpreg.vhd
157 analyze -f VHDL -library gaisler ../../lib/gaisler/misc/ahbmst2.vhd
158 analyze -f VHDL -library gaisler ../../lib/gaisler/misc/ahb_mst_iface.vhd
159 analyze -f VHDL -library gaisler ../../lib/gaisler/net/net.vhd
160 analyze -f VHDL -library gaisler ../../lib/gaisler/uart/uart.vhd
161 analyze -f VHDL -library gaisler ../../lib/gaisler/uart/libdcom.vhd
162 analyze -f VHDL -library gaisler ../../lib/gaisler/uart/apbuart.vhd
163 analyze -f VHDL -library gaisler ../../lib/gaisler/uart/dcom.vhd
164 analyze -f VHDL -library gaisler ../../lib/gaisler/uart/dcom_uart.vhd
165 analyze -f VHDL -library gaisler ../../lib/gaisler/uart/ahbuart.vhd
166 analyze -f VHDL -library gaisler ../../lib/gaisler/jtag/jtag.vhd
167 analyze -f VHDL -library gaisler ../../lib/gaisler/jtag/libjtagcom.vhd
168 analyze -f VHDL -library gaisler ../../lib/gaisler/jtag/jtagcom.vhd
169 analyze -f VHDL -library gaisler ../../lib/gaisler/jtag/ahbjtag.vhd
170 analyze -f VHDL -library gaisler ../../lib/gaisler/jtag/ahbjtag_bsd.vhd
171 analyze -f VHDL -library gaisler ../../lib/gaisler/greth/ethernet_mac.vhd
172 analyze -f VHDL -library gaisler ../../lib/gaisler/greth/greth.vhd
173 analyze -f VHDL -library gaisler ../../lib/gaisler/greth/greth_gbit.vhd
174 analyze -f VHDL -library gaisler ../../lib/gaisler/greth/grethm.vhd
175 analyze -f VHDL -library gaisler ../../lib/gaisler/ddr/ddr_phy.vhd
176 analyze -f VHDL -library gaisler ../../lib/gaisler/ddr/ddrsp16a.vhd
177 analyze -f VHDL -library gaisler ../../lib/gaisler/ddr/ddrsp32a.vhd
178 analyze -f VHDL -library gaisler ../../lib/gaisler/ddr/ddrsp64a.vhd
179 analyze -f VHDL -library gaisler ../../lib/gaisler/ddr/ddrspa.vhd
180 analyze -f VHDL -library gaisler ../../lib/gaisler/ddr/ddr2spa.vhd
181 analyze -f VHDL -library gaisler ../../lib/gaisler/ddr/ddr2buf.vhd
182 analyze -f VHDL -library gaisler ../../lib/gaisler/ddr/ddr2spax.vhd
183 analyze -f VHDL -library gaisler ../../lib/gaisler/ddr/ddr2spax_ahb.vhd
184 analyze -f VHDL -library gaisler ../../lib/gaisler/ddr/ddr2spax_ddr.vhd
185 sh mkdir synopsys/esa
186 define_design_lib esa -path synopsys/esa
187 analyze -f VHDL -library esa ../../lib/esa/memoryctrl/memoryctrl.vhd
188 analyze -f VHDL -library esa ../../lib/esa/memoryctrl/mctrl.vhd
189 sh mkdir synopsys/fmf
190 define_design_lib fmf -path synopsys/fmf
191 sh mkdir synopsys/spansion
192 define_design_lib spansion -path synopsys/spansion
193 sh mkdir synopsys/gsi
194 define_design_lib gsi -path synopsys/gsi
195 sh mkdir synopsys/lpp
196 define_design_lib lpp -path synopsys/lpp
197 analyze -f VHDL -library lpp ../../lib/lpp/./general_purpose/Adder.vhd
198 analyze -f VHDL -library lpp ../../lib/lpp/./general_purpose/ADDRcntr.vhd
199 analyze -f VHDL -library lpp ../../lib/lpp/./general_purpose/ALU.vhd
200 analyze -f VHDL -library lpp ../../lib/lpp/./general_purpose/Clk_divider.vhd
201 analyze -f VHDL -library lpp ../../lib/lpp/./general_purpose/general_purpose.vhd
202 analyze -f VHDL -library lpp ../../lib/lpp/./general_purpose/MAC_CONTROLER.vhd
203 analyze -f VHDL -library lpp ../../lib/lpp/./general_purpose/MAC_MUX2.vhd
204 analyze -f VHDL -library lpp ../../lib/lpp/./general_purpose/MAC_MUX.vhd
205 analyze -f VHDL -library lpp ../../lib/lpp/./general_purpose/MAC_REG.vhd
206 analyze -f VHDL -library lpp ../../lib/lpp/./general_purpose/MAC.vhd
207 analyze -f VHDL -library lpp ../../lib/lpp/./general_purpose/Multiplier.vhd
208 analyze -f VHDL -library lpp ../../lib/lpp/./general_purpose/MUX2.vhd
209 analyze -f VHDL -library lpp ../../lib/lpp/./general_purpose/REG.vhd
210 analyze -f VHDL -library lpp ../../lib/lpp/./general_purpose/Shifter.vhd
211 analyze -f VHDL -library lpp ../../lib/lpp/./lpp_ad_Conv/AD7688_drvr.vhd
212 analyze -f VHDL -library lpp ../../lib/lpp/./lpp_ad_Conv/AD7688_spi_if.vhd
213 analyze -f VHDL -library lpp ../../lib/lpp/./lpp_ad_Conv/ADS7886_drvr.vhd
214 analyze -f VHDL -library lpp ../../lib/lpp/./lpp_ad_Conv/lpp_ad_Conv.vhd
215 analyze -f VHDL -library lpp ../../lib/lpp/./lpp_ad_Conv/lpp_apb_ad_conv.vhd
216 analyze -f VHDL -library lpp ../../lib/lpp/./lpp_CNA_amba/APB_CNA.vhd
217 analyze -f VHDL -library lpp ../../lib/lpp/./lpp_CNA_amba/clock.vhd
218 analyze -f VHDL -library lpp ../../lib/lpp/./lpp_CNA_amba/CNA_TabloC.vhd
219 analyze -f VHDL -library lpp ../../lib/lpp/./lpp_CNA_amba/Convertisseur_config.vhd
220 analyze -f VHDL -library lpp ../../lib/lpp/./lpp_CNA_amba/GeneSYNC_flag.vhd
221 analyze -f VHDL -library lpp ../../lib/lpp/./lpp_CNA_amba/lpp_CNA_amba.vhd
222 analyze -f VHDL -library lpp ../../lib/lpp/./lpp_CNA_amba/Serialize.vhd
223 analyze -f VHDL -library lpp ../../lib/lpp/./lpp_uart/APB_UART.vhd
224 analyze -f VHDL -library lpp ../../lib/lpp/./lpp_uart/BaudGen.vhd
225 analyze -f VHDL -library lpp ../../lib/lpp/./lpp_uart/lpp_uart.vhd
226 analyze -f VHDL -library lpp ../../lib/lpp/./lpp_uart/Shift_REG.vhd
227 analyze -f VHDL -library lpp ../../lib/lpp/./lpp_uart/UART.vhd
228 analyze -f VHDL -library lpp ../../lib/lpp/./lpp_amba/APB_MULTI_DIODE.vhd
229 analyze -f VHDL -library lpp ../../lib/lpp/./lpp_amba/APB_SIMPLE_DIODE.vhd
230 analyze -f VHDL -library lpp ../../lib/lpp/./lpp_amba/lpp_amba.vhd
231 analyze -f VHDL -library lpp ../../lib/lpp/./dsp/iir_filter/APB_IIR_CEL.vhd
232 analyze -f VHDL -library lpp ../../lib/lpp/./dsp/iir_filter/FILTERcfg.vhd
233 analyze -f VHDL -library lpp ../../lib/lpp/./dsp/iir_filter/FilterCTRLR.vhd
234 analyze -f VHDL -library lpp ../../lib/lpp/./dsp/iir_filter/FILTER_RAM_CTRLR.vhd
235 analyze -f VHDL -library lpp ../../lib/lpp/./dsp/iir_filter/FILTER.vhd
236 analyze -f VHDL -library lpp ../../lib/lpp/./dsp/iir_filter/IIR_CEL_CTRLR.vhd
237 analyze -f VHDL -library lpp ../../lib/lpp/./dsp/iir_filter/IIR_CEL_FILTER.vhd
238 analyze -f VHDL -library lpp ../../lib/lpp/./dsp/iir_filter/iir_filter.vhd
239 analyze -f VHDL -library lpp ../../lib/lpp/./dsp/iir_filter/RAM_CEL.vhd
240 analyze -f VHDL -library lpp ../../lib/lpp/./dsp/iir_filter/RAM_CTRLR2.vhd
241 analyze -f VHDL -library lpp ../../lib/lpp/./dsp/iir_filter/RAM.vhd
242 analyze -f VHDL -library lpp ../../lib/lpp/./dsp/iir_filter/Top_Filtre_IIR.vhd
243 analyze -f VHDL -library lpp ../../lib/lpp/./amba_lcd_16x2_ctrlr/amba_lcd_16x2_ctrlr.vhd
244 analyze -f VHDL -library lpp ../../lib/lpp/./amba_lcd_16x2_ctrlr/apb_lcd_ctrlr.vhd
245 analyze -f VHDL -library lpp ../../lib/lpp/./amba_lcd_16x2_ctrlr/FRAME_CLK.vhd
246 analyze -f VHDL -library lpp ../../lib/lpp/./amba_lcd_16x2_ctrlr/LCD_16x2_CFG.vhd
247 analyze -f VHDL -library lpp ../../lib/lpp/./amba_lcd_16x2_ctrlr/LCD_16x2_DRVR.vhd
248 analyze -f VHDL -library lpp ../../lib/lpp/./amba_lcd_16x2_ctrlr/LCD_16x2_ENGINE.vhd
249 analyze -f VHDL -library lpp ../../lib/lpp/./amba_lcd_16x2_ctrlr/LCD_2x16_DRIVER.vhd
250 analyze -f VHDL -library lpp ../../lib/lpp/./amba_lcd_16x2_ctrlr/LCD_CLK_GENERATOR.vhd
251 analyze -f VHDL -library lpp ../../lib/lpp/./amba_lcd_16x2_ctrlr/Top_LCD.vhd
252 sh mkdir synopsys/cypress
253 define_design_lib cypress -path synopsys/cypress
254 sh mkdir synopsys/hynix
255 define_design_lib hynix -path synopsys/hynix
256 sh mkdir synopsys/micron
257 define_design_lib micron -path synopsys/micron
258 sh mkdir synopsys/work
259 define_design_lib work -path synopsys/work
@@ -0,0 +1,316
1 mkdir gnu
2 mkdir gnu/grlib
3 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/grlib --work=grlib -Pgnu -Pgnu/grlib ../../lib/grlib/stdlib/version.vhd
4 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/grlib --work=grlib -Pgnu -Pgnu/grlib ../../lib/grlib/stdlib/config.vhd
5 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/grlib --work=grlib -Pgnu -Pgnu/grlib ../../lib/grlib/stdlib/stdlib.vhd
6 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/grlib --work=grlib -Pgnu -Pgnu/grlib ../../lib/grlib/stdlib/stdio.vhd
7 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/grlib --work=grlib -Pgnu -Pgnu/grlib ../../lib/grlib/stdlib/testlib.vhd
8 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/grlib --work=grlib -Pgnu -Pgnu/grlib ../../lib/grlib/util/util.vhd
9 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/grlib --work=grlib -Pgnu -Pgnu/grlib ../../lib/grlib/sparc/sparc.vhd
10 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/grlib --work=grlib -Pgnu -Pgnu/grlib ../../lib/grlib/sparc/sparc_disas.vhd
11 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/grlib --work=grlib -Pgnu -Pgnu/grlib ../../lib/grlib/sparc/cpu_disas.vhd
12 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/grlib --work=grlib -Pgnu -Pgnu/grlib ../../lib/grlib/modgen/multlib.vhd
13 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/grlib --work=grlib -Pgnu -Pgnu/grlib ../../lib/grlib/modgen/leaves.vhd
14 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/grlib --work=grlib -Pgnu -Pgnu/grlib ../../lib/grlib/amba/amba.vhd
15 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/grlib --work=grlib -Pgnu -Pgnu/grlib ../../lib/grlib/amba/devices.vhd
16 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/grlib --work=grlib -Pgnu -Pgnu/grlib ../../lib/grlib/amba/defmst.vhd
17 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/grlib --work=grlib -Pgnu -Pgnu/grlib ../../lib/grlib/amba/apbctrl.vhd
18 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/grlib --work=grlib -Pgnu -Pgnu/grlib ../../lib/grlib/amba/ahbctrl.vhd
19 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/grlib --work=grlib -Pgnu -Pgnu/grlib ../../lib/grlib/amba/dma2ahb_pkg.vhd
20 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/grlib --work=grlib -Pgnu -Pgnu/grlib ../../lib/grlib/amba/dma2ahb.vhd
21 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/grlib --work=grlib -Pgnu -Pgnu/grlib ../../lib/grlib/amba/dma2ahb_tp.vhd
22 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/grlib --work=grlib -Pgnu -Pgnu/grlib ../../lib/grlib/amba/amba_tp.vhd
23 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/grlib --work=grlib -Pgnu -Pgnu/grlib ../../lib/grlib/amba/at/at_pkg.vhd
24 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/grlib --work=grlib -Pgnu -Pgnu/grlib ../../lib/grlib/amba/at/at_ahb_mst_pkg.vhd
25 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/grlib --work=grlib -Pgnu -Pgnu/grlib ../../lib/grlib/amba/at/at_ahb_slv_pkg.vhd
26 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/grlib --work=grlib -Pgnu -Pgnu/grlib ../../lib/grlib/amba/at/at_util.vhd
27 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/grlib --work=grlib -Pgnu -Pgnu/grlib ../../lib/grlib/amba/at/at_ahb_mst.vhd
28 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/grlib --work=grlib -Pgnu -Pgnu/grlib ../../lib/grlib/amba/at/at_ahb_slv.vhd
29 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/grlib --work=grlib -Pgnu -Pgnu/grlib ../../lib/grlib/amba/at/at_ahbs.vhd
30 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/grlib --work=grlib -Pgnu -Pgnu/grlib ../../lib/grlib/amba/at/at_ahb_ctrl.vhd
31 mkdir gnu/unisim
32 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/unisim --work=unisim -Pgnu -Pgnu/grlib -Pgnu/unisim ../../lib/tech/unisim/ise/unisim_VPKG.vhd
33 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/unisim --work=unisim -Pgnu -Pgnu/grlib -Pgnu/unisim ../../lib/tech/unisim/ise/unisim_VCOMP.vhd
34 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/unisim --work=unisim -Pgnu -Pgnu/grlib -Pgnu/unisim ../../lib/tech/unisim/ise/simple_simprim.vhd
35 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/unisim --work=unisim -Pgnu -Pgnu/grlib -Pgnu/unisim ../../lib/tech/unisim/ise/unisim_VITAL.vhd
36 mkdir gnu/dw02
37 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/dw02 --work=dw02 -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 ../../lib/tech/dw02/comp/DW02_components.vhd
38 mkdir gnu/synplify
39 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/synplify --work=synplify -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify ../../lib/synplify/sim/synplify.vhd
40 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/synplify --work=synplify -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify ../../lib/synplify/sim/synattr.vhd
41 mkdir gnu/techmap
42 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/techmap --work=techmap -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap ../../lib/techmap/gencomp/gencomp.vhd
43 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/techmap --work=techmap -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap ../../lib/techmap/gencomp/netcomp.vhd
44 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/techmap --work=techmap -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap ../../lib/techmap/inferred/memory_inferred.vhd
45 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/techmap --work=techmap -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap ../../lib/techmap/inferred/ddr_inferred.vhd
46 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/techmap --work=techmap -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap ../../lib/techmap/inferred/mul_inferred.vhd
47 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/techmap --work=techmap -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap ../../lib/techmap/inferred/ddr_phy_inferred.vhd
48 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/techmap --work=techmap -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap ../../lib/techmap/dw02/mul_dw_gen.vhd
49 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/techmap --work=techmap -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap ../../lib/techmap/unisim/memory_unisim.vhd
50 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/techmap --work=techmap -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap ../../lib/techmap/unisim/buffer_unisim.vhd
51 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/techmap --work=techmap -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap ../../lib/techmap/unisim/pads_unisim.vhd
52 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/techmap --work=techmap -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap ../../lib/techmap/unisim/clkgen_unisim.vhd
53 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/techmap --work=techmap -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap ../../lib/techmap/unisim/tap_unisim.vhd
54 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/techmap --work=techmap -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap ../../lib/techmap/unisim/ddr_unisim.vhd
55 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/techmap --work=techmap -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap ../../lib/techmap/unisim/ddr_phy_unisim.vhd
56 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/techmap --work=techmap -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap ../../lib/techmap/unisim/grspwc_unisim.vhd
57 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/techmap --work=techmap -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap ../../lib/techmap/unisim/grspwc2_unisim.vhd
58 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/techmap --work=techmap -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap ../../lib/techmap/unisim/grusbhc_unisim.vhd
59 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/techmap --work=techmap -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap ../../lib/techmap/unisim/ssrctrl_unisim.vhd
60 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/techmap --work=techmap -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap ../../lib/techmap/unisim/sysmon_unisim.vhd
61 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/techmap --work=techmap -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap ../../lib/techmap/unisim/mul_unisim.vhd
62 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/techmap --work=techmap -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap ../../lib/techmap/unisim/grfpw_0_unisim.vhd
63 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/techmap --work=techmap -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap ../../lib/techmap/maps/allclkgen.vhd
64 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/techmap --work=techmap -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap ../../lib/techmap/maps/allddr.vhd
65 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/techmap --work=techmap -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap ../../lib/techmap/maps/allmem.vhd
66 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/techmap --work=techmap -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap ../../lib/techmap/maps/allpads.vhd
67 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/techmap --work=techmap -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap ../../lib/techmap/maps/alltap.vhd
68 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/techmap --work=techmap -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap ../../lib/techmap/maps/clkgen.vhd
69 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/techmap --work=techmap -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap ../../lib/techmap/maps/clkmux.vhd
70 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/techmap --work=techmap -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap ../../lib/techmap/maps/clkand.vhd
71 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/techmap --work=techmap -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap ../../lib/techmap/maps/ddr_ireg.vhd
72 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/techmap --work=techmap -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap ../../lib/techmap/maps/ddr_oreg.vhd
73 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/techmap --work=techmap -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap ../../lib/techmap/maps/ddrphy.vhd
74 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/techmap --work=techmap -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap ../../lib/techmap/maps/syncram.vhd
75 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/techmap --work=techmap -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap ../../lib/techmap/maps/syncram64.vhd
76 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/techmap --work=techmap -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap ../../lib/techmap/maps/syncram_2p.vhd
77 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/techmap --work=techmap -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap ../../lib/techmap/maps/syncram_dp.vhd
78 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/techmap --work=techmap -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap ../../lib/techmap/maps/syncfifo.vhd
79 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/techmap --work=techmap -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap ../../lib/techmap/maps/regfile_3p.vhd
80 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/techmap --work=techmap -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap ../../lib/techmap/maps/tap.vhd
81 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/techmap --work=techmap -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap ../../lib/techmap/maps/techbuf.vhd
82 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/techmap --work=techmap -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap ../../lib/techmap/maps/nandtree.vhd
83 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/techmap --work=techmap -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap ../../lib/techmap/maps/clkpad.vhd
84 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/techmap --work=techmap -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap ../../lib/techmap/maps/clkpad_ds.vhd
85 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/techmap --work=techmap -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap ../../lib/techmap/maps/inpad.vhd
86 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/techmap --work=techmap -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap ../../lib/techmap/maps/inpad_ds.vhd
87 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/techmap --work=techmap -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap ../../lib/techmap/maps/iodpad.vhd
88 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/techmap --work=techmap -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap ../../lib/techmap/maps/iopad.vhd
89 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/techmap --work=techmap -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap ../../lib/techmap/maps/iopad_ds.vhd
90 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/techmap --work=techmap -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap ../../lib/techmap/maps/lvds_combo.vhd
91 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/techmap --work=techmap -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap ../../lib/techmap/maps/odpad.vhd
92 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/techmap --work=techmap -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap ../../lib/techmap/maps/outpad.vhd
93 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/techmap --work=techmap -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap ../../lib/techmap/maps/outpad_ds.vhd
94 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/techmap --work=techmap -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap ../../lib/techmap/maps/toutpad.vhd
95 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/techmap --work=techmap -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap ../../lib/techmap/maps/skew_outpad.vhd
96 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/techmap --work=techmap -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap ../../lib/techmap/maps/grspwc_net.vhd
97 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/techmap --work=techmap -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap ../../lib/techmap/maps/grspwc2_net.vhd
98 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/techmap --work=techmap -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap ../../lib/techmap/maps/grlfpw_net.vhd
99 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/techmap --work=techmap -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap ../../lib/techmap/maps/grfpw_net.vhd
100 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/techmap --work=techmap -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap ../../lib/techmap/maps/mul_61x61.vhd
101 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/techmap --work=techmap -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap ../../lib/techmap/maps/cpu_disas_net.vhd
102 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/techmap --work=techmap -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap ../../lib/techmap/maps/ringosc.vhd
103 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/techmap --work=techmap -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap ../../lib/techmap/maps/system_monitor.vhd
104 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/techmap --work=techmap -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap ../../lib/techmap/maps/grgates.vhd
105 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/techmap --work=techmap -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap ../../lib/techmap/maps/inpad_ddr.vhd
106 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/techmap --work=techmap -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap ../../lib/techmap/maps/outpad_ddr.vhd
107 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/techmap --work=techmap -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap ../../lib/techmap/maps/iopad_ddr.vhd
108 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/techmap --work=techmap -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap ../../lib/techmap/maps/syncram128bw.vhd
109 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/techmap --work=techmap -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap ../../lib/techmap/maps/syncram128.vhd
110 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/techmap --work=techmap -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap ../../lib/techmap/maps/syncram156bw.vhd
111 mkdir gnu/eth
112 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/eth --work=eth -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth ../../lib/eth/comp/ethcomp.vhd
113 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/eth --work=eth -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth ../../lib/eth/core/greth_pkg.vhd
114 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/eth --work=eth -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth ../../lib/eth/core/eth_rstgen.vhd
115 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/eth --work=eth -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth ../../lib/eth/core/eth_ahb_mst.vhd
116 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/eth --work=eth -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth ../../lib/eth/core/greth_tx.vhd
117 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/eth --work=eth -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth ../../lib/eth/core/greth_rx.vhd
118 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/eth --work=eth -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth ../../lib/eth/core/grethc.vhd
119 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/eth --work=eth -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth ../../lib/eth/wrapper/greth_gen.vhd
120 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/eth --work=eth -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth ../../lib/eth/wrapper/greth_gbit_gen.vhd
121 mkdir gnu/gaisler
122 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/arith/arith.vhd
123 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/arith/mul32.vhd
124 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/arith/div32.vhd
125 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/memctrl/memctrl.vhd
126 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/memctrl/sdctrl.vhd
127 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/memctrl/sdctrl64.vhd
128 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/memctrl/sdmctrl.vhd
129 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/memctrl/srctrl.vhd
130 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/memctrl/spimctrl.vhd
131 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/leon3/leon3.vhd
132 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/leon3/mmuconfig.vhd
133 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/leon3/mmuiface.vhd
134 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/leon3/libmmu.vhd
135 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/leon3/libiu.vhd
136 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/leon3/libcache.vhd
137 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/leon3/libproc3.vhd
138 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/leon3/cachemem.vhd
139 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/leon3/mmu_icache.vhd
140 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/leon3/mmu_dcache.vhd
141 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/leon3/mmu_acache.vhd
142 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/leon3/mmutlbcam.vhd
143 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/leon3/mmulrue.vhd
144 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/leon3/mmulru.vhd
145 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/leon3/mmutlb.vhd
146 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/leon3/mmutw.vhd
147 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/leon3/mmu.vhd
148 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/leon3/mmu_cache.vhd
149 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/leon3/cpu_disasx.vhd
150 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/leon3/iu3.vhd
151 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/leon3/grfpwx.vhd
152 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/leon3/mfpwx.vhd
153 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/leon3/grlfpwx.vhd
154 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/leon3/tbufmem.vhd
155 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/leon3/dsu3x.vhd
156 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/leon3/dsu3.vhd
157 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/leon3/proc3.vhd
158 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/leon3/leon3s.vhd
159 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/leon3/leon3cg.vhd
160 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/leon3/irqmp.vhd
161 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/leon3/grfpwxsh.vhd
162 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/leon3/grfpushwx.vhd
163 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/leon3/leon3sh.vhd
164 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/misc/misc.vhd
165 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/misc/rstgen.vhd
166 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/misc/gptimer.vhd
167 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/misc/ahbram.vhd
168 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/misc/ahbdpram.vhd
169 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/misc/ahbtrace.vhd
170 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/misc/ahbtrace_mb.vhd
171 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/misc/ahbmst.vhd
172 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/misc/grgpio.vhd
173 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/misc/ahbstat.vhd
174 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/misc/logan.vhd
175 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/misc/apbps2.vhd
176 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/misc/charrom_package.vhd
177 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/misc/charrom.vhd
178 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/misc/apbvga.vhd
179 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/misc/svgactrl.vhd
180 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/misc/i2cmst_gen.vhd
181 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/misc/spictrl.vhd
182 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/misc/i2cslv.vhd
183 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/misc/wild.vhd
184 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/misc/wild2ahb.vhd
185 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/misc/grsysmon.vhd
186 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/misc/gracectrl.vhd
187 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/misc/grgpreg.vhd
188 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/misc/ahbmst2.vhd
189 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/misc/ahb_mst_iface.vhd
190 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/net/net.vhd
191 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/uart/uart.vhd
192 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/uart/libdcom.vhd
193 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/uart/apbuart.vhd
194 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/uart/dcom.vhd
195 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/uart/dcom_uart.vhd
196 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/uart/ahbuart.vhd
197 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/sim/sim.vhd
198 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/sim/sram.vhd
199 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/sim/ata_device.vhd
200 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/sim/sram16.vhd
201 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/sim/phy.vhd
202 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/sim/ahbrep.vhd
203 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/sim/delay_wire.vhd
204 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/sim/spi_flash.vhd
205 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/sim/pwm_check.vhd
206 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/sim/usbsim.vhd
207 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/sim/grusbdcsim.vhd
208 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/sim/grusb_dclsim.vhd
209 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/jtag/jtag.vhd
210 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/jtag/libjtagcom.vhd
211 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/jtag/jtagcom.vhd
212 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/jtag/ahbjtag.vhd
213 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/jtag/ahbjtag_bsd.vhd
214 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/jtag/jtagtst.vhd
215 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/greth/ethernet_mac.vhd
216 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/greth/greth.vhd
217 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/greth/greth_gbit.vhd
218 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/greth/grethm.vhd
219 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/ddr/ddr_phy.vhd
220 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/ddr/ddrsp16a.vhd
221 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/ddr/ddrsp32a.vhd
222 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/ddr/ddrsp64a.vhd
223 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/ddr/ddrspa.vhd
224 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/ddr/ddr2spa.vhd
225 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/ddr/ddr2buf.vhd
226 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/ddr/ddr2spax.vhd
227 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/ddr/ddr2spax_ahb.vhd
228 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/ddr/ddr2spax_ddr.vhd
229 mkdir gnu/esa
230 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/esa --work=esa -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler -Pgnu/esa ../../lib/esa/memoryctrl/memoryctrl.vhd
231 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/esa --work=esa -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler -Pgnu/esa ../../lib/esa/memoryctrl/mctrl.vhd
232 mkdir gnu/fmf
233 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/fmf --work=fmf -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler -Pgnu/esa -Pgnu/#nasa -Pgnu/gleichmann -Pgnu/fmf ../../lib/fmf/utilities/conversions.vhd
234 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/fmf --work=fmf -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler -Pgnu/esa -Pgnu/#nasa -Pgnu/gleichmann -Pgnu/fmf ../../lib/fmf/utilities/gen_utils.vhd
235 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/fmf --work=fmf -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler -Pgnu/esa -Pgnu/#nasa -Pgnu/gleichmann -Pgnu/fmf ../../lib/fmf/flash/flash.vhd
236 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/fmf --work=fmf -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler -Pgnu/esa -Pgnu/#nasa -Pgnu/gleichmann -Pgnu/fmf ../../lib/fmf/flash/s25fl064a.vhd
237 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/fmf --work=fmf -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler -Pgnu/esa -Pgnu/#nasa -Pgnu/gleichmann -Pgnu/fmf ../../lib/fmf/flash/m25p80.vhd
238 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/fmf --work=fmf -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler -Pgnu/esa -Pgnu/#nasa -Pgnu/gleichmann -Pgnu/fmf ../../lib/fmf/fifo/idt7202.vhd
239 mkdir gnu/spansion
240 mkdir gnu/gsi
241 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gsi --work=gsi -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler -Pgnu/esa -Pgnu/#nasa -Pgnu/gleichmann -Pgnu/fmf -Pgnu/spansion -Pgnu/gsi ../../lib/gsi/ssram/functions.vhd
242 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gsi --work=gsi -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler -Pgnu/esa -Pgnu/#nasa -Pgnu/gleichmann -Pgnu/fmf -Pgnu/spansion -Pgnu/gsi ../../lib/gsi/ssram/core_burst.vhd
243 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gsi --work=gsi -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler -Pgnu/esa -Pgnu/#nasa -Pgnu/gleichmann -Pgnu/fmf -Pgnu/spansion -Pgnu/gsi ../../lib/gsi/ssram/g880e18bt.vhd
244 mkdir gnu/lpp
245 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/lpp --work=lpp -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler -Pgnu/esa -Pgnu/#nasa -Pgnu/gleichmann -Pgnu/fmf -Pgnu/spansion -Pgnu/gsi -Pgnu/lpp ../../lib/lpp/./general_purpose/Adder.vhd
246 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/lpp --work=lpp -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler -Pgnu/esa -Pgnu/#nasa -Pgnu/gleichmann -Pgnu/fmf -Pgnu/spansion -Pgnu/gsi -Pgnu/lpp ../../lib/lpp/./general_purpose/ADDRcntr.vhd
247 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/lpp --work=lpp -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler -Pgnu/esa -Pgnu/#nasa -Pgnu/gleichmann -Pgnu/fmf -Pgnu/spansion -Pgnu/gsi -Pgnu/lpp ../../lib/lpp/./general_purpose/ALU.vhd
248 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/lpp --work=lpp -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler -Pgnu/esa -Pgnu/#nasa -Pgnu/gleichmann -Pgnu/fmf -Pgnu/spansion -Pgnu/gsi -Pgnu/lpp ../../lib/lpp/./general_purpose/Clk_divider.vhd
249 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/lpp --work=lpp -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler -Pgnu/esa -Pgnu/#nasa -Pgnu/gleichmann -Pgnu/fmf -Pgnu/spansion -Pgnu/gsi -Pgnu/lpp ../../lib/lpp/./general_purpose/general_purpose.vhd
250 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/lpp --work=lpp -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler -Pgnu/esa -Pgnu/#nasa -Pgnu/gleichmann -Pgnu/fmf -Pgnu/spansion -Pgnu/gsi -Pgnu/lpp ../../lib/lpp/./general_purpose/MAC_CONTROLER.vhd
251 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/lpp --work=lpp -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler -Pgnu/esa -Pgnu/#nasa -Pgnu/gleichmann -Pgnu/fmf -Pgnu/spansion -Pgnu/gsi -Pgnu/lpp ../../lib/lpp/./general_purpose/MAC_MUX2.vhd
252 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/lpp --work=lpp -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler -Pgnu/esa -Pgnu/#nasa -Pgnu/gleichmann -Pgnu/fmf -Pgnu/spansion -Pgnu/gsi -Pgnu/lpp ../../lib/lpp/./general_purpose/MAC_MUX.vhd
253 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/lpp --work=lpp -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler -Pgnu/esa -Pgnu/#nasa -Pgnu/gleichmann -Pgnu/fmf -Pgnu/spansion -Pgnu/gsi -Pgnu/lpp ../../lib/lpp/./general_purpose/MAC_REG.vhd
254 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/lpp --work=lpp -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler -Pgnu/esa -Pgnu/#nasa -Pgnu/gleichmann -Pgnu/fmf -Pgnu/spansion -Pgnu/gsi -Pgnu/lpp ../../lib/lpp/./general_purpose/MAC.vhd
255 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/lpp --work=lpp -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler -Pgnu/esa -Pgnu/#nasa -Pgnu/gleichmann -Pgnu/fmf -Pgnu/spansion -Pgnu/gsi -Pgnu/lpp ../../lib/lpp/./general_purpose/Multiplier.vhd
256 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/lpp --work=lpp -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler -Pgnu/esa -Pgnu/#nasa -Pgnu/gleichmann -Pgnu/fmf -Pgnu/spansion -Pgnu/gsi -Pgnu/lpp ../../lib/lpp/./general_purpose/MUX2.vhd
257 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/lpp --work=lpp -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler -Pgnu/esa -Pgnu/#nasa -Pgnu/gleichmann -Pgnu/fmf -Pgnu/spansion -Pgnu/gsi -Pgnu/lpp ../../lib/lpp/./general_purpose/REG.vhd
258 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/lpp --work=lpp -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler -Pgnu/esa -Pgnu/#nasa -Pgnu/gleichmann -Pgnu/fmf -Pgnu/spansion -Pgnu/gsi -Pgnu/lpp ../../lib/lpp/./general_purpose/Shifter.vhd
259 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/lpp --work=lpp -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler -Pgnu/esa -Pgnu/#nasa -Pgnu/gleichmann -Pgnu/fmf -Pgnu/spansion -Pgnu/gsi -Pgnu/lpp ../../lib/lpp/./lpp_ad_Conv/AD7688_drvr.vhd
260 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/lpp --work=lpp -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler -Pgnu/esa -Pgnu/#nasa -Pgnu/gleichmann -Pgnu/fmf -Pgnu/spansion -Pgnu/gsi -Pgnu/lpp ../../lib/lpp/./lpp_ad_Conv/AD7688_spi_if.vhd
261 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/lpp --work=lpp -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler -Pgnu/esa -Pgnu/#nasa -Pgnu/gleichmann -Pgnu/fmf -Pgnu/spansion -Pgnu/gsi -Pgnu/lpp ../../lib/lpp/./lpp_ad_Conv/ADS7886_drvr.vhd
262 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/lpp --work=lpp -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler -Pgnu/esa -Pgnu/#nasa -Pgnu/gleichmann -Pgnu/fmf -Pgnu/spansion -Pgnu/gsi -Pgnu/lpp ../../lib/lpp/./lpp_ad_Conv/lpp_ad_Conv.vhd
263 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/lpp --work=lpp -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler -Pgnu/esa -Pgnu/#nasa -Pgnu/gleichmann -Pgnu/fmf -Pgnu/spansion -Pgnu/gsi -Pgnu/lpp ../../lib/lpp/./lpp_ad_Conv/lpp_apb_ad_conv.vhd
264 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/lpp --work=lpp -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler -Pgnu/esa -Pgnu/#nasa -Pgnu/gleichmann -Pgnu/fmf -Pgnu/spansion -Pgnu/gsi -Pgnu/lpp ../../lib/lpp/./lpp_CNA_amba/APB_CNA.vhd
265 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/lpp --work=lpp -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler -Pgnu/esa -Pgnu/#nasa -Pgnu/gleichmann -Pgnu/fmf -Pgnu/spansion -Pgnu/gsi -Pgnu/lpp ../../lib/lpp/./lpp_CNA_amba/clock.vhd
266 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/lpp --work=lpp -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler -Pgnu/esa -Pgnu/#nasa -Pgnu/gleichmann -Pgnu/fmf -Pgnu/spansion -Pgnu/gsi -Pgnu/lpp ../../lib/lpp/./lpp_CNA_amba/CNA_TabloC.vhd
267 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/lpp --work=lpp -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler -Pgnu/esa -Pgnu/#nasa -Pgnu/gleichmann -Pgnu/fmf -Pgnu/spansion -Pgnu/gsi -Pgnu/lpp ../../lib/lpp/./lpp_CNA_amba/Convertisseur_config.vhd
268 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/lpp --work=lpp -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler -Pgnu/esa -Pgnu/#nasa -Pgnu/gleichmann -Pgnu/fmf -Pgnu/spansion -Pgnu/gsi -Pgnu/lpp ../../lib/lpp/./lpp_CNA_amba/GeneSYNC_flag.vhd
269 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/lpp --work=lpp -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler -Pgnu/esa -Pgnu/#nasa -Pgnu/gleichmann -Pgnu/fmf -Pgnu/spansion -Pgnu/gsi -Pgnu/lpp ../../lib/lpp/./lpp_CNA_amba/lpp_CNA_amba.vhd
270 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/lpp --work=lpp -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler -Pgnu/esa -Pgnu/#nasa -Pgnu/gleichmann -Pgnu/fmf -Pgnu/spansion -Pgnu/gsi -Pgnu/lpp ../../lib/lpp/./lpp_CNA_amba/Serialize.vhd
271 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/lpp --work=lpp -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler -Pgnu/esa -Pgnu/#nasa -Pgnu/gleichmann -Pgnu/fmf -Pgnu/spansion -Pgnu/gsi -Pgnu/lpp ../../lib/lpp/./lpp_uart/APB_UART.vhd
272 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/lpp --work=lpp -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler -Pgnu/esa -Pgnu/#nasa -Pgnu/gleichmann -Pgnu/fmf -Pgnu/spansion -Pgnu/gsi -Pgnu/lpp ../../lib/lpp/./lpp_uart/BaudGen.vhd
273 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/lpp --work=lpp -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler -Pgnu/esa -Pgnu/#nasa -Pgnu/gleichmann -Pgnu/fmf -Pgnu/spansion -Pgnu/gsi -Pgnu/lpp ../../lib/lpp/./lpp_uart/lpp_uart.vhd
274 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/lpp --work=lpp -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler -Pgnu/esa -Pgnu/#nasa -Pgnu/gleichmann -Pgnu/fmf -Pgnu/spansion -Pgnu/gsi -Pgnu/lpp ../../lib/lpp/./lpp_uart/Shift_REG.vhd
275 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/lpp --work=lpp -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler -Pgnu/esa -Pgnu/#nasa -Pgnu/gleichmann -Pgnu/fmf -Pgnu/spansion -Pgnu/gsi -Pgnu/lpp ../../lib/lpp/./lpp_uart/UART.vhd
276 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/lpp --work=lpp -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler -Pgnu/esa -Pgnu/#nasa -Pgnu/gleichmann -Pgnu/fmf -Pgnu/spansion -Pgnu/gsi -Pgnu/lpp ../../lib/lpp/./lpp_amba/APB_MULTI_DIODE.vhd
277 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/lpp --work=lpp -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler -Pgnu/esa -Pgnu/#nasa -Pgnu/gleichmann -Pgnu/fmf -Pgnu/spansion -Pgnu/gsi -Pgnu/lpp ../../lib/lpp/./lpp_amba/APB_SIMPLE_DIODE.vhd
278 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/lpp --work=lpp -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler -Pgnu/esa -Pgnu/#nasa -Pgnu/gleichmann -Pgnu/fmf -Pgnu/spansion -Pgnu/gsi -Pgnu/lpp ../../lib/lpp/./lpp_amba/lpp_amba.vhd
279 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/lpp --work=lpp -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler -Pgnu/esa -Pgnu/#nasa -Pgnu/gleichmann -Pgnu/fmf -Pgnu/spansion -Pgnu/gsi -Pgnu/lpp ../../lib/lpp/./dsp/iir_filter/APB_IIR_CEL.vhd
280 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/lpp --work=lpp -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler -Pgnu/esa -Pgnu/#nasa -Pgnu/gleichmann -Pgnu/fmf -Pgnu/spansion -Pgnu/gsi -Pgnu/lpp ../../lib/lpp/./dsp/iir_filter/FILTERcfg.vhd
281 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/lpp --work=lpp -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler -Pgnu/esa -Pgnu/#nasa -Pgnu/gleichmann -Pgnu/fmf -Pgnu/spansion -Pgnu/gsi -Pgnu/lpp ../../lib/lpp/./dsp/iir_filter/FilterCTRLR.vhd
282 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/lpp --work=lpp -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler -Pgnu/esa -Pgnu/#nasa -Pgnu/gleichmann -Pgnu/fmf -Pgnu/spansion -Pgnu/gsi -Pgnu/lpp ../../lib/lpp/./dsp/iir_filter/FILTER_RAM_CTRLR.vhd
283 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/lpp --work=lpp -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler -Pgnu/esa -Pgnu/#nasa -Pgnu/gleichmann -Pgnu/fmf -Pgnu/spansion -Pgnu/gsi -Pgnu/lpp ../../lib/lpp/./dsp/iir_filter/FILTER.vhd
284 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/lpp --work=lpp -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler -Pgnu/esa -Pgnu/#nasa -Pgnu/gleichmann -Pgnu/fmf -Pgnu/spansion -Pgnu/gsi -Pgnu/lpp ../../lib/lpp/./dsp/iir_filter/IIR_CEL_CTRLR.vhd
285 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/lpp --work=lpp -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler -Pgnu/esa -Pgnu/#nasa -Pgnu/gleichmann -Pgnu/fmf -Pgnu/spansion -Pgnu/gsi -Pgnu/lpp ../../lib/lpp/./dsp/iir_filter/IIR_CEL_FILTER.vhd
286 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/lpp --work=lpp -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler -Pgnu/esa -Pgnu/#nasa -Pgnu/gleichmann -Pgnu/fmf -Pgnu/spansion -Pgnu/gsi -Pgnu/lpp ../../lib/lpp/./dsp/iir_filter/iir_filter.vhd
287 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/lpp --work=lpp -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler -Pgnu/esa -Pgnu/#nasa -Pgnu/gleichmann -Pgnu/fmf -Pgnu/spansion -Pgnu/gsi -Pgnu/lpp ../../lib/lpp/./dsp/iir_filter/RAM_CEL.vhd
288 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/lpp --work=lpp -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler -Pgnu/esa -Pgnu/#nasa -Pgnu/gleichmann -Pgnu/fmf -Pgnu/spansion -Pgnu/gsi -Pgnu/lpp ../../lib/lpp/./dsp/iir_filter/RAM_CTRLR2.vhd
289 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/lpp --work=lpp -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler -Pgnu/esa -Pgnu/#nasa -Pgnu/gleichmann -Pgnu/fmf -Pgnu/spansion -Pgnu/gsi -Pgnu/lpp ../../lib/lpp/./dsp/iir_filter/RAM.vhd
290 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/lpp --work=lpp -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler -Pgnu/esa -Pgnu/#nasa -Pgnu/gleichmann -Pgnu/fmf -Pgnu/spansion -Pgnu/gsi -Pgnu/lpp ../../lib/lpp/./dsp/iir_filter/Top_Filtre_IIR.vhd
291 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/lpp --work=lpp -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler -Pgnu/esa -Pgnu/#nasa -Pgnu/gleichmann -Pgnu/fmf -Pgnu/spansion -Pgnu/gsi -Pgnu/lpp ../../lib/lpp/./amba_lcd_16x2_ctrlr/amba_lcd_16x2_ctrlr.vhd
292 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/lpp --work=lpp -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler -Pgnu/esa -Pgnu/#nasa -Pgnu/gleichmann -Pgnu/fmf -Pgnu/spansion -Pgnu/gsi -Pgnu/lpp ../../lib/lpp/./amba_lcd_16x2_ctrlr/apb_lcd_ctrlr.vhd
293 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/lpp --work=lpp -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler -Pgnu/esa -Pgnu/#nasa -Pgnu/gleichmann -Pgnu/fmf -Pgnu/spansion -Pgnu/gsi -Pgnu/lpp ../../lib/lpp/./amba_lcd_16x2_ctrlr/FRAME_CLK.vhd
294 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/lpp --work=lpp -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler -Pgnu/esa -Pgnu/#nasa -Pgnu/gleichmann -Pgnu/fmf -Pgnu/spansion -Pgnu/gsi -Pgnu/lpp ../../lib/lpp/./amba_lcd_16x2_ctrlr/LCD_16x2_CFG.vhd
295 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/lpp --work=lpp -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler -Pgnu/esa -Pgnu/#nasa -Pgnu/gleichmann -Pgnu/fmf -Pgnu/spansion -Pgnu/gsi -Pgnu/lpp ../../lib/lpp/./amba_lcd_16x2_ctrlr/LCD_16x2_DRVR.vhd
296 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/lpp --work=lpp -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler -Pgnu/esa -Pgnu/#nasa -Pgnu/gleichmann -Pgnu/fmf -Pgnu/spansion -Pgnu/gsi -Pgnu/lpp ../../lib/lpp/./amba_lcd_16x2_ctrlr/LCD_16x2_ENGINE.vhd
297 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/lpp --work=lpp -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler -Pgnu/esa -Pgnu/#nasa -Pgnu/gleichmann -Pgnu/fmf -Pgnu/spansion -Pgnu/gsi -Pgnu/lpp ../../lib/lpp/./amba_lcd_16x2_ctrlr/LCD_2x16_DRIVER.vhd
298 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/lpp --work=lpp -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler -Pgnu/esa -Pgnu/#nasa -Pgnu/gleichmann -Pgnu/fmf -Pgnu/spansion -Pgnu/gsi -Pgnu/lpp ../../lib/lpp/./amba_lcd_16x2_ctrlr/LCD_CLK_GENERATOR.vhd
299 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/lpp --work=lpp -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler -Pgnu/esa -Pgnu/#nasa -Pgnu/gleichmann -Pgnu/fmf -Pgnu/spansion -Pgnu/gsi -Pgnu/lpp ../../lib/lpp/./amba_lcd_16x2_ctrlr/Top_LCD.vhd
300 mkdir gnu/cypress
301 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/cypress --work=cypress -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler -Pgnu/esa -Pgnu/#nasa -Pgnu/gleichmann -Pgnu/fmf -Pgnu/spansion -Pgnu/gsi -Pgnu/lpp -Pgnu/cypress ../../lib/cypress/ssram/components.vhd
302 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/cypress --work=cypress -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler -Pgnu/esa -Pgnu/#nasa -Pgnu/gleichmann -Pgnu/fmf -Pgnu/spansion -Pgnu/gsi -Pgnu/lpp -Pgnu/cypress ../../lib/cypress/ssram/package_utility.vhd
303 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/cypress --work=cypress -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler -Pgnu/esa -Pgnu/#nasa -Pgnu/gleichmann -Pgnu/fmf -Pgnu/spansion -Pgnu/gsi -Pgnu/lpp -Pgnu/cypress ../../lib/cypress/ssram/cy7c1354b.vhd
304 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/cypress --work=cypress -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler -Pgnu/esa -Pgnu/#nasa -Pgnu/gleichmann -Pgnu/fmf -Pgnu/spansion -Pgnu/gsi -Pgnu/lpp -Pgnu/cypress ../../lib/cypress/ssram/cy7c1380d.vhd
305 mkdir gnu/hynix
306 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/hynix --work=hynix -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler -Pgnu/esa -Pgnu/#nasa -Pgnu/gleichmann -Pgnu/fmf -Pgnu/spansion -Pgnu/gsi -Pgnu/lpp -Pgnu/cypress -Pgnu/hynix ../../lib/hynix/ddr2/HY5PS121621F_PACK.vhd
307 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/hynix --work=hynix -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler -Pgnu/esa -Pgnu/#nasa -Pgnu/gleichmann -Pgnu/fmf -Pgnu/spansion -Pgnu/gsi -Pgnu/lpp -Pgnu/cypress -Pgnu/hynix ../../lib/hynix/ddr2/HY5PS121621F.vhd
308 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/hynix --work=hynix -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler -Pgnu/esa -Pgnu/#nasa -Pgnu/gleichmann -Pgnu/fmf -Pgnu/spansion -Pgnu/gsi -Pgnu/lpp -Pgnu/cypress -Pgnu/hynix ../../lib/hynix/ddr2/components.vhd
309 mkdir gnu/micron
310 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/micron --work=micron -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler -Pgnu/esa -Pgnu/#nasa -Pgnu/gleichmann -Pgnu/fmf -Pgnu/spansion -Pgnu/gsi -Pgnu/lpp -Pgnu/cypress -Pgnu/hynix -Pgnu/micron ../../lib/micron/sdram/components.vhd
311 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/micron --work=micron -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler -Pgnu/esa -Pgnu/#nasa -Pgnu/gleichmann -Pgnu/fmf -Pgnu/spansion -Pgnu/gsi -Pgnu/lpp -Pgnu/cypress -Pgnu/hynix -Pgnu/micron ../../lib/micron/sdram/mt48lc16m16a2.vhd
312 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/micron --work=micron -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler -Pgnu/esa -Pgnu/#nasa -Pgnu/gleichmann -Pgnu/fmf -Pgnu/spansion -Pgnu/gsi -Pgnu/lpp -Pgnu/cypress -Pgnu/hynix -Pgnu/micron ../../lib/micron/ddr/mt46v16m16.vhd
313 mkdir gnu/work
314 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/work --work=work -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler -Pgnu/esa -Pgnu/#nasa -Pgnu/gleichmann -Pgnu/fmf -Pgnu/spansion -Pgnu/gsi -Pgnu/lpp -Pgnu/cypress -Pgnu/hynix -Pgnu/micron -Pgnu/openchip -Pgnu/work ../../lib/work/debug/debug.vhd
315 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/work --work=work -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler -Pgnu/esa -Pgnu/#nasa -Pgnu/gleichmann -Pgnu/fmf -Pgnu/spansion -Pgnu/gsi -Pgnu/lpp -Pgnu/cypress -Pgnu/hynix -Pgnu/micron -Pgnu/openchip -Pgnu/work ../../lib/work/debug/grtestmod.vhd
316 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/work --work=work -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler -Pgnu/esa -Pgnu/#nasa -Pgnu/gleichmann -Pgnu/fmf -Pgnu/spansion -Pgnu/gsi -Pgnu/lpp -Pgnu/cypress -Pgnu/hynix -Pgnu/micron -Pgnu/openchip -Pgnu/work ../../lib/work/debug/cpu_disas.vhd
@@ -0,0 +1,320
1 mkdir xncsim
2 mkdir xncsim/grlib
3 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work grlib ../../lib/grlib/stdlib/version.vhd
4 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work grlib ../../lib/grlib/stdlib/config.vhd
5 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work grlib ../../lib/grlib/stdlib/stdlib.vhd
6 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work grlib ../../lib/grlib/stdlib/stdio.vhd
7 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work grlib ../../lib/grlib/stdlib/testlib.vhd
8 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work grlib ../../lib/grlib/util/util.vhd
9 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work grlib ../../lib/grlib/sparc/sparc.vhd
10 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work grlib ../../lib/grlib/sparc/sparc_disas.vhd
11 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work grlib ../../lib/grlib/sparc/cpu_disas.vhd
12 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work grlib ../../lib/grlib/modgen/multlib.vhd
13 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work grlib ../../lib/grlib/modgen/leaves.vhd
14 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work grlib ../../lib/grlib/amba/amba.vhd
15 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work grlib ../../lib/grlib/amba/devices.vhd
16 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work grlib ../../lib/grlib/amba/defmst.vhd
17 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work grlib ../../lib/grlib/amba/apbctrl.vhd
18 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work grlib ../../lib/grlib/amba/ahbctrl.vhd
19 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work grlib ../../lib/grlib/amba/dma2ahb_pkg.vhd
20 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work grlib ../../lib/grlib/amba/dma2ahb.vhd
21 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work grlib ../../lib/grlib/amba/dma2ahb_tp.vhd
22 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work grlib ../../lib/grlib/amba/amba_tp.vhd
23 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work grlib ../../lib/grlib/amba/at/at_pkg.vhd
24 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work grlib ../../lib/grlib/amba/at/at_ahb_mst_pkg.vhd
25 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work grlib ../../lib/grlib/amba/at/at_ahb_slv_pkg.vhd
26 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work grlib ../../lib/grlib/amba/at/at_util.vhd
27 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work grlib ../../lib/grlib/amba/at/at_ahb_mst.vhd
28 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work grlib ../../lib/grlib/amba/at/at_ahb_slv.vhd
29 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work grlib ../../lib/grlib/amba/at/at_ahbs.vhd
30 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work grlib ../../lib/grlib/amba/at/at_ahb_ctrl.vhd
31 mkdir xncsim/unisim
32 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work unisim ../../lib/tech/unisim/ise/unisim_VPKG.vhd
33 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work unisim ../../lib/tech/unisim/ise/unisim_VCOMP.vhd
34 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work unisim ../../lib/tech/unisim/ise/simple_simprim.vhd
35 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work unisim ../../lib/tech/unisim/ise/unisim_VITAL.vhd
36 mkdir xncsim/dw02
37 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work dw02 ../../lib/tech/dw02/comp/DW02_components.vhd
38 mkdir xncsim/synplify
39 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work synplify ../../lib/synplify/sim/synplify.vhd
40 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work synplify ../../lib/synplify/sim/synattr.vhd
41 mkdir xncsim/techmap
42 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work techmap ../../lib/techmap/gencomp/gencomp.vhd
43 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work techmap ../../lib/techmap/gencomp/netcomp.vhd
44 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work techmap ../../lib/techmap/inferred/memory_inferred.vhd
45 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work techmap ../../lib/techmap/inferred/ddr_inferred.vhd
46 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work techmap ../../lib/techmap/inferred/mul_inferred.vhd
47 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work techmap ../../lib/techmap/inferred/ddr_phy_inferred.vhd
48 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work techmap ../../lib/techmap/dw02/mul_dw_gen.vhd
49 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work techmap ../../lib/techmap/unisim/memory_unisim.vhd
50 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work techmap ../../lib/techmap/unisim/buffer_unisim.vhd
51 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work techmap ../../lib/techmap/unisim/pads_unisim.vhd
52 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work techmap ../../lib/techmap/unisim/clkgen_unisim.vhd
53 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work techmap ../../lib/techmap/unisim/tap_unisim.vhd
54 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work techmap ../../lib/techmap/unisim/ddr_unisim.vhd
55 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work techmap ../../lib/techmap/unisim/ddr_phy_unisim.vhd
56 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work techmap ../../lib/techmap/unisim/grspwc_unisim.vhd
57 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work techmap ../../lib/techmap/unisim/grspwc2_unisim.vhd
58 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work techmap ../../lib/techmap/unisim/grusbhc_unisim.vhd
59 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work techmap ../../lib/techmap/unisim/ssrctrl_unisim.vhd
60 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work techmap ../../lib/techmap/unisim/sysmon_unisim.vhd
61 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work techmap ../../lib/techmap/unisim/mul_unisim.vhd
62 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work techmap ../../lib/techmap/unisim/grfpw_0_unisim.vhd
63 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work techmap ../../lib/techmap/maps/allclkgen.vhd
64 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work techmap ../../lib/techmap/maps/allddr.vhd
65 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work techmap ../../lib/techmap/maps/allmem.vhd
66 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work techmap ../../lib/techmap/maps/allpads.vhd
67 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work techmap ../../lib/techmap/maps/alltap.vhd
68 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work techmap ../../lib/techmap/maps/clkgen.vhd
69 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work techmap ../../lib/techmap/maps/clkmux.vhd
70 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work techmap ../../lib/techmap/maps/clkand.vhd
71 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work techmap ../../lib/techmap/maps/ddr_ireg.vhd
72 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work techmap ../../lib/techmap/maps/ddr_oreg.vhd
73 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work techmap ../../lib/techmap/maps/ddrphy.vhd
74 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work techmap ../../lib/techmap/maps/syncram.vhd
75 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work techmap ../../lib/techmap/maps/syncram64.vhd
76 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work techmap ../../lib/techmap/maps/syncram_2p.vhd
77 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work techmap ../../lib/techmap/maps/syncram_dp.vhd
78 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work techmap ../../lib/techmap/maps/syncfifo.vhd
79 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work techmap ../../lib/techmap/maps/regfile_3p.vhd
80 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work techmap ../../lib/techmap/maps/tap.vhd
81 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work techmap ../../lib/techmap/maps/techbuf.vhd
82 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work techmap ../../lib/techmap/maps/nandtree.vhd
83 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work techmap ../../lib/techmap/maps/clkpad.vhd
84 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work techmap ../../lib/techmap/maps/clkpad_ds.vhd
85 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work techmap ../../lib/techmap/maps/inpad.vhd
86 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work techmap ../../lib/techmap/maps/inpad_ds.vhd
87 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work techmap ../../lib/techmap/maps/iodpad.vhd
88 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work techmap ../../lib/techmap/maps/iopad.vhd
89 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work techmap ../../lib/techmap/maps/iopad_ds.vhd
90 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work techmap ../../lib/techmap/maps/lvds_combo.vhd
91 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work techmap ../../lib/techmap/maps/odpad.vhd
92 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work techmap ../../lib/techmap/maps/outpad.vhd
93 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work techmap ../../lib/techmap/maps/outpad_ds.vhd
94 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work techmap ../../lib/techmap/maps/toutpad.vhd
95 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work techmap ../../lib/techmap/maps/skew_outpad.vhd
96 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work techmap ../../lib/techmap/maps/grspwc_net.vhd
97 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work techmap ../../lib/techmap/maps/grspwc2_net.vhd
98 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work techmap ../../lib/techmap/maps/grlfpw_net.vhd
99 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work techmap ../../lib/techmap/maps/grfpw_net.vhd
100 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work techmap ../../lib/techmap/maps/mul_61x61.vhd
101 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work techmap ../../lib/techmap/maps/cpu_disas_net.vhd
102 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work techmap ../../lib/techmap/maps/ringosc.vhd
103 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work techmap ../../lib/techmap/maps/system_monitor.vhd
104 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work techmap ../../lib/techmap/maps/grgates.vhd
105 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work techmap ../../lib/techmap/maps/inpad_ddr.vhd
106 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work techmap ../../lib/techmap/maps/outpad_ddr.vhd
107 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work techmap ../../lib/techmap/maps/iopad_ddr.vhd
108 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work techmap ../../lib/techmap/maps/syncram128bw.vhd
109 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work techmap ../../lib/techmap/maps/syncram128.vhd
110 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work techmap ../../lib/techmap/maps/syncram156bw.vhd
111 mkdir xncsim/eth
112 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work eth ../../lib/eth/comp/ethcomp.vhd
113 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work eth ../../lib/eth/core/greth_pkg.vhd
114 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work eth ../../lib/eth/core/eth_rstgen.vhd
115 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work eth ../../lib/eth/core/eth_ahb_mst.vhd
116 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work eth ../../lib/eth/core/greth_tx.vhd
117 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work eth ../../lib/eth/core/greth_rx.vhd
118 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work eth ../../lib/eth/core/grethc.vhd
119 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work eth ../../lib/eth/wrapper/greth_gen.vhd
120 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work eth ../../lib/eth/wrapper/greth_gbit_gen.vhd
121 mkdir xncsim/gaisler
122 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/arith/arith.vhd
123 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/arith/mul32.vhd
124 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/arith/div32.vhd
125 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/memctrl/memctrl.vhd
126 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/memctrl/sdctrl.vhd
127 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/memctrl/sdctrl64.vhd
128 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/memctrl/sdmctrl.vhd
129 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/memctrl/srctrl.vhd
130 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/memctrl/spimctrl.vhd
131 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/leon3/leon3.vhd
132 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/leon3/mmuconfig.vhd
133 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/leon3/mmuiface.vhd
134 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/leon3/libmmu.vhd
135 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/leon3/libiu.vhd
136 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/leon3/libcache.vhd
137 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/leon3/libproc3.vhd
138 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/leon3/cachemem.vhd
139 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/leon3/mmu_icache.vhd
140 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/leon3/mmu_dcache.vhd
141 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/leon3/mmu_acache.vhd
142 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/leon3/mmutlbcam.vhd
143 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/leon3/mmulrue.vhd
144 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/leon3/mmulru.vhd
145 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/leon3/mmutlb.vhd
146 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/leon3/mmutw.vhd
147 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/leon3/mmu.vhd
148 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/leon3/mmu_cache.vhd
149 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/leon3/cpu_disasx.vhd
150 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/leon3/iu3.vhd
151 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/leon3/grfpwx.vhd
152 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/leon3/mfpwx.vhd
153 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/leon3/grlfpwx.vhd
154 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/leon3/tbufmem.vhd
155 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/leon3/dsu3x.vhd
156 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/leon3/dsu3.vhd
157 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/leon3/proc3.vhd
158 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/leon3/leon3s.vhd
159 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/leon3/leon3cg.vhd
160 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/leon3/irqmp.vhd
161 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/leon3/grfpwxsh.vhd
162 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/leon3/grfpushwx.vhd
163 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/leon3/leon3sh.vhd
164 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/misc/misc.vhd
165 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/misc/rstgen.vhd
166 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/misc/gptimer.vhd
167 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/misc/ahbram.vhd
168 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/misc/ahbdpram.vhd
169 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/misc/ahbtrace.vhd
170 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/misc/ahbtrace_mb.vhd
171 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/misc/ahbmst.vhd
172 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/misc/grgpio.vhd
173 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/misc/ahbstat.vhd
174 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/misc/logan.vhd
175 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/misc/apbps2.vhd
176 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/misc/charrom_package.vhd
177 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/misc/charrom.vhd
178 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/misc/apbvga.vhd
179 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/misc/svgactrl.vhd
180 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/misc/i2cmst_gen.vhd
181 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/misc/spictrl.vhd
182 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/misc/i2cslv.vhd
183 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/misc/wild.vhd
184 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/misc/wild2ahb.vhd
185 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/misc/grsysmon.vhd
186 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/misc/gracectrl.vhd
187 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/misc/grgpreg.vhd
188 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/misc/ahbmst2.vhd
189 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/misc/ahb_mst_iface.vhd
190 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/net/net.vhd
191 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/uart/uart.vhd
192 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/uart/libdcom.vhd
193 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/uart/apbuart.vhd
194 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/uart/dcom.vhd
195 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/uart/dcom_uart.vhd
196 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/uart/ahbuart.vhd
197 ncvlog -nowarn DLCPTH -nocopyright -work gaisler ../../lib/gaisler/sim/i2c_slave_model.v
198 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/sim/sim.vhd
199 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/sim/sram.vhd
200 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/sim/ata_device.vhd
201 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/sim/sram16.vhd
202 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/sim/phy.vhd
203 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/sim/ahbrep.vhd
204 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/sim/delay_wire.vhd
205 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/sim/spi_flash.vhd
206 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/sim/pwm_check.vhd
207 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/sim/usbsim.vhd
208 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/sim/grusbdcsim.vhd
209 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/sim/grusb_dclsim.vhd
210 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/jtag/jtag.vhd
211 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/jtag/libjtagcom.vhd
212 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/jtag/jtagcom.vhd
213 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/jtag/ahbjtag.vhd
214 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/jtag/ahbjtag_bsd.vhd
215 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/jtag/jtagtst.vhd
216 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/greth/ethernet_mac.vhd
217 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/greth/greth.vhd
218 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/greth/greth_gbit.vhd
219 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/greth/grethm.vhd
220 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/ddr/ddr_phy.vhd
221 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/ddr/ddrsp16a.vhd
222 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/ddr/ddrsp32a.vhd
223 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/ddr/ddrsp64a.vhd
224 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/ddr/ddrspa.vhd
225 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/ddr/ddr2spa.vhd
226 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/ddr/ddr2buf.vhd
227 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/ddr/ddr2spax.vhd
228 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/ddr/ddr2spax_ahb.vhd
229 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/ddr/ddr2spax_ddr.vhd
230 mkdir xncsim/esa
231 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work esa ../../lib/esa/memoryctrl/memoryctrl.vhd
232 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work esa ../../lib/esa/memoryctrl/mctrl.vhd
233 mkdir xncsim/fmf
234 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work fmf ../../lib/fmf/utilities/conversions.vhd
235 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work fmf ../../lib/fmf/utilities/gen_utils.vhd
236 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work fmf ../../lib/fmf/flash/flash.vhd
237 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work fmf ../../lib/fmf/flash/s25fl064a.vhd
238 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work fmf ../../lib/fmf/flash/m25p80.vhd
239 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work fmf ../../lib/fmf/fifo/idt7202.vhd
240 mkdir xncsim/spansion
241 mkdir xncsim/gsi
242 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gsi ../../lib/gsi/ssram/functions.vhd
243 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gsi ../../lib/gsi/ssram/core_burst.vhd
244 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gsi ../../lib/gsi/ssram/g880e18bt.vhd
245 mkdir xncsim/lpp
246 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work lpp ../../lib/lpp/./general_purpose/Adder.vhd
247 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work lpp ../../lib/lpp/./general_purpose/ADDRcntr.vhd
248 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work lpp ../../lib/lpp/./general_purpose/ALU.vhd
249 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work lpp ../../lib/lpp/./general_purpose/Clk_divider.vhd
250 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work lpp ../../lib/lpp/./general_purpose/general_purpose.vhd
251 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work lpp ../../lib/lpp/./general_purpose/MAC_CONTROLER.vhd
252 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work lpp ../../lib/lpp/./general_purpose/MAC_MUX2.vhd
253 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work lpp ../../lib/lpp/./general_purpose/MAC_MUX.vhd
254 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work lpp ../../lib/lpp/./general_purpose/MAC_REG.vhd
255 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work lpp ../../lib/lpp/./general_purpose/MAC.vhd
256 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work lpp ../../lib/lpp/./general_purpose/Multiplier.vhd
257 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work lpp ../../lib/lpp/./general_purpose/MUX2.vhd
258 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work lpp ../../lib/lpp/./general_purpose/REG.vhd
259 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work lpp ../../lib/lpp/./general_purpose/Shifter.vhd
260 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work lpp ../../lib/lpp/./lpp_ad_Conv/AD7688_drvr.vhd
261 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work lpp ../../lib/lpp/./lpp_ad_Conv/AD7688_spi_if.vhd
262 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work lpp ../../lib/lpp/./lpp_ad_Conv/ADS7886_drvr.vhd
263 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work lpp ../../lib/lpp/./lpp_ad_Conv/lpp_ad_Conv.vhd
264 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work lpp ../../lib/lpp/./lpp_ad_Conv/lpp_apb_ad_conv.vhd
265 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work lpp ../../lib/lpp/./lpp_CNA_amba/APB_CNA.vhd
266 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work lpp ../../lib/lpp/./lpp_CNA_amba/clock.vhd
267 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work lpp ../../lib/lpp/./lpp_CNA_amba/CNA_TabloC.vhd
268 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work lpp ../../lib/lpp/./lpp_CNA_amba/Convertisseur_config.vhd
269 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work lpp ../../lib/lpp/./lpp_CNA_amba/GeneSYNC_flag.vhd
270 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work lpp ../../lib/lpp/./lpp_CNA_amba/lpp_CNA_amba.vhd
271 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work lpp ../../lib/lpp/./lpp_CNA_amba/Serialize.vhd
272 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work lpp ../../lib/lpp/./lpp_uart/APB_UART.vhd
273 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work lpp ../../lib/lpp/./lpp_uart/BaudGen.vhd
274 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work lpp ../../lib/lpp/./lpp_uart/lpp_uart.vhd
275 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work lpp ../../lib/lpp/./lpp_uart/Shift_REG.vhd
276 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work lpp ../../lib/lpp/./lpp_uart/UART.vhd
277 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work lpp ../../lib/lpp/./lpp_amba/APB_MULTI_DIODE.vhd
278 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work lpp ../../lib/lpp/./lpp_amba/APB_SIMPLE_DIODE.vhd
279 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work lpp ../../lib/lpp/./lpp_amba/lpp_amba.vhd
280 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work lpp ../../lib/lpp/./dsp/iir_filter/APB_IIR_CEL.vhd
281 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work lpp ../../lib/lpp/./dsp/iir_filter/FILTERcfg.vhd
282 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work lpp ../../lib/lpp/./dsp/iir_filter/FilterCTRLR.vhd
283 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work lpp ../../lib/lpp/./dsp/iir_filter/FILTER_RAM_CTRLR.vhd
284 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work lpp ../../lib/lpp/./dsp/iir_filter/FILTER.vhd
285 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work lpp ../../lib/lpp/./dsp/iir_filter/IIR_CEL_CTRLR.vhd
286 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work lpp ../../lib/lpp/./dsp/iir_filter/IIR_CEL_FILTER.vhd
287 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work lpp ../../lib/lpp/./dsp/iir_filter/iir_filter.vhd
288 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work lpp ../../lib/lpp/./dsp/iir_filter/RAM_CEL.vhd
289 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work lpp ../../lib/lpp/./dsp/iir_filter/RAM_CTRLR2.vhd
290 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work lpp ../../lib/lpp/./dsp/iir_filter/RAM.vhd
291 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work lpp ../../lib/lpp/./dsp/iir_filter/Top_Filtre_IIR.vhd
292 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work lpp ../../lib/lpp/./amba_lcd_16x2_ctrlr/amba_lcd_16x2_ctrlr.vhd
293 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work lpp ../../lib/lpp/./amba_lcd_16x2_ctrlr/apb_lcd_ctrlr.vhd
294 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work lpp ../../lib/lpp/./amba_lcd_16x2_ctrlr/FRAME_CLK.vhd
295 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work lpp ../../lib/lpp/./amba_lcd_16x2_ctrlr/LCD_16x2_CFG.vhd
296 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work lpp ../../lib/lpp/./amba_lcd_16x2_ctrlr/LCD_16x2_DRVR.vhd
297 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work lpp ../../lib/lpp/./amba_lcd_16x2_ctrlr/LCD_16x2_ENGINE.vhd
298 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work lpp ../../lib/lpp/./amba_lcd_16x2_ctrlr/LCD_2x16_DRIVER.vhd
299 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work lpp ../../lib/lpp/./amba_lcd_16x2_ctrlr/LCD_CLK_GENERATOR.vhd
300 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work lpp ../../lib/lpp/./amba_lcd_16x2_ctrlr/Top_LCD.vhd
301 mkdir xncsim/cypress
302 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work cypress ../../lib/cypress/ssram/components.vhd
303 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work cypress ../../lib/cypress/ssram/package_utility.vhd
304 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work cypress ../../lib/cypress/ssram/cy7c1354b.vhd
305 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work cypress ../../lib/cypress/ssram/cy7c1380d.vhd
306 mkdir xncsim/hynix
307 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work hynix ../../lib/hynix/ddr2/HY5PS121621F_PACK.vhd
308 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work hynix ../../lib/hynix/ddr2/HY5PS121621F.vhd
309 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work hynix ../../lib/hynix/ddr2/components.vhd
310 mkdir xncsim/micron
311 ncvlog -nowarn DLCPTH -nocopyright -work micron ../../lib/micron/sdram/mobile_sdr.v
312 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work micron ../../lib/micron/sdram/components.vhd
313 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work micron ../../lib/micron/sdram/mt48lc16m16a2.vhd
314 ncvlog -nowarn DLCPTH -nocopyright -work micron ../../lib/micron/ddr/ddr2.v
315 ncvlog -nowarn DLCPTH -nocopyright -work micron ../../lib/micron/ddr/mobile_ddr.v
316 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work micron ../../lib/micron/ddr/mt46v16m16.vhd
317 mkdir xncsim/work
318 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work work ../../lib/work/debug/debug.vhd
319 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work work ../../lib/work/debug/grtestmod.vhd
320 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work work ../../lib/work/debug/cpu_disas.vhd
@@ -0,0 +1,229
1 set_attribute input_pragma_keyword "cadence synopsys get2chip g2c fast ambit pragma"
2 read_hdl -vhdl -lib grlib ../../lib/grlib/stdlib/version.vhd
3 read_hdl -vhdl -lib grlib ../../lib/grlib/stdlib/config.vhd
4 read_hdl -vhdl -lib grlib ../../lib/grlib/stdlib/stdlib.vhd
5 read_hdl -vhdl -lib grlib ../../lib/grlib/sparc/sparc.vhd
6 read_hdl -vhdl -lib grlib ../../lib/grlib/modgen/multlib.vhd
7 read_hdl -vhdl -lib grlib ../../lib/grlib/modgen/leaves.vhd
8 read_hdl -vhdl -lib grlib ../../lib/grlib/amba/amba.vhd
9 read_hdl -vhdl -lib grlib ../../lib/grlib/amba/devices.vhd
10 read_hdl -vhdl -lib grlib ../../lib/grlib/amba/defmst.vhd
11 read_hdl -vhdl -lib grlib ../../lib/grlib/amba/apbctrl.vhd
12 read_hdl -vhdl -lib grlib ../../lib/grlib/amba/ahbctrl.vhd
13 read_hdl -vhdl -lib grlib ../../lib/grlib/amba/dma2ahb_pkg.vhd
14 read_hdl -vhdl -lib grlib ../../lib/grlib/amba/dma2ahb.vhd
15 read_hdl -vhdl -lib techmap ../../lib/techmap/gencomp/gencomp.vhd
16 read_hdl -vhdl -lib techmap ../../lib/techmap/gencomp/netcomp.vhd
17 read_hdl -vhdl -lib techmap ../../lib/techmap/inferred/memory_inferred.vhd
18 read_hdl -vhdl -lib techmap ../../lib/techmap/inferred/ddr_inferred.vhd
19 read_hdl -vhdl -lib techmap ../../lib/techmap/inferred/mul_inferred.vhd
20 read_hdl -vhdl -lib techmap ../../lib/techmap/inferred/ddr_phy_inferred.vhd
21 read_hdl -vhdl -lib techmap ../../lib/techmap/dw02/mul_dw_gen.vhd
22 read_hdl -vhdl -lib techmap ../../lib/techmap/maps/allclkgen.vhd
23 read_hdl -vhdl -lib techmap ../../lib/techmap/maps/allddr.vhd
24 read_hdl -vhdl -lib techmap ../../lib/techmap/maps/allmem.vhd
25 read_hdl -vhdl -lib techmap ../../lib/techmap/maps/allpads.vhd
26 read_hdl -vhdl -lib techmap ../../lib/techmap/maps/alltap.vhd
27 read_hdl -vhdl -lib techmap ../../lib/techmap/maps/clkgen.vhd
28 read_hdl -vhdl -lib techmap ../../lib/techmap/maps/clkmux.vhd
29 read_hdl -vhdl -lib techmap ../../lib/techmap/maps/clkand.vhd
30 read_hdl -vhdl -lib techmap ../../lib/techmap/maps/ddr_ireg.vhd
31 read_hdl -vhdl -lib techmap ../../lib/techmap/maps/ddr_oreg.vhd
32 read_hdl -vhdl -lib techmap ../../lib/techmap/maps/ddrphy.vhd
33 read_hdl -vhdl -lib techmap ../../lib/techmap/maps/syncram.vhd
34 read_hdl -vhdl -lib techmap ../../lib/techmap/maps/syncram64.vhd
35 read_hdl -vhdl -lib techmap ../../lib/techmap/maps/syncram_2p.vhd
36 read_hdl -vhdl -lib techmap ../../lib/techmap/maps/syncram_dp.vhd
37 read_hdl -vhdl -lib techmap ../../lib/techmap/maps/syncfifo.vhd
38 read_hdl -vhdl -lib techmap ../../lib/techmap/maps/regfile_3p.vhd
39 read_hdl -vhdl -lib techmap ../../lib/techmap/maps/tap.vhd
40 read_hdl -vhdl -lib techmap ../../lib/techmap/maps/techbuf.vhd
41 read_hdl -vhdl -lib techmap ../../lib/techmap/maps/nandtree.vhd
42 read_hdl -vhdl -lib techmap ../../lib/techmap/maps/clkpad.vhd
43 read_hdl -vhdl -lib techmap ../../lib/techmap/maps/clkpad_ds.vhd
44 read_hdl -vhdl -lib techmap ../../lib/techmap/maps/inpad.vhd
45 read_hdl -vhdl -lib techmap ../../lib/techmap/maps/inpad_ds.vhd
46 read_hdl -vhdl -lib techmap ../../lib/techmap/maps/iodpad.vhd
47 read_hdl -vhdl -lib techmap ../../lib/techmap/maps/iopad.vhd
48 read_hdl -vhdl -lib techmap ../../lib/techmap/maps/iopad_ds.vhd
49 read_hdl -vhdl -lib techmap ../../lib/techmap/maps/lvds_combo.vhd
50 read_hdl -vhdl -lib techmap ../../lib/techmap/maps/odpad.vhd
51 read_hdl -vhdl -lib techmap ../../lib/techmap/maps/outpad.vhd
52 read_hdl -vhdl -lib techmap ../../lib/techmap/maps/outpad_ds.vhd
53 read_hdl -vhdl -lib techmap ../../lib/techmap/maps/toutpad.vhd
54 read_hdl -vhdl -lib techmap ../../lib/techmap/maps/skew_outpad.vhd
55 read_hdl -vhdl -lib techmap ../../lib/techmap/maps/grspwc_net.vhd
56 read_hdl -vhdl -lib techmap ../../lib/techmap/maps/grspwc2_net.vhd
57 read_hdl -vhdl -lib techmap ../../lib/techmap/maps/grlfpw_net.vhd
58 read_hdl -vhdl -lib techmap ../../lib/techmap/maps/grfpw_net.vhd
59 read_hdl -vhdl -lib techmap ../../lib/techmap/maps/mul_61x61.vhd
60 read_hdl -vhdl -lib techmap ../../lib/techmap/maps/cpu_disas_net.vhd
61 read_hdl -vhdl -lib techmap ../../lib/techmap/maps/ringosc.vhd
62 read_hdl -vhdl -lib techmap ../../lib/techmap/maps/system_monitor.vhd
63 read_hdl -vhdl -lib techmap ../../lib/techmap/maps/grgates.vhd
64 read_hdl -vhdl -lib techmap ../../lib/techmap/maps/inpad_ddr.vhd
65 read_hdl -vhdl -lib techmap ../../lib/techmap/maps/outpad_ddr.vhd
66 read_hdl -vhdl -lib techmap ../../lib/techmap/maps/iopad_ddr.vhd
67 read_hdl -vhdl -lib techmap ../../lib/techmap/maps/syncram128bw.vhd
68 read_hdl -vhdl -lib techmap ../../lib/techmap/maps/syncram128.vhd
69 read_hdl -vhdl -lib techmap ../../lib/techmap/maps/syncram156bw.vhd
70 read_hdl -vhdl -lib eth ../../lib/eth/comp/ethcomp.vhd
71 read_hdl -vhdl -lib eth ../../lib/eth/core/greth_pkg.vhd
72 read_hdl -vhdl -lib eth ../../lib/eth/core/eth_rstgen.vhd
73 read_hdl -vhdl -lib eth ../../lib/eth/core/eth_ahb_mst.vhd
74 read_hdl -vhdl -lib eth ../../lib/eth/core/greth_tx.vhd
75 read_hdl -vhdl -lib eth ../../lib/eth/core/greth_rx.vhd
76 read_hdl -vhdl -lib eth ../../lib/eth/core/grethc.vhd
77 read_hdl -vhdl -lib eth ../../lib/eth/wrapper/greth_gen.vhd
78 read_hdl -vhdl -lib eth ../../lib/eth/wrapper/greth_gbit_gen.vhd
79 read_hdl -vhdl -lib gaisler ../../lib/gaisler/arith/arith.vhd
80 read_hdl -vhdl -lib gaisler ../../lib/gaisler/arith/mul32.vhd
81 read_hdl -vhdl -lib gaisler ../../lib/gaisler/arith/div32.vhd
82 read_hdl -vhdl -lib gaisler ../../lib/gaisler/memctrl/memctrl.vhd
83 read_hdl -vhdl -lib gaisler ../../lib/gaisler/memctrl/sdctrl.vhd
84 read_hdl -vhdl -lib gaisler ../../lib/gaisler/memctrl/sdctrl64.vhd
85 read_hdl -vhdl -lib gaisler ../../lib/gaisler/memctrl/sdmctrl.vhd
86 read_hdl -vhdl -lib gaisler ../../lib/gaisler/memctrl/srctrl.vhd
87 read_hdl -vhdl -lib gaisler ../../lib/gaisler/memctrl/spimctrl.vhd
88 read_hdl -vhdl -lib gaisler ../../lib/gaisler/leon3/leon3.vhd
89 read_hdl -vhdl -lib gaisler ../../lib/gaisler/leon3/mmuconfig.vhd
90 read_hdl -vhdl -lib gaisler ../../lib/gaisler/leon3/mmuiface.vhd
91 read_hdl -vhdl -lib gaisler ../../lib/gaisler/leon3/libmmu.vhd
92 read_hdl -vhdl -lib gaisler ../../lib/gaisler/leon3/libiu.vhd
93 read_hdl -vhdl -lib gaisler ../../lib/gaisler/leon3/libcache.vhd
94 read_hdl -vhdl -lib gaisler ../../lib/gaisler/leon3/libproc3.vhd
95 read_hdl -vhdl -lib gaisler ../../lib/gaisler/leon3/cachemem.vhd
96 read_hdl -vhdl -lib gaisler ../../lib/gaisler/leon3/mmu_icache.vhd
97 read_hdl -vhdl -lib gaisler ../../lib/gaisler/leon3/mmu_dcache.vhd
98 read_hdl -vhdl -lib gaisler ../../lib/gaisler/leon3/mmu_acache.vhd
99 read_hdl -vhdl -lib gaisler ../../lib/gaisler/leon3/mmutlbcam.vhd
100 read_hdl -vhdl -lib gaisler ../../lib/gaisler/leon3/mmulrue.vhd
101 read_hdl -vhdl -lib gaisler ../../lib/gaisler/leon3/mmulru.vhd
102 read_hdl -vhdl -lib gaisler ../../lib/gaisler/leon3/mmutlb.vhd
103 read_hdl -vhdl -lib gaisler ../../lib/gaisler/leon3/mmutw.vhd
104 read_hdl -vhdl -lib gaisler ../../lib/gaisler/leon3/mmu.vhd
105 read_hdl -vhdl -lib gaisler ../../lib/gaisler/leon3/mmu_cache.vhd
106 read_hdl -vhdl -lib gaisler ../../lib/gaisler/leon3/cpu_disasx.vhd
107 read_hdl -vhdl -lib gaisler ../../lib/gaisler/leon3/iu3.vhd
108 read_hdl -vhdl -lib gaisler ../../lib/gaisler/leon3/grfpwx.vhd
109 read_hdl -vhdl -lib gaisler ../../lib/gaisler/leon3/mfpwx.vhd
110 read_hdl -vhdl -lib gaisler ../../lib/gaisler/leon3/grlfpwx.vhd
111 read_hdl -vhdl -lib gaisler ../../lib/gaisler/leon3/tbufmem.vhd
112 read_hdl -vhdl -lib gaisler ../../lib/gaisler/leon3/dsu3x.vhd
113 read_hdl -vhdl -lib gaisler ../../lib/gaisler/leon3/dsu3.vhd
114 read_hdl -vhdl -lib gaisler ../../lib/gaisler/leon3/proc3.vhd
115 read_hdl -vhdl -lib gaisler ../../lib/gaisler/leon3/leon3s.vhd
116 read_hdl -vhdl -lib gaisler ../../lib/gaisler/leon3/leon3cg.vhd
117 read_hdl -vhdl -lib gaisler ../../lib/gaisler/leon3/irqmp.vhd
118 read_hdl -vhdl -lib gaisler ../../lib/gaisler/leon3/grfpwxsh.vhd
119 read_hdl -vhdl -lib gaisler ../../lib/gaisler/leon3/grfpushwx.vhd
120 read_hdl -vhdl -lib gaisler ../../lib/gaisler/leon3/leon3sh.vhd
121 read_hdl -vhdl -lib gaisler ../../lib/gaisler/misc/misc.vhd
122 read_hdl -vhdl -lib gaisler ../../lib/gaisler/misc/rstgen.vhd
123 read_hdl -vhdl -lib gaisler ../../lib/gaisler/misc/gptimer.vhd
124 read_hdl -vhdl -lib gaisler ../../lib/gaisler/misc/ahbram.vhd
125 read_hdl -vhdl -lib gaisler ../../lib/gaisler/misc/ahbdpram.vhd
126 read_hdl -vhdl -lib gaisler ../../lib/gaisler/misc/ahbtrace.vhd
127 read_hdl -vhdl -lib gaisler ../../lib/gaisler/misc/ahbtrace_mb.vhd
128 read_hdl -vhdl -lib gaisler ../../lib/gaisler/misc/ahbmst.vhd
129 read_hdl -vhdl -lib gaisler ../../lib/gaisler/misc/grgpio.vhd
130 read_hdl -vhdl -lib gaisler ../../lib/gaisler/misc/ahbstat.vhd
131 read_hdl -vhdl -lib gaisler ../../lib/gaisler/misc/logan.vhd
132 read_hdl -vhdl -lib gaisler ../../lib/gaisler/misc/apbps2.vhd
133 read_hdl -vhdl -lib gaisler ../../lib/gaisler/misc/charrom_package.vhd
134 read_hdl -vhdl -lib gaisler ../../lib/gaisler/misc/charrom.vhd
135 read_hdl -vhdl -lib gaisler ../../lib/gaisler/misc/apbvga.vhd
136 read_hdl -vhdl -lib gaisler ../../lib/gaisler/misc/svgactrl.vhd
137 read_hdl -vhdl -lib gaisler ../../lib/gaisler/misc/i2cmst_gen.vhd
138 read_hdl -vhdl -lib gaisler ../../lib/gaisler/misc/spictrl.vhd
139 read_hdl -vhdl -lib gaisler ../../lib/gaisler/misc/i2cslv.vhd
140 read_hdl -vhdl -lib gaisler ../../lib/gaisler/misc/wild.vhd
141 read_hdl -vhdl -lib gaisler ../../lib/gaisler/misc/wild2ahb.vhd
142 read_hdl -vhdl -lib gaisler ../../lib/gaisler/misc/grsysmon.vhd
143 read_hdl -vhdl -lib gaisler ../../lib/gaisler/misc/gracectrl.vhd
144 read_hdl -vhdl -lib gaisler ../../lib/gaisler/misc/grgpreg.vhd
145 read_hdl -vhdl -lib gaisler ../../lib/gaisler/misc/ahbmst2.vhd
146 read_hdl -vhdl -lib gaisler ../../lib/gaisler/misc/ahb_mst_iface.vhd
147 read_hdl -vhdl -lib gaisler ../../lib/gaisler/net/net.vhd
148 read_hdl -vhdl -lib gaisler ../../lib/gaisler/uart/uart.vhd
149 read_hdl -vhdl -lib gaisler ../../lib/gaisler/uart/libdcom.vhd
150 read_hdl -vhdl -lib gaisler ../../lib/gaisler/uart/apbuart.vhd
151 read_hdl -vhdl -lib gaisler ../../lib/gaisler/uart/dcom.vhd
152 read_hdl -vhdl -lib gaisler ../../lib/gaisler/uart/dcom_uart.vhd
153 read_hdl -vhdl -lib gaisler ../../lib/gaisler/uart/ahbuart.vhd
154 read_hdl -vhdl -lib gaisler ../../lib/gaisler/jtag/jtag.vhd
155 read_hdl -vhdl -lib gaisler ../../lib/gaisler/jtag/libjtagcom.vhd
156 read_hdl -vhdl -lib gaisler ../../lib/gaisler/jtag/jtagcom.vhd
157 read_hdl -vhdl -lib gaisler ../../lib/gaisler/jtag/ahbjtag.vhd
158 read_hdl -vhdl -lib gaisler ../../lib/gaisler/jtag/ahbjtag_bsd.vhd
159 read_hdl -vhdl -lib gaisler ../../lib/gaisler/greth/ethernet_mac.vhd
160 read_hdl -vhdl -lib gaisler ../../lib/gaisler/greth/greth.vhd
161 read_hdl -vhdl -lib gaisler ../../lib/gaisler/greth/greth_gbit.vhd
162 read_hdl -vhdl -lib gaisler ../../lib/gaisler/greth/grethm.vhd
163 read_hdl -vhdl -lib gaisler ../../lib/gaisler/ddr/ddr_phy.vhd
164 read_hdl -vhdl -lib gaisler ../../lib/gaisler/ddr/ddrsp16a.vhd
165 read_hdl -vhdl -lib gaisler ../../lib/gaisler/ddr/ddrsp32a.vhd
166 read_hdl -vhdl -lib gaisler ../../lib/gaisler/ddr/ddrsp64a.vhd
167 read_hdl -vhdl -lib gaisler ../../lib/gaisler/ddr/ddrspa.vhd
168 read_hdl -vhdl -lib gaisler ../../lib/gaisler/ddr/ddr2spa.vhd
169 read_hdl -vhdl -lib gaisler ../../lib/gaisler/ddr/ddr2buf.vhd
170 read_hdl -vhdl -lib gaisler ../../lib/gaisler/ddr/ddr2spax.vhd
171 read_hdl -vhdl -lib gaisler ../../lib/gaisler/ddr/ddr2spax_ahb.vhd
172 read_hdl -vhdl -lib gaisler ../../lib/gaisler/ddr/ddr2spax_ddr.vhd
173 read_hdl -vhdl -lib esa ../../lib/esa/memoryctrl/memoryctrl.vhd
174 read_hdl -vhdl -lib esa ../../lib/esa/memoryctrl/mctrl.vhd
175 read_hdl -vhdl -lib lpp ../../lib/lpp/./general_purpose/Adder.vhd
176 read_hdl -vhdl -lib lpp ../../lib/lpp/./general_purpose/ADDRcntr.vhd
177 read_hdl -vhdl -lib lpp ../../lib/lpp/./general_purpose/ALU.vhd
178 read_hdl -vhdl -lib lpp ../../lib/lpp/./general_purpose/Clk_divider.vhd
179 read_hdl -vhdl -lib lpp ../../lib/lpp/./general_purpose/general_purpose.vhd
180 read_hdl -vhdl -lib lpp ../../lib/lpp/./general_purpose/MAC_CONTROLER.vhd
181 read_hdl -vhdl -lib lpp ../../lib/lpp/./general_purpose/MAC_MUX2.vhd
182 read_hdl -vhdl -lib lpp ../../lib/lpp/./general_purpose/MAC_MUX.vhd
183 read_hdl -vhdl -lib lpp ../../lib/lpp/./general_purpose/MAC_REG.vhd
184 read_hdl -vhdl -lib lpp ../../lib/lpp/./general_purpose/MAC.vhd
185 read_hdl -vhdl -lib lpp ../../lib/lpp/./general_purpose/Multiplier.vhd
186 read_hdl -vhdl -lib lpp ../../lib/lpp/./general_purpose/MUX2.vhd
187 read_hdl -vhdl -lib lpp ../../lib/lpp/./general_purpose/REG.vhd
188 read_hdl -vhdl -lib lpp ../../lib/lpp/./general_purpose/Shifter.vhd
189 read_hdl -vhdl -lib lpp ../../lib/lpp/./lpp_ad_Conv/AD7688_drvr.vhd
190 read_hdl -vhdl -lib lpp ../../lib/lpp/./lpp_ad_Conv/AD7688_spi_if.vhd
191 read_hdl -vhdl -lib lpp ../../lib/lpp/./lpp_ad_Conv/ADS7886_drvr.vhd
192 read_hdl -vhdl -lib lpp ../../lib/lpp/./lpp_ad_Conv/lpp_ad_Conv.vhd
193 read_hdl -vhdl -lib lpp ../../lib/lpp/./lpp_ad_Conv/lpp_apb_ad_conv.vhd
194 read_hdl -vhdl -lib lpp ../../lib/lpp/./lpp_CNA_amba/APB_CNA.vhd
195 read_hdl -vhdl -lib lpp ../../lib/lpp/./lpp_CNA_amba/clock.vhd
196 read_hdl -vhdl -lib lpp ../../lib/lpp/./lpp_CNA_amba/CNA_TabloC.vhd
197 read_hdl -vhdl -lib lpp ../../lib/lpp/./lpp_CNA_amba/Convertisseur_config.vhd
198 read_hdl -vhdl -lib lpp ../../lib/lpp/./lpp_CNA_amba/GeneSYNC_flag.vhd
199 read_hdl -vhdl -lib lpp ../../lib/lpp/./lpp_CNA_amba/lpp_CNA_amba.vhd
200 read_hdl -vhdl -lib lpp ../../lib/lpp/./lpp_CNA_amba/Serialize.vhd
201 read_hdl -vhdl -lib lpp ../../lib/lpp/./lpp_uart/APB_UART.vhd
202 read_hdl -vhdl -lib lpp ../../lib/lpp/./lpp_uart/BaudGen.vhd
203 read_hdl -vhdl -lib lpp ../../lib/lpp/./lpp_uart/lpp_uart.vhd
204 read_hdl -vhdl -lib lpp ../../lib/lpp/./lpp_uart/Shift_REG.vhd
205 read_hdl -vhdl -lib lpp ../../lib/lpp/./lpp_uart/UART.vhd
206 read_hdl -vhdl -lib lpp ../../lib/lpp/./lpp_amba/APB_MULTI_DIODE.vhd
207 read_hdl -vhdl -lib lpp ../../lib/lpp/./lpp_amba/APB_SIMPLE_DIODE.vhd
208 read_hdl -vhdl -lib lpp ../../lib/lpp/./lpp_amba/lpp_amba.vhd
209 read_hdl -vhdl -lib lpp ../../lib/lpp/./dsp/iir_filter/APB_IIR_CEL.vhd
210 read_hdl -vhdl -lib lpp ../../lib/lpp/./dsp/iir_filter/FILTERcfg.vhd
211 read_hdl -vhdl -lib lpp ../../lib/lpp/./dsp/iir_filter/FilterCTRLR.vhd
212 read_hdl -vhdl -lib lpp ../../lib/lpp/./dsp/iir_filter/FILTER_RAM_CTRLR.vhd
213 read_hdl -vhdl -lib lpp ../../lib/lpp/./dsp/iir_filter/FILTER.vhd
214 read_hdl -vhdl -lib lpp ../../lib/lpp/./dsp/iir_filter/IIR_CEL_CTRLR.vhd
215 read_hdl -vhdl -lib lpp ../../lib/lpp/./dsp/iir_filter/IIR_CEL_FILTER.vhd
216 read_hdl -vhdl -lib lpp ../../lib/lpp/./dsp/iir_filter/iir_filter.vhd
217 read_hdl -vhdl -lib lpp ../../lib/lpp/./dsp/iir_filter/RAM_CEL.vhd
218 read_hdl -vhdl -lib lpp ../../lib/lpp/./dsp/iir_filter/RAM_CTRLR2.vhd
219 read_hdl -vhdl -lib lpp ../../lib/lpp/./dsp/iir_filter/RAM.vhd
220 read_hdl -vhdl -lib lpp ../../lib/lpp/./dsp/iir_filter/Top_Filtre_IIR.vhd
221 read_hdl -vhdl -lib lpp ../../lib/lpp/./amba_lcd_16x2_ctrlr/amba_lcd_16x2_ctrlr.vhd
222 read_hdl -vhdl -lib lpp ../../lib/lpp/./amba_lcd_16x2_ctrlr/apb_lcd_ctrlr.vhd
223 read_hdl -vhdl -lib lpp ../../lib/lpp/./amba_lcd_16x2_ctrlr/FRAME_CLK.vhd
224 read_hdl -vhdl -lib lpp ../../lib/lpp/./amba_lcd_16x2_ctrlr/LCD_16x2_CFG.vhd
225 read_hdl -vhdl -lib lpp ../../lib/lpp/./amba_lcd_16x2_ctrlr/LCD_16x2_DRVR.vhd
226 read_hdl -vhdl -lib lpp ../../lib/lpp/./amba_lcd_16x2_ctrlr/LCD_16x2_ENGINE.vhd
227 read_hdl -vhdl -lib lpp ../../lib/lpp/./amba_lcd_16x2_ctrlr/LCD_2x16_DRIVER.vhd
228 read_hdl -vhdl -lib lpp ../../lib/lpp/./amba_lcd_16x2_ctrlr/LCD_CLK_GENERATOR.vhd
229 read_hdl -vhdl -lib lpp ../../lib/lpp/./amba_lcd_16x2_ctrlr/Top_LCD.vhd
@@ -0,0 +1,303
1 vhdlp -s -work grlib ../../lib/grlib/stdlib/version.vhd
2 vhdlp -s -work grlib ../../lib/grlib/stdlib/config.vhd
3 vhdlp -s -work grlib ../../lib/grlib/stdlib/stdlib.vhd
4 vhdlp -s -work grlib ../../lib/grlib/stdlib/stdio.vhd
5 vhdlp -s -work grlib ../../lib/grlib/stdlib/testlib.vhd
6 vhdlp -s -work grlib ../../lib/grlib/util/util.vhd
7 vhdlp -s -work grlib ../../lib/grlib/sparc/sparc.vhd
8 vhdlp -s -work grlib ../../lib/grlib/sparc/sparc_disas.vhd
9 vhdlp -s -work grlib ../../lib/grlib/sparc/cpu_disas.vhd
10 vhdlp -s -work grlib ../../lib/grlib/modgen/multlib.vhd
11 vhdlp -s -work grlib ../../lib/grlib/modgen/leaves.vhd
12 vhdlp -s -work grlib ../../lib/grlib/amba/amba.vhd
13 vhdlp -s -work grlib ../../lib/grlib/amba/devices.vhd
14 vhdlp -s -work grlib ../../lib/grlib/amba/defmst.vhd
15 vhdlp -s -work grlib ../../lib/grlib/amba/apbctrl.vhd
16 vhdlp -s -work grlib ../../lib/grlib/amba/ahbctrl.vhd
17 vhdlp -s -work grlib ../../lib/grlib/amba/dma2ahb_pkg.vhd
18 vhdlp -s -work grlib ../../lib/grlib/amba/dma2ahb.vhd
19 vhdlp -s -work grlib ../../lib/grlib/amba/dma2ahb_tp.vhd
20 vhdlp -s -work grlib ../../lib/grlib/amba/amba_tp.vhd
21 vhdlp -s -work grlib ../../lib/grlib/amba/at/at_pkg.vhd
22 vhdlp -s -work grlib ../../lib/grlib/amba/at/at_ahb_mst_pkg.vhd
23 vhdlp -s -work grlib ../../lib/grlib/amba/at/at_ahb_slv_pkg.vhd
24 vhdlp -s -work grlib ../../lib/grlib/amba/at/at_util.vhd
25 vhdlp -s -work grlib ../../lib/grlib/amba/at/at_ahb_mst.vhd
26 vhdlp -s -work grlib ../../lib/grlib/amba/at/at_ahb_slv.vhd
27 vhdlp -s -work grlib ../../lib/grlib/amba/at/at_ahbs.vhd
28 vhdlp -s -work grlib ../../lib/grlib/amba/at/at_ahb_ctrl.vhd
29 vhdlp -s -work unisim ../../lib/tech/unisim/ise/unisim_VPKG.vhd
30 vhdlp -s -work unisim ../../lib/tech/unisim/ise/unisim_VCOMP.vhd
31 vhdlp -s -work unisim ../../lib/tech/unisim/ise/simple_simprim.vhd
32 vhdlp -s -work unisim ../../lib/tech/unisim/ise/unisim_VITAL.vhd
33 vhdlp -s -work dw02 ../../lib/tech/dw02/comp/DW02_components.vhd
34 vhdlp -s -work synplify ../../lib/synplify/sim/synplify.vhd
35 vhdlp -s -work synplify ../../lib/synplify/sim/synattr.vhd
36 vhdlp -s -work techmap ../../lib/techmap/gencomp/gencomp.vhd
37 vhdlp -s -work techmap ../../lib/techmap/gencomp/netcomp.vhd
38 vhdlp -s -work techmap ../../lib/techmap/inferred/memory_inferred.vhd
39 vhdlp -s -work techmap ../../lib/techmap/inferred/ddr_inferred.vhd
40 vhdlp -s -work techmap ../../lib/techmap/inferred/mul_inferred.vhd
41 vhdlp -s -work techmap ../../lib/techmap/inferred/ddr_phy_inferred.vhd
42 vhdlp -s -work techmap ../../lib/techmap/dw02/mul_dw_gen.vhd
43 vhdlp -s -work techmap ../../lib/techmap/unisim/memory_unisim.vhd
44 vhdlp -s -work techmap ../../lib/techmap/unisim/buffer_unisim.vhd
45 vhdlp -s -work techmap ../../lib/techmap/unisim/pads_unisim.vhd
46 vhdlp -s -work techmap ../../lib/techmap/unisim/clkgen_unisim.vhd
47 vhdlp -s -work techmap ../../lib/techmap/unisim/tap_unisim.vhd
48 vhdlp -s -work techmap ../../lib/techmap/unisim/ddr_unisim.vhd
49 vhdlp -s -work techmap ../../lib/techmap/unisim/ddr_phy_unisim.vhd
50 vhdlp -s -work techmap ../../lib/techmap/unisim/grspwc_unisim.vhd
51 vhdlp -s -work techmap ../../lib/techmap/unisim/grspwc2_unisim.vhd
52 vhdlp -s -work techmap ../../lib/techmap/unisim/grusbhc_unisim.vhd
53 vhdlp -s -work techmap ../../lib/techmap/unisim/ssrctrl_unisim.vhd
54 vhdlp -s -work techmap ../../lib/techmap/unisim/sysmon_unisim.vhd
55 vhdlp -s -work techmap ../../lib/techmap/unisim/mul_unisim.vhd
56 vhdlp -s -work techmap ../../lib/techmap/unisim/grfpw_0_unisim.vhd
57 vhdlp -s -work techmap ../../lib/techmap/maps/allclkgen.vhd
58 vhdlp -s -work techmap ../../lib/techmap/maps/allddr.vhd
59 vhdlp -s -work techmap ../../lib/techmap/maps/allmem.vhd
60 vhdlp -s -work techmap ../../lib/techmap/maps/allpads.vhd
61 vhdlp -s -work techmap ../../lib/techmap/maps/alltap.vhd
62 vhdlp -s -work techmap ../../lib/techmap/maps/clkgen.vhd
63 vhdlp -s -work techmap ../../lib/techmap/maps/clkmux.vhd
64 vhdlp -s -work techmap ../../lib/techmap/maps/clkand.vhd
65 vhdlp -s -work techmap ../../lib/techmap/maps/ddr_ireg.vhd
66 vhdlp -s -work techmap ../../lib/techmap/maps/ddr_oreg.vhd
67 vhdlp -s -work techmap ../../lib/techmap/maps/ddrphy.vhd
68 vhdlp -s -work techmap ../../lib/techmap/maps/syncram.vhd
69 vhdlp -s -work techmap ../../lib/techmap/maps/syncram64.vhd
70 vhdlp -s -work techmap ../../lib/techmap/maps/syncram_2p.vhd
71 vhdlp -s -work techmap ../../lib/techmap/maps/syncram_dp.vhd
72 vhdlp -s -work techmap ../../lib/techmap/maps/syncfifo.vhd
73 vhdlp -s -work techmap ../../lib/techmap/maps/regfile_3p.vhd
74 vhdlp -s -work techmap ../../lib/techmap/maps/tap.vhd
75 vhdlp -s -work techmap ../../lib/techmap/maps/techbuf.vhd
76 vhdlp -s -work techmap ../../lib/techmap/maps/nandtree.vhd
77 vhdlp -s -work techmap ../../lib/techmap/maps/clkpad.vhd
78 vhdlp -s -work techmap ../../lib/techmap/maps/clkpad_ds.vhd
79 vhdlp -s -work techmap ../../lib/techmap/maps/inpad.vhd
80 vhdlp -s -work techmap ../../lib/techmap/maps/inpad_ds.vhd
81 vhdlp -s -work techmap ../../lib/techmap/maps/iodpad.vhd
82 vhdlp -s -work techmap ../../lib/techmap/maps/iopad.vhd
83 vhdlp -s -work techmap ../../lib/techmap/maps/iopad_ds.vhd
84 vhdlp -s -work techmap ../../lib/techmap/maps/lvds_combo.vhd
85 vhdlp -s -work techmap ../../lib/techmap/maps/odpad.vhd
86 vhdlp -s -work techmap ../../lib/techmap/maps/outpad.vhd
87 vhdlp -s -work techmap ../../lib/techmap/maps/outpad_ds.vhd
88 vhdlp -s -work techmap ../../lib/techmap/maps/toutpad.vhd
89 vhdlp -s -work techmap ../../lib/techmap/maps/skew_outpad.vhd
90 vhdlp -s -work techmap ../../lib/techmap/maps/grspwc_net.vhd
91 vhdlp -s -work techmap ../../lib/techmap/maps/grspwc2_net.vhd
92 vhdlp -s -work techmap ../../lib/techmap/maps/grlfpw_net.vhd
93 vhdlp -s -work techmap ../../lib/techmap/maps/grfpw_net.vhd
94 vhdlp -s -work techmap ../../lib/techmap/maps/mul_61x61.vhd
95 vhdlp -s -work techmap ../../lib/techmap/maps/cpu_disas_net.vhd
96 vhdlp -s -work techmap ../../lib/techmap/maps/ringosc.vhd
97 vhdlp -s -work techmap ../../lib/techmap/maps/system_monitor.vhd
98 vhdlp -s -work techmap ../../lib/techmap/maps/grgates.vhd
99 vhdlp -s -work techmap ../../lib/techmap/maps/inpad_ddr.vhd
100 vhdlp -s -work techmap ../../lib/techmap/maps/outpad_ddr.vhd
101 vhdlp -s -work techmap ../../lib/techmap/maps/iopad_ddr.vhd
102 vhdlp -s -work techmap ../../lib/techmap/maps/syncram128bw.vhd
103 vhdlp -s -work techmap ../../lib/techmap/maps/syncram128.vhd
104 vhdlp -s -work techmap ../../lib/techmap/maps/syncram156bw.vhd
105 vhdlp -s -work eth ../../lib/eth/comp/ethcomp.vhd
106 vhdlp -s -work eth ../../lib/eth/core/greth_pkg.vhd
107 vhdlp -s -work eth ../../lib/eth/core/eth_rstgen.vhd
108 vhdlp -s -work eth ../../lib/eth/core/eth_ahb_mst.vhd
109 vhdlp -s -work eth ../../lib/eth/core/greth_tx.vhd
110 vhdlp -s -work eth ../../lib/eth/core/greth_rx.vhd
111 vhdlp -s -work eth ../../lib/eth/core/grethc.vhd
112 vhdlp -s -work eth ../../lib/eth/wrapper/greth_gen.vhd
113 vhdlp -s -work eth ../../lib/eth/wrapper/greth_gbit_gen.vhd
114 vhdlp -s -work gaisler ../../lib/gaisler/arith/arith.vhd
115 vhdlp -s -work gaisler ../../lib/gaisler/arith/mul32.vhd
116 vhdlp -s -work gaisler ../../lib/gaisler/arith/div32.vhd
117 vhdlp -s -work gaisler ../../lib/gaisler/memctrl/memctrl.vhd
118 vhdlp -s -work gaisler ../../lib/gaisler/memctrl/sdctrl.vhd
119 vhdlp -s -work gaisler ../../lib/gaisler/memctrl/sdctrl64.vhd
120 vhdlp -s -work gaisler ../../lib/gaisler/memctrl/sdmctrl.vhd
121 vhdlp -s -work gaisler ../../lib/gaisler/memctrl/srctrl.vhd
122 vhdlp -s -work gaisler ../../lib/gaisler/memctrl/spimctrl.vhd
123 vhdlp -s -work gaisler ../../lib/gaisler/leon3/leon3.vhd
124 vhdlp -s -work gaisler ../../lib/gaisler/leon3/mmuconfig.vhd
125 vhdlp -s -work gaisler ../../lib/gaisler/leon3/mmuiface.vhd
126 vhdlp -s -work gaisler ../../lib/gaisler/leon3/libmmu.vhd
127 vhdlp -s -work gaisler ../../lib/gaisler/leon3/libiu.vhd
128 vhdlp -s -work gaisler ../../lib/gaisler/leon3/libcache.vhd
129 vhdlp -s -work gaisler ../../lib/gaisler/leon3/libproc3.vhd
130 vhdlp -s -work gaisler ../../lib/gaisler/leon3/cachemem.vhd
131 vhdlp -s -work gaisler ../../lib/gaisler/leon3/mmu_icache.vhd
132 vhdlp -s -work gaisler ../../lib/gaisler/leon3/mmu_dcache.vhd
133 vhdlp -s -work gaisler ../../lib/gaisler/leon3/mmu_acache.vhd
134 vhdlp -s -work gaisler ../../lib/gaisler/leon3/mmutlbcam.vhd
135 vhdlp -s -work gaisler ../../lib/gaisler/leon3/mmulrue.vhd
136 vhdlp -s -work gaisler ../../lib/gaisler/leon3/mmulru.vhd
137 vhdlp -s -work gaisler ../../lib/gaisler/leon3/mmutlb.vhd
138 vhdlp -s -work gaisler ../../lib/gaisler/leon3/mmutw.vhd
139 vhdlp -s -work gaisler ../../lib/gaisler/leon3/mmu.vhd
140 vhdlp -s -work gaisler ../../lib/gaisler/leon3/mmu_cache.vhd
141 vhdlp -s -work gaisler ../../lib/gaisler/leon3/cpu_disasx.vhd
142 vhdlp -s -work gaisler ../../lib/gaisler/leon3/iu3.vhd
143 vhdlp -s -work gaisler ../../lib/gaisler/leon3/grfpwx.vhd
144 vhdlp -s -work gaisler ../../lib/gaisler/leon3/mfpwx.vhd
145 vhdlp -s -work gaisler ../../lib/gaisler/leon3/grlfpwx.vhd
146 vhdlp -s -work gaisler ../../lib/gaisler/leon3/tbufmem.vhd
147 vhdlp -s -work gaisler ../../lib/gaisler/leon3/dsu3x.vhd
148 vhdlp -s -work gaisler ../../lib/gaisler/leon3/dsu3.vhd
149 vhdlp -s -work gaisler ../../lib/gaisler/leon3/proc3.vhd
150 vhdlp -s -work gaisler ../../lib/gaisler/leon3/leon3s.vhd
151 vhdlp -s -work gaisler ../../lib/gaisler/leon3/leon3cg.vhd
152 vhdlp -s -work gaisler ../../lib/gaisler/leon3/irqmp.vhd
153 vhdlp -s -work gaisler ../../lib/gaisler/leon3/grfpwxsh.vhd
154 vhdlp -s -work gaisler ../../lib/gaisler/leon3/grfpushwx.vhd
155 vhdlp -s -work gaisler ../../lib/gaisler/leon3/leon3sh.vhd
156 vhdlp -s -work gaisler ../../lib/gaisler/misc/misc.vhd
157 vhdlp -s -work gaisler ../../lib/gaisler/misc/rstgen.vhd
158 vhdlp -s -work gaisler ../../lib/gaisler/misc/gptimer.vhd
159 vhdlp -s -work gaisler ../../lib/gaisler/misc/ahbram.vhd
160 vhdlp -s -work gaisler ../../lib/gaisler/misc/ahbdpram.vhd
161 vhdlp -s -work gaisler ../../lib/gaisler/misc/ahbtrace.vhd
162 vhdlp -s -work gaisler ../../lib/gaisler/misc/ahbtrace_mb.vhd
163 vhdlp -s -work gaisler ../../lib/gaisler/misc/ahbmst.vhd
164 vhdlp -s -work gaisler ../../lib/gaisler/misc/grgpio.vhd
165 vhdlp -s -work gaisler ../../lib/gaisler/misc/ahbstat.vhd
166 vhdlp -s -work gaisler ../../lib/gaisler/misc/logan.vhd
167 vhdlp -s -work gaisler ../../lib/gaisler/misc/apbps2.vhd
168 vhdlp -s -work gaisler ../../lib/gaisler/misc/charrom_package.vhd
169 vhdlp -s -work gaisler ../../lib/gaisler/misc/charrom.vhd
170 vhdlp -s -work gaisler ../../lib/gaisler/misc/apbvga.vhd
171 vhdlp -s -work gaisler ../../lib/gaisler/misc/svgactrl.vhd
172 vhdlp -s -work gaisler ../../lib/gaisler/misc/i2cmst_gen.vhd
173 vhdlp -s -work gaisler ../../lib/gaisler/misc/spictrl.vhd
174 vhdlp -s -work gaisler ../../lib/gaisler/misc/i2cslv.vhd
175 vhdlp -s -work gaisler ../../lib/gaisler/misc/wild.vhd
176 vhdlp -s -work gaisler ../../lib/gaisler/misc/wild2ahb.vhd
177 vhdlp -s -work gaisler ../../lib/gaisler/misc/grsysmon.vhd
178 vhdlp -s -work gaisler ../../lib/gaisler/misc/gracectrl.vhd
179 vhdlp -s -work gaisler ../../lib/gaisler/misc/grgpreg.vhd
180 vhdlp -s -work gaisler ../../lib/gaisler/misc/ahbmst2.vhd
181 vhdlp -s -work gaisler ../../lib/gaisler/misc/ahb_mst_iface.vhd
182 vhdlp -s -work gaisler ../../lib/gaisler/net/net.vhd
183 vhdlp -s -work gaisler ../../lib/gaisler/uart/uart.vhd
184 vhdlp -s -work gaisler ../../lib/gaisler/uart/libdcom.vhd
185 vhdlp -s -work gaisler ../../lib/gaisler/uart/apbuart.vhd
186 vhdlp -s -work gaisler ../../lib/gaisler/uart/dcom.vhd
187 vhdlp -s -work gaisler ../../lib/gaisler/uart/dcom_uart.vhd
188 vhdlp -s -work gaisler ../../lib/gaisler/uart/ahbuart.vhd
189 vhdlp -s -work gaisler ../../lib/gaisler/sim/sim.vhd
190 vhdlp -s -work gaisler ../../lib/gaisler/sim/sram.vhd
191 vhdlp -s -work gaisler ../../lib/gaisler/sim/ata_device.vhd
192 vhdlp -s -work gaisler ../../lib/gaisler/sim/sram16.vhd
193 vhdlp -s -work gaisler ../../lib/gaisler/sim/phy.vhd
194 vhdlp -s -work gaisler ../../lib/gaisler/sim/ahbrep.vhd
195 vhdlp -s -work gaisler ../../lib/gaisler/sim/delay_wire.vhd
196 vhdlp -s -work gaisler ../../lib/gaisler/sim/spi_flash.vhd
197 vhdlp -s -work gaisler ../../lib/gaisler/sim/pwm_check.vhd
198 vhdlp -s -work gaisler ../../lib/gaisler/sim/usbsim.vhd
199 vhdlp -s -work gaisler ../../lib/gaisler/sim/grusbdcsim.vhd
200 vhdlp -s -work gaisler ../../lib/gaisler/sim/grusb_dclsim.vhd
201 vhdlp -s -work gaisler ../../lib/gaisler/jtag/jtag.vhd
202 vhdlp -s -work gaisler ../../lib/gaisler/jtag/libjtagcom.vhd
203 vhdlp -s -work gaisler ../../lib/gaisler/jtag/jtagcom.vhd
204 vhdlp -s -work gaisler ../../lib/gaisler/jtag/ahbjtag.vhd
205 vhdlp -s -work gaisler ../../lib/gaisler/jtag/ahbjtag_bsd.vhd
206 vhdlp -s -work gaisler ../../lib/gaisler/jtag/jtagtst.vhd
207 vhdlp -s -work gaisler ../../lib/gaisler/greth/ethernet_mac.vhd
208 vhdlp -s -work gaisler ../../lib/gaisler/greth/greth.vhd
209 vhdlp -s -work gaisler ../../lib/gaisler/greth/greth_gbit.vhd
210 vhdlp -s -work gaisler ../../lib/gaisler/greth/grethm.vhd
211 vhdlp -s -work gaisler ../../lib/gaisler/ddr/ddr_phy.vhd
212 vhdlp -s -work gaisler ../../lib/gaisler/ddr/ddrsp16a.vhd
213 vhdlp -s -work gaisler ../../lib/gaisler/ddr/ddrsp32a.vhd
214 vhdlp -s -work gaisler ../../lib/gaisler/ddr/ddrsp64a.vhd
215 vhdlp -s -work gaisler ../../lib/gaisler/ddr/ddrspa.vhd
216 vhdlp -s -work gaisler ../../lib/gaisler/ddr/ddr2spa.vhd
217 vhdlp -s -work gaisler ../../lib/gaisler/ddr/ddr2buf.vhd
218 vhdlp -s -work gaisler ../../lib/gaisler/ddr/ddr2spax.vhd
219 vhdlp -s -work gaisler ../../lib/gaisler/ddr/ddr2spax_ahb.vhd
220 vhdlp -s -work gaisler ../../lib/gaisler/ddr/ddr2spax_ddr.vhd
221 vhdlp -s -work esa ../../lib/esa/memoryctrl/memoryctrl.vhd
222 vhdlp -s -work esa ../../lib/esa/memoryctrl/mctrl.vhd
223 vhdlp -s -work fmf ../../lib/fmf/utilities/conversions.vhd
224 vhdlp -s -work fmf ../../lib/fmf/utilities/gen_utils.vhd
225 vhdlp -s -work fmf ../../lib/fmf/flash/flash.vhd
226 vhdlp -s -work fmf ../../lib/fmf/flash/s25fl064a.vhd
227 vhdlp -s -work fmf ../../lib/fmf/flash/m25p80.vhd
228 vhdlp -s -work fmf ../../lib/fmf/fifo/idt7202.vhd
229 vhdlp -s -work gsi ../../lib/gsi/ssram/functions.vhd
230 vhdlp -s -work gsi ../../lib/gsi/ssram/core_burst.vhd
231 vhdlp -s -work gsi ../../lib/gsi/ssram/g880e18bt.vhd
232 vhdlp -s -work lpp ../../lib/lpp/./general_purpose/Adder.vhd
233 vhdlp -s -work lpp ../../lib/lpp/./general_purpose/ADDRcntr.vhd
234 vhdlp -s -work lpp ../../lib/lpp/./general_purpose/ALU.vhd
235 vhdlp -s -work lpp ../../lib/lpp/./general_purpose/Clk_divider.vhd
236 vhdlp -s -work lpp ../../lib/lpp/./general_purpose/general_purpose.vhd
237 vhdlp -s -work lpp ../../lib/lpp/./general_purpose/MAC_CONTROLER.vhd
238 vhdlp -s -work lpp ../../lib/lpp/./general_purpose/MAC_MUX2.vhd
239 vhdlp -s -work lpp ../../lib/lpp/./general_purpose/MAC_MUX.vhd
240 vhdlp -s -work lpp ../../lib/lpp/./general_purpose/MAC_REG.vhd
241 vhdlp -s -work lpp ../../lib/lpp/./general_purpose/MAC.vhd
242 vhdlp -s -work lpp ../../lib/lpp/./general_purpose/Multiplier.vhd
243 vhdlp -s -work lpp ../../lib/lpp/./general_purpose/MUX2.vhd
244 vhdlp -s -work lpp ../../lib/lpp/./general_purpose/REG.vhd
245 vhdlp -s -work lpp ../../lib/lpp/./general_purpose/Shifter.vhd
246 vhdlp -s -work lpp ../../lib/lpp/./lpp_ad_Conv/AD7688_drvr.vhd
247 vhdlp -s -work lpp ../../lib/lpp/./lpp_ad_Conv/AD7688_spi_if.vhd
248 vhdlp -s -work lpp ../../lib/lpp/./lpp_ad_Conv/ADS7886_drvr.vhd
249 vhdlp -s -work lpp ../../lib/lpp/./lpp_ad_Conv/lpp_ad_Conv.vhd
250 vhdlp -s -work lpp ../../lib/lpp/./lpp_ad_Conv/lpp_apb_ad_conv.vhd
251 vhdlp -s -work lpp ../../lib/lpp/./lpp_CNA_amba/APB_CNA.vhd
252 vhdlp -s -work lpp ../../lib/lpp/./lpp_CNA_amba/clock.vhd
253 vhdlp -s -work lpp ../../lib/lpp/./lpp_CNA_amba/CNA_TabloC.vhd
254 vhdlp -s -work lpp ../../lib/lpp/./lpp_CNA_amba/Convertisseur_config.vhd
255 vhdlp -s -work lpp ../../lib/lpp/./lpp_CNA_amba/GeneSYNC_flag.vhd
256 vhdlp -s -work lpp ../../lib/lpp/./lpp_CNA_amba/lpp_CNA_amba.vhd
257 vhdlp -s -work lpp ../../lib/lpp/./lpp_CNA_amba/Serialize.vhd
258 vhdlp -s -work lpp ../../lib/lpp/./lpp_uart/APB_UART.vhd
259 vhdlp -s -work lpp ../../lib/lpp/./lpp_uart/BaudGen.vhd
260 vhdlp -s -work lpp ../../lib/lpp/./lpp_uart/lpp_uart.vhd
261 vhdlp -s -work lpp ../../lib/lpp/./lpp_uart/Shift_REG.vhd
262 vhdlp -s -work lpp ../../lib/lpp/./lpp_uart/UART.vhd
263 vhdlp -s -work lpp ../../lib/lpp/./lpp_amba/APB_MULTI_DIODE.vhd
264 vhdlp -s -work lpp ../../lib/lpp/./lpp_amba/APB_SIMPLE_DIODE.vhd
265 vhdlp -s -work lpp ../../lib/lpp/./lpp_amba/lpp_amba.vhd
266 vhdlp -s -work lpp ../../lib/lpp/./dsp/iir_filter/APB_IIR_CEL.vhd
267 vhdlp -s -work lpp ../../lib/lpp/./dsp/iir_filter/FILTERcfg.vhd
268 vhdlp -s -work lpp ../../lib/lpp/./dsp/iir_filter/FilterCTRLR.vhd
269 vhdlp -s -work lpp ../../lib/lpp/./dsp/iir_filter/FILTER_RAM_CTRLR.vhd
270 vhdlp -s -work lpp ../../lib/lpp/./dsp/iir_filter/FILTER.vhd
271 vhdlp -s -work lpp ../../lib/lpp/./dsp/iir_filter/IIR_CEL_CTRLR.vhd
272 vhdlp -s -work lpp ../../lib/lpp/./dsp/iir_filter/IIR_CEL_FILTER.vhd
273 vhdlp -s -work lpp ../../lib/lpp/./dsp/iir_filter/iir_filter.vhd
274 vhdlp -s -work lpp ../../lib/lpp/./dsp/iir_filter/RAM_CEL.vhd
275 vhdlp -s -work lpp ../../lib/lpp/./dsp/iir_filter/RAM_CTRLR2.vhd
276 vhdlp -s -work lpp ../../lib/lpp/./dsp/iir_filter/RAM.vhd
277 vhdlp -s -work lpp ../../lib/lpp/./dsp/iir_filter/Top_Filtre_IIR.vhd
278 vhdlp -s -work lpp ../../lib/lpp/./amba_lcd_16x2_ctrlr/amba_lcd_16x2_ctrlr.vhd
279 vhdlp -s -work lpp ../../lib/lpp/./amba_lcd_16x2_ctrlr/apb_lcd_ctrlr.vhd
280 vhdlp -s -work lpp ../../lib/lpp/./amba_lcd_16x2_ctrlr/FRAME_CLK.vhd
281 vhdlp -s -work lpp ../../lib/lpp/./amba_lcd_16x2_ctrlr/LCD_16x2_CFG.vhd
282 vhdlp -s -work lpp ../../lib/lpp/./amba_lcd_16x2_ctrlr/LCD_16x2_DRVR.vhd
283 vhdlp -s -work lpp ../../lib/lpp/./amba_lcd_16x2_ctrlr/LCD_16x2_ENGINE.vhd
284 vhdlp -s -work lpp ../../lib/lpp/./amba_lcd_16x2_ctrlr/LCD_2x16_DRIVER.vhd
285 vhdlp -s -work lpp ../../lib/lpp/./amba_lcd_16x2_ctrlr/LCD_CLK_GENERATOR.vhd
286 vhdlp -s -work lpp ../../lib/lpp/./amba_lcd_16x2_ctrlr/Top_LCD.vhd
287 vhdlp -s -work cypress ../../lib/cypress/ssram/components.vhd
288 vhdlp -s -work cypress ../../lib/cypress/ssram/package_utility.vhd
289 vhdlp -s -work cypress ../../lib/cypress/ssram/cy7c1354b.vhd
290 vhdlp -s -work cypress ../../lib/cypress/ssram/cy7c1380d.vhd
291 vhdlp -s -work hynix ../../lib/hynix/ddr2/HY5PS121621F_PACK.vhd
292 vhdlp -s -work hynix ../../lib/hynix/ddr2/HY5PS121621F.vhd
293 vhdlp -s -work hynix ../../lib/hynix/ddr2/components.vhd
294 vhdlp -s -work micron ../../lib/micron/sdram/components.vhd
295 vhdlp -s -work micron ../../lib/micron/sdram/mt48lc16m16a2.vhd
296 vhdlp -s -work micron ../../lib/micron/ddr/mt46v16m16.vhd
297 vhdlp -s -work sonata ../../lib/work/debug/debug.vhd
298 vhdlp -s -work sonata ../../lib/work/debug/grtestmod.vhd
299 vhdlp -s -work sonata ../../lib/work/debug/cpu_disas.vhd
300 vhdlp -s -work sonata config.vhd
301 vhdlp -s -work sonata ahbrom.vhd
302 vhdlp -s -work sonata leon3mp.vhd
303 vhdlp -s -work sonata testbench.vhd
@@ -0,0 +1,240
1 add_file -vhdl -lib grlib ../../lib/grlib/stdlib/version.vhd
2 add_file -vhdl -lib grlib ../../lib/grlib/stdlib/config.vhd
3 add_file -vhdl -lib grlib ../../lib/grlib/stdlib/stdlib.vhd
4 add_file -vhdl -lib grlib ../../lib/grlib/sparc/sparc.vhd
5 add_file -vhdl -lib grlib ../../lib/grlib/modgen/multlib.vhd
6 add_file -vhdl -lib grlib ../../lib/grlib/modgen/leaves.vhd
7 add_file -vhdl -lib grlib ../../lib/grlib/amba/amba.vhd
8 add_file -vhdl -lib grlib ../../lib/grlib/amba/devices.vhd
9 add_file -vhdl -lib grlib ../../lib/grlib/amba/defmst.vhd
10 add_file -vhdl -lib grlib ../../lib/grlib/amba/apbctrl.vhd
11 add_file -vhdl -lib grlib ../../lib/grlib/amba/ahbctrl.vhd
12 add_file -vhdl -lib grlib ../../lib/grlib/amba/dma2ahb_pkg.vhd
13 add_file -vhdl -lib grlib ../../lib/grlib/amba/dma2ahb.vhd
14 add_file -vhdl -lib techmap ../../lib/techmap/gencomp/gencomp.vhd
15 add_file -vhdl -lib techmap ../../lib/techmap/gencomp/netcomp.vhd
16 add_file -vhdl -lib techmap ../../lib/techmap/inferred/memory_inferred.vhd
17 add_file -vhdl -lib techmap ../../lib/techmap/inferred/ddr_inferred.vhd
18 add_file -vhdl -lib techmap ../../lib/techmap/inferred/mul_inferred.vhd
19 add_file -vhdl -lib techmap ../../lib/techmap/inferred/ddr_phy_inferred.vhd
20 add_file -vhdl -lib techmap ../../lib/techmap/unisim/memory_unisim.vhd
21 add_file -vhdl -lib techmap ../../lib/techmap/unisim/buffer_unisim.vhd
22 add_file -vhdl -lib techmap ../../lib/techmap/unisim/pads_unisim.vhd
23 add_file -vhdl -lib techmap ../../lib/techmap/unisim/clkgen_unisim.vhd
24 add_file -vhdl -lib techmap ../../lib/techmap/unisim/tap_unisim.vhd
25 add_file -vhdl -lib techmap ../../lib/techmap/unisim/ddr_unisim.vhd
26 add_file -vhdl -lib techmap ../../lib/techmap/unisim/ddr_phy_unisim.vhd
27 add_file -vhdl -lib techmap ../../lib/techmap/unisim/grspwc_unisim.vhd
28 add_file -vhdl -lib techmap ../../lib/techmap/unisim/grspwc2_unisim.vhd
29 add_file -vhdl -lib techmap ../../lib/techmap/unisim/grusbhc_unisim.vhd
30 add_file -vhdl -lib techmap ../../lib/techmap/unisim/ssrctrl_unisim.vhd
31 add_file -vhdl -lib techmap ../../lib/techmap/unisim/sysmon_unisim.vhd
32 add_file -vhdl -lib techmap ../../lib/techmap/unisim/mul_unisim.vhd
33 add_file -vhdl -lib techmap ../../lib/techmap/maps/allclkgen.vhd
34 add_file -vhdl -lib techmap ../../lib/techmap/maps/allddr.vhd
35 add_file -vhdl -lib techmap ../../lib/techmap/maps/allmem.vhd
36 add_file -vhdl -lib techmap ../../lib/techmap/maps/allpads.vhd
37 add_file -vhdl -lib techmap ../../lib/techmap/maps/alltap.vhd
38 add_file -vhdl -lib techmap ../../lib/techmap/maps/clkgen.vhd
39 add_file -vhdl -lib techmap ../../lib/techmap/maps/clkmux.vhd
40 add_file -vhdl -lib techmap ../../lib/techmap/maps/clkand.vhd
41 add_file -vhdl -lib techmap ../../lib/techmap/maps/ddr_ireg.vhd
42 add_file -vhdl -lib techmap ../../lib/techmap/maps/ddr_oreg.vhd
43 add_file -vhdl -lib techmap ../../lib/techmap/maps/ddrphy.vhd
44 add_file -vhdl -lib techmap ../../lib/techmap/maps/syncram.vhd
45 add_file -vhdl -lib techmap ../../lib/techmap/maps/syncram64.vhd
46 add_file -vhdl -lib techmap ../../lib/techmap/maps/syncram_2p.vhd
47 add_file -vhdl -lib techmap ../../lib/techmap/maps/syncram_dp.vhd
48 add_file -vhdl -lib techmap ../../lib/techmap/maps/syncfifo.vhd
49 add_file -vhdl -lib techmap ../../lib/techmap/maps/regfile_3p.vhd
50 add_file -vhdl -lib techmap ../../lib/techmap/maps/tap.vhd
51 add_file -vhdl -lib techmap ../../lib/techmap/maps/techbuf.vhd
52 add_file -vhdl -lib techmap ../../lib/techmap/maps/nandtree.vhd
53 add_file -vhdl -lib techmap ../../lib/techmap/maps/clkpad.vhd
54 add_file -vhdl -lib techmap ../../lib/techmap/maps/clkpad_ds.vhd
55 add_file -vhdl -lib techmap ../../lib/techmap/maps/inpad.vhd
56 add_file -vhdl -lib techmap ../../lib/techmap/maps/inpad_ds.vhd
57 add_file -vhdl -lib techmap ../../lib/techmap/maps/iodpad.vhd
58 add_file -vhdl -lib techmap ../../lib/techmap/maps/iopad.vhd
59 add_file -vhdl -lib techmap ../../lib/techmap/maps/iopad_ds.vhd
60 add_file -vhdl -lib techmap ../../lib/techmap/maps/lvds_combo.vhd
61 add_file -vhdl -lib techmap ../../lib/techmap/maps/odpad.vhd
62 add_file -vhdl -lib techmap ../../lib/techmap/maps/outpad.vhd
63 add_file -vhdl -lib techmap ../../lib/techmap/maps/outpad_ds.vhd
64 add_file -vhdl -lib techmap ../../lib/techmap/maps/toutpad.vhd
65 add_file -vhdl -lib techmap ../../lib/techmap/maps/skew_outpad.vhd
66 add_file -vhdl -lib techmap ../../lib/techmap/maps/grspwc_net.vhd
67 add_file -vhdl -lib techmap ../../lib/techmap/maps/grspwc2_net.vhd
68 add_file -vhdl -lib techmap ../../lib/techmap/maps/grlfpw_net.vhd
69 add_file -vhdl -lib techmap ../../lib/techmap/maps/grfpw_net.vhd
70 add_file -vhdl -lib techmap ../../lib/techmap/maps/mul_61x61.vhd
71 add_file -vhdl -lib techmap ../../lib/techmap/maps/cpu_disas_net.vhd
72 add_file -vhdl -lib techmap ../../lib/techmap/maps/ringosc.vhd
73 add_file -vhdl -lib techmap ../../lib/techmap/maps/system_monitor.vhd
74 add_file -vhdl -lib techmap ../../lib/techmap/maps/grgates.vhd
75 add_file -vhdl -lib techmap ../../lib/techmap/maps/inpad_ddr.vhd
76 add_file -vhdl -lib techmap ../../lib/techmap/maps/outpad_ddr.vhd
77 add_file -vhdl -lib techmap ../../lib/techmap/maps/iopad_ddr.vhd
78 add_file -vhdl -lib techmap ../../lib/techmap/maps/syncram128bw.vhd
79 add_file -vhdl -lib techmap ../../lib/techmap/maps/syncram128.vhd
80 add_file -vhdl -lib techmap ../../lib/techmap/maps/syncram156bw.vhd
81 add_file -vhdl -lib eth ../../lib/eth/comp/ethcomp.vhd
82 add_file -vhdl -lib eth ../../lib/eth/core/greth_pkg.vhd
83 add_file -vhdl -lib eth ../../lib/eth/core/eth_rstgen.vhd
84 add_file -vhdl -lib eth ../../lib/eth/core/eth_ahb_mst.vhd
85 add_file -vhdl -lib eth ../../lib/eth/core/greth_tx.vhd
86 add_file -vhdl -lib eth ../../lib/eth/core/greth_rx.vhd
87 add_file -vhdl -lib eth ../../lib/eth/core/grethc.vhd
88 add_file -vhdl -lib eth ../../lib/eth/wrapper/greth_gen.vhd
89 add_file -vhdl -lib eth ../../lib/eth/wrapper/greth_gbit_gen.vhd
90 add_file -vhdl -lib gaisler ../../lib/gaisler/arith/arith.vhd
91 add_file -vhdl -lib gaisler ../../lib/gaisler/arith/mul32.vhd
92 add_file -vhdl -lib gaisler ../../lib/gaisler/arith/div32.vhd
93 add_file -vhdl -lib gaisler ../../lib/gaisler/memctrl/memctrl.vhd
94 add_file -vhdl -lib gaisler ../../lib/gaisler/memctrl/sdctrl.vhd
95 add_file -vhdl -lib gaisler ../../lib/gaisler/memctrl/sdctrl64.vhd
96 add_file -vhdl -lib gaisler ../../lib/gaisler/memctrl/sdmctrl.vhd
97 add_file -vhdl -lib gaisler ../../lib/gaisler/memctrl/srctrl.vhd
98 add_file -vhdl -lib gaisler ../../lib/gaisler/memctrl/spimctrl.vhd
99 add_file -vhdl -lib gaisler ../../lib/gaisler/leon3/leon3.vhd
100 add_file -vhdl -lib gaisler ../../lib/gaisler/leon3/mmuconfig.vhd
101 add_file -vhdl -lib gaisler ../../lib/gaisler/leon3/mmuiface.vhd
102 add_file -vhdl -lib gaisler ../../lib/gaisler/leon3/libmmu.vhd
103 add_file -vhdl -lib gaisler ../../lib/gaisler/leon3/libiu.vhd
104 add_file -vhdl -lib gaisler ../../lib/gaisler/leon3/libcache.vhd
105 add_file -vhdl -lib gaisler ../../lib/gaisler/leon3/libproc3.vhd
106 add_file -vhdl -lib gaisler ../../lib/gaisler/leon3/cachemem.vhd
107 add_file -vhdl -lib gaisler ../../lib/gaisler/leon3/mmu_icache.vhd
108 add_file -vhdl -lib gaisler ../../lib/gaisler/leon3/mmu_dcache.vhd
109 add_file -vhdl -lib gaisler ../../lib/gaisler/leon3/mmu_acache.vhd
110 add_file -vhdl -lib gaisler ../../lib/gaisler/leon3/mmutlbcam.vhd
111 add_file -vhdl -lib gaisler ../../lib/gaisler/leon3/mmulrue.vhd
112 add_file -vhdl -lib gaisler ../../lib/gaisler/leon3/mmulru.vhd
113 add_file -vhdl -lib gaisler ../../lib/gaisler/leon3/mmutlb.vhd
114 add_file -vhdl -lib gaisler ../../lib/gaisler/leon3/mmutw.vhd
115 add_file -vhdl -lib gaisler ../../lib/gaisler/leon3/mmu.vhd
116 add_file -vhdl -lib gaisler ../../lib/gaisler/leon3/mmu_cache.vhd
117 add_file -vhdl -lib gaisler ../../lib/gaisler/leon3/cpu_disasx.vhd
118 add_file -vhdl -lib gaisler ../../lib/gaisler/leon3/iu3.vhd
119 add_file -vhdl -lib gaisler ../../lib/gaisler/leon3/grfpwx.vhd
120 add_file -vhdl -lib gaisler ../../lib/gaisler/leon3/mfpwx.vhd
121 add_file -vhdl -lib gaisler ../../lib/gaisler/leon3/grlfpwx.vhd
122 add_file -vhdl -lib gaisler ../../lib/gaisler/leon3/tbufmem.vhd
123 add_file -vhdl -lib gaisler ../../lib/gaisler/leon3/dsu3x.vhd
124 add_file -vhdl -lib gaisler ../../lib/gaisler/leon3/dsu3.vhd
125 add_file -vhdl -lib gaisler ../../lib/gaisler/leon3/proc3.vhd
126 add_file -vhdl -lib gaisler ../../lib/gaisler/leon3/leon3s.vhd
127 add_file -vhdl -lib gaisler ../../lib/gaisler/leon3/leon3cg.vhd
128 add_file -vhdl -lib gaisler ../../lib/gaisler/leon3/irqmp.vhd
129 add_file -vhdl -lib gaisler ../../lib/gaisler/leon3/grfpwxsh.vhd
130 add_file -vhdl -lib gaisler ../../lib/gaisler/leon3/grfpushwx.vhd
131 add_file -vhdl -lib gaisler ../../lib/gaisler/leon3/leon3sh.vhd
132 add_file -vhdl -lib gaisler ../../lib/gaisler/misc/misc.vhd
133 add_file -vhdl -lib gaisler ../../lib/gaisler/misc/rstgen.vhd
134 add_file -vhdl -lib gaisler ../../lib/gaisler/misc/gptimer.vhd
135 add_file -vhdl -lib gaisler ../../lib/gaisler/misc/ahbram.vhd
136 add_file -vhdl -lib gaisler ../../lib/gaisler/misc/ahbdpram.vhd
137 add_file -vhdl -lib gaisler ../../lib/gaisler/misc/ahbtrace.vhd
138 add_file -vhdl -lib gaisler ../../lib/gaisler/misc/ahbtrace_mb.vhd
139 add_file -vhdl -lib gaisler ../../lib/gaisler/misc/ahbmst.vhd
140 add_file -vhdl -lib gaisler ../../lib/gaisler/misc/grgpio.vhd
141 add_file -vhdl -lib gaisler ../../lib/gaisler/misc/ahbstat.vhd
142 add_file -vhdl -lib gaisler ../../lib/gaisler/misc/logan.vhd
143 add_file -vhdl -lib gaisler ../../lib/gaisler/misc/apbps2.vhd
144 add_file -vhdl -lib gaisler ../../lib/gaisler/misc/charrom_package.vhd
145 add_file -vhdl -lib gaisler ../../lib/gaisler/misc/charrom.vhd
146 add_file -vhdl -lib gaisler ../../lib/gaisler/misc/apbvga.vhd
147 add_file -vhdl -lib gaisler ../../lib/gaisler/misc/svgactrl.vhd
148 add_file -vhdl -lib gaisler ../../lib/gaisler/misc/i2cmst_gen.vhd
149 add_file -vhdl -lib gaisler ../../lib/gaisler/misc/spictrl.vhd
150 add_file -vhdl -lib gaisler ../../lib/gaisler/misc/i2cslv.vhd
151 add_file -vhdl -lib gaisler ../../lib/gaisler/misc/wild.vhd
152 add_file -vhdl -lib gaisler ../../lib/gaisler/misc/wild2ahb.vhd
153 add_file -vhdl -lib gaisler ../../lib/gaisler/misc/grsysmon.vhd
154 add_file -vhdl -lib gaisler ../../lib/gaisler/misc/gracectrl.vhd
155 add_file -vhdl -lib gaisler ../../lib/gaisler/misc/grgpreg.vhd
156 add_file -vhdl -lib gaisler ../../lib/gaisler/misc/ahbmst2.vhd
157 add_file -vhdl -lib gaisler ../../lib/gaisler/misc/ahb_mst_iface.vhd
158 add_file -vhdl -lib gaisler ../../lib/gaisler/net/net.vhd
159 add_file -vhdl -lib gaisler ../../lib/gaisler/uart/uart.vhd
160 add_file -vhdl -lib gaisler ../../lib/gaisler/uart/libdcom.vhd
161 add_file -vhdl -lib gaisler ../../lib/gaisler/uart/apbuart.vhd
162 add_file -vhdl -lib gaisler ../../lib/gaisler/uart/dcom.vhd
163 add_file -vhdl -lib gaisler ../../lib/gaisler/uart/dcom_uart.vhd
164 add_file -vhdl -lib gaisler ../../lib/gaisler/uart/ahbuart.vhd
165 add_file -vhdl -lib gaisler ../../lib/gaisler/jtag/jtag.vhd
166 add_file -vhdl -lib gaisler ../../lib/gaisler/jtag/libjtagcom.vhd
167 add_file -vhdl -lib gaisler ../../lib/gaisler/jtag/jtagcom.vhd
168 add_file -vhdl -lib gaisler ../../lib/gaisler/jtag/ahbjtag.vhd
169 add_file -vhdl -lib gaisler ../../lib/gaisler/jtag/ahbjtag_bsd.vhd
170 add_file -vhdl -lib gaisler ../../lib/gaisler/greth/ethernet_mac.vhd
171 add_file -vhdl -lib gaisler ../../lib/gaisler/greth/greth.vhd
172 add_file -vhdl -lib gaisler ../../lib/gaisler/greth/greth_gbit.vhd
173 add_file -vhdl -lib gaisler ../../lib/gaisler/greth/grethm.vhd
174 add_file -vhdl -lib gaisler ../../lib/gaisler/ddr/ddr_phy.vhd
175 add_file -vhdl -lib gaisler ../../lib/gaisler/ddr/ddrsp16a.vhd
176 add_file -vhdl -lib gaisler ../../lib/gaisler/ddr/ddrsp32a.vhd
177 add_file -vhdl -lib gaisler ../../lib/gaisler/ddr/ddrsp64a.vhd
178 add_file -vhdl -lib gaisler ../../lib/gaisler/ddr/ddrspa.vhd
179 add_file -vhdl -lib gaisler ../../lib/gaisler/ddr/ddr2spa.vhd
180 add_file -vhdl -lib gaisler ../../lib/gaisler/ddr/ddr2buf.vhd
181 add_file -vhdl -lib gaisler ../../lib/gaisler/ddr/ddr2spax.vhd
182 add_file -vhdl -lib gaisler ../../lib/gaisler/ddr/ddr2spax_ahb.vhd
183 add_file -vhdl -lib gaisler ../../lib/gaisler/ddr/ddr2spax_ddr.vhd
184 add_file -vhdl -lib esa ../../lib/esa/memoryctrl/memoryctrl.vhd
185 add_file -vhdl -lib esa ../../lib/esa/memoryctrl/mctrl.vhd
186 add_file -vhdl -lib lpp ../../lib/lpp/./general_purpose/Adder.vhd
187 add_file -vhdl -lib lpp ../../lib/lpp/./general_purpose/ADDRcntr.vhd
188 add_file -vhdl -lib lpp ../../lib/lpp/./general_purpose/ALU.vhd
189 add_file -vhdl -lib lpp ../../lib/lpp/./general_purpose/Clk_divider.vhd
190 add_file -vhdl -lib lpp ../../lib/lpp/./general_purpose/general_purpose.vhd
191 add_file -vhdl -lib lpp ../../lib/lpp/./general_purpose/MAC_CONTROLER.vhd
192 add_file -vhdl -lib lpp ../../lib/lpp/./general_purpose/MAC_MUX2.vhd
193 add_file -vhdl -lib lpp ../../lib/lpp/./general_purpose/MAC_MUX.vhd
194 add_file -vhdl -lib lpp ../../lib/lpp/./general_purpose/MAC_REG.vhd
195 add_file -vhdl -lib lpp ../../lib/lpp/./general_purpose/MAC.vhd
196 add_file -vhdl -lib lpp ../../lib/lpp/./general_purpose/Multiplier.vhd
197 add_file -vhdl -lib lpp ../../lib/lpp/./general_purpose/MUX2.vhd
198 add_file -vhdl -lib lpp ../../lib/lpp/./general_purpose/REG.vhd
199 add_file -vhdl -lib lpp ../../lib/lpp/./general_purpose/Shifter.vhd
200 add_file -vhdl -lib lpp ../../lib/lpp/./lpp_ad_Conv/AD7688_drvr.vhd
201 add_file -vhdl -lib lpp ../../lib/lpp/./lpp_ad_Conv/AD7688_spi_if.vhd
202 add_file -vhdl -lib lpp ../../lib/lpp/./lpp_ad_Conv/ADS7886_drvr.vhd
203 add_file -vhdl -lib lpp ../../lib/lpp/./lpp_ad_Conv/lpp_ad_Conv.vhd
204 add_file -vhdl -lib lpp ../../lib/lpp/./lpp_ad_Conv/lpp_apb_ad_conv.vhd
205 add_file -vhdl -lib lpp ../../lib/lpp/./lpp_CNA_amba/APB_CNA.vhd
206 add_file -vhdl -lib lpp ../../lib/lpp/./lpp_CNA_amba/clock.vhd
207 add_file -vhdl -lib lpp ../../lib/lpp/./lpp_CNA_amba/CNA_TabloC.vhd
208 add_file -vhdl -lib lpp ../../lib/lpp/./lpp_CNA_amba/Convertisseur_config.vhd
209 add_file -vhdl -lib lpp ../../lib/lpp/./lpp_CNA_amba/GeneSYNC_flag.vhd
210 add_file -vhdl -lib lpp ../../lib/lpp/./lpp_CNA_amba/lpp_CNA_amba.vhd
211 add_file -vhdl -lib lpp ../../lib/lpp/./lpp_CNA_amba/Serialize.vhd
212 add_file -vhdl -lib lpp ../../lib/lpp/./lpp_uart/APB_UART.vhd
213 add_file -vhdl -lib lpp ../../lib/lpp/./lpp_uart/BaudGen.vhd
214 add_file -vhdl -lib lpp ../../lib/lpp/./lpp_uart/lpp_uart.vhd
215 add_file -vhdl -lib lpp ../../lib/lpp/./lpp_uart/Shift_REG.vhd
216 add_file -vhdl -lib lpp ../../lib/lpp/./lpp_uart/UART.vhd
217 add_file -vhdl -lib lpp ../../lib/lpp/./lpp_amba/APB_MULTI_DIODE.vhd
218 add_file -vhdl -lib lpp ../../lib/lpp/./lpp_amba/APB_SIMPLE_DIODE.vhd
219 add_file -vhdl -lib lpp ../../lib/lpp/./lpp_amba/lpp_amba.vhd
220 add_file -vhdl -lib lpp ../../lib/lpp/./dsp/iir_filter/APB_IIR_CEL.vhd
221 add_file -vhdl -lib lpp ../../lib/lpp/./dsp/iir_filter/FILTERcfg.vhd
222 add_file -vhdl -lib lpp ../../lib/lpp/./dsp/iir_filter/FilterCTRLR.vhd
223 add_file -vhdl -lib lpp ../../lib/lpp/./dsp/iir_filter/FILTER_RAM_CTRLR.vhd
224 add_file -vhdl -lib lpp ../../lib/lpp/./dsp/iir_filter/FILTER.vhd
225 add_file -vhdl -lib lpp ../../lib/lpp/./dsp/iir_filter/IIR_CEL_CTRLR.vhd
226 add_file -vhdl -lib lpp ../../lib/lpp/./dsp/iir_filter/IIR_CEL_FILTER.vhd
227 add_file -vhdl -lib lpp ../../lib/lpp/./dsp/iir_filter/iir_filter.vhd
228 add_file -vhdl -lib lpp ../../lib/lpp/./dsp/iir_filter/RAM_CEL.vhd
229 add_file -vhdl -lib lpp ../../lib/lpp/./dsp/iir_filter/RAM_CTRLR2.vhd
230 add_file -vhdl -lib lpp ../../lib/lpp/./dsp/iir_filter/RAM.vhd
231 add_file -vhdl -lib lpp ../../lib/lpp/./dsp/iir_filter/Top_Filtre_IIR.vhd
232 add_file -vhdl -lib lpp ../../lib/lpp/./amba_lcd_16x2_ctrlr/amba_lcd_16x2_ctrlr.vhd
233 add_file -vhdl -lib lpp ../../lib/lpp/./amba_lcd_16x2_ctrlr/apb_lcd_ctrlr.vhd
234 add_file -vhdl -lib lpp ../../lib/lpp/./amba_lcd_16x2_ctrlr/FRAME_CLK.vhd
235 add_file -vhdl -lib lpp ../../lib/lpp/./amba_lcd_16x2_ctrlr/LCD_16x2_CFG.vhd
236 add_file -vhdl -lib lpp ../../lib/lpp/./amba_lcd_16x2_ctrlr/LCD_16x2_DRVR.vhd
237 add_file -vhdl -lib lpp ../../lib/lpp/./amba_lcd_16x2_ctrlr/LCD_16x2_ENGINE.vhd
238 add_file -vhdl -lib lpp ../../lib/lpp/./amba_lcd_16x2_ctrlr/LCD_2x16_DRIVER.vhd
239 add_file -vhdl -lib lpp ../../lib/lpp/./amba_lcd_16x2_ctrlr/LCD_CLK_GENERATOR.vhd
240 add_file -vhdl -lib lpp ../../lib/lpp/./amba_lcd_16x2_ctrlr/Top_LCD.vhd
@@ -0,0 +1,303
1 vcom -quiet -93 -work grlib ../../lib/grlib/stdlib/version.vhd
2 vcom -quiet -93 -work grlib ../../lib/grlib/stdlib/config.vhd
3 vcom -quiet -93 -work grlib ../../lib/grlib/stdlib/stdlib.vhd
4 vcom -quiet -93 -work grlib ../../lib/grlib/stdlib/stdio.vhd
5 vcom -quiet -93 -work grlib ../../lib/grlib/stdlib/testlib.vhd
6 vcom -quiet -93 -work grlib ../../lib/grlib/util/util.vhd
7 vcom -quiet -93 -work grlib ../../lib/grlib/sparc/sparc.vhd
8 vcom -quiet -93 -work grlib ../../lib/grlib/sparc/sparc_disas.vhd
9 vcom -quiet -93 -work grlib ../../lib/grlib/sparc/cpu_disas.vhd
10 vcom -quiet -93 -work grlib ../../lib/grlib/modgen/multlib.vhd
11 vcom -quiet -93 -work grlib ../../lib/grlib/modgen/leaves.vhd
12 vcom -quiet -93 -work grlib ../../lib/grlib/amba/amba.vhd
13 vcom -quiet -93 -work grlib ../../lib/grlib/amba/devices.vhd
14 vcom -quiet -93 -work grlib ../../lib/grlib/amba/defmst.vhd
15 vcom -quiet -93 -work grlib ../../lib/grlib/amba/apbctrl.vhd
16 vcom -quiet -93 -work grlib ../../lib/grlib/amba/ahbctrl.vhd
17 vcom -quiet -93 -work grlib ../../lib/grlib/amba/dma2ahb_pkg.vhd
18 vcom -quiet -93 -work grlib ../../lib/grlib/amba/dma2ahb.vhd
19 vcom -quiet -93 -work grlib ../../lib/grlib/amba/dma2ahb_tp.vhd
20 vcom -quiet -93 -work grlib ../../lib/grlib/amba/amba_tp.vhd
21 vcom -quiet -93 -work grlib ../../lib/grlib/amba/at/at_pkg.vhd
22 vcom -quiet -93 -work grlib ../../lib/grlib/amba/at/at_ahb_mst_pkg.vhd
23 vcom -quiet -93 -work grlib ../../lib/grlib/amba/at/at_ahb_slv_pkg.vhd
24 vcom -quiet -93 -work grlib ../../lib/grlib/amba/at/at_util.vhd
25 vcom -quiet -93 -work grlib ../../lib/grlib/amba/at/at_ahb_mst.vhd
26 vcom -quiet -93 -work grlib ../../lib/grlib/amba/at/at_ahb_slv.vhd
27 vcom -quiet -93 -work grlib ../../lib/grlib/amba/at/at_ahbs.vhd
28 vcom -quiet -93 -work grlib ../../lib/grlib/amba/at/at_ahb_ctrl.vhd
29 vcom -quiet -93 -work unisim ../../lib/tech/unisim/ise/unisim_VPKG.vhd
30 vcom -quiet -93 -work unisim ../../lib/tech/unisim/ise/unisim_VCOMP.vhd
31 vcom -quiet -93 -work unisim ../../lib/tech/unisim/ise/simple_simprim.vhd
32 vcom -quiet -93 -work unisim ../../lib/tech/unisim/ise/unisim_VITAL.vhd
33 vcom -quiet -93 -work dw02 ../../lib/tech/dw02/comp/DW02_components.vhd
34 vcom -quiet -93 -work synplify ../../lib/synplify/sim/synplify.vhd
35 vcom -quiet -93 -work synplify ../../lib/synplify/sim/synattr.vhd
36 vcom -quiet -93 -work techmap ../../lib/techmap/gencomp/gencomp.vhd
37 vcom -quiet -93 -work techmap ../../lib/techmap/gencomp/netcomp.vhd
38 vcom -quiet -93 -work techmap ../../lib/techmap/inferred/memory_inferred.vhd
39 vcom -quiet -93 -work techmap ../../lib/techmap/inferred/ddr_inferred.vhd
40 vcom -quiet -93 -work techmap ../../lib/techmap/inferred/mul_inferred.vhd
41 vcom -quiet -93 -work techmap ../../lib/techmap/inferred/ddr_phy_inferred.vhd
42 vcom -quiet -93 -work techmap ../../lib/techmap/dw02/mul_dw_gen.vhd
43 vcom -quiet -93 -work techmap ../../lib/techmap/unisim/memory_unisim.vhd
44 vcom -quiet -93 -work techmap ../../lib/techmap/unisim/buffer_unisim.vhd
45 vcom -quiet -93 -work techmap ../../lib/techmap/unisim/pads_unisim.vhd
46 vcom -quiet -93 -work techmap ../../lib/techmap/unisim/clkgen_unisim.vhd
47 vcom -quiet -93 -work techmap ../../lib/techmap/unisim/tap_unisim.vhd
48 vcom -quiet -93 -work techmap ../../lib/techmap/unisim/ddr_unisim.vhd
49 vcom -quiet -93 -work techmap ../../lib/techmap/unisim/ddr_phy_unisim.vhd
50 vcom -quiet -93 -work techmap ../../lib/techmap/unisim/grspwc_unisim.vhd
51 vcom -quiet -93 -work techmap ../../lib/techmap/unisim/grspwc2_unisim.vhd
52 vcom -quiet -93 -work techmap ../../lib/techmap/unisim/grusbhc_unisim.vhd
53 vcom -quiet -93 -work techmap ../../lib/techmap/unisim/ssrctrl_unisim.vhd
54 vcom -quiet -93 -work techmap ../../lib/techmap/unisim/sysmon_unisim.vhd
55 vcom -quiet -93 -work techmap ../../lib/techmap/unisim/mul_unisim.vhd
56 vcom -quiet -93 -work techmap ../../lib/techmap/unisim/grfpw_0_unisim.vhd
57 vcom -quiet -93 -work techmap ../../lib/techmap/maps/allclkgen.vhd
58 vcom -quiet -93 -work techmap ../../lib/techmap/maps/allddr.vhd
59 vcom -quiet -93 -work techmap ../../lib/techmap/maps/allmem.vhd
60 vcom -quiet -93 -work techmap ../../lib/techmap/maps/allpads.vhd
61 vcom -quiet -93 -work techmap ../../lib/techmap/maps/alltap.vhd
62 vcom -quiet -93 -work techmap ../../lib/techmap/maps/clkgen.vhd
63 vcom -quiet -93 -work techmap ../../lib/techmap/maps/clkmux.vhd
64 vcom -quiet -93 -work techmap ../../lib/techmap/maps/clkand.vhd
65 vcom -quiet -93 -work techmap ../../lib/techmap/maps/ddr_ireg.vhd
66 vcom -quiet -93 -work techmap ../../lib/techmap/maps/ddr_oreg.vhd
67 vcom -quiet -93 -work techmap ../../lib/techmap/maps/ddrphy.vhd
68 vcom -quiet -93 -work techmap ../../lib/techmap/maps/syncram.vhd
69 vcom -quiet -93 -work techmap ../../lib/techmap/maps/syncram64.vhd
70 vcom -quiet -93 -work techmap ../../lib/techmap/maps/syncram_2p.vhd
71 vcom -quiet -93 -work techmap ../../lib/techmap/maps/syncram_dp.vhd
72 vcom -quiet -93 -work techmap ../../lib/techmap/maps/syncfifo.vhd
73 vcom -quiet -93 -work techmap ../../lib/techmap/maps/regfile_3p.vhd
74 vcom -quiet -93 -work techmap ../../lib/techmap/maps/tap.vhd
75 vcom -quiet -93 -work techmap ../../lib/techmap/maps/techbuf.vhd
76 vcom -quiet -93 -work techmap ../../lib/techmap/maps/nandtree.vhd
77 vcom -quiet -93 -work techmap ../../lib/techmap/maps/clkpad.vhd
78 vcom -quiet -93 -work techmap ../../lib/techmap/maps/clkpad_ds.vhd
79 vcom -quiet -93 -work techmap ../../lib/techmap/maps/inpad.vhd
80 vcom -quiet -93 -work techmap ../../lib/techmap/maps/inpad_ds.vhd
81 vcom -quiet -93 -work techmap ../../lib/techmap/maps/iodpad.vhd
82 vcom -quiet -93 -work techmap ../../lib/techmap/maps/iopad.vhd
83 vcom -quiet -93 -work techmap ../../lib/techmap/maps/iopad_ds.vhd
84 vcom -quiet -93 -work techmap ../../lib/techmap/maps/lvds_combo.vhd
85 vcom -quiet -93 -work techmap ../../lib/techmap/maps/odpad.vhd
86 vcom -quiet -93 -work techmap ../../lib/techmap/maps/outpad.vhd
87 vcom -quiet -93 -work techmap ../../lib/techmap/maps/outpad_ds.vhd
88 vcom -quiet -93 -work techmap ../../lib/techmap/maps/toutpad.vhd
89 vcom -quiet -93 -work techmap ../../lib/techmap/maps/skew_outpad.vhd
90 vcom -quiet -93 -work techmap ../../lib/techmap/maps/grspwc_net.vhd
91 vcom -quiet -93 -work techmap ../../lib/techmap/maps/grspwc2_net.vhd
92 vcom -quiet -93 -work techmap ../../lib/techmap/maps/grlfpw_net.vhd
93 vcom -quiet -93 -work techmap ../../lib/techmap/maps/grfpw_net.vhd
94 vcom -quiet -93 -work techmap ../../lib/techmap/maps/mul_61x61.vhd
95 vcom -quiet -93 -work techmap ../../lib/techmap/maps/cpu_disas_net.vhd
96 vcom -quiet -93 -work techmap ../../lib/techmap/maps/ringosc.vhd
97 vcom -quiet -93 -work techmap ../../lib/techmap/maps/system_monitor.vhd
98 vcom -quiet -93 -work techmap ../../lib/techmap/maps/grgates.vhd
99 vcom -quiet -93 -work techmap ../../lib/techmap/maps/inpad_ddr.vhd
100 vcom -quiet -93 -work techmap ../../lib/techmap/maps/outpad_ddr.vhd
101 vcom -quiet -93 -work techmap ../../lib/techmap/maps/iopad_ddr.vhd
102 vcom -quiet -93 -work techmap ../../lib/techmap/maps/syncram128bw.vhd
103 vcom -quiet -93 -work techmap ../../lib/techmap/maps/syncram128.vhd
104 vcom -quiet -93 -work techmap ../../lib/techmap/maps/syncram156bw.vhd
105 vcom -quiet -93 -work eth ../../lib/eth/comp/ethcomp.vhd
106 vcom -quiet -93 -work eth ../../lib/eth/core/greth_pkg.vhd
107 vcom -quiet -93 -work eth ../../lib/eth/core/eth_rstgen.vhd
108 vcom -quiet -93 -work eth ../../lib/eth/core/eth_ahb_mst.vhd
109 vcom -quiet -93 -work eth ../../lib/eth/core/greth_tx.vhd
110 vcom -quiet -93 -work eth ../../lib/eth/core/greth_rx.vhd
111 vcom -quiet -93 -work eth ../../lib/eth/core/grethc.vhd
112 vcom -quiet -93 -work eth ../../lib/eth/wrapper/greth_gen.vhd
113 vcom -quiet -93 -work eth ../../lib/eth/wrapper/greth_gbit_gen.vhd
114 vcom -quiet -93 -work gaisler ../../lib/gaisler/arith/arith.vhd
115 vcom -quiet -93 -work gaisler ../../lib/gaisler/arith/mul32.vhd
116 vcom -quiet -93 -work gaisler ../../lib/gaisler/arith/div32.vhd
117 vcom -quiet -93 -work gaisler ../../lib/gaisler/memctrl/memctrl.vhd
118 vcom -quiet -93 -work gaisler ../../lib/gaisler/memctrl/sdctrl.vhd
119 vcom -quiet -93 -work gaisler ../../lib/gaisler/memctrl/sdctrl64.vhd
120 vcom -quiet -93 -work gaisler ../../lib/gaisler/memctrl/sdmctrl.vhd
121 vcom -quiet -93 -work gaisler ../../lib/gaisler/memctrl/srctrl.vhd
122 vcom -quiet -93 -work gaisler ../../lib/gaisler/memctrl/spimctrl.vhd
123 vcom -quiet -93 -work gaisler ../../lib/gaisler/leon3/leon3.vhd
124 vcom -quiet -93 -work gaisler ../../lib/gaisler/leon3/mmuconfig.vhd
125 vcom -quiet -93 -work gaisler ../../lib/gaisler/leon3/mmuiface.vhd
126 vcom -quiet -93 -work gaisler ../../lib/gaisler/leon3/libmmu.vhd
127 vcom -quiet -93 -work gaisler ../../lib/gaisler/leon3/libiu.vhd
128 vcom -quiet -93 -work gaisler ../../lib/gaisler/leon3/libcache.vhd
129 vcom -quiet -93 -work gaisler ../../lib/gaisler/leon3/libproc3.vhd
130 vcom -quiet -93 -work gaisler ../../lib/gaisler/leon3/cachemem.vhd
131 vcom -quiet -93 -work gaisler ../../lib/gaisler/leon3/mmu_icache.vhd
132 vcom -quiet -93 -work gaisler ../../lib/gaisler/leon3/mmu_dcache.vhd
133 vcom -quiet -93 -work gaisler ../../lib/gaisler/leon3/mmu_acache.vhd
134 vcom -quiet -93 -work gaisler ../../lib/gaisler/leon3/mmutlbcam.vhd
135 vcom -quiet -93 -work gaisler ../../lib/gaisler/leon3/mmulrue.vhd
136 vcom -quiet -93 -work gaisler ../../lib/gaisler/leon3/mmulru.vhd
137 vcom -quiet -93 -work gaisler ../../lib/gaisler/leon3/mmutlb.vhd
138 vcom -quiet -93 -work gaisler ../../lib/gaisler/leon3/mmutw.vhd
139 vcom -quiet -93 -work gaisler ../../lib/gaisler/leon3/mmu.vhd
140 vcom -quiet -93 -work gaisler ../../lib/gaisler/leon3/mmu_cache.vhd
141 vcom -quiet -93 -work gaisler ../../lib/gaisler/leon3/cpu_disasx.vhd
142 vcom -quiet -93 -work gaisler ../../lib/gaisler/leon3/iu3.vhd
143 vcom -quiet -93 -work gaisler ../../lib/gaisler/leon3/grfpwx.vhd
144 vcom -quiet -93 -work gaisler ../../lib/gaisler/leon3/mfpwx.vhd
145 vcom -quiet -93 -work gaisler ../../lib/gaisler/leon3/grlfpwx.vhd
146 vcom -quiet -93 -work gaisler ../../lib/gaisler/leon3/tbufmem.vhd
147 vcom -quiet -93 -work gaisler ../../lib/gaisler/leon3/dsu3x.vhd
148 vcom -quiet -93 -work gaisler ../../lib/gaisler/leon3/dsu3.vhd
149 vcom -quiet -93 -work gaisler ../../lib/gaisler/leon3/proc3.vhd
150 vcom -quiet -93 -work gaisler ../../lib/gaisler/leon3/leon3s.vhd
151 vcom -quiet -93 -work gaisler ../../lib/gaisler/leon3/leon3cg.vhd
152 vcom -quiet -93 -work gaisler ../../lib/gaisler/leon3/irqmp.vhd
153 vcom -quiet -93 -work gaisler ../../lib/gaisler/leon3/grfpwxsh.vhd
154 vcom -quiet -93 -work gaisler ../../lib/gaisler/leon3/grfpushwx.vhd
155 vcom -quiet -93 -work gaisler ../../lib/gaisler/leon3/leon3sh.vhd
156 vcom -quiet -93 -work gaisler ../../lib/gaisler/misc/misc.vhd
157 vcom -quiet -93 -work gaisler ../../lib/gaisler/misc/rstgen.vhd
158 vcom -quiet -93 -work gaisler ../../lib/gaisler/misc/gptimer.vhd
159 vcom -quiet -93 -work gaisler ../../lib/gaisler/misc/ahbram.vhd
160 vcom -quiet -93 -work gaisler ../../lib/gaisler/misc/ahbdpram.vhd
161 vcom -quiet -93 -work gaisler ../../lib/gaisler/misc/ahbtrace.vhd
162 vcom -quiet -93 -work gaisler ../../lib/gaisler/misc/ahbtrace_mb.vhd
163 vcom -quiet -93 -work gaisler ../../lib/gaisler/misc/ahbmst.vhd
164 vcom -quiet -93 -work gaisler ../../lib/gaisler/misc/grgpio.vhd
165 vcom -quiet -93 -work gaisler ../../lib/gaisler/misc/ahbstat.vhd
166 vcom -quiet -93 -work gaisler ../../lib/gaisler/misc/logan.vhd
167 vcom -quiet -93 -work gaisler ../../lib/gaisler/misc/apbps2.vhd
168 vcom -quiet -93 -work gaisler ../../lib/gaisler/misc/charrom_package.vhd
169 vcom -quiet -93 -work gaisler ../../lib/gaisler/misc/charrom.vhd
170 vcom -quiet -93 -work gaisler ../../lib/gaisler/misc/apbvga.vhd
171 vcom -quiet -93 -work gaisler ../../lib/gaisler/misc/svgactrl.vhd
172 vcom -quiet -93 -work gaisler ../../lib/gaisler/misc/i2cmst_gen.vhd
173 vcom -quiet -93 -work gaisler ../../lib/gaisler/misc/spictrl.vhd
174 vcom -quiet -93 -work gaisler ../../lib/gaisler/misc/i2cslv.vhd
175 vcom -quiet -93 -work gaisler ../../lib/gaisler/misc/wild.vhd
176 vcom -quiet -93 -work gaisler ../../lib/gaisler/misc/wild2ahb.vhd
177 vcom -quiet -93 -work gaisler ../../lib/gaisler/misc/grsysmon.vhd
178 vcom -quiet -93 -work gaisler ../../lib/gaisler/misc/gracectrl.vhd
179 vcom -quiet -93 -work gaisler ../../lib/gaisler/misc/grgpreg.vhd
180 vcom -quiet -93 -work gaisler ../../lib/gaisler/misc/ahbmst2.vhd
181 vcom -quiet -93 -work gaisler ../../lib/gaisler/misc/ahb_mst_iface.vhd
182 vcom -quiet -93 -work gaisler ../../lib/gaisler/net/net.vhd
183 vcom -quiet -93 -work gaisler ../../lib/gaisler/uart/uart.vhd
184 vcom -quiet -93 -work gaisler ../../lib/gaisler/uart/libdcom.vhd
185 vcom -quiet -93 -work gaisler ../../lib/gaisler/uart/apbuart.vhd
186 vcom -quiet -93 -work gaisler ../../lib/gaisler/uart/dcom.vhd
187 vcom -quiet -93 -work gaisler ../../lib/gaisler/uart/dcom_uart.vhd
188 vcom -quiet -93 -work gaisler ../../lib/gaisler/uart/ahbuart.vhd
189 vlog -quiet -work gaisler ../../lib/gaisler/sim/i2c_slave_model.v
190 vcom -quiet -93 -work gaisler ../../lib/gaisler/sim/sim.vhd
191 vcom -quiet -93 -work gaisler ../../lib/gaisler/sim/sram.vhd
192 vcom -quiet -93 -work gaisler ../../lib/gaisler/sim/ata_device.vhd
193 vcom -quiet -93 -work gaisler ../../lib/gaisler/sim/sram16.vhd
194 vcom -quiet -93 -work gaisler ../../lib/gaisler/sim/phy.vhd
195 vcom -quiet -93 -work gaisler ../../lib/gaisler/sim/ahbrep.vhd
196 vcom -quiet -93 -work gaisler ../../lib/gaisler/sim/delay_wire.vhd
197 vcom -quiet -93 -work gaisler ../../lib/gaisler/sim/spi_flash.vhd
198 vcom -quiet -93 -work gaisler ../../lib/gaisler/sim/pwm_check.vhd
199 vcom -quiet -93 -work gaisler ../../lib/gaisler/sim/usbsim.vhd
200 vcom -quiet -93 -work gaisler ../../lib/gaisler/sim/grusbdcsim.vhd
201 vcom -quiet -93 -work gaisler ../../lib/gaisler/sim/grusb_dclsim.vhd
202 vcom -quiet -93 -work gaisler ../../lib/gaisler/jtag/jtag.vhd
203 vcom -quiet -93 -work gaisler ../../lib/gaisler/jtag/libjtagcom.vhd
204 vcom -quiet -93 -work gaisler ../../lib/gaisler/jtag/jtagcom.vhd
205 vcom -quiet -93 -work gaisler ../../lib/gaisler/jtag/ahbjtag.vhd
206 vcom -quiet -93 -work gaisler ../../lib/gaisler/jtag/ahbjtag_bsd.vhd
207 vcom -quiet -93 -work gaisler ../../lib/gaisler/jtag/jtagtst.vhd
208 vcom -quiet -93 -work gaisler ../../lib/gaisler/greth/ethernet_mac.vhd
209 vcom -quiet -93 -work gaisler ../../lib/gaisler/greth/greth.vhd
210 vcom -quiet -93 -work gaisler ../../lib/gaisler/greth/greth_gbit.vhd
211 vcom -quiet -93 -work gaisler ../../lib/gaisler/greth/grethm.vhd
212 vcom -quiet -93 -work gaisler ../../lib/gaisler/ddr/ddr_phy.vhd
213 vcom -quiet -93 -work gaisler ../../lib/gaisler/ddr/ddrsp16a.vhd
214 vcom -quiet -93 -work gaisler ../../lib/gaisler/ddr/ddrsp32a.vhd
215 vcom -quiet -93 -work gaisler ../../lib/gaisler/ddr/ddrsp64a.vhd
216 vcom -quiet -93 -work gaisler ../../lib/gaisler/ddr/ddrspa.vhd
217 vcom -quiet -93 -work gaisler ../../lib/gaisler/ddr/ddr2spa.vhd
218 vcom -quiet -93 -work gaisler ../../lib/gaisler/ddr/ddr2buf.vhd
219 vcom -quiet -93 -work gaisler ../../lib/gaisler/ddr/ddr2spax.vhd
220 vcom -quiet -93 -work gaisler ../../lib/gaisler/ddr/ddr2spax_ahb.vhd
221 vcom -quiet -93 -work gaisler ../../lib/gaisler/ddr/ddr2spax_ddr.vhd
222 vcom -quiet -93 -work esa ../../lib/esa/memoryctrl/memoryctrl.vhd
223 vcom -quiet -93 -work esa ../../lib/esa/memoryctrl/mctrl.vhd
224 vcom -quiet -93 -work fmf ../../lib/fmf/utilities/conversions.vhd
225 vcom -quiet -93 -work fmf ../../lib/fmf/utilities/gen_utils.vhd
226 vcom -quiet -93 -work fmf ../../lib/fmf/flash/flash.vhd
227 vcom -quiet -93 -work fmf ../../lib/fmf/flash/s25fl064a.vhd
228 vcom -quiet -93 -work fmf ../../lib/fmf/flash/m25p80.vhd
229 vcom -quiet -93 -work fmf ../../lib/fmf/fifo/idt7202.vhd
230 vcom -quiet -93 -work gsi ../../lib/gsi/ssram/functions.vhd
231 vcom -quiet -93 -work gsi ../../lib/gsi/ssram/core_burst.vhd
232 vcom -quiet -93 -work gsi ../../lib/gsi/ssram/g880e18bt.vhd
233 vcom -quiet -93 -work lpp ../../lib/lpp/./general_purpose/Adder.vhd
234 vcom -quiet -93 -work lpp ../../lib/lpp/./general_purpose/ADDRcntr.vhd
235 vcom -quiet -93 -work lpp ../../lib/lpp/./general_purpose/ALU.vhd
236 vcom -quiet -93 -work lpp ../../lib/lpp/./general_purpose/Clk_divider.vhd
237 vcom -quiet -93 -work lpp ../../lib/lpp/./general_purpose/general_purpose.vhd
238 vcom -quiet -93 -work lpp ../../lib/lpp/./general_purpose/MAC_CONTROLER.vhd
239 vcom -quiet -93 -work lpp ../../lib/lpp/./general_purpose/MAC_MUX2.vhd
240 vcom -quiet -93 -work lpp ../../lib/lpp/./general_purpose/MAC_MUX.vhd
241 vcom -quiet -93 -work lpp ../../lib/lpp/./general_purpose/MAC_REG.vhd
242 vcom -quiet -93 -work lpp ../../lib/lpp/./general_purpose/MAC.vhd
243 vcom -quiet -93 -work lpp ../../lib/lpp/./general_purpose/Multiplier.vhd
244 vcom -quiet -93 -work lpp ../../lib/lpp/./general_purpose/MUX2.vhd
245 vcom -quiet -93 -work lpp ../../lib/lpp/./general_purpose/REG.vhd
246 vcom -quiet -93 -work lpp ../../lib/lpp/./general_purpose/Shifter.vhd
247 vcom -quiet -93 -work lpp ../../lib/lpp/./lpp_ad_Conv/AD7688_drvr.vhd
248 vcom -quiet -93 -work lpp ../../lib/lpp/./lpp_ad_Conv/AD7688_spi_if.vhd
249 vcom -quiet -93 -work lpp ../../lib/lpp/./lpp_ad_Conv/ADS7886_drvr.vhd
250 vcom -quiet -93 -work lpp ../../lib/lpp/./lpp_ad_Conv/lpp_ad_Conv.vhd
251 vcom -quiet -93 -work lpp ../../lib/lpp/./lpp_ad_Conv/lpp_apb_ad_conv.vhd
252 vcom -quiet -93 -work lpp ../../lib/lpp/./lpp_CNA_amba/APB_CNA.vhd
253 vcom -quiet -93 -work lpp ../../lib/lpp/./lpp_CNA_amba/clock.vhd
254 vcom -quiet -93 -work lpp ../../lib/lpp/./lpp_CNA_amba/CNA_TabloC.vhd
255 vcom -quiet -93 -work lpp ../../lib/lpp/./lpp_CNA_amba/Convertisseur_config.vhd
256 vcom -quiet -93 -work lpp ../../lib/lpp/./lpp_CNA_amba/GeneSYNC_flag.vhd
257 vcom -quiet -93 -work lpp ../../lib/lpp/./lpp_CNA_amba/lpp_CNA_amba.vhd
258 vcom -quiet -93 -work lpp ../../lib/lpp/./lpp_CNA_amba/Serialize.vhd
259 vcom -quiet -93 -work lpp ../../lib/lpp/./lpp_uart/APB_UART.vhd
260 vcom -quiet -93 -work lpp ../../lib/lpp/./lpp_uart/BaudGen.vhd
261 vcom -quiet -93 -work lpp ../../lib/lpp/./lpp_uart/lpp_uart.vhd
262 vcom -quiet -93 -work lpp ../../lib/lpp/./lpp_uart/Shift_REG.vhd
263 vcom -quiet -93 -work lpp ../../lib/lpp/./lpp_uart/UART.vhd
264 vcom -quiet -93 -work lpp ../../lib/lpp/./lpp_amba/APB_MULTI_DIODE.vhd
265 vcom -quiet -93 -work lpp ../../lib/lpp/./lpp_amba/APB_SIMPLE_DIODE.vhd
266 vcom -quiet -93 -work lpp ../../lib/lpp/./lpp_amba/lpp_amba.vhd
267 vcom -quiet -93 -work lpp ../../lib/lpp/./dsp/iir_filter/APB_IIR_CEL.vhd
268 vcom -quiet -93 -work lpp ../../lib/lpp/./dsp/iir_filter/FILTERcfg.vhd
269 vcom -quiet -93 -work lpp ../../lib/lpp/./dsp/iir_filter/FilterCTRLR.vhd
270 vcom -quiet -93 -work lpp ../../lib/lpp/./dsp/iir_filter/FILTER_RAM_CTRLR.vhd
271 vcom -quiet -93 -work lpp ../../lib/lpp/./dsp/iir_filter/FILTER.vhd
272 vcom -quiet -93 -work lpp ../../lib/lpp/./dsp/iir_filter/IIR_CEL_CTRLR.vhd
273 vcom -quiet -93 -work lpp ../../lib/lpp/./dsp/iir_filter/IIR_CEL_FILTER.vhd
274 vcom -quiet -93 -work lpp ../../lib/lpp/./dsp/iir_filter/iir_filter.vhd
275 vcom -quiet -93 -work lpp ../../lib/lpp/./dsp/iir_filter/RAM_CEL.vhd
276 vcom -quiet -93 -work lpp ../../lib/lpp/./dsp/iir_filter/RAM_CTRLR2.vhd
277 vcom -quiet -93 -work lpp ../../lib/lpp/./dsp/iir_filter/RAM.vhd
278 vcom -quiet -93 -work lpp ../../lib/lpp/./dsp/iir_filter/Top_Filtre_IIR.vhd
279 vcom -quiet -93 -work lpp ../../lib/lpp/./amba_lcd_16x2_ctrlr/amba_lcd_16x2_ctrlr.vhd
280 vcom -quiet -93 -work lpp ../../lib/lpp/./amba_lcd_16x2_ctrlr/apb_lcd_ctrlr.vhd
281 vcom -quiet -93 -work lpp ../../lib/lpp/./amba_lcd_16x2_ctrlr/FRAME_CLK.vhd
282 vcom -quiet -93 -work lpp ../../lib/lpp/./amba_lcd_16x2_ctrlr/LCD_16x2_CFG.vhd
283 vcom -quiet -93 -work lpp ../../lib/lpp/./amba_lcd_16x2_ctrlr/LCD_16x2_DRVR.vhd
284 vcom -quiet -93 -work lpp ../../lib/lpp/./amba_lcd_16x2_ctrlr/LCD_16x2_ENGINE.vhd
285 vcom -quiet -93 -work lpp ../../lib/lpp/./amba_lcd_16x2_ctrlr/LCD_2x16_DRIVER.vhd
286 vcom -quiet -93 -work lpp ../../lib/lpp/./amba_lcd_16x2_ctrlr/LCD_CLK_GENERATOR.vhd
287 vcom -quiet -93 -work lpp ../../lib/lpp/./amba_lcd_16x2_ctrlr/Top_LCD.vhd
288 vcom -quiet -93 -work cypress ../../lib/cypress/ssram/components.vhd
289 vcom -quiet -93 -work cypress ../../lib/cypress/ssram/package_utility.vhd
290 vcom -quiet -93 -work cypress ../../lib/cypress/ssram/cy7c1354b.vhd
291 vcom -quiet -93 -work cypress ../../lib/cypress/ssram/cy7c1380d.vhd
292 vcom -quiet -93 -work hynix ../../lib/hynix/ddr2/HY5PS121621F_PACK.vhd
293 vcom -quiet -93 -work hynix ../../lib/hynix/ddr2/HY5PS121621F.vhd
294 vcom -quiet -93 -work hynix ../../lib/hynix/ddr2/components.vhd
295 vlog -quiet -work micron ../../lib/micron/sdram/mobile_sdr.v
296 vcom -quiet -93 -work micron ../../lib/micron/sdram/components.vhd
297 vcom -quiet -93 -work micron ../../lib/micron/sdram/mt48lc16m16a2.vhd
298 vlog -quiet -work micron ../../lib/micron/ddr/ddr2.v
299 vlog -quiet -work micron ../../lib/micron/ddr/mobile_ddr.v
300 vcom -quiet -93 -work micron ../../lib/micron/ddr/mt46v16m16.vhd
301 vcom -quiet -93 -work work ../../lib/work/debug/debug.vhd
302 vcom -quiet -93 -work work ../../lib/work/debug/grtestmod.vhd
303 vcom -quiet -93 -work work ../../lib/work/debug/cpu_disas.vhd
@@ -0,0 +1,240
1 elaborate -ifmt vhdl -work_lib grlib -ifn ../../lib/grlib/stdlib/version.vhd
2 elaborate -ifmt vhdl -work_lib grlib -ifn ../../lib/grlib/stdlib/config.vhd
3 elaborate -ifmt vhdl -work_lib grlib -ifn ../../lib/grlib/stdlib/stdlib.vhd
4 elaborate -ifmt vhdl -work_lib grlib -ifn ../../lib/grlib/sparc/sparc.vhd
5 elaborate -ifmt vhdl -work_lib grlib -ifn ../../lib/grlib/modgen/multlib.vhd
6 elaborate -ifmt vhdl -work_lib grlib -ifn ../../lib/grlib/modgen/leaves.vhd
7 elaborate -ifmt vhdl -work_lib grlib -ifn ../../lib/grlib/amba/amba.vhd
8 elaborate -ifmt vhdl -work_lib grlib -ifn ../../lib/grlib/amba/devices.vhd
9 elaborate -ifmt vhdl -work_lib grlib -ifn ../../lib/grlib/amba/defmst.vhd
10 elaborate -ifmt vhdl -work_lib grlib -ifn ../../lib/grlib/amba/apbctrl.vhd
11 elaborate -ifmt vhdl -work_lib grlib -ifn ../../lib/grlib/amba/ahbctrl.vhd
12 elaborate -ifmt vhdl -work_lib grlib -ifn ../../lib/grlib/amba/dma2ahb_pkg.vhd
13 elaborate -ifmt vhdl -work_lib grlib -ifn ../../lib/grlib/amba/dma2ahb.vhd
14 elaborate -ifmt vhdl -work_lib techmap -ifn ../../lib/techmap/gencomp/gencomp.vhd
15 elaborate -ifmt vhdl -work_lib techmap -ifn ../../lib/techmap/gencomp/netcomp.vhd
16 elaborate -ifmt vhdl -work_lib techmap -ifn ../../lib/techmap/inferred/memory_inferred.vhd
17 elaborate -ifmt vhdl -work_lib techmap -ifn ../../lib/techmap/inferred/ddr_inferred.vhd
18 elaborate -ifmt vhdl -work_lib techmap -ifn ../../lib/techmap/inferred/mul_inferred.vhd
19 elaborate -ifmt vhdl -work_lib techmap -ifn ../../lib/techmap/inferred/ddr_phy_inferred.vhd
20 elaborate -ifmt vhdl -work_lib techmap -ifn ../../lib/techmap/unisim/memory_unisim.vhd
21 elaborate -ifmt vhdl -work_lib techmap -ifn ../../lib/techmap/unisim/buffer_unisim.vhd
22 elaborate -ifmt vhdl -work_lib techmap -ifn ../../lib/techmap/unisim/pads_unisim.vhd
23 elaborate -ifmt vhdl -work_lib techmap -ifn ../../lib/techmap/unisim/clkgen_unisim.vhd
24 elaborate -ifmt vhdl -work_lib techmap -ifn ../../lib/techmap/unisim/tap_unisim.vhd
25 elaborate -ifmt vhdl -work_lib techmap -ifn ../../lib/techmap/unisim/ddr_unisim.vhd
26 elaborate -ifmt vhdl -work_lib techmap -ifn ../../lib/techmap/unisim/ddr_phy_unisim.vhd
27 elaborate -ifmt vhdl -work_lib techmap -ifn ../../lib/techmap/unisim/grspwc_unisim.vhd
28 elaborate -ifmt vhdl -work_lib techmap -ifn ../../lib/techmap/unisim/grspwc2_unisim.vhd
29 elaborate -ifmt vhdl -work_lib techmap -ifn ../../lib/techmap/unisim/grusbhc_unisim.vhd
30 elaborate -ifmt vhdl -work_lib techmap -ifn ../../lib/techmap/unisim/ssrctrl_unisim.vhd
31 elaborate -ifmt vhdl -work_lib techmap -ifn ../../lib/techmap/unisim/sysmon_unisim.vhd
32 elaborate -ifmt vhdl -work_lib techmap -ifn ../../lib/techmap/unisim/mul_unisim.vhd
33 elaborate -ifmt vhdl -work_lib techmap -ifn ../../lib/techmap/maps/allclkgen.vhd
34 elaborate -ifmt vhdl -work_lib techmap -ifn ../../lib/techmap/maps/allddr.vhd
35 elaborate -ifmt vhdl -work_lib techmap -ifn ../../lib/techmap/maps/allmem.vhd
36 elaborate -ifmt vhdl -work_lib techmap -ifn ../../lib/techmap/maps/allpads.vhd
37 elaborate -ifmt vhdl -work_lib techmap -ifn ../../lib/techmap/maps/alltap.vhd
38 elaborate -ifmt vhdl -work_lib techmap -ifn ../../lib/techmap/maps/clkgen.vhd
39 elaborate -ifmt vhdl -work_lib techmap -ifn ../../lib/techmap/maps/clkmux.vhd
40 elaborate -ifmt vhdl -work_lib techmap -ifn ../../lib/techmap/maps/clkand.vhd
41 elaborate -ifmt vhdl -work_lib techmap -ifn ../../lib/techmap/maps/ddr_ireg.vhd
42 elaborate -ifmt vhdl -work_lib techmap -ifn ../../lib/techmap/maps/ddr_oreg.vhd
43 elaborate -ifmt vhdl -work_lib techmap -ifn ../../lib/techmap/maps/ddrphy.vhd
44 elaborate -ifmt vhdl -work_lib techmap -ifn ../../lib/techmap/maps/syncram.vhd
45 elaborate -ifmt vhdl -work_lib techmap -ifn ../../lib/techmap/maps/syncram64.vhd
46 elaborate -ifmt vhdl -work_lib techmap -ifn ../../lib/techmap/maps/syncram_2p.vhd
47 elaborate -ifmt vhdl -work_lib techmap -ifn ../../lib/techmap/maps/syncram_dp.vhd
48 elaborate -ifmt vhdl -work_lib techmap -ifn ../../lib/techmap/maps/syncfifo.vhd
49 elaborate -ifmt vhdl -work_lib techmap -ifn ../../lib/techmap/maps/regfile_3p.vhd
50 elaborate -ifmt vhdl -work_lib techmap -ifn ../../lib/techmap/maps/tap.vhd
51 elaborate -ifmt vhdl -work_lib techmap -ifn ../../lib/techmap/maps/techbuf.vhd
52 elaborate -ifmt vhdl -work_lib techmap -ifn ../../lib/techmap/maps/nandtree.vhd
53 elaborate -ifmt vhdl -work_lib techmap -ifn ../../lib/techmap/maps/clkpad.vhd
54 elaborate -ifmt vhdl -work_lib techmap -ifn ../../lib/techmap/maps/clkpad_ds.vhd
55 elaborate -ifmt vhdl -work_lib techmap -ifn ../../lib/techmap/maps/inpad.vhd
56 elaborate -ifmt vhdl -work_lib techmap -ifn ../../lib/techmap/maps/inpad_ds.vhd
57 elaborate -ifmt vhdl -work_lib techmap -ifn ../../lib/techmap/maps/iodpad.vhd
58 elaborate -ifmt vhdl -work_lib techmap -ifn ../../lib/techmap/maps/iopad.vhd
59 elaborate -ifmt vhdl -work_lib techmap -ifn ../../lib/techmap/maps/iopad_ds.vhd
60 elaborate -ifmt vhdl -work_lib techmap -ifn ../../lib/techmap/maps/lvds_combo.vhd
61 elaborate -ifmt vhdl -work_lib techmap -ifn ../../lib/techmap/maps/odpad.vhd
62 elaborate -ifmt vhdl -work_lib techmap -ifn ../../lib/techmap/maps/outpad.vhd
63 elaborate -ifmt vhdl -work_lib techmap -ifn ../../lib/techmap/maps/outpad_ds.vhd
64 elaborate -ifmt vhdl -work_lib techmap -ifn ../../lib/techmap/maps/toutpad.vhd
65 elaborate -ifmt vhdl -work_lib techmap -ifn ../../lib/techmap/maps/skew_outpad.vhd
66 elaborate -ifmt vhdl -work_lib techmap -ifn ../../lib/techmap/maps/grspwc_net.vhd
67 elaborate -ifmt vhdl -work_lib techmap -ifn ../../lib/techmap/maps/grspwc2_net.vhd
68 elaborate -ifmt vhdl -work_lib techmap -ifn ../../lib/techmap/maps/grlfpw_net.vhd
69 elaborate -ifmt vhdl -work_lib techmap -ifn ../../lib/techmap/maps/grfpw_net.vhd
70 elaborate -ifmt vhdl -work_lib techmap -ifn ../../lib/techmap/maps/mul_61x61.vhd
71 elaborate -ifmt vhdl -work_lib techmap -ifn ../../lib/techmap/maps/cpu_disas_net.vhd
72 elaborate -ifmt vhdl -work_lib techmap -ifn ../../lib/techmap/maps/ringosc.vhd
73 elaborate -ifmt vhdl -work_lib techmap -ifn ../../lib/techmap/maps/system_monitor.vhd
74 elaborate -ifmt vhdl -work_lib techmap -ifn ../../lib/techmap/maps/grgates.vhd
75 elaborate -ifmt vhdl -work_lib techmap -ifn ../../lib/techmap/maps/inpad_ddr.vhd
76 elaborate -ifmt vhdl -work_lib techmap -ifn ../../lib/techmap/maps/outpad_ddr.vhd
77 elaborate -ifmt vhdl -work_lib techmap -ifn ../../lib/techmap/maps/iopad_ddr.vhd
78 elaborate -ifmt vhdl -work_lib techmap -ifn ../../lib/techmap/maps/syncram128bw.vhd
79 elaborate -ifmt vhdl -work_lib techmap -ifn ../../lib/techmap/maps/syncram128.vhd
80 elaborate -ifmt vhdl -work_lib techmap -ifn ../../lib/techmap/maps/syncram156bw.vhd
81 elaborate -ifmt vhdl -work_lib eth -ifn ../../lib/eth/comp/ethcomp.vhd
82 elaborate -ifmt vhdl -work_lib eth -ifn ../../lib/eth/core/greth_pkg.vhd
83 elaborate -ifmt vhdl -work_lib eth -ifn ../../lib/eth/core/eth_rstgen.vhd
84 elaborate -ifmt vhdl -work_lib eth -ifn ../../lib/eth/core/eth_ahb_mst.vhd
85 elaborate -ifmt vhdl -work_lib eth -ifn ../../lib/eth/core/greth_tx.vhd
86 elaborate -ifmt vhdl -work_lib eth -ifn ../../lib/eth/core/greth_rx.vhd
87 elaborate -ifmt vhdl -work_lib eth -ifn ../../lib/eth/core/grethc.vhd
88 elaborate -ifmt vhdl -work_lib eth -ifn ../../lib/eth/wrapper/greth_gen.vhd
89 elaborate -ifmt vhdl -work_lib eth -ifn ../../lib/eth/wrapper/greth_gbit_gen.vhd
90 elaborate -ifmt vhdl -work_lib gaisler -ifn ../../lib/gaisler/arith/arith.vhd
91 elaborate -ifmt vhdl -work_lib gaisler -ifn ../../lib/gaisler/arith/mul32.vhd
92 elaborate -ifmt vhdl -work_lib gaisler -ifn ../../lib/gaisler/arith/div32.vhd
93 elaborate -ifmt vhdl -work_lib gaisler -ifn ../../lib/gaisler/memctrl/memctrl.vhd
94 elaborate -ifmt vhdl -work_lib gaisler -ifn ../../lib/gaisler/memctrl/sdctrl.vhd
95 elaborate -ifmt vhdl -work_lib gaisler -ifn ../../lib/gaisler/memctrl/sdctrl64.vhd
96 elaborate -ifmt vhdl -work_lib gaisler -ifn ../../lib/gaisler/memctrl/sdmctrl.vhd
97 elaborate -ifmt vhdl -work_lib gaisler -ifn ../../lib/gaisler/memctrl/srctrl.vhd
98 elaborate -ifmt vhdl -work_lib gaisler -ifn ../../lib/gaisler/memctrl/spimctrl.vhd
99 elaborate -ifmt vhdl -work_lib gaisler -ifn ../../lib/gaisler/leon3/leon3.vhd
100 elaborate -ifmt vhdl -work_lib gaisler -ifn ../../lib/gaisler/leon3/mmuconfig.vhd
101 elaborate -ifmt vhdl -work_lib gaisler -ifn ../../lib/gaisler/leon3/mmuiface.vhd
102 elaborate -ifmt vhdl -work_lib gaisler -ifn ../../lib/gaisler/leon3/libmmu.vhd
103 elaborate -ifmt vhdl -work_lib gaisler -ifn ../../lib/gaisler/leon3/libiu.vhd
104 elaborate -ifmt vhdl -work_lib gaisler -ifn ../../lib/gaisler/leon3/libcache.vhd
105 elaborate -ifmt vhdl -work_lib gaisler -ifn ../../lib/gaisler/leon3/libproc3.vhd
106 elaborate -ifmt vhdl -work_lib gaisler -ifn ../../lib/gaisler/leon3/cachemem.vhd
107 elaborate -ifmt vhdl -work_lib gaisler -ifn ../../lib/gaisler/leon3/mmu_icache.vhd
108 elaborate -ifmt vhdl -work_lib gaisler -ifn ../../lib/gaisler/leon3/mmu_dcache.vhd
109 elaborate -ifmt vhdl -work_lib gaisler -ifn ../../lib/gaisler/leon3/mmu_acache.vhd
110 elaborate -ifmt vhdl -work_lib gaisler -ifn ../../lib/gaisler/leon3/mmutlbcam.vhd
111 elaborate -ifmt vhdl -work_lib gaisler -ifn ../../lib/gaisler/leon3/mmulrue.vhd
112 elaborate -ifmt vhdl -work_lib gaisler -ifn ../../lib/gaisler/leon3/mmulru.vhd
113 elaborate -ifmt vhdl -work_lib gaisler -ifn ../../lib/gaisler/leon3/mmutlb.vhd
114 elaborate -ifmt vhdl -work_lib gaisler -ifn ../../lib/gaisler/leon3/mmutw.vhd
115 elaborate -ifmt vhdl -work_lib gaisler -ifn ../../lib/gaisler/leon3/mmu.vhd
116 elaborate -ifmt vhdl -work_lib gaisler -ifn ../../lib/gaisler/leon3/mmu_cache.vhd
117 elaborate -ifmt vhdl -work_lib gaisler -ifn ../../lib/gaisler/leon3/cpu_disasx.vhd
118 elaborate -ifmt vhdl -work_lib gaisler -ifn ../../lib/gaisler/leon3/iu3.vhd
119 elaborate -ifmt vhdl -work_lib gaisler -ifn ../../lib/gaisler/leon3/grfpwx.vhd
120 elaborate -ifmt vhdl -work_lib gaisler -ifn ../../lib/gaisler/leon3/mfpwx.vhd
121 elaborate -ifmt vhdl -work_lib gaisler -ifn ../../lib/gaisler/leon3/grlfpwx.vhd
122 elaborate -ifmt vhdl -work_lib gaisler -ifn ../../lib/gaisler/leon3/tbufmem.vhd
123 elaborate -ifmt vhdl -work_lib gaisler -ifn ../../lib/gaisler/leon3/dsu3x.vhd
124 elaborate -ifmt vhdl -work_lib gaisler -ifn ../../lib/gaisler/leon3/dsu3.vhd
125 elaborate -ifmt vhdl -work_lib gaisler -ifn ../../lib/gaisler/leon3/proc3.vhd
126 elaborate -ifmt vhdl -work_lib gaisler -ifn ../../lib/gaisler/leon3/leon3s.vhd
127 elaborate -ifmt vhdl -work_lib gaisler -ifn ../../lib/gaisler/leon3/leon3cg.vhd
128 elaborate -ifmt vhdl -work_lib gaisler -ifn ../../lib/gaisler/leon3/irqmp.vhd
129 elaborate -ifmt vhdl -work_lib gaisler -ifn ../../lib/gaisler/leon3/grfpwxsh.vhd
130 elaborate -ifmt vhdl -work_lib gaisler -ifn ../../lib/gaisler/leon3/grfpushwx.vhd
131 elaborate -ifmt vhdl -work_lib gaisler -ifn ../../lib/gaisler/leon3/leon3sh.vhd
132 elaborate -ifmt vhdl -work_lib gaisler -ifn ../../lib/gaisler/misc/misc.vhd
133 elaborate -ifmt vhdl -work_lib gaisler -ifn ../../lib/gaisler/misc/rstgen.vhd
134 elaborate -ifmt vhdl -work_lib gaisler -ifn ../../lib/gaisler/misc/gptimer.vhd
135 elaborate -ifmt vhdl -work_lib gaisler -ifn ../../lib/gaisler/misc/ahbram.vhd
136 elaborate -ifmt vhdl -work_lib gaisler -ifn ../../lib/gaisler/misc/ahbdpram.vhd
137 elaborate -ifmt vhdl -work_lib gaisler -ifn ../../lib/gaisler/misc/ahbtrace.vhd
138 elaborate -ifmt vhdl -work_lib gaisler -ifn ../../lib/gaisler/misc/ahbtrace_mb.vhd
139 elaborate -ifmt vhdl -work_lib gaisler -ifn ../../lib/gaisler/misc/ahbmst.vhd
140 elaborate -ifmt vhdl -work_lib gaisler -ifn ../../lib/gaisler/misc/grgpio.vhd
141 elaborate -ifmt vhdl -work_lib gaisler -ifn ../../lib/gaisler/misc/ahbstat.vhd
142 elaborate -ifmt vhdl -work_lib gaisler -ifn ../../lib/gaisler/misc/logan.vhd
143 elaborate -ifmt vhdl -work_lib gaisler -ifn ../../lib/gaisler/misc/apbps2.vhd
144 elaborate -ifmt vhdl -work_lib gaisler -ifn ../../lib/gaisler/misc/charrom_package.vhd
145 elaborate -ifmt vhdl -work_lib gaisler -ifn ../../lib/gaisler/misc/charrom.vhd
146 elaborate -ifmt vhdl -work_lib gaisler -ifn ../../lib/gaisler/misc/apbvga.vhd
147 elaborate -ifmt vhdl -work_lib gaisler -ifn ../../lib/gaisler/misc/svgactrl.vhd
148 elaborate -ifmt vhdl -work_lib gaisler -ifn ../../lib/gaisler/misc/i2cmst_gen.vhd
149 elaborate -ifmt vhdl -work_lib gaisler -ifn ../../lib/gaisler/misc/spictrl.vhd
150 elaborate -ifmt vhdl -work_lib gaisler -ifn ../../lib/gaisler/misc/i2cslv.vhd
151 elaborate -ifmt vhdl -work_lib gaisler -ifn ../../lib/gaisler/misc/wild.vhd
152 elaborate -ifmt vhdl -work_lib gaisler -ifn ../../lib/gaisler/misc/wild2ahb.vhd
153 elaborate -ifmt vhdl -work_lib gaisler -ifn ../../lib/gaisler/misc/grsysmon.vhd
154 elaborate -ifmt vhdl -work_lib gaisler -ifn ../../lib/gaisler/misc/gracectrl.vhd
155 elaborate -ifmt vhdl -work_lib gaisler -ifn ../../lib/gaisler/misc/grgpreg.vhd
156 elaborate -ifmt vhdl -work_lib gaisler -ifn ../../lib/gaisler/misc/ahbmst2.vhd
157 elaborate -ifmt vhdl -work_lib gaisler -ifn ../../lib/gaisler/misc/ahb_mst_iface.vhd
158 elaborate -ifmt vhdl -work_lib gaisler -ifn ../../lib/gaisler/net/net.vhd
159 elaborate -ifmt vhdl -work_lib gaisler -ifn ../../lib/gaisler/uart/uart.vhd
160 elaborate -ifmt vhdl -work_lib gaisler -ifn ../../lib/gaisler/uart/libdcom.vhd
161 elaborate -ifmt vhdl -work_lib gaisler -ifn ../../lib/gaisler/uart/apbuart.vhd
162 elaborate -ifmt vhdl -work_lib gaisler -ifn ../../lib/gaisler/uart/dcom.vhd
163 elaborate -ifmt vhdl -work_lib gaisler -ifn ../../lib/gaisler/uart/dcom_uart.vhd
164 elaborate -ifmt vhdl -work_lib gaisler -ifn ../../lib/gaisler/uart/ahbuart.vhd
165 elaborate -ifmt vhdl -work_lib gaisler -ifn ../../lib/gaisler/jtag/jtag.vhd
166 elaborate -ifmt vhdl -work_lib gaisler -ifn ../../lib/gaisler/jtag/libjtagcom.vhd
167 elaborate -ifmt vhdl -work_lib gaisler -ifn ../../lib/gaisler/jtag/jtagcom.vhd
168 elaborate -ifmt vhdl -work_lib gaisler -ifn ../../lib/gaisler/jtag/ahbjtag.vhd
169 elaborate -ifmt vhdl -work_lib gaisler -ifn ../../lib/gaisler/jtag/ahbjtag_bsd.vhd
170 elaborate -ifmt vhdl -work_lib gaisler -ifn ../../lib/gaisler/greth/ethernet_mac.vhd
171 elaborate -ifmt vhdl -work_lib gaisler -ifn ../../lib/gaisler/greth/greth.vhd
172 elaborate -ifmt vhdl -work_lib gaisler -ifn ../../lib/gaisler/greth/greth_gbit.vhd
173 elaborate -ifmt vhdl -work_lib gaisler -ifn ../../lib/gaisler/greth/grethm.vhd
174 elaborate -ifmt vhdl -work_lib gaisler -ifn ../../lib/gaisler/ddr/ddr_phy.vhd
175 elaborate -ifmt vhdl -work_lib gaisler -ifn ../../lib/gaisler/ddr/ddrsp16a.vhd
176 elaborate -ifmt vhdl -work_lib gaisler -ifn ../../lib/gaisler/ddr/ddrsp32a.vhd
177 elaborate -ifmt vhdl -work_lib gaisler -ifn ../../lib/gaisler/ddr/ddrsp64a.vhd
178 elaborate -ifmt vhdl -work_lib gaisler -ifn ../../lib/gaisler/ddr/ddrspa.vhd
179 elaborate -ifmt vhdl -work_lib gaisler -ifn ../../lib/gaisler/ddr/ddr2spa.vhd
180 elaborate -ifmt vhdl -work_lib gaisler -ifn ../../lib/gaisler/ddr/ddr2buf.vhd
181 elaborate -ifmt vhdl -work_lib gaisler -ifn ../../lib/gaisler/ddr/ddr2spax.vhd
182 elaborate -ifmt vhdl -work_lib gaisler -ifn ../../lib/gaisler/ddr/ddr2spax_ahb.vhd
183 elaborate -ifmt vhdl -work_lib gaisler -ifn ../../lib/gaisler/ddr/ddr2spax_ddr.vhd
184 elaborate -ifmt vhdl -work_lib esa -ifn ../../lib/esa/memoryctrl/memoryctrl.vhd
185 elaborate -ifmt vhdl -work_lib esa -ifn ../../lib/esa/memoryctrl/mctrl.vhd
186 elaborate -ifmt vhdl -work_lib lpp -ifn ../../lib/lpp/./general_purpose/Adder.vhd
187 elaborate -ifmt vhdl -work_lib lpp -ifn ../../lib/lpp/./general_purpose/ADDRcntr.vhd
188 elaborate -ifmt vhdl -work_lib lpp -ifn ../../lib/lpp/./general_purpose/ALU.vhd
189 elaborate -ifmt vhdl -work_lib lpp -ifn ../../lib/lpp/./general_purpose/Clk_divider.vhd
190 elaborate -ifmt vhdl -work_lib lpp -ifn ../../lib/lpp/./general_purpose/general_purpose.vhd
191 elaborate -ifmt vhdl -work_lib lpp -ifn ../../lib/lpp/./general_purpose/MAC_CONTROLER.vhd
192 elaborate -ifmt vhdl -work_lib lpp -ifn ../../lib/lpp/./general_purpose/MAC_MUX2.vhd
193 elaborate -ifmt vhdl -work_lib lpp -ifn ../../lib/lpp/./general_purpose/MAC_MUX.vhd
194 elaborate -ifmt vhdl -work_lib lpp -ifn ../../lib/lpp/./general_purpose/MAC_REG.vhd
195 elaborate -ifmt vhdl -work_lib lpp -ifn ../../lib/lpp/./general_purpose/MAC.vhd
196 elaborate -ifmt vhdl -work_lib lpp -ifn ../../lib/lpp/./general_purpose/Multiplier.vhd
197 elaborate -ifmt vhdl -work_lib lpp -ifn ../../lib/lpp/./general_purpose/MUX2.vhd
198 elaborate -ifmt vhdl -work_lib lpp -ifn ../../lib/lpp/./general_purpose/REG.vhd
199 elaborate -ifmt vhdl -work_lib lpp -ifn ../../lib/lpp/./general_purpose/Shifter.vhd
200 elaborate -ifmt vhdl -work_lib lpp -ifn ../../lib/lpp/./lpp_ad_Conv/AD7688_drvr.vhd
201 elaborate -ifmt vhdl -work_lib lpp -ifn ../../lib/lpp/./lpp_ad_Conv/AD7688_spi_if.vhd
202 elaborate -ifmt vhdl -work_lib lpp -ifn ../../lib/lpp/./lpp_ad_Conv/ADS7886_drvr.vhd
203 elaborate -ifmt vhdl -work_lib lpp -ifn ../../lib/lpp/./lpp_ad_Conv/lpp_ad_Conv.vhd
204 elaborate -ifmt vhdl -work_lib lpp -ifn ../../lib/lpp/./lpp_ad_Conv/lpp_apb_ad_conv.vhd
205 elaborate -ifmt vhdl -work_lib lpp -ifn ../../lib/lpp/./lpp_CNA_amba/APB_CNA.vhd
206 elaborate -ifmt vhdl -work_lib lpp -ifn ../../lib/lpp/./lpp_CNA_amba/clock.vhd
207 elaborate -ifmt vhdl -work_lib lpp -ifn ../../lib/lpp/./lpp_CNA_amba/CNA_TabloC.vhd
208 elaborate -ifmt vhdl -work_lib lpp -ifn ../../lib/lpp/./lpp_CNA_amba/Convertisseur_config.vhd
209 elaborate -ifmt vhdl -work_lib lpp -ifn ../../lib/lpp/./lpp_CNA_amba/GeneSYNC_flag.vhd
210 elaborate -ifmt vhdl -work_lib lpp -ifn ../../lib/lpp/./lpp_CNA_amba/lpp_CNA_amba.vhd
211 elaborate -ifmt vhdl -work_lib lpp -ifn ../../lib/lpp/./lpp_CNA_amba/Serialize.vhd
212 elaborate -ifmt vhdl -work_lib lpp -ifn ../../lib/lpp/./lpp_uart/APB_UART.vhd
213 elaborate -ifmt vhdl -work_lib lpp -ifn ../../lib/lpp/./lpp_uart/BaudGen.vhd
214 elaborate -ifmt vhdl -work_lib lpp -ifn ../../lib/lpp/./lpp_uart/lpp_uart.vhd
215 elaborate -ifmt vhdl -work_lib lpp -ifn ../../lib/lpp/./lpp_uart/Shift_REG.vhd
216 elaborate -ifmt vhdl -work_lib lpp -ifn ../../lib/lpp/./lpp_uart/UART.vhd
217 elaborate -ifmt vhdl -work_lib lpp -ifn ../../lib/lpp/./lpp_amba/APB_MULTI_DIODE.vhd
218 elaborate -ifmt vhdl -work_lib lpp -ifn ../../lib/lpp/./lpp_amba/APB_SIMPLE_DIODE.vhd
219 elaborate -ifmt vhdl -work_lib lpp -ifn ../../lib/lpp/./lpp_amba/lpp_amba.vhd
220 elaborate -ifmt vhdl -work_lib lpp -ifn ../../lib/lpp/./dsp/iir_filter/APB_IIR_CEL.vhd
221 elaborate -ifmt vhdl -work_lib lpp -ifn ../../lib/lpp/./dsp/iir_filter/FILTERcfg.vhd
222 elaborate -ifmt vhdl -work_lib lpp -ifn ../../lib/lpp/./dsp/iir_filter/FilterCTRLR.vhd
223 elaborate -ifmt vhdl -work_lib lpp -ifn ../../lib/lpp/./dsp/iir_filter/FILTER_RAM_CTRLR.vhd
224 elaborate -ifmt vhdl -work_lib lpp -ifn ../../lib/lpp/./dsp/iir_filter/FILTER.vhd
225 elaborate -ifmt vhdl -work_lib lpp -ifn ../../lib/lpp/./dsp/iir_filter/IIR_CEL_CTRLR.vhd
226 elaborate -ifmt vhdl -work_lib lpp -ifn ../../lib/lpp/./dsp/iir_filter/IIR_CEL_FILTER.vhd
227 elaborate -ifmt vhdl -work_lib lpp -ifn ../../lib/lpp/./dsp/iir_filter/iir_filter.vhd
228 elaborate -ifmt vhdl -work_lib lpp -ifn ../../lib/lpp/./dsp/iir_filter/RAM_CEL.vhd
229 elaborate -ifmt vhdl -work_lib lpp -ifn ../../lib/lpp/./dsp/iir_filter/RAM_CTRLR2.vhd
230 elaborate -ifmt vhdl -work_lib lpp -ifn ../../lib/lpp/./dsp/iir_filter/RAM.vhd
231 elaborate -ifmt vhdl -work_lib lpp -ifn ../../lib/lpp/./dsp/iir_filter/Top_Filtre_IIR.vhd
232 elaborate -ifmt vhdl -work_lib lpp -ifn ../../lib/lpp/./amba_lcd_16x2_ctrlr/amba_lcd_16x2_ctrlr.vhd
233 elaborate -ifmt vhdl -work_lib lpp -ifn ../../lib/lpp/./amba_lcd_16x2_ctrlr/apb_lcd_ctrlr.vhd
234 elaborate -ifmt vhdl -work_lib lpp -ifn ../../lib/lpp/./amba_lcd_16x2_ctrlr/FRAME_CLK.vhd
235 elaborate -ifmt vhdl -work_lib lpp -ifn ../../lib/lpp/./amba_lcd_16x2_ctrlr/LCD_16x2_CFG.vhd
236 elaborate -ifmt vhdl -work_lib lpp -ifn ../../lib/lpp/./amba_lcd_16x2_ctrlr/LCD_16x2_DRVR.vhd
237 elaborate -ifmt vhdl -work_lib lpp -ifn ../../lib/lpp/./amba_lcd_16x2_ctrlr/LCD_16x2_ENGINE.vhd
238 elaborate -ifmt vhdl -work_lib lpp -ifn ../../lib/lpp/./amba_lcd_16x2_ctrlr/LCD_2x16_DRIVER.vhd
239 elaborate -ifmt vhdl -work_lib lpp -ifn ../../lib/lpp/./amba_lcd_16x2_ctrlr/LCD_CLK_GENERATOR.vhd
240 elaborate -ifmt vhdl -work_lib lpp -ifn ../../lib/lpp/./amba_lcd_16x2_ctrlr/Top_LCD.vhd
@@ -0,0 +1,1
1 -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler -Pgnu/esa -Pgnu/#nasa -Pgnu/gleichmann -Pgnu/fmf -Pgnu/spansion -Pgnu/gsi -Pgnu/lpp -Pgnu/cypress -Pgnu/hynix -Pgnu/micron -Pgnu/openchip -Pgnu/work
1 NO CONTENT: new file 100644
NO CONTENT: new file 100644
@@ -0,0 +1,8
1 #QUARTUS_VERSION = "4.1"
2 #DATE = "17:39:37 December 03, 2004"
3
4
5 # Revisions
6
7
8 PROJECT_REVISION = leon3mp
@@ -0,0 +1,241
1 # Project-Wide Assignments
2 # ========================
3 #set_global_assignment -name ORIGINAL_QUARTUS_VERSION "4.1 SP2"
4 #set_global_assignment -name PROJECT_CREATION_TIME_DATE "16:13:08 DECEMBER 01, 2004"
5
6 # Explicitly disable TimeQuest since the GRLIB flow invokes the classical
7 # timing analyzer and USE_TIMEQUEST_TIMING_ANALYZER defaults to "ON"
8 # set_global_assignment -name USE_TIMEQUEST_TIMING_ANALYZER "OFF"
9
10 set_global_assignment -name VHDL_FILE ../../lib/grlib/stdlib/version.vhd -library grlib
11 set_global_assignment -name VHDL_FILE ../../lib/grlib/stdlib/config.vhd -library grlib
12 set_global_assignment -name VHDL_FILE ../../lib/grlib/stdlib/stdlib.vhd -library grlib
13 set_global_assignment -name VHDL_FILE ../../lib/grlib/sparc/sparc.vhd -library grlib
14 set_global_assignment -name VHDL_FILE ../../lib/grlib/modgen/multlib.vhd -library grlib
15 set_global_assignment -name VHDL_FILE ../../lib/grlib/modgen/leaves.vhd -library grlib
16 set_global_assignment -name VHDL_FILE ../../lib/grlib/amba/amba.vhd -library grlib
17 set_global_assignment -name VHDL_FILE ../../lib/grlib/amba/devices.vhd -library grlib
18 set_global_assignment -name VHDL_FILE ../../lib/grlib/amba/defmst.vhd -library grlib
19 set_global_assignment -name VHDL_FILE ../../lib/grlib/amba/apbctrl.vhd -library grlib
20 set_global_assignment -name VHDL_FILE ../../lib/grlib/amba/ahbctrl.vhd -library grlib
21 set_global_assignment -name VHDL_FILE ../../lib/grlib/amba/dma2ahb_pkg.vhd -library grlib
22 set_global_assignment -name VHDL_FILE ../../lib/grlib/amba/dma2ahb.vhd -library grlib
23 set_global_assignment -name VHDL_FILE ../../lib/techmap/gencomp/gencomp.vhd -library techmap
24 set_global_assignment -name VHDL_FILE ../../lib/techmap/gencomp/netcomp.vhd -library techmap
25 set_global_assignment -name VHDL_FILE ../../lib/techmap/inferred/memory_inferred.vhd -library techmap
26 set_global_assignment -name VHDL_FILE ../../lib/techmap/inferred/ddr_inferred.vhd -library techmap
27 set_global_assignment -name VHDL_FILE ../../lib/techmap/inferred/mul_inferred.vhd -library techmap
28 set_global_assignment -name VHDL_FILE ../../lib/techmap/inferred/ddr_phy_inferred.vhd -library techmap
29 set_global_assignment -name VHDL_FILE ../../lib/techmap/maps/allclkgen.vhd -library techmap
30 set_global_assignment -name VHDL_FILE ../../lib/techmap/maps/allddr.vhd -library techmap
31 set_global_assignment -name VHDL_FILE ../../lib/techmap/maps/allmem.vhd -library techmap
32 set_global_assignment -name VHDL_FILE ../../lib/techmap/maps/allpads.vhd -library techmap
33 set_global_assignment -name VHDL_FILE ../../lib/techmap/maps/alltap.vhd -library techmap
34 set_global_assignment -name VHDL_FILE ../../lib/techmap/maps/clkgen.vhd -library techmap
35 set_global_assignment -name VHDL_FILE ../../lib/techmap/maps/clkmux.vhd -library techmap
36 set_global_assignment -name VHDL_FILE ../../lib/techmap/maps/clkand.vhd -library techmap
37 set_global_assignment -name VHDL_FILE ../../lib/techmap/maps/ddr_ireg.vhd -library techmap
38 set_global_assignment -name VHDL_FILE ../../lib/techmap/maps/ddr_oreg.vhd -library techmap
39 set_global_assignment -name VHDL_FILE ../../lib/techmap/maps/ddrphy.vhd -library techmap
40 set_global_assignment -name VHDL_FILE ../../lib/techmap/maps/syncram.vhd -library techmap
41 set_global_assignment -name VHDL_FILE ../../lib/techmap/maps/syncram64.vhd -library techmap
42 set_global_assignment -name VHDL_FILE ../../lib/techmap/maps/syncram_2p.vhd -library techmap
43 set_global_assignment -name VHDL_FILE ../../lib/techmap/maps/syncram_dp.vhd -library techmap
44 set_global_assignment -name VHDL_FILE ../../lib/techmap/maps/syncfifo.vhd -library techmap
45 set_global_assignment -name VHDL_FILE ../../lib/techmap/maps/regfile_3p.vhd -library techmap
46 set_global_assignment -name VHDL_FILE ../../lib/techmap/maps/tap.vhd -library techmap
47 set_global_assignment -name VHDL_FILE ../../lib/techmap/maps/techbuf.vhd -library techmap
48 set_global_assignment -name VHDL_FILE ../../lib/techmap/maps/nandtree.vhd -library techmap
49 set_global_assignment -name VHDL_FILE ../../lib/techmap/maps/clkpad.vhd -library techmap
50 set_global_assignment -name VHDL_FILE ../../lib/techmap/maps/clkpad_ds.vhd -library techmap
51 set_global_assignment -name VHDL_FILE ../../lib/techmap/maps/inpad.vhd -library techmap
52 set_global_assignment -name VHDL_FILE ../../lib/techmap/maps/inpad_ds.vhd -library techmap
53 set_global_assignment -name VHDL_FILE ../../lib/techmap/maps/iodpad.vhd -library techmap
54 set_global_assignment -name VHDL_FILE ../../lib/techmap/maps/iopad.vhd -library techmap
55 set_global_assignment -name VHDL_FILE ../../lib/techmap/maps/iopad_ds.vhd -library techmap
56 set_global_assignment -name VHDL_FILE ../../lib/techmap/maps/lvds_combo.vhd -library techmap
57 set_global_assignment -name VHDL_FILE ../../lib/techmap/maps/odpad.vhd -library techmap
58 set_global_assignment -name VHDL_FILE ../../lib/techmap/maps/outpad.vhd -library techmap
59 set_global_assignment -name VHDL_FILE ../../lib/techmap/maps/outpad_ds.vhd -library techmap
60 set_global_assignment -name VHDL_FILE ../../lib/techmap/maps/toutpad.vhd -library techmap
61 set_global_assignment -name VHDL_FILE ../../lib/techmap/maps/skew_outpad.vhd -library techmap
62 set_global_assignment -name VHDL_FILE ../../lib/techmap/maps/grspwc_net.vhd -library techmap
63 set_global_assignment -name VHDL_FILE ../../lib/techmap/maps/grspwc2_net.vhd -library techmap
64 set_global_assignment -name VHDL_FILE ../../lib/techmap/maps/grlfpw_net.vhd -library techmap
65 set_global_assignment -name VHDL_FILE ../../lib/techmap/maps/grfpw_net.vhd -library techmap
66 set_global_assignment -name VHDL_FILE ../../lib/techmap/maps/mul_61x61.vhd -library techmap
67 set_global_assignment -name VHDL_FILE ../../lib/techmap/maps/cpu_disas_net.vhd -library techmap
68 set_global_assignment -name VHDL_FILE ../../lib/techmap/maps/ringosc.vhd -library techmap
69 set_global_assignment -name VHDL_FILE ../../lib/techmap/maps/system_monitor.vhd -library techmap
70 set_global_assignment -name VHDL_FILE ../../lib/techmap/maps/grgates.vhd -library techmap
71 set_global_assignment -name VHDL_FILE ../../lib/techmap/maps/inpad_ddr.vhd -library techmap
72 set_global_assignment -name VHDL_FILE ../../lib/techmap/maps/outpad_ddr.vhd -library techmap
73 set_global_assignment -name VHDL_FILE ../../lib/techmap/maps/iopad_ddr.vhd -library techmap
74 set_global_assignment -name VHDL_FILE ../../lib/techmap/maps/syncram128bw.vhd -library techmap
75 set_global_assignment -name VHDL_FILE ../../lib/techmap/maps/syncram128.vhd -library techmap
76 set_global_assignment -name VHDL_FILE ../../lib/techmap/maps/syncram156bw.vhd -library techmap
77 set_global_assignment -name VHDL_FILE ../../lib/eth/comp/ethcomp.vhd -library eth
78 set_global_assignment -name VHDL_FILE ../../lib/eth/core/greth_pkg.vhd -library eth
79 set_global_assignment -name VHDL_FILE ../../lib/eth/core/eth_rstgen.vhd -library eth
80 set_global_assignment -name VHDL_FILE ../../lib/eth/core/eth_ahb_mst.vhd -library eth
81 set_global_assignment -name VHDL_FILE ../../lib/eth/core/greth_tx.vhd -library eth
82 set_global_assignment -name VHDL_FILE ../../lib/eth/core/greth_rx.vhd -library eth
83 set_global_assignment -name VHDL_FILE ../../lib/eth/core/grethc.vhd -library eth
84 set_global_assignment -name VHDL_FILE ../../lib/eth/wrapper/greth_gen.vhd -library eth
85 set_global_assignment -name VHDL_FILE ../../lib/eth/wrapper/greth_gbit_gen.vhd -library eth
86 set_global_assignment -name VHDL_FILE ../../lib/gaisler/arith/arith.vhd -library gaisler
87 set_global_assignment -name VHDL_FILE ../../lib/gaisler/arith/mul32.vhd -library gaisler
88 set_global_assignment -name VHDL_FILE ../../lib/gaisler/arith/div32.vhd -library gaisler
89 set_global_assignment -name VHDL_FILE ../../lib/gaisler/memctrl/memctrl.vhd -library gaisler
90 set_global_assignment -name VHDL_FILE ../../lib/gaisler/memctrl/sdctrl.vhd -library gaisler
91 set_global_assignment -name VHDL_FILE ../../lib/gaisler/memctrl/sdctrl64.vhd -library gaisler
92 set_global_assignment -name VHDL_FILE ../../lib/gaisler/memctrl/sdmctrl.vhd -library gaisler
93 set_global_assignment -name VHDL_FILE ../../lib/gaisler/memctrl/srctrl.vhd -library gaisler
94 set_global_assignment -name VHDL_FILE ../../lib/gaisler/memctrl/spimctrl.vhd -library gaisler
95 set_global_assignment -name VHDL_FILE ../../lib/gaisler/leon3/leon3.vhd -library gaisler
96 set_global_assignment -name VHDL_FILE ../../lib/gaisler/leon3/mmuconfig.vhd -library gaisler
97 set_global_assignment -name VHDL_FILE ../../lib/gaisler/leon3/mmuiface.vhd -library gaisler
98 set_global_assignment -name VHDL_FILE ../../lib/gaisler/leon3/libmmu.vhd -library gaisler
99 set_global_assignment -name VHDL_FILE ../../lib/gaisler/leon3/libiu.vhd -library gaisler
100 set_global_assignment -name VHDL_FILE ../../lib/gaisler/leon3/libcache.vhd -library gaisler
101 set_global_assignment -name VHDL_FILE ../../lib/gaisler/leon3/libproc3.vhd -library gaisler
102 set_global_assignment -name VHDL_FILE ../../lib/gaisler/leon3/cachemem.vhd -library gaisler
103 set_global_assignment -name VHDL_FILE ../../lib/gaisler/leon3/mmu_icache.vhd -library gaisler
104 set_global_assignment -name VHDL_FILE ../../lib/gaisler/leon3/mmu_dcache.vhd -library gaisler
105 set_global_assignment -name VHDL_FILE ../../lib/gaisler/leon3/mmu_acache.vhd -library gaisler
106 set_global_assignment -name VHDL_FILE ../../lib/gaisler/leon3/mmutlbcam.vhd -library gaisler
107 set_global_assignment -name VHDL_FILE ../../lib/gaisler/leon3/mmulrue.vhd -library gaisler
108 set_global_assignment -name VHDL_FILE ../../lib/gaisler/leon3/mmulru.vhd -library gaisler
109 set_global_assignment -name VHDL_FILE ../../lib/gaisler/leon3/mmutlb.vhd -library gaisler
110 set_global_assignment -name VHDL_FILE ../../lib/gaisler/leon3/mmutw.vhd -library gaisler
111 set_global_assignment -name VHDL_FILE ../../lib/gaisler/leon3/mmu.vhd -library gaisler
112 set_global_assignment -name VHDL_FILE ../../lib/gaisler/leon3/mmu_cache.vhd -library gaisler
113 set_global_assignment -name VHDL_FILE ../../lib/gaisler/leon3/cpu_disasx.vhd -library gaisler
114 set_global_assignment -name VHDL_FILE ../../lib/gaisler/leon3/iu3.vhd -library gaisler
115 set_global_assignment -name VHDL_FILE ../../lib/gaisler/leon3/grfpwx.vhd -library gaisler
116 set_global_assignment -name VHDL_FILE ../../lib/gaisler/leon3/mfpwx.vhd -library gaisler
117 set_global_assignment -name VHDL_FILE ../../lib/gaisler/leon3/grlfpwx.vhd -library gaisler
118 set_global_assignment -name VHDL_FILE ../../lib/gaisler/leon3/tbufmem.vhd -library gaisler
119 set_global_assignment -name VHDL_FILE ../../lib/gaisler/leon3/dsu3x.vhd -library gaisler
120 set_global_assignment -name VHDL_FILE ../../lib/gaisler/leon3/dsu3.vhd -library gaisler
121 set_global_assignment -name VHDL_FILE ../../lib/gaisler/leon3/proc3.vhd -library gaisler
122 set_global_assignment -name VHDL_FILE ../../lib/gaisler/leon3/leon3s.vhd -library gaisler
123 set_global_assignment -name VHDL_FILE ../../lib/gaisler/leon3/leon3cg.vhd -library gaisler
124 set_global_assignment -name VHDL_FILE ../../lib/gaisler/leon3/irqmp.vhd -library gaisler
125 set_global_assignment -name VHDL_FILE ../../lib/gaisler/leon3/grfpwxsh.vhd -library gaisler
126 set_global_assignment -name VHDL_FILE ../../lib/gaisler/leon3/grfpushwx.vhd -library gaisler
127 set_global_assignment -name VHDL_FILE ../../lib/gaisler/leon3/leon3sh.vhd -library gaisler
128 set_global_assignment -name VHDL_FILE ../../lib/gaisler/misc/misc.vhd -library gaisler
129 set_global_assignment -name VHDL_FILE ../../lib/gaisler/misc/rstgen.vhd -library gaisler
130 set_global_assignment -name VHDL_FILE ../../lib/gaisler/misc/gptimer.vhd -library gaisler
131 set_global_assignment -name VHDL_FILE ../../lib/gaisler/misc/ahbram.vhd -library gaisler
132 set_global_assignment -name VHDL_FILE ../../lib/gaisler/misc/ahbdpram.vhd -library gaisler
133 set_global_assignment -name VHDL_FILE ../../lib/gaisler/misc/ahbtrace.vhd -library gaisler
134 set_global_assignment -name VHDL_FILE ../../lib/gaisler/misc/ahbtrace_mb.vhd -library gaisler
135 set_global_assignment -name VHDL_FILE ../../lib/gaisler/misc/ahbmst.vhd -library gaisler
136 set_global_assignment -name VHDL_FILE ../../lib/gaisler/misc/grgpio.vhd -library gaisler
137 set_global_assignment -name VHDL_FILE ../../lib/gaisler/misc/ahbstat.vhd -library gaisler
138 set_global_assignment -name VHDL_FILE ../../lib/gaisler/misc/logan.vhd -library gaisler
139 set_global_assignment -name VHDL_FILE ../../lib/gaisler/misc/apbps2.vhd -library gaisler
140 set_global_assignment -name VHDL_FILE ../../lib/gaisler/misc/charrom_package.vhd -library gaisler
141 set_global_assignment -name VHDL_FILE ../../lib/gaisler/misc/charrom.vhd -library gaisler
142 set_global_assignment -name VHDL_FILE ../../lib/gaisler/misc/apbvga.vhd -library gaisler
143 set_global_assignment -name VHDL_FILE ../../lib/gaisler/misc/svgactrl.vhd -library gaisler
144 set_global_assignment -name VHDL_FILE ../../lib/gaisler/misc/i2cmst_gen.vhd -library gaisler
145 set_global_assignment -name VHDL_FILE ../../lib/gaisler/misc/spictrl.vhd -library gaisler
146 set_global_assignment -name VHDL_FILE ../../lib/gaisler/misc/i2cslv.vhd -library gaisler
147 set_global_assignment -name VHDL_FILE ../../lib/gaisler/misc/wild.vhd -library gaisler
148 set_global_assignment -name VHDL_FILE ../../lib/gaisler/misc/wild2ahb.vhd -library gaisler
149 set_global_assignment -name VHDL_FILE ../../lib/gaisler/misc/grsysmon.vhd -library gaisler
150 set_global_assignment -name VHDL_FILE ../../lib/gaisler/misc/gracectrl.vhd -library gaisler
151 set_global_assignment -name VHDL_FILE ../../lib/gaisler/misc/grgpreg.vhd -library gaisler
152 set_global_assignment -name VHDL_FILE ../../lib/gaisler/misc/ahbmst2.vhd -library gaisler
153 set_global_assignment -name VHDL_FILE ../../lib/gaisler/misc/ahb_mst_iface.vhd -library gaisler
154 set_global_assignment -name VHDL_FILE ../../lib/gaisler/net/net.vhd -library gaisler
155 set_global_assignment -name VHDL_FILE ../../lib/gaisler/uart/uart.vhd -library gaisler
156 set_global_assignment -name VHDL_FILE ../../lib/gaisler/uart/libdcom.vhd -library gaisler
157 set_global_assignment -name VHDL_FILE ../../lib/gaisler/uart/apbuart.vhd -library gaisler
158 set_global_assignment -name VHDL_FILE ../../lib/gaisler/uart/dcom.vhd -library gaisler
159 set_global_assignment -name VHDL_FILE ../../lib/gaisler/uart/dcom_uart.vhd -library gaisler
160 set_global_assignment -name VHDL_FILE ../../lib/gaisler/uart/ahbuart.vhd -library gaisler
161 set_global_assignment -name VHDL_FILE ../../lib/gaisler/jtag/jtag.vhd -library gaisler
162 set_global_assignment -name VHDL_FILE ../../lib/gaisler/jtag/libjtagcom.vhd -library gaisler
163 set_global_assignment -name VHDL_FILE ../../lib/gaisler/jtag/jtagcom.vhd -library gaisler
164 set_global_assignment -name VHDL_FILE ../../lib/gaisler/jtag/ahbjtag.vhd -library gaisler
165 set_global_assignment -name VHDL_FILE ../../lib/gaisler/jtag/ahbjtag_bsd.vhd -library gaisler
166 set_global_assignment -name VHDL_FILE ../../lib/gaisler/greth/ethernet_mac.vhd -library gaisler
167 set_global_assignment -name VHDL_FILE ../../lib/gaisler/greth/greth.vhd -library gaisler
168 set_global_assignment -name VHDL_FILE ../../lib/gaisler/greth/greth_gbit.vhd -library gaisler
169 set_global_assignment -name VHDL_FILE ../../lib/gaisler/greth/grethm.vhd -library gaisler
170 set_global_assignment -name VHDL_FILE ../../lib/gaisler/ddr/ddr_phy.vhd -library gaisler
171 set_global_assignment -name VHDL_FILE ../../lib/gaisler/ddr/ddrsp16a.vhd -library gaisler
172 set_global_assignment -name VHDL_FILE ../../lib/gaisler/ddr/ddrsp32a.vhd -library gaisler
173 set_global_assignment -name VHDL_FILE ../../lib/gaisler/ddr/ddrsp64a.vhd -library gaisler
174 set_global_assignment -name VHDL_FILE ../../lib/gaisler/ddr/ddrspa.vhd -library gaisler
175 set_global_assignment -name VHDL_FILE ../../lib/gaisler/ddr/ddr2spa.vhd -library gaisler
176 set_global_assignment -name VHDL_FILE ../../lib/gaisler/ddr/ddr2buf.vhd -library gaisler
177 set_global_assignment -name VHDL_FILE ../../lib/gaisler/ddr/ddr2spax.vhd -library gaisler
178 set_global_assignment -name VHDL_FILE ../../lib/gaisler/ddr/ddr2spax_ahb.vhd -library gaisler
179 set_global_assignment -name VHDL_FILE ../../lib/gaisler/ddr/ddr2spax_ddr.vhd -library gaisler
180 set_global_assignment -name VHDL_FILE ../../lib/esa/memoryctrl/memoryctrl.vhd -library esa
181 set_global_assignment -name VHDL_FILE ../../lib/esa/memoryctrl/mctrl.vhd -library esa
182 set_global_assignment -name VHDL_FILE ../../lib/lpp/./general_purpose/Adder.vhd -library lpp
183 set_global_assignment -name VHDL_FILE ../../lib/lpp/./general_purpose/ADDRcntr.vhd -library lpp
184 set_global_assignment -name VHDL_FILE ../../lib/lpp/./general_purpose/ALU.vhd -library lpp
185 set_global_assignment -name VHDL_FILE ../../lib/lpp/./general_purpose/Clk_divider.vhd -library lpp
186 set_global_assignment -name VHDL_FILE ../../lib/lpp/./general_purpose/general_purpose.vhd -library lpp
187 set_global_assignment -name VHDL_FILE ../../lib/lpp/./general_purpose/MAC_CONTROLER.vhd -library lpp
188 set_global_assignment -name VHDL_FILE ../../lib/lpp/./general_purpose/MAC_MUX2.vhd -library lpp
189 set_global_assignment -name VHDL_FILE ../../lib/lpp/./general_purpose/MAC_MUX.vhd -library lpp
190 set_global_assignment -name VHDL_FILE ../../lib/lpp/./general_purpose/MAC_REG.vhd -library lpp
191 set_global_assignment -name VHDL_FILE ../../lib/lpp/./general_purpose/MAC.vhd -library lpp
192 set_global_assignment -name VHDL_FILE ../../lib/lpp/./general_purpose/Multiplier.vhd -library lpp
193 set_global_assignment -name VHDL_FILE ../../lib/lpp/./general_purpose/MUX2.vhd -library lpp
194 set_global_assignment -name VHDL_FILE ../../lib/lpp/./general_purpose/REG.vhd -library lpp
195 set_global_assignment -name VHDL_FILE ../../lib/lpp/./general_purpose/Shifter.vhd -library lpp
196 set_global_assignment -name VHDL_FILE ../../lib/lpp/./lpp_ad_Conv/AD7688_drvr.vhd -library lpp
197 set_global_assignment -name VHDL_FILE ../../lib/lpp/./lpp_ad_Conv/AD7688_spi_if.vhd -library lpp
198 set_global_assignment -name VHDL_FILE ../../lib/lpp/./lpp_ad_Conv/ADS7886_drvr.vhd -library lpp
199 set_global_assignment -name VHDL_FILE ../../lib/lpp/./lpp_ad_Conv/lpp_ad_Conv.vhd -library lpp
200 set_global_assignment -name VHDL_FILE ../../lib/lpp/./lpp_ad_Conv/lpp_apb_ad_conv.vhd -library lpp
201 set_global_assignment -name VHDL_FILE ../../lib/lpp/./lpp_CNA_amba/APB_CNA.vhd -library lpp
202 set_global_assignment -name VHDL_FILE ../../lib/lpp/./lpp_CNA_amba/clock.vhd -library lpp
203 set_global_assignment -name VHDL_FILE ../../lib/lpp/./lpp_CNA_amba/CNA_TabloC.vhd -library lpp
204 set_global_assignment -name VHDL_FILE ../../lib/lpp/./lpp_CNA_amba/Convertisseur_config.vhd -library lpp
205 set_global_assignment -name VHDL_FILE ../../lib/lpp/./lpp_CNA_amba/GeneSYNC_flag.vhd -library lpp
206 set_global_assignment -name VHDL_FILE ../../lib/lpp/./lpp_CNA_amba/lpp_CNA_amba.vhd -library lpp
207 set_global_assignment -name VHDL_FILE ../../lib/lpp/./lpp_CNA_amba/Serialize.vhd -library lpp
208 set_global_assignment -name VHDL_FILE ../../lib/lpp/./lpp_uart/APB_UART.vhd -library lpp
209 set_global_assignment -name VHDL_FILE ../../lib/lpp/./lpp_uart/BaudGen.vhd -library lpp
210 set_global_assignment -name VHDL_FILE ../../lib/lpp/./lpp_uart/lpp_uart.vhd -library lpp
211 set_global_assignment -name VHDL_FILE ../../lib/lpp/./lpp_uart/Shift_REG.vhd -library lpp
212 set_global_assignment -name VHDL_FILE ../../lib/lpp/./lpp_uart/UART.vhd -library lpp
213 set_global_assignment -name VHDL_FILE ../../lib/lpp/./lpp_amba/APB_MULTI_DIODE.vhd -library lpp
214 set_global_assignment -name VHDL_FILE ../../lib/lpp/./lpp_amba/APB_SIMPLE_DIODE.vhd -library lpp
215 set_global_assignment -name VHDL_FILE ../../lib/lpp/./lpp_amba/lpp_amba.vhd -library lpp
216 set_global_assignment -name VHDL_FILE ../../lib/lpp/./dsp/iir_filter/APB_IIR_CEL.vhd -library lpp
217 set_global_assignment -name VHDL_FILE ../../lib/lpp/./dsp/iir_filter/FILTERcfg.vhd -library lpp
218 set_global_assignment -name VHDL_FILE ../../lib/lpp/./dsp/iir_filter/FilterCTRLR.vhd -library lpp
219 set_global_assignment -name VHDL_FILE ../../lib/lpp/./dsp/iir_filter/FILTER_RAM_CTRLR.vhd -library lpp
220 set_global_assignment -name VHDL_FILE ../../lib/lpp/./dsp/iir_filter/FILTER.vhd -library lpp
221 set_global_assignment -name VHDL_FILE ../../lib/lpp/./dsp/iir_filter/IIR_CEL_CTRLR.vhd -library lpp
222 set_global_assignment -name VHDL_FILE ../../lib/lpp/./dsp/iir_filter/IIR_CEL_FILTER.vhd -library lpp
223 set_global_assignment -name VHDL_FILE ../../lib/lpp/./dsp/iir_filter/iir_filter.vhd -library lpp
224 set_global_assignment -name VHDL_FILE ../../lib/lpp/./dsp/iir_filter/RAM_CEL.vhd -library lpp
225 set_global_assignment -name VHDL_FILE ../../lib/lpp/./dsp/iir_filter/RAM_CTRLR2.vhd -library lpp
226 set_global_assignment -name VHDL_FILE ../../lib/lpp/./dsp/iir_filter/RAM.vhd -library lpp
227 set_global_assignment -name VHDL_FILE ../../lib/lpp/./dsp/iir_filter/Top_Filtre_IIR.vhd -library lpp
228 set_global_assignment -name VHDL_FILE ../../lib/lpp/./amba_lcd_16x2_ctrlr/amba_lcd_16x2_ctrlr.vhd -library lpp
229 set_global_assignment -name VHDL_FILE ../../lib/lpp/./amba_lcd_16x2_ctrlr/apb_lcd_ctrlr.vhd -library lpp
230 set_global_assignment -name VHDL_FILE ../../lib/lpp/./amba_lcd_16x2_ctrlr/FRAME_CLK.vhd -library lpp
231 set_global_assignment -name VHDL_FILE ../../lib/lpp/./amba_lcd_16x2_ctrlr/LCD_16x2_CFG.vhd -library lpp
232 set_global_assignment -name VHDL_FILE ../../lib/lpp/./amba_lcd_16x2_ctrlr/LCD_16x2_DRVR.vhd -library lpp
233 set_global_assignment -name VHDL_FILE ../../lib/lpp/./amba_lcd_16x2_ctrlr/LCD_16x2_ENGINE.vhd -library lpp
234 set_global_assignment -name VHDL_FILE ../../lib/lpp/./amba_lcd_16x2_ctrlr/LCD_2x16_DRIVER.vhd -library lpp
235 set_global_assignment -name VHDL_FILE ../../lib/lpp/./amba_lcd_16x2_ctrlr/LCD_CLK_GENERATOR.vhd -library lpp
236 set_global_assignment -name VHDL_FILE ../../lib/lpp/./amba_lcd_16x2_ctrlr/Top_LCD.vhd -library lpp
237 set_global_assignment -name VHDL_FILE config.vhd
238 set_global_assignment -name VHDL_FILE ahbrom.vhd
239 set_global_assignment -name VHDL_FILE leon3mp.vhd
240
241 set_global_assignment -name TOP_LEVEL_ENTITY "leon3mp"
@@ -0,0 +1,7
1 set_attribute input_pragma_keyword "cadence synopsys get2chip g2c fast ambit pragma"
2 include compile.rc
3
4 read_hdl -vhdl -lib work config.vhd
5 read_hdl -vhdl -lib work ahbrom.vhd
6 read_hdl -vhdl -lib work leon3mp.vhd
7 elaborate leon3mp
@@ -0,0 +1,56
1 set -tmpdir "xst/projnav.tmp"
2 set -xsthdpdir "xst"
3 run
4 -ifn leon3mp.prj
5 -uc leon3mp.xcf
6 -ifmt mixed
7 -ofn leon3mp
8 -ofmt NGC
9 -p xc3s1600e-4-fg320
10 -top leon3mp
11 -opt_mode Speed
12 -opt_level 1
13 -iuc NO
14 -keep_hierarchy No
15 -netlist_hierarchy As_Optimized
16 -rtlview Yes
17 -glob_opt AllClockNets
18 -read_cores YES
19 -write_timing_constraints NO
20 -cross_clock_analysis NO
21 -hierarchy_separator /
22 -bus_delimiter ()
23 -case Maintain
24 -slice_utilization_ratio 100
25 -bram_utilization_ratio 100
26 -verilog2001 YES
27 -fsm_extract NO
28 -fsm_style LUT
29 -ram_extract Yes
30 -ram_style Auto
31 -rom_extract Yes
32 -mux_style Auto
33 -decoder_extract YES
34 -priority_extract Yes
35 -shreg_extract YES
36 -shift_extract YES
37 -xor_collapse YES
38 -rom_style Auto
39 -auto_bram_packing NO
40 -mux_extract Yes
41 -resource_sharing YES
42 -async_to_sync NO
43 -mult_style Auto
44 -iobuf YES
45 -max_fanout 500
46 -bufg 24
47 -register_duplication YES
48 -register_balancing No
49 -slice_packing YES
50 -optimize_primitives NO
51 -use_clock_enable Yes
52 -use_sync_set Yes
53 -use_sync_reset Yes
54 -iob True
55 -equivalent_register_removal YES
56 -slice_utilization_ratio_maxmargin 5
@@ -0,0 +1,33
1 new_design -name "leon3mp" -family "Spartan3E"
2 set_device -die "xc3s1600e" -package " " -speed "-4" -voltage "1.5" -iostd "LVTTL" -jtag "yes" -probe "yes" -trst "yes" -temprange "" -voltrange ""
3 if {[file exist leon3mp.pdc]} {
4 import_source -format "edif" -edif_flavor "GENERIC" -merge_physical "no" -merge_timing "no" {synplify/leon3mp.edf} -format "pdc" -abort_on_error "no" {leon3mp.pdc}
5 } else {
6 import_source -format "edif" -edif_flavor "GENERIC" -merge_physical "no" -merge_timing "no" {synplify/leon3mp.edf}
7 }
8 compile -combine_register 1
9 if {[file exist ]} {
10 import_aux -format "pdc" -abort_on_error "no" {}
11 pin_commit
12 } else {
13 puts "WARNING: No PDC file imported."
14 }
15 if {[file exist ]} {
16 import_aux -format "sdc" -merge_timing "no" {}
17 } else {
18 puts "WARNING: No SDC file imported."
19 }
20 save_design {leon3mp.adb}
21 report -type status {./actel/report_status_pre.log}
22 layout -timing_driven -incremental "OFF"
23 save_design {leon3mp.adb}
24 backannotate -dir {./actel} -name "leon3mp" -format "SDF" -language "VHDL93" -netlist
25 report -type "timer" -analysis "max" -print_summary "yes" -use_slack_threshold "no" -print_paths "yes" -max_paths 100 -max_expanded_paths 5 -include_user_sets "yes" -include_pin_to_pin "yes" -select_clock_domains "no" {./actel/report_timer_max.txt}
26 report -type "timer" -analysis "min" -print_summary "yes" -use_slack_threshold "no" -print_paths "yes" -max_paths 100 -max_expanded_paths 5 -include_user_sets "yes" -include_pin_to_pin "yes" -select_clock_domains "no" {./actel/report_timer_min.txt}
27 report -type "pin" -listby "name" {./actel/report_pin_name.log}
28 report -type "pin" -listby "number" {./actel/report_pin_number.log}
29 report -type "datasheet" {./actel/report_datasheet.txt}
30 export -format "pdb" -feature "prog_fpga" -io_state "Tri-State" {./actel/leon3mp.pdb}
31 export -format log -diagnostic {./actel/report_log.log}
32 report -type status {./actel/report_status_post.log}
33 save_design {leon3mp.adb}
@@ -0,0 +1,8
1 new_design -name "leon3mp" -family "Spartan3E"
2 set_device -die "xc3s1600e" -package " " -speed "-4" -voltage "1.5" -iostd "LVTTL" -jtag "yes" -probe "yes" -trst "yes" -temprange "" -voltrange ""
3 if {[file exist leon3mp.pdc]} {
4 import_source -format "edif" -edif_flavor "GENERIC" -merge_physical "no" -merge_timing "no" {synplify/leon3mp.edf} -format "pdc" -abort_on_error "no" {leon3mp.pdc}
5 } else {
6 import_source -format "edif" -edif_flavor "GENERIC" -merge_physical "no" -merge_timing "no" {synplify/leon3mp.edf}
7 }
8 save_design {leon3mp.adb}
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1 project new leon3mp.ise
2 project set family "Spartan3E"
3 project set device xc3s1600e
4 project set speed -4
5 project set package fg320
6 puts "Adding files to project"
7 lib_vhdl new grlib
8 xfile add "../../lib/grlib/stdlib/version.vhd" -lib_vhdl grlib
9 puts "../../lib/grlib/stdlib/version.vhd"
10 xfile add "../../lib/grlib/stdlib/config.vhd" -lib_vhdl grlib
11 puts "../../lib/grlib/stdlib/config.vhd"
12 xfile add "../../lib/grlib/stdlib/stdlib.vhd" -lib_vhdl grlib
13 puts "../../lib/grlib/stdlib/stdlib.vhd"
14 xfile add "../../lib/grlib/sparc/sparc.vhd" -lib_vhdl grlib
15 puts "../../lib/grlib/sparc/sparc.vhd"
16 xfile add "../../lib/grlib/modgen/multlib.vhd" -lib_vhdl grlib
17 puts "../../lib/grlib/modgen/multlib.vhd"
18 xfile add "../../lib/grlib/modgen/leaves.vhd" -lib_vhdl grlib
19 puts "../../lib/grlib/modgen/leaves.vhd"
20 xfile add "../../lib/grlib/amba/amba.vhd" -lib_vhdl grlib
21 puts "../../lib/grlib/amba/amba.vhd"
22 xfile add "../../lib/grlib/amba/devices.vhd" -lib_vhdl grlib
23 puts "../../lib/grlib/amba/devices.vhd"
24 xfile add "../../lib/grlib/amba/defmst.vhd" -lib_vhdl grlib
25 puts "../../lib/grlib/amba/defmst.vhd"
26 xfile add "../../lib/grlib/amba/apbctrl.vhd" -lib_vhdl grlib
27 puts "../../lib/grlib/amba/apbctrl.vhd"
28 xfile add "../../lib/grlib/amba/ahbctrl.vhd" -lib_vhdl grlib
29 puts "../../lib/grlib/amba/ahbctrl.vhd"
30 xfile add "../../lib/grlib/amba/dma2ahb_pkg.vhd" -lib_vhdl grlib
31 puts "../../lib/grlib/amba/dma2ahb_pkg.vhd"
32 xfile add "../../lib/grlib/amba/dma2ahb.vhd" -lib_vhdl grlib
33 puts "../../lib/grlib/amba/dma2ahb.vhd"
34 lib_vhdl new unisim
35 lib_vhdl new synplify
36 lib_vhdl new techmap
37 xfile add "../../lib/techmap/gencomp/gencomp.vhd" -lib_vhdl techmap
38 puts "../../lib/techmap/gencomp/gencomp.vhd"
39 xfile add "../../lib/techmap/gencomp/netcomp.vhd" -lib_vhdl techmap
40 puts "../../lib/techmap/gencomp/netcomp.vhd"
41 xfile add "../../lib/techmap/inferred/memory_inferred.vhd" -lib_vhdl techmap
42 puts "../../lib/techmap/inferred/memory_inferred.vhd"
43 xfile add "../../lib/techmap/inferred/ddr_inferred.vhd" -lib_vhdl techmap
44 puts "../../lib/techmap/inferred/ddr_inferred.vhd"
45 xfile add "../../lib/techmap/inferred/mul_inferred.vhd" -lib_vhdl techmap
46 puts "../../lib/techmap/inferred/mul_inferred.vhd"
47 xfile add "../../lib/techmap/inferred/ddr_phy_inferred.vhd" -lib_vhdl techmap
48 puts "../../lib/techmap/inferred/ddr_phy_inferred.vhd"
49 xfile add "../../lib/techmap/unisim/memory_unisim.vhd" -lib_vhdl techmap
50 puts "../../lib/techmap/unisim/memory_unisim.vhd"
51 xfile add "../../lib/techmap/unisim/buffer_unisim.vhd" -lib_vhdl techmap
52 puts "../../lib/techmap/unisim/buffer_unisim.vhd"
53 xfile add "../../lib/techmap/unisim/pads_unisim.vhd" -lib_vhdl techmap
54 puts "../../lib/techmap/unisim/pads_unisim.vhd"
55 xfile add "../../lib/techmap/unisim/clkgen_unisim.vhd" -lib_vhdl techmap
56 puts "../../lib/techmap/unisim/clkgen_unisim.vhd"
57 xfile add "../../lib/techmap/unisim/tap_unisim.vhd" -lib_vhdl techmap
58 puts "../../lib/techmap/unisim/tap_unisim.vhd"
59 xfile add "../../lib/techmap/unisim/ddr_unisim.vhd" -lib_vhdl techmap
60 puts "../../lib/techmap/unisim/ddr_unisim.vhd"
61 xfile add "../../lib/techmap/unisim/ddr_phy_unisim.vhd" -lib_vhdl techmap
62 puts "../../lib/techmap/unisim/ddr_phy_unisim.vhd"
63 xfile add "../../lib/techmap/unisim/grspwc_unisim.vhd" -lib_vhdl techmap
64 puts "../../lib/techmap/unisim/grspwc_unisim.vhd"
65 xfile add "../../lib/techmap/unisim/grspwc2_unisim.vhd" -lib_vhdl techmap
66 puts "../../lib/techmap/unisim/grspwc2_unisim.vhd"
67 xfile add "../../lib/techmap/unisim/grusbhc_unisim.vhd" -lib_vhdl techmap
68 puts "../../lib/techmap/unisim/grusbhc_unisim.vhd"
69 xfile add "../../lib/techmap/unisim/ssrctrl_unisim.vhd" -lib_vhdl techmap
70 puts "../../lib/techmap/unisim/ssrctrl_unisim.vhd"
71 xfile add "../../lib/techmap/unisim/sysmon_unisim.vhd" -lib_vhdl techmap
72 puts "../../lib/techmap/unisim/sysmon_unisim.vhd"
73 xfile add "../../lib/techmap/unisim/mul_unisim.vhd" -lib_vhdl techmap
74 puts "../../lib/techmap/unisim/mul_unisim.vhd"
75 xfile add "../../lib/techmap/maps/allclkgen.vhd" -lib_vhdl techmap
76 puts "../../lib/techmap/maps/allclkgen.vhd"
77 xfile add "../../lib/techmap/maps/allddr.vhd" -lib_vhdl techmap
78 puts "../../lib/techmap/maps/allddr.vhd"
79 xfile add "../../lib/techmap/maps/allmem.vhd" -lib_vhdl techmap
80 puts "../../lib/techmap/maps/allmem.vhd"
81 xfile add "../../lib/techmap/maps/allpads.vhd" -lib_vhdl techmap
82 puts "../../lib/techmap/maps/allpads.vhd"
83 xfile add "../../lib/techmap/maps/alltap.vhd" -lib_vhdl techmap
84 puts "../../lib/techmap/maps/alltap.vhd"
85 xfile add "../../lib/techmap/maps/clkgen.vhd" -lib_vhdl techmap
86 puts "../../lib/techmap/maps/clkgen.vhd"
87 xfile add "../../lib/techmap/maps/clkmux.vhd" -lib_vhdl techmap
88 puts "../../lib/techmap/maps/clkmux.vhd"
89 xfile add "../../lib/techmap/maps/clkand.vhd" -lib_vhdl techmap
90 puts "../../lib/techmap/maps/clkand.vhd"
91 xfile add "../../lib/techmap/maps/ddr_ireg.vhd" -lib_vhdl techmap
92 puts "../../lib/techmap/maps/ddr_ireg.vhd"
93 xfile add "../../lib/techmap/maps/ddr_oreg.vhd" -lib_vhdl techmap
94 puts "../../lib/techmap/maps/ddr_oreg.vhd"
95 xfile add "../../lib/techmap/maps/ddrphy.vhd" -lib_vhdl techmap
96 puts "../../lib/techmap/maps/ddrphy.vhd"
97 xfile add "../../lib/techmap/maps/syncram.vhd" -lib_vhdl techmap
98 puts "../../lib/techmap/maps/syncram.vhd"
99 xfile add "../../lib/techmap/maps/syncram64.vhd" -lib_vhdl techmap
100 puts "../../lib/techmap/maps/syncram64.vhd"
101 xfile add "../../lib/techmap/maps/syncram_2p.vhd" -lib_vhdl techmap
102 puts "../../lib/techmap/maps/syncram_2p.vhd"
103 xfile add "../../lib/techmap/maps/syncram_dp.vhd" -lib_vhdl techmap
104 puts "../../lib/techmap/maps/syncram_dp.vhd"
105 xfile add "../../lib/techmap/maps/syncfifo.vhd" -lib_vhdl techmap
106 puts "../../lib/techmap/maps/syncfifo.vhd"
107 xfile add "../../lib/techmap/maps/regfile_3p.vhd" -lib_vhdl techmap
108 puts "../../lib/techmap/maps/regfile_3p.vhd"
109 xfile add "../../lib/techmap/maps/tap.vhd" -lib_vhdl techmap
110 puts "../../lib/techmap/maps/tap.vhd"
111 xfile add "../../lib/techmap/maps/techbuf.vhd" -lib_vhdl techmap
112 puts "../../lib/techmap/maps/techbuf.vhd"
113 xfile add "../../lib/techmap/maps/nandtree.vhd" -lib_vhdl techmap
114 puts "../../lib/techmap/maps/nandtree.vhd"
115 xfile add "../../lib/techmap/maps/clkpad.vhd" -lib_vhdl techmap
116 puts "../../lib/techmap/maps/clkpad.vhd"
117 xfile add "../../lib/techmap/maps/clkpad_ds.vhd" -lib_vhdl techmap
118 puts "../../lib/techmap/maps/clkpad_ds.vhd"
119 xfile add "../../lib/techmap/maps/inpad.vhd" -lib_vhdl techmap
120 puts "../../lib/techmap/maps/inpad.vhd"
121 xfile add "../../lib/techmap/maps/inpad_ds.vhd" -lib_vhdl techmap
122 puts "../../lib/techmap/maps/inpad_ds.vhd"
123 xfile add "../../lib/techmap/maps/iodpad.vhd" -lib_vhdl techmap
124 puts "../../lib/techmap/maps/iodpad.vhd"
125 xfile add "../../lib/techmap/maps/iopad.vhd" -lib_vhdl techmap
126 puts "../../lib/techmap/maps/iopad.vhd"
127 xfile add "../../lib/techmap/maps/iopad_ds.vhd" -lib_vhdl techmap
128 puts "../../lib/techmap/maps/iopad_ds.vhd"
129 xfile add "../../lib/techmap/maps/lvds_combo.vhd" -lib_vhdl techmap
130 puts "../../lib/techmap/maps/lvds_combo.vhd"
131 xfile add "../../lib/techmap/maps/odpad.vhd" -lib_vhdl techmap
132 puts "../../lib/techmap/maps/odpad.vhd"
133 xfile add "../../lib/techmap/maps/outpad.vhd" -lib_vhdl techmap
134 puts "../../lib/techmap/maps/outpad.vhd"
135 xfile add "../../lib/techmap/maps/outpad_ds.vhd" -lib_vhdl techmap
136 puts "../../lib/techmap/maps/outpad_ds.vhd"
137 xfile add "../../lib/techmap/maps/toutpad.vhd" -lib_vhdl techmap
138 puts "../../lib/techmap/maps/toutpad.vhd"
139 xfile add "../../lib/techmap/maps/skew_outpad.vhd" -lib_vhdl techmap
140 puts "../../lib/techmap/maps/skew_outpad.vhd"
141 xfile add "../../lib/techmap/maps/grspwc_net.vhd" -lib_vhdl techmap
142 puts "../../lib/techmap/maps/grspwc_net.vhd"
143 xfile add "../../lib/techmap/maps/grspwc2_net.vhd" -lib_vhdl techmap
144 puts "../../lib/techmap/maps/grspwc2_net.vhd"
145 xfile add "../../lib/techmap/maps/grlfpw_net.vhd" -lib_vhdl techmap
146 puts "../../lib/techmap/maps/grlfpw_net.vhd"
147 xfile add "../../lib/techmap/maps/grfpw_net.vhd" -lib_vhdl techmap
148 puts "../../lib/techmap/maps/grfpw_net.vhd"
149 xfile add "../../lib/techmap/maps/mul_61x61.vhd" -lib_vhdl techmap
150 puts "../../lib/techmap/maps/mul_61x61.vhd"
151 xfile add "../../lib/techmap/maps/cpu_disas_net.vhd" -lib_vhdl techmap
152 puts "../../lib/techmap/maps/cpu_disas_net.vhd"
153 xfile add "../../lib/techmap/maps/ringosc.vhd" -lib_vhdl techmap
154 puts "../../lib/techmap/maps/ringosc.vhd"
155 xfile add "../../lib/techmap/maps/system_monitor.vhd" -lib_vhdl techmap
156 puts "../../lib/techmap/maps/system_monitor.vhd"
157 xfile add "../../lib/techmap/maps/grgates.vhd" -lib_vhdl techmap
158 puts "../../lib/techmap/maps/grgates.vhd"
159 xfile add "../../lib/techmap/maps/inpad_ddr.vhd" -lib_vhdl techmap
160 puts "../../lib/techmap/maps/inpad_ddr.vhd"
161 xfile add "../../lib/techmap/maps/outpad_ddr.vhd" -lib_vhdl techmap
162 puts "../../lib/techmap/maps/outpad_ddr.vhd"
163 xfile add "../../lib/techmap/maps/iopad_ddr.vhd" -lib_vhdl techmap
164 puts "../../lib/techmap/maps/iopad_ddr.vhd"
165 xfile add "../../lib/techmap/maps/syncram128bw.vhd" -lib_vhdl techmap
166 puts "../../lib/techmap/maps/syncram128bw.vhd"
167 xfile add "../../lib/techmap/maps/syncram128.vhd" -lib_vhdl techmap
168 puts "../../lib/techmap/maps/syncram128.vhd"
169 xfile add "../../lib/techmap/maps/syncram156bw.vhd" -lib_vhdl techmap
170 puts "../../lib/techmap/maps/syncram156bw.vhd"
171 lib_vhdl new eth
172 xfile add "../../lib/eth/comp/ethcomp.vhd" -lib_vhdl eth
173 puts "../../lib/eth/comp/ethcomp.vhd"
174 xfile add "../../lib/eth/core/greth_pkg.vhd" -lib_vhdl eth
175 puts "../../lib/eth/core/greth_pkg.vhd"
176 xfile add "../../lib/eth/core/eth_rstgen.vhd" -lib_vhdl eth
177 puts "../../lib/eth/core/eth_rstgen.vhd"
178 xfile add "../../lib/eth/core/eth_ahb_mst.vhd" -lib_vhdl eth
179 puts "../../lib/eth/core/eth_ahb_mst.vhd"
180 xfile add "../../lib/eth/core/greth_tx.vhd" -lib_vhdl eth
181 puts "../../lib/eth/core/greth_tx.vhd"
182 xfile add "../../lib/eth/core/greth_rx.vhd" -lib_vhdl eth
183 puts "../../lib/eth/core/greth_rx.vhd"
184 xfile add "../../lib/eth/core/grethc.vhd" -lib_vhdl eth
185 puts "../../lib/eth/core/grethc.vhd"
186 xfile add "../../lib/eth/wrapper/greth_gen.vhd" -lib_vhdl eth
187 puts "../../lib/eth/wrapper/greth_gen.vhd"
188 xfile add "../../lib/eth/wrapper/greth_gbit_gen.vhd" -lib_vhdl eth
189 puts "../../lib/eth/wrapper/greth_gbit_gen.vhd"
190 lib_vhdl new gaisler
191 xfile add "../../lib/gaisler/arith/arith.vhd" -lib_vhdl gaisler
192 puts "../../lib/gaisler/arith/arith.vhd"
193 xfile add "../../lib/gaisler/arith/mul32.vhd" -lib_vhdl gaisler
194 puts "../../lib/gaisler/arith/mul32.vhd"
195 xfile add "../../lib/gaisler/arith/div32.vhd" -lib_vhdl gaisler
196 puts "../../lib/gaisler/arith/div32.vhd"
197 xfile add "../../lib/gaisler/memctrl/memctrl.vhd" -lib_vhdl gaisler
198 puts "../../lib/gaisler/memctrl/memctrl.vhd"
199 xfile add "../../lib/gaisler/memctrl/sdctrl.vhd" -lib_vhdl gaisler
200 puts "../../lib/gaisler/memctrl/sdctrl.vhd"
201 xfile add "../../lib/gaisler/memctrl/sdctrl64.vhd" -lib_vhdl gaisler
202 puts "../../lib/gaisler/memctrl/sdctrl64.vhd"
203 xfile add "../../lib/gaisler/memctrl/sdmctrl.vhd" -lib_vhdl gaisler
204 puts "../../lib/gaisler/memctrl/sdmctrl.vhd"
205 xfile add "../../lib/gaisler/memctrl/srctrl.vhd" -lib_vhdl gaisler
206 puts "../../lib/gaisler/memctrl/srctrl.vhd"
207 xfile add "../../lib/gaisler/memctrl/spimctrl.vhd" -lib_vhdl gaisler
208 puts "../../lib/gaisler/memctrl/spimctrl.vhd"
209 xfile add "../../lib/gaisler/leon3/leon3.vhd" -lib_vhdl gaisler
210 puts "../../lib/gaisler/leon3/leon3.vhd"
211 xfile add "../../lib/gaisler/leon3/mmuconfig.vhd" -lib_vhdl gaisler
212 puts "../../lib/gaisler/leon3/mmuconfig.vhd"
213 xfile add "../../lib/gaisler/leon3/mmuiface.vhd" -lib_vhdl gaisler
214 puts "../../lib/gaisler/leon3/mmuiface.vhd"
215 xfile add "../../lib/gaisler/leon3/libmmu.vhd" -lib_vhdl gaisler
216 puts "../../lib/gaisler/leon3/libmmu.vhd"
217 xfile add "../../lib/gaisler/leon3/libiu.vhd" -lib_vhdl gaisler
218 puts "../../lib/gaisler/leon3/libiu.vhd"
219 xfile add "../../lib/gaisler/leon3/libcache.vhd" -lib_vhdl gaisler
220 puts "../../lib/gaisler/leon3/libcache.vhd"
221 xfile add "../../lib/gaisler/leon3/libproc3.vhd" -lib_vhdl gaisler
222 puts "../../lib/gaisler/leon3/libproc3.vhd"
223 xfile add "../../lib/gaisler/leon3/cachemem.vhd" -lib_vhdl gaisler
224 puts "../../lib/gaisler/leon3/cachemem.vhd"
225 xfile add "../../lib/gaisler/leon3/mmu_icache.vhd" -lib_vhdl gaisler
226 puts "../../lib/gaisler/leon3/mmu_icache.vhd"
227 xfile add "../../lib/gaisler/leon3/mmu_dcache.vhd" -lib_vhdl gaisler
228 puts "../../lib/gaisler/leon3/mmu_dcache.vhd"
229 xfile add "../../lib/gaisler/leon3/mmu_acache.vhd" -lib_vhdl gaisler
230 puts "../../lib/gaisler/leon3/mmu_acache.vhd"
231 xfile add "../../lib/gaisler/leon3/mmutlbcam.vhd" -lib_vhdl gaisler
232 puts "../../lib/gaisler/leon3/mmutlbcam.vhd"
233 xfile add "../../lib/gaisler/leon3/mmulrue.vhd" -lib_vhdl gaisler
234 puts "../../lib/gaisler/leon3/mmulrue.vhd"
235 xfile add "../../lib/gaisler/leon3/mmulru.vhd" -lib_vhdl gaisler
236 puts "../../lib/gaisler/leon3/mmulru.vhd"
237 xfile add "../../lib/gaisler/leon3/mmutlb.vhd" -lib_vhdl gaisler
238 puts "../../lib/gaisler/leon3/mmutlb.vhd"
239 xfile add "../../lib/gaisler/leon3/mmutw.vhd" -lib_vhdl gaisler
240 puts "../../lib/gaisler/leon3/mmutw.vhd"
241 xfile add "../../lib/gaisler/leon3/mmu.vhd" -lib_vhdl gaisler
242 puts "../../lib/gaisler/leon3/mmu.vhd"
243 xfile add "../../lib/gaisler/leon3/mmu_cache.vhd" -lib_vhdl gaisler
244 puts "../../lib/gaisler/leon3/mmu_cache.vhd"
245 xfile add "../../lib/gaisler/leon3/cpu_disasx.vhd" -lib_vhdl gaisler
246 puts "../../lib/gaisler/leon3/cpu_disasx.vhd"
247 xfile add "../../lib/gaisler/leon3/iu3.vhd" -lib_vhdl gaisler
248 puts "../../lib/gaisler/leon3/iu3.vhd"
249 xfile add "../../lib/gaisler/leon3/grfpwx.vhd" -lib_vhdl gaisler
250 puts "../../lib/gaisler/leon3/grfpwx.vhd"
251 xfile add "../../lib/gaisler/leon3/mfpwx.vhd" -lib_vhdl gaisler
252 puts "../../lib/gaisler/leon3/mfpwx.vhd"
253 xfile add "../../lib/gaisler/leon3/grlfpwx.vhd" -lib_vhdl gaisler
254 puts "../../lib/gaisler/leon3/grlfpwx.vhd"
255 xfile add "../../lib/gaisler/leon3/tbufmem.vhd" -lib_vhdl gaisler
256 puts "../../lib/gaisler/leon3/tbufmem.vhd"
257 xfile add "../../lib/gaisler/leon3/dsu3x.vhd" -lib_vhdl gaisler
258 puts "../../lib/gaisler/leon3/dsu3x.vhd"
259 xfile add "../../lib/gaisler/leon3/dsu3.vhd" -lib_vhdl gaisler
260 puts "../../lib/gaisler/leon3/dsu3.vhd"
261 xfile add "../../lib/gaisler/leon3/proc3.vhd" -lib_vhdl gaisler
262 puts "../../lib/gaisler/leon3/proc3.vhd"
263 xfile add "../../lib/gaisler/leon3/leon3s.vhd" -lib_vhdl gaisler
264 puts "../../lib/gaisler/leon3/leon3s.vhd"
265 xfile add "../../lib/gaisler/leon3/leon3cg.vhd" -lib_vhdl gaisler
266 puts "../../lib/gaisler/leon3/leon3cg.vhd"
267 xfile add "../../lib/gaisler/leon3/irqmp.vhd" -lib_vhdl gaisler
268 puts "../../lib/gaisler/leon3/irqmp.vhd"
269 xfile add "../../lib/gaisler/leon3/grfpwxsh.vhd" -lib_vhdl gaisler
270 puts "../../lib/gaisler/leon3/grfpwxsh.vhd"
271 xfile add "../../lib/gaisler/leon3/grfpushwx.vhd" -lib_vhdl gaisler
272 puts "../../lib/gaisler/leon3/grfpushwx.vhd"
273 xfile add "../../lib/gaisler/leon3/leon3sh.vhd" -lib_vhdl gaisler
274 puts "../../lib/gaisler/leon3/leon3sh.vhd"
275 xfile add "../../lib/gaisler/misc/misc.vhd" -lib_vhdl gaisler
276 puts "../../lib/gaisler/misc/misc.vhd"
277 xfile add "../../lib/gaisler/misc/rstgen.vhd" -lib_vhdl gaisler
278 puts "../../lib/gaisler/misc/rstgen.vhd"
279 xfile add "../../lib/gaisler/misc/gptimer.vhd" -lib_vhdl gaisler
280 puts "../../lib/gaisler/misc/gptimer.vhd"
281 xfile add "../../lib/gaisler/misc/ahbram.vhd" -lib_vhdl gaisler
282 puts "../../lib/gaisler/misc/ahbram.vhd"
283 xfile add "../../lib/gaisler/misc/ahbdpram.vhd" -lib_vhdl gaisler
284 puts "../../lib/gaisler/misc/ahbdpram.vhd"
285 xfile add "../../lib/gaisler/misc/ahbtrace.vhd" -lib_vhdl gaisler
286 puts "../../lib/gaisler/misc/ahbtrace.vhd"
287 xfile add "../../lib/gaisler/misc/ahbtrace_mb.vhd" -lib_vhdl gaisler
288 puts "../../lib/gaisler/misc/ahbtrace_mb.vhd"
289 xfile add "../../lib/gaisler/misc/ahbmst.vhd" -lib_vhdl gaisler
290 puts "../../lib/gaisler/misc/ahbmst.vhd"
291 xfile add "../../lib/gaisler/misc/grgpio.vhd" -lib_vhdl gaisler
292 puts "../../lib/gaisler/misc/grgpio.vhd"
293 xfile add "../../lib/gaisler/misc/ahbstat.vhd" -lib_vhdl gaisler
294 puts "../../lib/gaisler/misc/ahbstat.vhd"
295 xfile add "../../lib/gaisler/misc/logan.vhd" -lib_vhdl gaisler
296 puts "../../lib/gaisler/misc/logan.vhd"
297 xfile add "../../lib/gaisler/misc/apbps2.vhd" -lib_vhdl gaisler
298 puts "../../lib/gaisler/misc/apbps2.vhd"
299 xfile add "../../lib/gaisler/misc/charrom_package.vhd" -lib_vhdl gaisler
300 puts "../../lib/gaisler/misc/charrom_package.vhd"
301 xfile add "../../lib/gaisler/misc/charrom.vhd" -lib_vhdl gaisler
302 puts "../../lib/gaisler/misc/charrom.vhd"
303 xfile add "../../lib/gaisler/misc/apbvga.vhd" -lib_vhdl gaisler
304 puts "../../lib/gaisler/misc/apbvga.vhd"
305 xfile add "../../lib/gaisler/misc/svgactrl.vhd" -lib_vhdl gaisler
306 puts "../../lib/gaisler/misc/svgactrl.vhd"
307 xfile add "../../lib/gaisler/misc/i2cmst_gen.vhd" -lib_vhdl gaisler
308 puts "../../lib/gaisler/misc/i2cmst_gen.vhd"
309 xfile add "../../lib/gaisler/misc/spictrl.vhd" -lib_vhdl gaisler
310 puts "../../lib/gaisler/misc/spictrl.vhd"
311 xfile add "../../lib/gaisler/misc/i2cslv.vhd" -lib_vhdl gaisler
312 puts "../../lib/gaisler/misc/i2cslv.vhd"
313 xfile add "../../lib/gaisler/misc/wild.vhd" -lib_vhdl gaisler
314 puts "../../lib/gaisler/misc/wild.vhd"
315 xfile add "../../lib/gaisler/misc/wild2ahb.vhd" -lib_vhdl gaisler
316 puts "../../lib/gaisler/misc/wild2ahb.vhd"
317 xfile add "../../lib/gaisler/misc/grsysmon.vhd" -lib_vhdl gaisler
318 puts "../../lib/gaisler/misc/grsysmon.vhd"
319 xfile add "../../lib/gaisler/misc/gracectrl.vhd" -lib_vhdl gaisler
320 puts "../../lib/gaisler/misc/gracectrl.vhd"
321 xfile add "../../lib/gaisler/misc/grgpreg.vhd" -lib_vhdl gaisler
322 puts "../../lib/gaisler/misc/grgpreg.vhd"
323 xfile add "../../lib/gaisler/misc/ahbmst2.vhd" -lib_vhdl gaisler
324 puts "../../lib/gaisler/misc/ahbmst2.vhd"
325 xfile add "../../lib/gaisler/misc/ahb_mst_iface.vhd" -lib_vhdl gaisler
326 puts "../../lib/gaisler/misc/ahb_mst_iface.vhd"
327 xfile add "../../lib/gaisler/net/net.vhd" -lib_vhdl gaisler
328 puts "../../lib/gaisler/net/net.vhd"
329 xfile add "../../lib/gaisler/uart/uart.vhd" -lib_vhdl gaisler
330 puts "../../lib/gaisler/uart/uart.vhd"
331 xfile add "../../lib/gaisler/uart/libdcom.vhd" -lib_vhdl gaisler
332 puts "../../lib/gaisler/uart/libdcom.vhd"
333 xfile add "../../lib/gaisler/uart/apbuart.vhd" -lib_vhdl gaisler
334 puts "../../lib/gaisler/uart/apbuart.vhd"
335 xfile add "../../lib/gaisler/uart/dcom.vhd" -lib_vhdl gaisler
336 puts "../../lib/gaisler/uart/dcom.vhd"
337 xfile add "../../lib/gaisler/uart/dcom_uart.vhd" -lib_vhdl gaisler
338 puts "../../lib/gaisler/uart/dcom_uart.vhd"
339 xfile add "../../lib/gaisler/uart/ahbuart.vhd" -lib_vhdl gaisler
340 puts "../../lib/gaisler/uart/ahbuart.vhd"
341 xfile add "../../lib/gaisler/jtag/jtag.vhd" -lib_vhdl gaisler
342 puts "../../lib/gaisler/jtag/jtag.vhd"
343 xfile add "../../lib/gaisler/jtag/libjtagcom.vhd" -lib_vhdl gaisler
344 puts "../../lib/gaisler/jtag/libjtagcom.vhd"
345 xfile add "../../lib/gaisler/jtag/jtagcom.vhd" -lib_vhdl gaisler
346 puts "../../lib/gaisler/jtag/jtagcom.vhd"
347 xfile add "../../lib/gaisler/jtag/ahbjtag.vhd" -lib_vhdl gaisler
348 puts "../../lib/gaisler/jtag/ahbjtag.vhd"
349 xfile add "../../lib/gaisler/jtag/ahbjtag_bsd.vhd" -lib_vhdl gaisler
350 puts "../../lib/gaisler/jtag/ahbjtag_bsd.vhd"
351 xfile add "../../lib/gaisler/greth/ethernet_mac.vhd" -lib_vhdl gaisler
352 puts "../../lib/gaisler/greth/ethernet_mac.vhd"
353 xfile add "../../lib/gaisler/greth/greth.vhd" -lib_vhdl gaisler
354 puts "../../lib/gaisler/greth/greth.vhd"
355 xfile add "../../lib/gaisler/greth/greth_gbit.vhd" -lib_vhdl gaisler
356 puts "../../lib/gaisler/greth/greth_gbit.vhd"
357 xfile add "../../lib/gaisler/greth/grethm.vhd" -lib_vhdl gaisler
358 puts "../../lib/gaisler/greth/grethm.vhd"
359 xfile add "../../lib/gaisler/ddr/ddr_phy.vhd" -lib_vhdl gaisler
360 puts "../../lib/gaisler/ddr/ddr_phy.vhd"
361 xfile add "../../lib/gaisler/ddr/ddrsp16a.vhd" -lib_vhdl gaisler
362 puts "../../lib/gaisler/ddr/ddrsp16a.vhd"
363 xfile add "../../lib/gaisler/ddr/ddrsp32a.vhd" -lib_vhdl gaisler
364 puts "../../lib/gaisler/ddr/ddrsp32a.vhd"
365 xfile add "../../lib/gaisler/ddr/ddrsp64a.vhd" -lib_vhdl gaisler
366 puts "../../lib/gaisler/ddr/ddrsp64a.vhd"
367 xfile add "../../lib/gaisler/ddr/ddrspa.vhd" -lib_vhdl gaisler
368 puts "../../lib/gaisler/ddr/ddrspa.vhd"
369 xfile add "../../lib/gaisler/ddr/ddr2spa.vhd" -lib_vhdl gaisler
370 puts "../../lib/gaisler/ddr/ddr2spa.vhd"
371 xfile add "../../lib/gaisler/ddr/ddr2buf.vhd" -lib_vhdl gaisler
372 puts "../../lib/gaisler/ddr/ddr2buf.vhd"
373 xfile add "../../lib/gaisler/ddr/ddr2spax.vhd" -lib_vhdl gaisler
374 puts "../../lib/gaisler/ddr/ddr2spax.vhd"
375 xfile add "../../lib/gaisler/ddr/ddr2spax_ahb.vhd" -lib_vhdl gaisler
376 puts "../../lib/gaisler/ddr/ddr2spax_ahb.vhd"
377 xfile add "../../lib/gaisler/ddr/ddr2spax_ddr.vhd" -lib_vhdl gaisler
378 puts "../../lib/gaisler/ddr/ddr2spax_ddr.vhd"
379 lib_vhdl new esa
380 xfile add "../../lib/esa/memoryctrl/memoryctrl.vhd" -lib_vhdl esa
381 puts "../../lib/esa/memoryctrl/memoryctrl.vhd"
382 xfile add "../../lib/esa/memoryctrl/mctrl.vhd" -lib_vhdl esa
383 puts "../../lib/esa/memoryctrl/mctrl.vhd"
384 lib_vhdl new fmf
385 lib_vhdl new spansion
386 lib_vhdl new gsi
387 lib_vhdl new lpp
388 xfile add "../../lib/lpp/./general_purpose/Adder.vhd" -lib_vhdl lpp
389 puts "../../lib/lpp/./general_purpose/Adder.vhd"
390 xfile add "../../lib/lpp/./general_purpose/ADDRcntr.vhd" -lib_vhdl lpp
391 puts "../../lib/lpp/./general_purpose/ADDRcntr.vhd"
392 xfile add "../../lib/lpp/./general_purpose/ALU.vhd" -lib_vhdl lpp
393 puts "../../lib/lpp/./general_purpose/ALU.vhd"
394 xfile add "../../lib/lpp/./general_purpose/Clk_divider.vhd" -lib_vhdl lpp
395 puts "../../lib/lpp/./general_purpose/Clk_divider.vhd"
396 xfile add "../../lib/lpp/./general_purpose/general_purpose.vhd" -lib_vhdl lpp
397 puts "../../lib/lpp/./general_purpose/general_purpose.vhd"
398 xfile add "../../lib/lpp/./general_purpose/MAC_CONTROLER.vhd" -lib_vhdl lpp
399 puts "../../lib/lpp/./general_purpose/MAC_CONTROLER.vhd"
400 xfile add "../../lib/lpp/./general_purpose/MAC_MUX2.vhd" -lib_vhdl lpp
401 puts "../../lib/lpp/./general_purpose/MAC_MUX2.vhd"
402 xfile add "../../lib/lpp/./general_purpose/MAC_MUX.vhd" -lib_vhdl lpp
403 puts "../../lib/lpp/./general_purpose/MAC_MUX.vhd"
404 xfile add "../../lib/lpp/./general_purpose/MAC_REG.vhd" -lib_vhdl lpp
405 puts "../../lib/lpp/./general_purpose/MAC_REG.vhd"
406 xfile add "../../lib/lpp/./general_purpose/MAC.vhd" -lib_vhdl lpp
407 puts "../../lib/lpp/./general_purpose/MAC.vhd"
408 xfile add "../../lib/lpp/./general_purpose/Multiplier.vhd" -lib_vhdl lpp
409 puts "../../lib/lpp/./general_purpose/Multiplier.vhd"
410 xfile add "../../lib/lpp/./general_purpose/MUX2.vhd" -lib_vhdl lpp
411 puts "../../lib/lpp/./general_purpose/MUX2.vhd"
412 xfile add "../../lib/lpp/./general_purpose/REG.vhd" -lib_vhdl lpp
413 puts "../../lib/lpp/./general_purpose/REG.vhd"
414 xfile add "../../lib/lpp/./general_purpose/Shifter.vhd" -lib_vhdl lpp
415 puts "../../lib/lpp/./general_purpose/Shifter.vhd"
416 xfile add "../../lib/lpp/./lpp_ad_Conv/AD7688_drvr.vhd" -lib_vhdl lpp
417 puts "../../lib/lpp/./lpp_ad_Conv/AD7688_drvr.vhd"
418 xfile add "../../lib/lpp/./lpp_ad_Conv/AD7688_spi_if.vhd" -lib_vhdl lpp
419 puts "../../lib/lpp/./lpp_ad_Conv/AD7688_spi_if.vhd"
420 xfile add "../../lib/lpp/./lpp_ad_Conv/ADS7886_drvr.vhd" -lib_vhdl lpp
421 puts "../../lib/lpp/./lpp_ad_Conv/ADS7886_drvr.vhd"
422 xfile add "../../lib/lpp/./lpp_ad_Conv/lpp_ad_Conv.vhd" -lib_vhdl lpp
423 puts "../../lib/lpp/./lpp_ad_Conv/lpp_ad_Conv.vhd"
424 xfile add "../../lib/lpp/./lpp_ad_Conv/lpp_apb_ad_conv.vhd" -lib_vhdl lpp
425 puts "../../lib/lpp/./lpp_ad_Conv/lpp_apb_ad_conv.vhd"
426 xfile add "../../lib/lpp/./lpp_CNA_amba/APB_CNA.vhd" -lib_vhdl lpp
427 puts "../../lib/lpp/./lpp_CNA_amba/APB_CNA.vhd"
428 xfile add "../../lib/lpp/./lpp_CNA_amba/clock.vhd" -lib_vhdl lpp
429 puts "../../lib/lpp/./lpp_CNA_amba/clock.vhd"
430 xfile add "../../lib/lpp/./lpp_CNA_amba/CNA_TabloC.vhd" -lib_vhdl lpp
431 puts "../../lib/lpp/./lpp_CNA_amba/CNA_TabloC.vhd"
432 xfile add "../../lib/lpp/./lpp_CNA_amba/Convertisseur_config.vhd" -lib_vhdl lpp
433 puts "../../lib/lpp/./lpp_CNA_amba/Convertisseur_config.vhd"
434 xfile add "../../lib/lpp/./lpp_CNA_amba/GeneSYNC_flag.vhd" -lib_vhdl lpp
435 puts "../../lib/lpp/./lpp_CNA_amba/GeneSYNC_flag.vhd"
436 xfile add "../../lib/lpp/./lpp_CNA_amba/lpp_CNA_amba.vhd" -lib_vhdl lpp
437 puts "../../lib/lpp/./lpp_CNA_amba/lpp_CNA_amba.vhd"
438 xfile add "../../lib/lpp/./lpp_CNA_amba/Serialize.vhd" -lib_vhdl lpp
439 puts "../../lib/lpp/./lpp_CNA_amba/Serialize.vhd"
440 xfile add "../../lib/lpp/./lpp_uart/APB_UART.vhd" -lib_vhdl lpp
441 puts "../../lib/lpp/./lpp_uart/APB_UART.vhd"
442 xfile add "../../lib/lpp/./lpp_uart/BaudGen.vhd" -lib_vhdl lpp
443 puts "../../lib/lpp/./lpp_uart/BaudGen.vhd"
444 xfile add "../../lib/lpp/./lpp_uart/lpp_uart.vhd" -lib_vhdl lpp
445 puts "../../lib/lpp/./lpp_uart/lpp_uart.vhd"
446 xfile add "../../lib/lpp/./lpp_uart/Shift_REG.vhd" -lib_vhdl lpp
447 puts "../../lib/lpp/./lpp_uart/Shift_REG.vhd"
448 xfile add "../../lib/lpp/./lpp_uart/UART.vhd" -lib_vhdl lpp
449 puts "../../lib/lpp/./lpp_uart/UART.vhd"
450 xfile add "../../lib/lpp/./lpp_amba/APB_MULTI_DIODE.vhd" -lib_vhdl lpp
451 puts "../../lib/lpp/./lpp_amba/APB_MULTI_DIODE.vhd"
452 xfile add "../../lib/lpp/./lpp_amba/APB_SIMPLE_DIODE.vhd" -lib_vhdl lpp
453 puts "../../lib/lpp/./lpp_amba/APB_SIMPLE_DIODE.vhd"
454 xfile add "../../lib/lpp/./lpp_amba/lpp_amba.vhd" -lib_vhdl lpp
455 puts "../../lib/lpp/./lpp_amba/lpp_amba.vhd"
456 xfile add "../../lib/lpp/./dsp/iir_filter/APB_IIR_CEL.vhd" -lib_vhdl lpp
457 puts "../../lib/lpp/./dsp/iir_filter/APB_IIR_CEL.vhd"
458 xfile add "../../lib/lpp/./dsp/iir_filter/FILTERcfg.vhd" -lib_vhdl lpp
459 puts "../../lib/lpp/./dsp/iir_filter/FILTERcfg.vhd"
460 xfile add "../../lib/lpp/./dsp/iir_filter/FilterCTRLR.vhd" -lib_vhdl lpp
461 puts "../../lib/lpp/./dsp/iir_filter/FilterCTRLR.vhd"
462 xfile add "../../lib/lpp/./dsp/iir_filter/FILTER_RAM_CTRLR.vhd" -lib_vhdl lpp
463 puts "../../lib/lpp/./dsp/iir_filter/FILTER_RAM_CTRLR.vhd"
464 xfile add "../../lib/lpp/./dsp/iir_filter/FILTER.vhd" -lib_vhdl lpp
465 puts "../../lib/lpp/./dsp/iir_filter/FILTER.vhd"
466 xfile add "../../lib/lpp/./dsp/iir_filter/IIR_CEL_CTRLR.vhd" -lib_vhdl lpp
467 puts "../../lib/lpp/./dsp/iir_filter/IIR_CEL_CTRLR.vhd"
468 xfile add "../../lib/lpp/./dsp/iir_filter/IIR_CEL_FILTER.vhd" -lib_vhdl lpp
469 puts "../../lib/lpp/./dsp/iir_filter/IIR_CEL_FILTER.vhd"
470 xfile add "../../lib/lpp/./dsp/iir_filter/iir_filter.vhd" -lib_vhdl lpp
471 puts "../../lib/lpp/./dsp/iir_filter/iir_filter.vhd"
472 xfile add "../../lib/lpp/./dsp/iir_filter/RAM_CEL.vhd" -lib_vhdl lpp
473 puts "../../lib/lpp/./dsp/iir_filter/RAM_CEL.vhd"
474 xfile add "../../lib/lpp/./dsp/iir_filter/RAM_CTRLR2.vhd" -lib_vhdl lpp
475 puts "../../lib/lpp/./dsp/iir_filter/RAM_CTRLR2.vhd"
476 xfile add "../../lib/lpp/./dsp/iir_filter/RAM.vhd" -lib_vhdl lpp
477 puts "../../lib/lpp/./dsp/iir_filter/RAM.vhd"
478 xfile add "../../lib/lpp/./dsp/iir_filter/Top_Filtre_IIR.vhd" -lib_vhdl lpp
479 puts "../../lib/lpp/./dsp/iir_filter/Top_Filtre_IIR.vhd"
480 xfile add "../../lib/lpp/./amba_lcd_16x2_ctrlr/amba_lcd_16x2_ctrlr.vhd" -lib_vhdl lpp
481 puts "../../lib/lpp/./amba_lcd_16x2_ctrlr/amba_lcd_16x2_ctrlr.vhd"
482 xfile add "../../lib/lpp/./amba_lcd_16x2_ctrlr/apb_lcd_ctrlr.vhd" -lib_vhdl lpp
483 puts "../../lib/lpp/./amba_lcd_16x2_ctrlr/apb_lcd_ctrlr.vhd"
484 xfile add "../../lib/lpp/./amba_lcd_16x2_ctrlr/FRAME_CLK.vhd" -lib_vhdl lpp
485 puts "../../lib/lpp/./amba_lcd_16x2_ctrlr/FRAME_CLK.vhd"
486 xfile add "../../lib/lpp/./amba_lcd_16x2_ctrlr/LCD_16x2_CFG.vhd" -lib_vhdl lpp
487 puts "../../lib/lpp/./amba_lcd_16x2_ctrlr/LCD_16x2_CFG.vhd"
488 xfile add "../../lib/lpp/./amba_lcd_16x2_ctrlr/LCD_16x2_DRVR.vhd" -lib_vhdl lpp
489 puts "../../lib/lpp/./amba_lcd_16x2_ctrlr/LCD_16x2_DRVR.vhd"
490 xfile add "../../lib/lpp/./amba_lcd_16x2_ctrlr/LCD_16x2_ENGINE.vhd" -lib_vhdl lpp
491 puts "../../lib/lpp/./amba_lcd_16x2_ctrlr/LCD_16x2_ENGINE.vhd"
492 xfile add "../../lib/lpp/./amba_lcd_16x2_ctrlr/LCD_2x16_DRIVER.vhd" -lib_vhdl lpp
493 puts "../../lib/lpp/./amba_lcd_16x2_ctrlr/LCD_2x16_DRIVER.vhd"
494 xfile add "../../lib/lpp/./amba_lcd_16x2_ctrlr/LCD_CLK_GENERATOR.vhd" -lib_vhdl lpp
495 puts "../../lib/lpp/./amba_lcd_16x2_ctrlr/LCD_CLK_GENERATOR.vhd"
496 xfile add "../../lib/lpp/./amba_lcd_16x2_ctrlr/Top_LCD.vhd" -lib_vhdl lpp
497 puts "../../lib/lpp/./amba_lcd_16x2_ctrlr/Top_LCD.vhd"
498 lib_vhdl new work
499 xfile add "leon3mp.ucf"
500 xfile add "config.vhd" -lib_vhdl work
501 puts "config.vhd"
502 xfile add "ahbrom.vhd" -lib_vhdl work
503 puts "ahbrom.vhd"
504 xfile add "leon3mp.vhd" -lib_vhdl work
505 puts "leon3mp.vhd"
506 project set top "rtl" "leon3mp"
507 project set "Bus Delimiter" ()
508 project set "FSM Encoding Algorithm" None
509 project set "Pack I/O Registers into IOBs" yes
510 project set "Verilog Macros" ""
511 project set "Other XST Command Line Options" "-uc leon3mp.xcf" -process "Synthesize - XST"
512 project set "Allow Unmatched LOC Constraints" true -process "Translate"
513 project set "Macro Search Path" "../../netlists/xilinx/Spartan3" -process "Translate"
514 project set "Pack I/O Registers/Latches into IOBs" {For Inputs and Outputs}
515 project set "Other MAP Command Line Options" "-timing" -process Map
516 project set "Drive Done Pin High" true -process "Generate Programming File"
517 project set "Create ReadBack Data Files" true -process "Generate Programming File"
518 project set "Create Mask File" true -process "Generate Programming File"
519 project set "Run Design Rules Checker (DRC)" false -process "Generate Programming File"
520 project close
521 exit
@@ -0,0 +1,20
1 JDF G
2 PROJECT leon3mp
3 DESIGN leon3mp
4 DEVFAM Spartan3E
5 DEVICE xc3s1600e
6 DEVSPEED -4
7 DEVPKG fg320
8 DEVTOPLEVELMODULETYPE EDIF
9 DEVSIMULATOR Modelsim
10 DEVGENERATEDSIMULATIONMODEL VHDL
11 SOURCE synplify/leon3mp.edf
12 DEPASSOC leon3mp leon3mp.ucf
13 [Normal]
14 xilxMapAllowLogicOpt=edif, Spartan3E, EDIF.t_placeAndRouteDes, 1102861051, True
15 xilxMapCoverMode=edif, Spartan3E, EDIF.t_placeAndRouteDes, 1102861051, Speed
16 xilxNgdbld_AUL=edif, Spartan3E, EDIF.t_placeAndRouteDes, 1102861051, True
17 xilxPAReffortLevel=edif, Spartan3E, EDIF.t_placeAndRouteDes, 1102861051, Medium
18 xilxNgdbldMacro=edif, Spartan3E, EDIF.t_placeAndRouteDes, 1105378344, ../../netlists/xilinx/Spartan3
19 [STRATEGY-LIST]
20 Normal=True
@@ -0,0 +1,39
1 source compile.synp
2 add_file -vhdl -lib work config.vhd
3 add_file -vhdl -lib work ahbrom.vhd
4 add_file -vhdl -lib work leon3mp.vhd
5 add_file -edif ../../netlists/xilinx/Spartan3/grfpw_0_unisim.edf
6 add_file -edif ../../netlists/xilinx/Spartan3/grfpw4_0_unisim.edf
7 add_file -edif ../../netlists/xilinx/Spartan3/grlfpw_0_unisim.edf
8 add_file -edif ../../netlists/xilinx/Spartan3/grlfpw4_0_unisim.edf
9 add_file -constraint default.sdc
10
11 #implementation: "synplify"
12 impl -add synplify
13
14 #device options
15 set_option -technology Spartan3E
16 set_option -part xc3s1600e
17 set_option -speed_grade -4
18
19 #compilation/mapping options
20 set_option -symbolic_fsm_compiler 0
21 set_option -resource_sharing 0
22 set_option -use_fsm_explorer 0
23 set_option -write_vhdl 1
24 #set_option -disable_io_insertion 0
25
26 #map options
27 set_option -frequency 70
28
29 set_option -top_module leon3mp
30
31 #set result format/file last
32 project -result_file "synplify/leon3mp.edf"
33
34 #implementation attributes
35 set_option -vlog_std v95
36 set_option -compiler_compatible 0
37 set_option -package fg320
38 set_option -pipe 1; set_option -retiming 1; set_option -write_apr_constraint 0
39 impl -active "synplify"
@@ -0,0 +1,8
1 #QUARTUS_VERSION = "4.1"
2 #DATE = "17:39:37 December 03, 2004"
3
4
5 # Revisions
6
7
8 PROJECT_REVISION = leon3mp_synplify
@@ -0,0 +1,12
1 # Project-Wide Assignments
2 # ========================
3 #set_global_assignment -name ORIGINAL_QUARTUS_VERSION "4.1 SP2"
4 #set_global_assignment -name PROJECT_CREATION_TIME_DATE "16:13:08 DECEMBER 01, 2004"
5
6 # Explicitly disable TimeQuest since the GRLIB flow invokes the classical
7 # timing analyzer and USE_TIMEQUEST_TIMING_ANALYZER defaults to "ON"
8 # set_global_assignment -name USE_TIMEQUEST_TIMING_ANALYZER "OFF"
9
10 set_global_assignment -name VQM_FILE synplify/leon3mp.edf
11
12 set_global_assignment -name TOP_LEVEL_ENTITY "leon3mp"
@@ -0,0 +1,18
1 JDF G
2 PROJECT leon3mp
3 DESIGN leon3mp
4 DEVFAM Spartan3E
5 DEVICE xc3s1600e
6 DEVSPEED -4
7 DEVPKG fg320
8 DEVTOPLEVELMODULETYPE EDIF
9 DEVSIMULATOR Modelsim
10 DEVGENERATEDSIMULATIONMODEL VHDL
11 SOURCE synplify\leon3mp.edf
12 DEPASSOC leon3mp leon3mp.ucf
13 [Normal]
14 xilxMapAllowLogicOpt=edif, Spartan3E, EDIF.t_placeAndRouteDes, 1102861051, True
15 xilxMapCoverMode=edif, Spartan3E, EDIF.t_placeAndRouteDes, 1102861051, Speed
16 xilxNgdbld_AUL=edif, Spartan3E, EDIF.t_placeAndRouteDes, 1102861051, True
17 xilxPAReffortLevel=edif, Spartan3E, EDIF.t_placeAndRouteDes, 1102861051, Medium
18 xilxNgdbldMacro=edif, Spartan3E, EDIF.t_placeAndRouteDes, 1105378344, ..\..\netlists\xilinx\Spartan3
@@ -0,0 +1,275
1 JDF G
2 PROJECT leon3mp
3 DESIGN leon3mp
4 DEVFAM Spartan3E
5 DEVICE xc3s1600e
6 DEVSPEED -4
7 DEVPKG fg320
8 DEVTOPLEVELMODULETYPE HDL
9 DEVSIMULATOR Modelsim
10 DEVGENERATEDSIMULATIONMODEL VHDL
11 SOURCE config.vhd
12 SOURCE ahbrom.vhd
13 SOURCE leon3mp.vhd
14 SUBLIB grlib VhdlLibrary vhdl
15 LIBFILE ..\..\lib\grlib\stdlib\version.vhd grlib vhdl
16 LIBFILE ..\..\lib\grlib\stdlib\config.vhd grlib vhdl
17 LIBFILE ..\..\lib\grlib\stdlib\stdlib.vhd grlib vhdl
18 LIBFILE ..\..\lib\grlib\sparc\sparc.vhd grlib vhdl
19 LIBFILE ..\..\lib\grlib\modgen\multlib.vhd grlib vhdl
20 LIBFILE ..\..\lib\grlib\modgen\leaves.vhd grlib vhdl
21 LIBFILE ..\..\lib\grlib\amba\amba.vhd grlib vhdl
22 LIBFILE ..\..\lib\grlib\amba\devices.vhd grlib vhdl
23 LIBFILE ..\..\lib\grlib\amba\defmst.vhd grlib vhdl
24 LIBFILE ..\..\lib\grlib\amba\apbctrl.vhd grlib vhdl
25 LIBFILE ..\..\lib\grlib\amba\ahbctrl.vhd grlib vhdl
26 LIBFILE ..\..\lib\grlib\amba\dma2ahb_pkg.vhd grlib vhdl
27 LIBFILE ..\..\lib\grlib\amba\dma2ahb.vhd grlib vhdl
28 SUBLIB unisim VhdlLibrary vhdl
29 SUBLIB synplify VhdlLibrary vhdl
30 SUBLIB techmap VhdlLibrary vhdl
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32 LIBFILE ..\..\lib\techmap\gencomp\netcomp.vhd techmap vhdl
33 LIBFILE ..\..\lib\techmap\inferred\memory_inferred.vhd techmap vhdl
34 LIBFILE ..\..\lib\techmap\inferred\ddr_inferred.vhd techmap vhdl
35 LIBFILE ..\..\lib\techmap\inferred\mul_inferred.vhd techmap vhdl
36 LIBFILE ..\..\lib\techmap\inferred\ddr_phy_inferred.vhd techmap vhdl
37 LIBFILE ..\..\lib\techmap\unisim\memory_unisim.vhd techmap vhdl
38 LIBFILE ..\..\lib\techmap\unisim\buffer_unisim.vhd techmap vhdl
39 LIBFILE ..\..\lib\techmap\unisim\pads_unisim.vhd techmap vhdl
40 LIBFILE ..\..\lib\techmap\unisim\clkgen_unisim.vhd techmap vhdl
41 LIBFILE ..\..\lib\techmap\unisim\tap_unisim.vhd techmap vhdl
42 LIBFILE ..\..\lib\techmap\unisim\ddr_unisim.vhd techmap vhdl
43 LIBFILE ..\..\lib\techmap\unisim\ddr_phy_unisim.vhd techmap vhdl
44 LIBFILE ..\..\lib\techmap\unisim\grspwc_unisim.vhd techmap vhdl
45 LIBFILE ..\..\lib\techmap\unisim\grspwc2_unisim.vhd techmap vhdl
46 LIBFILE ..\..\lib\techmap\unisim\grusbhc_unisim.vhd techmap vhdl
47 LIBFILE ..\..\lib\techmap\unisim\ssrctrl_unisim.vhd techmap vhdl
48 LIBFILE ..\..\lib\techmap\unisim\sysmon_unisim.vhd techmap vhdl
49 LIBFILE ..\..\lib\techmap\unisim\mul_unisim.vhd techmap vhdl
50 LIBFILE ..\..\lib\techmap\maps\allclkgen.vhd techmap vhdl
51 LIBFILE ..\..\lib\techmap\maps\allddr.vhd techmap vhdl
52 LIBFILE ..\..\lib\techmap\maps\allmem.vhd techmap vhdl
53 LIBFILE ..\..\lib\techmap\maps\allpads.vhd techmap vhdl
54 LIBFILE ..\..\lib\techmap\maps\alltap.vhd techmap vhdl
55 LIBFILE ..\..\lib\techmap\maps\clkgen.vhd techmap vhdl
56 LIBFILE ..\..\lib\techmap\maps\clkmux.vhd techmap vhdl
57 LIBFILE ..\..\lib\techmap\maps\clkand.vhd techmap vhdl
58 LIBFILE ..\..\lib\techmap\maps\ddr_ireg.vhd techmap vhdl
59 LIBFILE ..\..\lib\techmap\maps\ddr_oreg.vhd techmap vhdl
60 LIBFILE ..\..\lib\techmap\maps\ddrphy.vhd techmap vhdl
61 LIBFILE ..\..\lib\techmap\maps\syncram.vhd techmap vhdl
62 LIBFILE ..\..\lib\techmap\maps\syncram64.vhd techmap vhdl
63 LIBFILE ..\..\lib\techmap\maps\syncram_2p.vhd techmap vhdl
64 LIBFILE ..\..\lib\techmap\maps\syncram_dp.vhd techmap vhdl
65 LIBFILE ..\..\lib\techmap\maps\syncfifo.vhd techmap vhdl
66 LIBFILE ..\..\lib\techmap\maps\regfile_3p.vhd techmap vhdl
67 LIBFILE ..\..\lib\techmap\maps\tap.vhd techmap vhdl
68 LIBFILE ..\..\lib\techmap\maps\techbuf.vhd techmap vhdl
69 LIBFILE ..\..\lib\techmap\maps\nandtree.vhd techmap vhdl
70 LIBFILE ..\..\lib\techmap\maps\clkpad.vhd techmap vhdl
71 LIBFILE ..\..\lib\techmap\maps\clkpad_ds.vhd techmap vhdl
72 LIBFILE ..\..\lib\techmap\maps\inpad.vhd techmap vhdl
73 LIBFILE ..\..\lib\techmap\maps\inpad_ds.vhd techmap vhdl
74 LIBFILE ..\..\lib\techmap\maps\iodpad.vhd techmap vhdl
75 LIBFILE ..\..\lib\techmap\maps\iopad.vhd techmap vhdl
76 LIBFILE ..\..\lib\techmap\maps\iopad_ds.vhd techmap vhdl
77 LIBFILE ..\..\lib\techmap\maps\lvds_combo.vhd techmap vhdl
78 LIBFILE ..\..\lib\techmap\maps\odpad.vhd techmap vhdl
79 LIBFILE ..\..\lib\techmap\maps\outpad.vhd techmap vhdl
80 LIBFILE ..\..\lib\techmap\maps\outpad_ds.vhd techmap vhdl
81 LIBFILE ..\..\lib\techmap\maps\toutpad.vhd techmap vhdl
82 LIBFILE ..\..\lib\techmap\maps\skew_outpad.vhd techmap vhdl
83 LIBFILE ..\..\lib\techmap\maps\grspwc_net.vhd techmap vhdl
84 LIBFILE ..\..\lib\techmap\maps\grspwc2_net.vhd techmap vhdl
85 LIBFILE ..\..\lib\techmap\maps\grlfpw_net.vhd techmap vhdl
86 LIBFILE ..\..\lib\techmap\maps\grfpw_net.vhd techmap vhdl
87 LIBFILE ..\..\lib\techmap\maps\mul_61x61.vhd techmap vhdl
88 LIBFILE ..\..\lib\techmap\maps\cpu_disas_net.vhd techmap vhdl
89 LIBFILE ..\..\lib\techmap\maps\ringosc.vhd techmap vhdl
90 LIBFILE ..\..\lib\techmap\maps\system_monitor.vhd techmap vhdl
91 LIBFILE ..\..\lib\techmap\maps\grgates.vhd techmap vhdl
92 LIBFILE ..\..\lib\techmap\maps\inpad_ddr.vhd techmap vhdl
93 LIBFILE ..\..\lib\techmap\maps\outpad_ddr.vhd techmap vhdl
94 LIBFILE ..\..\lib\techmap\maps\iopad_ddr.vhd techmap vhdl
95 LIBFILE ..\..\lib\techmap\maps\syncram128bw.vhd techmap vhdl
96 LIBFILE ..\..\lib\techmap\maps\syncram128.vhd techmap vhdl
97 LIBFILE ..\..\lib\techmap\maps\syncram156bw.vhd techmap vhdl
98 SUBLIB eth VhdlLibrary vhdl
99 LIBFILE ..\..\lib\eth\comp\ethcomp.vhd eth vhdl
100 LIBFILE ..\..\lib\eth\core\greth_pkg.vhd eth vhdl
101 LIBFILE ..\..\lib\eth\core\eth_rstgen.vhd eth vhdl
102 LIBFILE ..\..\lib\eth\core\eth_ahb_mst.vhd eth vhdl
103 LIBFILE ..\..\lib\eth\core\greth_tx.vhd eth vhdl
104 LIBFILE ..\..\lib\eth\core\greth_rx.vhd eth vhdl
105 LIBFILE ..\..\lib\eth\core\grethc.vhd eth vhdl
106 LIBFILE ..\..\lib\eth\wrapper\greth_gen.vhd eth vhdl
107 LIBFILE ..\..\lib\eth\wrapper\greth_gbit_gen.vhd eth vhdl
108 SUBLIB gaisler VhdlLibrary vhdl
109 LIBFILE ..\..\lib\gaisler\arith\arith.vhd gaisler vhdl
110 LIBFILE ..\..\lib\gaisler\arith\mul32.vhd gaisler vhdl
111 LIBFILE ..\..\lib\gaisler\arith\div32.vhd gaisler vhdl
112 LIBFILE ..\..\lib\gaisler\memctrl\memctrl.vhd gaisler vhdl
113 LIBFILE ..\..\lib\gaisler\memctrl\sdctrl.vhd gaisler vhdl
114 LIBFILE ..\..\lib\gaisler\memctrl\sdctrl64.vhd gaisler vhdl
115 LIBFILE ..\..\lib\gaisler\memctrl\sdmctrl.vhd gaisler vhdl
116 LIBFILE ..\..\lib\gaisler\memctrl\srctrl.vhd gaisler vhdl
117 LIBFILE ..\..\lib\gaisler\memctrl\spimctrl.vhd gaisler vhdl
118 LIBFILE ..\..\lib\gaisler\leon3\leon3.vhd gaisler vhdl
119 LIBFILE ..\..\lib\gaisler\leon3\mmuconfig.vhd gaisler vhdl
120 LIBFILE ..\..\lib\gaisler\leon3\mmuiface.vhd gaisler vhdl
121 LIBFILE ..\..\lib\gaisler\leon3\libmmu.vhd gaisler vhdl
122 LIBFILE ..\..\lib\gaisler\leon3\libiu.vhd gaisler vhdl
123 LIBFILE ..\..\lib\gaisler\leon3\libcache.vhd gaisler vhdl
124 LIBFILE ..\..\lib\gaisler\leon3\libproc3.vhd gaisler vhdl
125 LIBFILE ..\..\lib\gaisler\leon3\cachemem.vhd gaisler vhdl
126 LIBFILE ..\..\lib\gaisler\leon3\mmu_icache.vhd gaisler vhdl
127 LIBFILE ..\..\lib\gaisler\leon3\mmu_dcache.vhd gaisler vhdl
128 LIBFILE ..\..\lib\gaisler\leon3\mmu_acache.vhd gaisler vhdl
129 LIBFILE ..\..\lib\gaisler\leon3\mmutlbcam.vhd gaisler vhdl
130 LIBFILE ..\..\lib\gaisler\leon3\mmulrue.vhd gaisler vhdl
131 LIBFILE ..\..\lib\gaisler\leon3\mmulru.vhd gaisler vhdl
132 LIBFILE ..\..\lib\gaisler\leon3\mmutlb.vhd gaisler vhdl
133 LIBFILE ..\..\lib\gaisler\leon3\mmutw.vhd gaisler vhdl
134 LIBFILE ..\..\lib\gaisler\leon3\mmu.vhd gaisler vhdl
135 LIBFILE ..\..\lib\gaisler\leon3\mmu_cache.vhd gaisler vhdl
136 LIBFILE ..\..\lib\gaisler\leon3\cpu_disasx.vhd gaisler vhdl
137 LIBFILE ..\..\lib\gaisler\leon3\iu3.vhd gaisler vhdl
138 LIBFILE ..\..\lib\gaisler\leon3\grfpwx.vhd gaisler vhdl
139 LIBFILE ..\..\lib\gaisler\leon3\mfpwx.vhd gaisler vhdl
140 LIBFILE ..\..\lib\gaisler\leon3\grlfpwx.vhd gaisler vhdl
141 LIBFILE ..\..\lib\gaisler\leon3\tbufmem.vhd gaisler vhdl
142 LIBFILE ..\..\lib\gaisler\leon3\dsu3x.vhd gaisler vhdl
143 LIBFILE ..\..\lib\gaisler\leon3\dsu3.vhd gaisler vhdl
144 LIBFILE ..\..\lib\gaisler\leon3\proc3.vhd gaisler vhdl
145 LIBFILE ..\..\lib\gaisler\leon3\leon3s.vhd gaisler vhdl
146 LIBFILE ..\..\lib\gaisler\leon3\leon3cg.vhd gaisler vhdl
147 LIBFILE ..\..\lib\gaisler\leon3\irqmp.vhd gaisler vhdl
148 LIBFILE ..\..\lib\gaisler\leon3\grfpwxsh.vhd gaisler vhdl
149 LIBFILE ..\..\lib\gaisler\leon3\grfpushwx.vhd gaisler vhdl
150 LIBFILE ..\..\lib\gaisler\leon3\leon3sh.vhd gaisler vhdl
151 LIBFILE ..\..\lib\gaisler\misc\misc.vhd gaisler vhdl
152 LIBFILE ..\..\lib\gaisler\misc\rstgen.vhd gaisler vhdl
153 LIBFILE ..\..\lib\gaisler\misc\gptimer.vhd gaisler vhdl
154 LIBFILE ..\..\lib\gaisler\misc\ahbram.vhd gaisler vhdl
155 LIBFILE ..\..\lib\gaisler\misc\ahbdpram.vhd gaisler vhdl
156 LIBFILE ..\..\lib\gaisler\misc\ahbtrace.vhd gaisler vhdl
157 LIBFILE ..\..\lib\gaisler\misc\ahbtrace_mb.vhd gaisler vhdl
158 LIBFILE ..\..\lib\gaisler\misc\ahbmst.vhd gaisler vhdl
159 LIBFILE ..\..\lib\gaisler\misc\grgpio.vhd gaisler vhdl
160 LIBFILE ..\..\lib\gaisler\misc\ahbstat.vhd gaisler vhdl
161 LIBFILE ..\..\lib\gaisler\misc\logan.vhd gaisler vhdl
162 LIBFILE ..\..\lib\gaisler\misc\apbps2.vhd gaisler vhdl
163 LIBFILE ..\..\lib\gaisler\misc\charrom_package.vhd gaisler vhdl
164 LIBFILE ..\..\lib\gaisler\misc\charrom.vhd gaisler vhdl
165 LIBFILE ..\..\lib\gaisler\misc\apbvga.vhd gaisler vhdl
166 LIBFILE ..\..\lib\gaisler\misc\svgactrl.vhd gaisler vhdl
167 LIBFILE ..\..\lib\gaisler\misc\i2cmst_gen.vhd gaisler vhdl
168 LIBFILE ..\..\lib\gaisler\misc\spictrl.vhd gaisler vhdl
169 LIBFILE ..\..\lib\gaisler\misc\i2cslv.vhd gaisler vhdl
170 LIBFILE ..\..\lib\gaisler\misc\wild.vhd gaisler vhdl
171 LIBFILE ..\..\lib\gaisler\misc\wild2ahb.vhd gaisler vhdl
172 LIBFILE ..\..\lib\gaisler\misc\grsysmon.vhd gaisler vhdl
173 LIBFILE ..\..\lib\gaisler\misc\gracectrl.vhd gaisler vhdl
174 LIBFILE ..\..\lib\gaisler\misc\grgpreg.vhd gaisler vhdl
175 LIBFILE ..\..\lib\gaisler\misc\ahbmst2.vhd gaisler vhdl
176 LIBFILE ..\..\lib\gaisler\misc\ahb_mst_iface.vhd gaisler vhdl
177 LIBFILE ..\..\lib\gaisler\net\net.vhd gaisler vhdl
178 LIBFILE ..\..\lib\gaisler\uart\uart.vhd gaisler vhdl
179 LIBFILE ..\..\lib\gaisler\uart\libdcom.vhd gaisler vhdl
180 LIBFILE ..\..\lib\gaisler\uart\apbuart.vhd gaisler vhdl
181 LIBFILE ..\..\lib\gaisler\uart\dcom.vhd gaisler vhdl
182 LIBFILE ..\..\lib\gaisler\uart\dcom_uart.vhd gaisler vhdl
183 LIBFILE ..\..\lib\gaisler\uart\ahbuart.vhd gaisler vhdl
184 LIBFILE ..\..\lib\gaisler\jtag\jtag.vhd gaisler vhdl
185 LIBFILE ..\..\lib\gaisler\jtag\libjtagcom.vhd gaisler vhdl
186 LIBFILE ..\..\lib\gaisler\jtag\jtagcom.vhd gaisler vhdl
187 LIBFILE ..\..\lib\gaisler\jtag\ahbjtag.vhd gaisler vhdl
188 LIBFILE ..\..\lib\gaisler\jtag\ahbjtag_bsd.vhd gaisler vhdl
189 LIBFILE ..\..\lib\gaisler\greth\ethernet_mac.vhd gaisler vhdl
190 LIBFILE ..\..\lib\gaisler\greth\greth.vhd gaisler vhdl
191 LIBFILE ..\..\lib\gaisler\greth\greth_gbit.vhd gaisler vhdl
192 LIBFILE ..\..\lib\gaisler\greth\grethm.vhd gaisler vhdl
193 LIBFILE ..\..\lib\gaisler\ddr\ddr_phy.vhd gaisler vhdl
194 LIBFILE ..\..\lib\gaisler\ddr\ddrsp16a.vhd gaisler vhdl
195 LIBFILE ..\..\lib\gaisler\ddr\ddrsp32a.vhd gaisler vhdl
196 LIBFILE ..\..\lib\gaisler\ddr\ddrsp64a.vhd gaisler vhdl
197 LIBFILE ..\..\lib\gaisler\ddr\ddrspa.vhd gaisler vhdl
198 LIBFILE ..\..\lib\gaisler\ddr\ddr2spa.vhd gaisler vhdl
199 LIBFILE ..\..\lib\gaisler\ddr\ddr2buf.vhd gaisler vhdl
200 LIBFILE ..\..\lib\gaisler\ddr\ddr2spax.vhd gaisler vhdl
201 LIBFILE ..\..\lib\gaisler\ddr\ddr2spax_ahb.vhd gaisler vhdl
202 LIBFILE ..\..\lib\gaisler\ddr\ddr2spax_ddr.vhd gaisler vhdl
203 SUBLIB esa VhdlLibrary vhdl
204 LIBFILE ..\..\lib\esa\memoryctrl\memoryctrl.vhd esa vhdl
205 LIBFILE ..\..\lib\esa\memoryctrl\mctrl.vhd esa vhdl
206 SUBLIB fmf VhdlLibrary vhdl
207 SUBLIB spansion VhdlLibrary vhdl
208 SUBLIB gsi VhdlLibrary vhdl
209 SUBLIB lpp VhdlLibrary vhdl
210 LIBFILE ..\..\lib\lpp\.\general_purpose\Adder.vhd lpp vhdl
211 LIBFILE ..\..\lib\lpp\.\general_purpose\ADDRcntr.vhd lpp vhdl
212 LIBFILE ..\..\lib\lpp\.\general_purpose\ALU.vhd lpp vhdl
213 LIBFILE ..\..\lib\lpp\.\general_purpose\Clk_divider.vhd lpp vhdl
214 LIBFILE ..\..\lib\lpp\.\general_purpose\general_purpose.vhd lpp vhdl
215 LIBFILE ..\..\lib\lpp\.\general_purpose\MAC_CONTROLER.vhd lpp vhdl
216 LIBFILE ..\..\lib\lpp\.\general_purpose\MAC_MUX2.vhd lpp vhdl
217 LIBFILE ..\..\lib\lpp\.\general_purpose\MAC_MUX.vhd lpp vhdl
218 LIBFILE ..\..\lib\lpp\.\general_purpose\MAC_REG.vhd lpp vhdl
219 LIBFILE ..\..\lib\lpp\.\general_purpose\MAC.vhd lpp vhdl
220 LIBFILE ..\..\lib\lpp\.\general_purpose\Multiplier.vhd lpp vhdl
221 LIBFILE ..\..\lib\lpp\.\general_purpose\MUX2.vhd lpp vhdl
222 LIBFILE ..\..\lib\lpp\.\general_purpose\REG.vhd lpp vhdl
223 LIBFILE ..\..\lib\lpp\.\general_purpose\Shifter.vhd lpp vhdl
224 LIBFILE ..\..\lib\lpp\.\lpp_ad_Conv\AD7688_drvr.vhd lpp vhdl
225 LIBFILE ..\..\lib\lpp\.\lpp_ad_Conv\AD7688_spi_if.vhd lpp vhdl
226 LIBFILE ..\..\lib\lpp\.\lpp_ad_Conv\ADS7886_drvr.vhd lpp vhdl
227 LIBFILE ..\..\lib\lpp\.\lpp_ad_Conv\lpp_ad_Conv.vhd lpp vhdl
228 LIBFILE ..\..\lib\lpp\.\lpp_ad_Conv\lpp_apb_ad_conv.vhd lpp vhdl
229 LIBFILE ..\..\lib\lpp\.\lpp_CNA_amba\APB_CNA.vhd lpp vhdl
230 LIBFILE ..\..\lib\lpp\.\lpp_CNA_amba\clock.vhd lpp vhdl
231 LIBFILE ..\..\lib\lpp\.\lpp_CNA_amba\CNA_TabloC.vhd lpp vhdl
232 LIBFILE ..\..\lib\lpp\.\lpp_CNA_amba\Convertisseur_config.vhd lpp vhdl
233 LIBFILE ..\..\lib\lpp\.\lpp_CNA_amba\GeneSYNC_flag.vhd lpp vhdl
234 LIBFILE ..\..\lib\lpp\.\lpp_CNA_amba\lpp_CNA_amba.vhd lpp vhdl
235 LIBFILE ..\..\lib\lpp\.\lpp_CNA_amba\Serialize.vhd lpp vhdl
236 LIBFILE ..\..\lib\lpp\.\lpp_uart\APB_UART.vhd lpp vhdl
237 LIBFILE ..\..\lib\lpp\.\lpp_uart\BaudGen.vhd lpp vhdl
238 LIBFILE ..\..\lib\lpp\.\lpp_uart\lpp_uart.vhd lpp vhdl
239 LIBFILE ..\..\lib\lpp\.\lpp_uart\Shift_REG.vhd lpp vhdl
240 LIBFILE ..\..\lib\lpp\.\lpp_uart\UART.vhd lpp vhdl
241 LIBFILE ..\..\lib\lpp\.\lpp_amba\APB_MULTI_DIODE.vhd lpp vhdl
242 LIBFILE ..\..\lib\lpp\.\lpp_amba\APB_SIMPLE_DIODE.vhd lpp vhdl
243 LIBFILE ..\..\lib\lpp\.\lpp_amba\lpp_amba.vhd lpp vhdl
244 LIBFILE ..\..\lib\lpp\.\dsp\iir_filter\APB_IIR_CEL.vhd lpp vhdl
245 LIBFILE ..\..\lib\lpp\.\dsp\iir_filter\FILTERcfg.vhd lpp vhdl
246 LIBFILE ..\..\lib\lpp\.\dsp\iir_filter\FilterCTRLR.vhd lpp vhdl
247 LIBFILE ..\..\lib\lpp\.\dsp\iir_filter\FILTER_RAM_CTRLR.vhd lpp vhdl
248 LIBFILE ..\..\lib\lpp\.\dsp\iir_filter\FILTER.vhd lpp vhdl
249 LIBFILE ..\..\lib\lpp\.\dsp\iir_filter\IIR_CEL_CTRLR.vhd lpp vhdl
250 LIBFILE ..\..\lib\lpp\.\dsp\iir_filter\IIR_CEL_FILTER.vhd lpp vhdl
251 LIBFILE ..\..\lib\lpp\.\dsp\iir_filter\iir_filter.vhd lpp vhdl
252 LIBFILE ..\..\lib\lpp\.\dsp\iir_filter\RAM_CEL.vhd lpp vhdl
253 LIBFILE ..\..\lib\lpp\.\dsp\iir_filter\RAM_CTRLR2.vhd lpp vhdl
254 LIBFILE ..\..\lib\lpp\.\dsp\iir_filter\RAM.vhd lpp vhdl
255 LIBFILE ..\..\lib\lpp\.\dsp\iir_filter\Top_Filtre_IIR.vhd lpp vhdl
256 LIBFILE ..\..\lib\lpp\.\amba_lcd_16x2_ctrlr\amba_lcd_16x2_ctrlr.vhd lpp vhdl
257 LIBFILE ..\..\lib\lpp\.\amba_lcd_16x2_ctrlr\apb_lcd_ctrlr.vhd lpp vhdl
258 LIBFILE ..\..\lib\lpp\.\amba_lcd_16x2_ctrlr\FRAME_CLK.vhd lpp vhdl
259 LIBFILE ..\..\lib\lpp\.\amba_lcd_16x2_ctrlr\LCD_16x2_CFG.vhd lpp vhdl
260 LIBFILE ..\..\lib\lpp\.\amba_lcd_16x2_ctrlr\LCD_16x2_DRVR.vhd lpp vhdl
261 LIBFILE ..\..\lib\lpp\.\amba_lcd_16x2_ctrlr\LCD_16x2_ENGINE.vhd lpp vhdl
262 LIBFILE ..\..\lib\lpp\.\amba_lcd_16x2_ctrlr\LCD_2x16_DRIVER.vhd lpp vhdl
263 LIBFILE ..\..\lib\lpp\.\amba_lcd_16x2_ctrlr\LCD_CLK_GENERATOR.vhd lpp vhdl
264 LIBFILE ..\..\lib\lpp\.\amba_lcd_16x2_ctrlr\Top_LCD.vhd lpp vhdl
265 SUBLIB work VhdlLibrary vhdl
266 DEPASSOC leon3mp leon3mp.ucf
267 [Normal]
268 _SynthFsmEncode=xstvhd, Spartan3E, VHDL.t_synthesize, 1102507235, None
269 p_xstBusDelimiter=xstvhd, Spartan3E, VHDL.t_synthesize, 1102507235, ()
270 xilxMapAllowLogicOpt=xstvhd, Spartan3E, VHDL.t_placeAndRouteDes, 1102861051, True
271 xilxMapCoverMode=xstvhd, Spartan3E, VHDL.t_placeAndRouteDes, 1102861051, Speed
272 xilxMapTimingDrivenPacking=xstvhd, Spartan3E, VHDL.t_placeAndRouteDes, 1102861051, True
273 xilxNgdbld_AUL=xstvhd, Spartan3E, VHDL.t_placeAndRouteDes, 1102861051, True
274 xilxNgdbldMacro=xstvhd, Spartan3E, VHDL.t_ngdbuild, 1105377047, ..\..\netlists\xilinx\Spartan3
275 xilxPAReffortLevel=xstvhd, Spartan3E, VHDL.t_placeAndRouteDes, 1102861051, Medium
@@ -0,0 +1,17
1 vlib modelsim
2 vlib modelsim/grlib
3 vlib modelsim/unisim
4 vlib modelsim/dw02
5 vlib modelsim/synplify
6 vlib modelsim/techmap
7 vlib modelsim/eth
8 vlib modelsim/gaisler
9 vlib modelsim/esa
10 vlib modelsim/fmf
11 vlib modelsim/spansion
12 vlib modelsim/gsi
13 vlib modelsim/lpp
14 vlib modelsim/cypress
15 vlib modelsim/hynix
16 vlib modelsim/micron
17 vlib modelsim/work
@@ -0,0 +1,1
1 grlib unisim dw02 synplify techmap eth gaisler esa fmf spansion gsi lpp cypress hynix micron work No newline at end of file
@@ -0,0 +1,307
1 acom -quiet -accept87 -work grlib ../../../../lib/grlib/stdlib/version.vhd
2 acom -quiet -accept87 -work grlib ../../../../lib/grlib/stdlib/config.vhd
3 acom -quiet -accept87 -work grlib ../../../../lib/grlib/stdlib/stdlib.vhd
4 acom -quiet -accept87 -work grlib ../../../../lib/grlib/stdlib/stdio.vhd
5 acom -quiet -accept87 -work grlib ../../../../lib/grlib/stdlib/testlib.vhd
6 acom -quiet -accept87 -work grlib ../../../../lib/grlib/util/util.vhd
7 acom -quiet -accept87 -work grlib ../../../../lib/grlib/sparc/sparc.vhd
8 acom -quiet -accept87 -work grlib ../../../../lib/grlib/sparc/sparc_disas.vhd
9 acom -quiet -accept87 -work grlib ../../../../lib/grlib/sparc/cpu_disas.vhd
10 acom -quiet -accept87 -work grlib ../../../../lib/grlib/modgen/multlib.vhd
11 acom -quiet -accept87 -work grlib ../../../../lib/grlib/modgen/leaves.vhd
12 acom -quiet -accept87 -work grlib ../../../../lib/grlib/amba/amba.vhd
13 acom -quiet -accept87 -work grlib ../../../../lib/grlib/amba/devices.vhd
14 acom -quiet -accept87 -work grlib ../../../../lib/grlib/amba/defmst.vhd
15 acom -quiet -accept87 -work grlib ../../../../lib/grlib/amba/apbctrl.vhd
16 acom -quiet -accept87 -work grlib ../../../../lib/grlib/amba/ahbctrl.vhd
17 acom -quiet -accept87 -work grlib ../../../../lib/grlib/amba/dma2ahb_pkg.vhd
18 acom -quiet -accept87 -work grlib ../../../../lib/grlib/amba/dma2ahb.vhd
19 acom -quiet -accept87 -work grlib ../../../../lib/grlib/amba/dma2ahb_tp.vhd
20 acom -quiet -accept87 -work grlib ../../../../lib/grlib/amba/amba_tp.vhd
21 acom -quiet -accept87 -work grlib ../../../../lib/grlib/amba/at/at_pkg.vhd
22 acom -quiet -accept87 -work grlib ../../../../lib/grlib/amba/at/at_ahb_mst_pkg.vhd
23 acom -quiet -accept87 -work grlib ../../../../lib/grlib/amba/at/at_ahb_slv_pkg.vhd
24 acom -quiet -accept87 -work grlib ../../../../lib/grlib/amba/at/at_util.vhd
25 acom -quiet -accept87 -work grlib ../../../../lib/grlib/amba/at/at_ahb_mst.vhd
26 acom -quiet -accept87 -work grlib ../../../../lib/grlib/amba/at/at_ahb_slv.vhd
27 acom -quiet -accept87 -work grlib ../../../../lib/grlib/amba/at/at_ahbs.vhd
28 acom -quiet -accept87 -work grlib ../../../../lib/grlib/amba/at/at_ahb_ctrl.vhd
29 acom -quiet -accept87 -work unisim ../../../../lib/tech/unisim/ise/unisim_VPKG.vhd
30 acom -quiet -accept87 -work unisim ../../../../lib/tech/unisim/ise/unisim_VCOMP.vhd
31 acom -quiet -accept87 -work unisim ../../../../lib/tech/unisim/ise/simple_simprim.vhd
32 acom -quiet -accept87 -work unisim ../../../../lib/tech/unisim/ise/unisim_VITAL.vhd
33 acom -quiet -accept87 -work dw02 ../../../../lib/tech/dw02/comp/DW02_components.vhd
34 acom -quiet -accept87 -work synplify ../../../../lib/synplify/sim/synplify.vhd
35 acom -quiet -accept87 -work synplify ../../../../lib/synplify/sim/synattr.vhd
36 acom -quiet -accept87 -work techmap ../../../../lib/techmap/gencomp/gencomp.vhd
37 acom -quiet -accept87 -work techmap ../../../../lib/techmap/gencomp/netcomp.vhd
38 acom -quiet -accept87 -work techmap ../../../../lib/techmap/inferred/memory_inferred.vhd
39 acom -quiet -accept87 -work techmap ../../../../lib/techmap/inferred/ddr_inferred.vhd
40 acom -quiet -accept87 -work techmap ../../../../lib/techmap/inferred/mul_inferred.vhd
41 acom -quiet -accept87 -work techmap ../../../../lib/techmap/inferred/ddr_phy_inferred.vhd
42 acom -quiet -accept87 -work techmap ../../../../lib/techmap/dw02/mul_dw_gen.vhd
43 acom -quiet -accept87 -work techmap ../../../../lib/techmap/unisim/memory_unisim.vhd
44 acom -quiet -accept87 -work techmap ../../../../lib/techmap/unisim/buffer_unisim.vhd
45 acom -quiet -accept87 -work techmap ../../../../lib/techmap/unisim/pads_unisim.vhd
46 acom -quiet -accept87 -work techmap ../../../../lib/techmap/unisim/clkgen_unisim.vhd
47 acom -quiet -accept87 -work techmap ../../../../lib/techmap/unisim/tap_unisim.vhd
48 acom -quiet -accept87 -work techmap ../../../../lib/techmap/unisim/ddr_unisim.vhd
49 acom -quiet -accept87 -work techmap ../../../../lib/techmap/unisim/ddr_phy_unisim.vhd
50 acom -quiet -accept87 -work techmap ../../../../lib/techmap/unisim/grspwc_unisim.vhd
51 acom -quiet -accept87 -work techmap ../../../../lib/techmap/unisim/grspwc2_unisim.vhd
52 acom -quiet -accept87 -work techmap ../../../../lib/techmap/unisim/grusbhc_unisim.vhd
53 acom -quiet -accept87 -work techmap ../../../../lib/techmap/unisim/ssrctrl_unisim.vhd
54 acom -quiet -accept87 -work techmap ../../../../lib/techmap/unisim/sysmon_unisim.vhd
55 acom -quiet -accept87 -work techmap ../../../../lib/techmap/unisim/mul_unisim.vhd
56 acom -quiet -accept87 -work techmap ../../../../lib/techmap/unisim/grfpw_0_unisim.vhd
57 acom -quiet -accept87 -work techmap ../../../../lib/techmap/maps/allclkgen.vhd
58 acom -quiet -accept87 -work techmap ../../../../lib/techmap/maps/allddr.vhd
59 acom -quiet -accept87 -work techmap ../../../../lib/techmap/maps/allmem.vhd
60 acom -quiet -accept87 -work techmap ../../../../lib/techmap/maps/allpads.vhd
61 acom -quiet -accept87 -work techmap ../../../../lib/techmap/maps/alltap.vhd
62 acom -quiet -accept87 -work techmap ../../../../lib/techmap/maps/clkgen.vhd
63 acom -quiet -accept87 -work techmap ../../../../lib/techmap/maps/clkmux.vhd
64 acom -quiet -accept87 -work techmap ../../../../lib/techmap/maps/clkand.vhd
65 acom -quiet -accept87 -work techmap ../../../../lib/techmap/maps/ddr_ireg.vhd
66 acom -quiet -accept87 -work techmap ../../../../lib/techmap/maps/ddr_oreg.vhd
67 acom -quiet -accept87 -work techmap ../../../../lib/techmap/maps/ddrphy.vhd
68 acom -quiet -accept87 -work techmap ../../../../lib/techmap/maps/syncram.vhd
69 acom -quiet -accept87 -work techmap ../../../../lib/techmap/maps/syncram64.vhd
70 acom -quiet -accept87 -work techmap ../../../../lib/techmap/maps/syncram_2p.vhd
71 acom -quiet -accept87 -work techmap ../../../../lib/techmap/maps/syncram_dp.vhd
72 acom -quiet -accept87 -work techmap ../../../../lib/techmap/maps/syncfifo.vhd
73 acom -quiet -accept87 -work techmap ../../../../lib/techmap/maps/regfile_3p.vhd
74 acom -quiet -accept87 -work techmap ../../../../lib/techmap/maps/tap.vhd
75 acom -quiet -accept87 -work techmap ../../../../lib/techmap/maps/techbuf.vhd
76 acom -quiet -accept87 -work techmap ../../../../lib/techmap/maps/nandtree.vhd
77 acom -quiet -accept87 -work techmap ../../../../lib/techmap/maps/clkpad.vhd
78 acom -quiet -accept87 -work techmap ../../../../lib/techmap/maps/clkpad_ds.vhd
79 acom -quiet -accept87 -work techmap ../../../../lib/techmap/maps/inpad.vhd
80 acom -quiet -accept87 -work techmap ../../../../lib/techmap/maps/inpad_ds.vhd
81 acom -quiet -accept87 -work techmap ../../../../lib/techmap/maps/iodpad.vhd
82 acom -quiet -accept87 -work techmap ../../../../lib/techmap/maps/iopad.vhd
83 acom -quiet -accept87 -work techmap ../../../../lib/techmap/maps/iopad_ds.vhd
84 acom -quiet -accept87 -work techmap ../../../../lib/techmap/maps/lvds_combo.vhd
85 acom -quiet -accept87 -work techmap ../../../../lib/techmap/maps/odpad.vhd
86 acom -quiet -accept87 -work techmap ../../../../lib/techmap/maps/outpad.vhd
87 acom -quiet -accept87 -work techmap ../../../../lib/techmap/maps/outpad_ds.vhd
88 acom -quiet -accept87 -work techmap ../../../../lib/techmap/maps/toutpad.vhd
89 acom -quiet -accept87 -work techmap ../../../../lib/techmap/maps/skew_outpad.vhd
90 acom -quiet -accept87 -work techmap ../../../../lib/techmap/maps/grspwc_net.vhd
91 acom -quiet -accept87 -work techmap ../../../../lib/techmap/maps/grspwc2_net.vhd
92 acom -quiet -accept87 -work techmap ../../../../lib/techmap/maps/grlfpw_net.vhd
93 acom -quiet -accept87 -work techmap ../../../../lib/techmap/maps/grfpw_net.vhd
94 acom -quiet -accept87 -work techmap ../../../../lib/techmap/maps/mul_61x61.vhd
95 acom -quiet -accept87 -work techmap ../../../../lib/techmap/maps/cpu_disas_net.vhd
96 acom -quiet -accept87 -work techmap ../../../../lib/techmap/maps/ringosc.vhd
97 acom -quiet -accept87 -work techmap ../../../../lib/techmap/maps/system_monitor.vhd
98 acom -quiet -accept87 -work techmap ../../../../lib/techmap/maps/grgates.vhd
99 acom -quiet -accept87 -work techmap ../../../../lib/techmap/maps/inpad_ddr.vhd
100 acom -quiet -accept87 -work techmap ../../../../lib/techmap/maps/outpad_ddr.vhd
101 acom -quiet -accept87 -work techmap ../../../../lib/techmap/maps/iopad_ddr.vhd
102 acom -quiet -accept87 -work techmap ../../../../lib/techmap/maps/syncram128bw.vhd
103 acom -quiet -accept87 -work techmap ../../../../lib/techmap/maps/syncram128.vhd
104 acom -quiet -accept87 -work techmap ../../../../lib/techmap/maps/syncram156bw.vhd
105 acom -quiet -accept87 -work eth ../../../../lib/eth/comp/ethcomp.vhd
106 acom -quiet -accept87 -work eth ../../../../lib/eth/core/greth_pkg.vhd
107 acom -quiet -accept87 -work eth ../../../../lib/eth/core/eth_rstgen.vhd
108 acom -quiet -accept87 -work eth ../../../../lib/eth/core/eth_ahb_mst.vhd
109 acom -quiet -accept87 -work eth ../../../../lib/eth/core/greth_tx.vhd
110 acom -quiet -accept87 -work eth ../../../../lib/eth/core/greth_rx.vhd
111 acom -quiet -accept87 -work eth ../../../../lib/eth/core/grethc.vhd
112 acom -quiet -accept87 -work eth ../../../../lib/eth/wrapper/greth_gen.vhd
113 acom -quiet -accept87 -work eth ../../../../lib/eth/wrapper/greth_gbit_gen.vhd
114 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/arith/arith.vhd
115 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/arith/mul32.vhd
116 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/arith/div32.vhd
117 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/memctrl/memctrl.vhd
118 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/memctrl/sdctrl.vhd
119 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/memctrl/sdctrl64.vhd
120 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/memctrl/sdmctrl.vhd
121 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/memctrl/srctrl.vhd
122 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/memctrl/spimctrl.vhd
123 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/leon3/leon3.vhd
124 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/leon3/mmuconfig.vhd
125 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/leon3/mmuiface.vhd
126 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/leon3/libmmu.vhd
127 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/leon3/libiu.vhd
128 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/leon3/libcache.vhd
129 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/leon3/libproc3.vhd
130 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/leon3/cachemem.vhd
131 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/leon3/mmu_icache.vhd
132 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/leon3/mmu_dcache.vhd
133 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/leon3/mmu_acache.vhd
134 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/leon3/mmutlbcam.vhd
135 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/leon3/mmulrue.vhd
136 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/leon3/mmulru.vhd
137 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/leon3/mmutlb.vhd
138 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/leon3/mmutw.vhd
139 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/leon3/mmu.vhd
140 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/leon3/mmu_cache.vhd
141 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/leon3/cpu_disasx.vhd
142 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/leon3/iu3.vhd
143 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/leon3/grfpwx.vhd
144 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/leon3/mfpwx.vhd
145 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/leon3/grlfpwx.vhd
146 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/leon3/tbufmem.vhd
147 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/leon3/dsu3x.vhd
148 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/leon3/dsu3.vhd
149 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/leon3/proc3.vhd
150 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/leon3/leon3s.vhd
151 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/leon3/leon3cg.vhd
152 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/leon3/irqmp.vhd
153 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/leon3/grfpwxsh.vhd
154 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/leon3/grfpushwx.vhd
155 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/leon3/leon3sh.vhd
156 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/misc/misc.vhd
157 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/misc/rstgen.vhd
158 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/misc/gptimer.vhd
159 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/misc/ahbram.vhd
160 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/misc/ahbdpram.vhd
161 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/misc/ahbtrace.vhd
162 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/misc/ahbtrace_mb.vhd
163 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/misc/ahbmst.vhd
164 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/misc/grgpio.vhd
165 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/misc/ahbstat.vhd
166 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/misc/logan.vhd
167 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/misc/apbps2.vhd
168 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/misc/charrom_package.vhd
169 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/misc/charrom.vhd
170 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/misc/apbvga.vhd
171 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/misc/svgactrl.vhd
172 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/misc/i2cmst_gen.vhd
173 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/misc/spictrl.vhd
174 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/misc/i2cslv.vhd
175 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/misc/wild.vhd
176 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/misc/wild2ahb.vhd
177 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/misc/grsysmon.vhd
178 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/misc/gracectrl.vhd
179 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/misc/grgpreg.vhd
180 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/misc/ahbmst2.vhd
181 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/misc/ahb_mst_iface.vhd
182 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/net/net.vhd
183 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/uart/uart.vhd
184 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/uart/libdcom.vhd
185 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/uart/apbuart.vhd
186 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/uart/dcom.vhd
187 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/uart/dcom_uart.vhd
188 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/uart/ahbuart.vhd
189 alog -quiet -work gaisler ../../../../lib/gaisler/sim/i2c_slave_model.v
190 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/sim/sim.vhd
191 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/sim/sram.vhd
192 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/sim/ata_device.vhd
193 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/sim/sram16.vhd
194 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/sim/phy.vhd
195 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/sim/ahbrep.vhd
196 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/sim/delay_wire.vhd
197 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/sim/spi_flash.vhd
198 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/sim/pwm_check.vhd
199 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/sim/usbsim.vhd
200 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/sim/grusbdcsim.vhd
201 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/sim/grusb_dclsim.vhd
202 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/jtag/jtag.vhd
203 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/jtag/libjtagcom.vhd
204 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/jtag/jtagcom.vhd
205 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/jtag/ahbjtag.vhd
206 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/jtag/ahbjtag_bsd.vhd
207 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/jtag/jtagtst.vhd
208 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/greth/ethernet_mac.vhd
209 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/greth/greth.vhd
210 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/greth/greth_gbit.vhd
211 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/greth/grethm.vhd
212 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/ddr/ddr_phy.vhd
213 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/ddr/ddrsp16a.vhd
214 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/ddr/ddrsp32a.vhd
215 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/ddr/ddrsp64a.vhd
216 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/ddr/ddrspa.vhd
217 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/ddr/ddr2spa.vhd
218 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/ddr/ddr2buf.vhd
219 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/ddr/ddr2spax.vhd
220 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/ddr/ddr2spax_ahb.vhd
221 acom -quiet -accept87 -work gaisler ../../../../lib/gaisler/ddr/ddr2spax_ddr.vhd
222 acom -quiet -accept87 -work esa ../../../../lib/esa/memoryctrl/memoryctrl.vhd
223 acom -quiet -accept87 -work esa ../../../../lib/esa/memoryctrl/mctrl.vhd
224 acom -quiet -accept87 -work fmf ../../../../lib/fmf/utilities/conversions.vhd
225 acom -quiet -accept87 -work fmf ../../../../lib/fmf/utilities/gen_utils.vhd
226 acom -quiet -accept87 -work fmf ../../../../lib/fmf/flash/flash.vhd
227 acom -quiet -accept87 -work fmf ../../../../lib/fmf/flash/s25fl064a.vhd
228 acom -quiet -accept87 -work fmf ../../../../lib/fmf/flash/m25p80.vhd
229 acom -quiet -accept87 -work fmf ../../../../lib/fmf/fifo/idt7202.vhd
230 acom -quiet -accept87 -work gsi ../../../../lib/gsi/ssram/functions.vhd
231 acom -quiet -accept87 -work gsi ../../../../lib/gsi/ssram/core_burst.vhd
232 acom -quiet -accept87 -work gsi ../../../../lib/gsi/ssram/g880e18bt.vhd
233 acom -quiet -accept87 -work lpp ../../../../lib/lpp/./general_purpose/Adder.vhd
234 acom -quiet -accept87 -work lpp ../../../../lib/lpp/./general_purpose/ADDRcntr.vhd
235 acom -quiet -accept87 -work lpp ../../../../lib/lpp/./general_purpose/ALU.vhd
236 acom -quiet -accept87 -work lpp ../../../../lib/lpp/./general_purpose/Clk_divider.vhd
237 acom -quiet -accept87 -work lpp ../../../../lib/lpp/./general_purpose/general_purpose.vhd
238 acom -quiet -accept87 -work lpp ../../../../lib/lpp/./general_purpose/MAC_CONTROLER.vhd
239 acom -quiet -accept87 -work lpp ../../../../lib/lpp/./general_purpose/MAC_MUX2.vhd
240 acom -quiet -accept87 -work lpp ../../../../lib/lpp/./general_purpose/MAC_MUX.vhd
241 acom -quiet -accept87 -work lpp ../../../../lib/lpp/./general_purpose/MAC_REG.vhd
242 acom -quiet -accept87 -work lpp ../../../../lib/lpp/./general_purpose/MAC.vhd
243 acom -quiet -accept87 -work lpp ../../../../lib/lpp/./general_purpose/Multiplier.vhd
244 acom -quiet -accept87 -work lpp ../../../../lib/lpp/./general_purpose/MUX2.vhd
245 acom -quiet -accept87 -work lpp ../../../../lib/lpp/./general_purpose/REG.vhd
246 acom -quiet -accept87 -work lpp ../../../../lib/lpp/./general_purpose/Shifter.vhd
247 acom -quiet -accept87 -work lpp ../../../../lib/lpp/./lpp_ad_Conv/AD7688_drvr.vhd
248 acom -quiet -accept87 -work lpp ../../../../lib/lpp/./lpp_ad_Conv/AD7688_spi_if.vhd
249 acom -quiet -accept87 -work lpp ../../../../lib/lpp/./lpp_ad_Conv/ADS7886_drvr.vhd
250 acom -quiet -accept87 -work lpp ../../../../lib/lpp/./lpp_ad_Conv/lpp_ad_Conv.vhd
251 acom -quiet -accept87 -work lpp ../../../../lib/lpp/./lpp_ad_Conv/lpp_apb_ad_conv.vhd
252 acom -quiet -accept87 -work lpp ../../../../lib/lpp/./lpp_CNA_amba/APB_CNA.vhd
253 acom -quiet -accept87 -work lpp ../../../../lib/lpp/./lpp_CNA_amba/clock.vhd
254 acom -quiet -accept87 -work lpp ../../../../lib/lpp/./lpp_CNA_amba/CNA_TabloC.vhd
255 acom -quiet -accept87 -work lpp ../../../../lib/lpp/./lpp_CNA_amba/Convertisseur_config.vhd
256 acom -quiet -accept87 -work lpp ../../../../lib/lpp/./lpp_CNA_amba/GeneSYNC_flag.vhd
257 acom -quiet -accept87 -work lpp ../../../../lib/lpp/./lpp_CNA_amba/lpp_CNA_amba.vhd
258 acom -quiet -accept87 -work lpp ../../../../lib/lpp/./lpp_CNA_amba/Serialize.vhd
259 acom -quiet -accept87 -work lpp ../../../../lib/lpp/./lpp_uart/APB_UART.vhd
260 acom -quiet -accept87 -work lpp ../../../../lib/lpp/./lpp_uart/BaudGen.vhd
261 acom -quiet -accept87 -work lpp ../../../../lib/lpp/./lpp_uart/lpp_uart.vhd
262 acom -quiet -accept87 -work lpp ../../../../lib/lpp/./lpp_uart/Shift_REG.vhd
263 acom -quiet -accept87 -work lpp ../../../../lib/lpp/./lpp_uart/UART.vhd
264 acom -quiet -accept87 -work lpp ../../../../lib/lpp/./lpp_amba/APB_MULTI_DIODE.vhd
265 acom -quiet -accept87 -work lpp ../../../../lib/lpp/./lpp_amba/APB_SIMPLE_DIODE.vhd
266 acom -quiet -accept87 -work lpp ../../../../lib/lpp/./lpp_amba/lpp_amba.vhd
267 acom -quiet -accept87 -work lpp ../../../../lib/lpp/./dsp/iir_filter/APB_IIR_CEL.vhd
268 acom -quiet -accept87 -work lpp ../../../../lib/lpp/./dsp/iir_filter/FILTERcfg.vhd
269 acom -quiet -accept87 -work lpp ../../../../lib/lpp/./dsp/iir_filter/FilterCTRLR.vhd
270 acom -quiet -accept87 -work lpp ../../../../lib/lpp/./dsp/iir_filter/FILTER_RAM_CTRLR.vhd
271 acom -quiet -accept87 -work lpp ../../../../lib/lpp/./dsp/iir_filter/FILTER.vhd
272 acom -quiet -accept87 -work lpp ../../../../lib/lpp/./dsp/iir_filter/IIR_CEL_CTRLR.vhd
273 acom -quiet -accept87 -work lpp ../../../../lib/lpp/./dsp/iir_filter/IIR_CEL_FILTER.vhd
274 acom -quiet -accept87 -work lpp ../../../../lib/lpp/./dsp/iir_filter/iir_filter.vhd
275 acom -quiet -accept87 -work lpp ../../../../lib/lpp/./dsp/iir_filter/RAM_CEL.vhd
276 acom -quiet -accept87 -work lpp ../../../../lib/lpp/./dsp/iir_filter/RAM_CTRLR2.vhd
277 acom -quiet -accept87 -work lpp ../../../../lib/lpp/./dsp/iir_filter/RAM.vhd
278 acom -quiet -accept87 -work lpp ../../../../lib/lpp/./dsp/iir_filter/Top_Filtre_IIR.vhd
279 acom -quiet -accept87 -work lpp ../../../../lib/lpp/./amba_lcd_16x2_ctrlr/amba_lcd_16x2_ctrlr.vhd
280 acom -quiet -accept87 -work lpp ../../../../lib/lpp/./amba_lcd_16x2_ctrlr/apb_lcd_ctrlr.vhd
281 acom -quiet -accept87 -work lpp ../../../../lib/lpp/./amba_lcd_16x2_ctrlr/FRAME_CLK.vhd
282 acom -quiet -accept87 -work lpp ../../../../lib/lpp/./amba_lcd_16x2_ctrlr/LCD_16x2_CFG.vhd
283 acom -quiet -accept87 -work lpp ../../../../lib/lpp/./amba_lcd_16x2_ctrlr/LCD_16x2_DRVR.vhd
284 acom -quiet -accept87 -work lpp ../../../../lib/lpp/./amba_lcd_16x2_ctrlr/LCD_16x2_ENGINE.vhd
285 acom -quiet -accept87 -work lpp ../../../../lib/lpp/./amba_lcd_16x2_ctrlr/LCD_2x16_DRIVER.vhd
286 acom -quiet -accept87 -work lpp ../../../../lib/lpp/./amba_lcd_16x2_ctrlr/LCD_CLK_GENERATOR.vhd
287 acom -quiet -accept87 -work lpp ../../../../lib/lpp/./amba_lcd_16x2_ctrlr/Top_LCD.vhd
288 acom -quiet -accept87 -work cypress ../../../../lib/cypress/ssram/components.vhd
289 acom -quiet -accept87 -work cypress ../../../../lib/cypress/ssram/package_utility.vhd
290 acom -quiet -accept87 -work cypress ../../../../lib/cypress/ssram/cy7c1354b.vhd
291 acom -quiet -accept87 -work cypress ../../../../lib/cypress/ssram/cy7c1380d.vhd
292 acom -quiet -accept87 -work hynix ../../../../lib/hynix/ddr2/HY5PS121621F_PACK.vhd
293 acom -quiet -accept87 -work hynix ../../../../lib/hynix/ddr2/HY5PS121621F.vhd
294 acom -quiet -accept87 -work hynix ../../../../lib/hynix/ddr2/components.vhd
295 alog -quiet -work micron ../../../../lib/micron/sdram/mobile_sdr.v
296 acom -quiet -accept87 -work micron ../../../../lib/micron/sdram/components.vhd
297 acom -quiet -accept87 -work micron ../../../../lib/micron/sdram/mt48lc16m16a2.vhd
298 alog -quiet -work micron ../../../../lib/micron/ddr/ddr2.v
299 alog -quiet -work micron ../../../../lib/micron/ddr/mobile_ddr.v
300 acom -quiet -accept87 -work micron ../../../../lib/micron/ddr/mt46v16m16.vhd
301 acom -quiet -accept87 -work work ../../../../lib/work/debug/debug.vhd
302 acom -quiet -accept87 -work work ../../../../lib/work/debug/grtestmod.vhd
303 acom -quiet -accept87 -work work ../../../../lib/work/debug/cpu_disas.vhd
304 acom -quiet -accept87 -work work ../../config.vhd
305 acom -quiet -accept87 -work work ../../ahbrom.vhd
306 acom -quiet -accept87 -work work ../../leon3mp.vhd
307 acom -quiet -accept87 -work work ../../testbench.vhd
@@ -0,0 +1,5
1
2 addfile -vhdl ../../config.vhd
3 addfile -vhdl ../../ahbrom.vhd
4 addfile -vhdl ../../leon3mp.vhd
5 addfile -vhdl ../../testbench.vhd
@@ -0,0 +1,326
1 ncsim:
2 mkdir xncsim
3 mkdir xncsim/grlib
4 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work grlib ../../lib/grlib/stdlib/version.vhd
5 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work grlib ../../lib/grlib/stdlib/config.vhd
6 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work grlib ../../lib/grlib/stdlib/stdlib.vhd
7 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work grlib ../../lib/grlib/stdlib/stdio.vhd
8 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work grlib ../../lib/grlib/stdlib/testlib.vhd
9 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work grlib ../../lib/grlib/util/util.vhd
10 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work grlib ../../lib/grlib/sparc/sparc.vhd
11 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work grlib ../../lib/grlib/sparc/sparc_disas.vhd
12 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work grlib ../../lib/grlib/sparc/cpu_disas.vhd
13 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work grlib ../../lib/grlib/modgen/multlib.vhd
14 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work grlib ../../lib/grlib/modgen/leaves.vhd
15 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work grlib ../../lib/grlib/amba/amba.vhd
16 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work grlib ../../lib/grlib/amba/devices.vhd
17 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work grlib ../../lib/grlib/amba/defmst.vhd
18 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work grlib ../../lib/grlib/amba/apbctrl.vhd
19 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work grlib ../../lib/grlib/amba/ahbctrl.vhd
20 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work grlib ../../lib/grlib/amba/dma2ahb_pkg.vhd
21 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work grlib ../../lib/grlib/amba/dma2ahb.vhd
22 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work grlib ../../lib/grlib/amba/dma2ahb_tp.vhd
23 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work grlib ../../lib/grlib/amba/amba_tp.vhd
24 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work grlib ../../lib/grlib/amba/at/at_pkg.vhd
25 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work grlib ../../lib/grlib/amba/at/at_ahb_mst_pkg.vhd
26 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work grlib ../../lib/grlib/amba/at/at_ahb_slv_pkg.vhd
27 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work grlib ../../lib/grlib/amba/at/at_util.vhd
28 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work grlib ../../lib/grlib/amba/at/at_ahb_mst.vhd
29 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work grlib ../../lib/grlib/amba/at/at_ahb_slv.vhd
30 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work grlib ../../lib/grlib/amba/at/at_ahbs.vhd
31 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work grlib ../../lib/grlib/amba/at/at_ahb_ctrl.vhd
32 mkdir xncsim/unisim
33 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work unisim ../../lib/tech/unisim/ise/unisim_VPKG.vhd
34 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work unisim ../../lib/tech/unisim/ise/unisim_VCOMP.vhd
35 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work unisim ../../lib/tech/unisim/ise/simple_simprim.vhd
36 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work unisim ../../lib/tech/unisim/ise/unisim_VITAL.vhd
37 mkdir xncsim/dw02
38 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work dw02 ../../lib/tech/dw02/comp/DW02_components.vhd
39 mkdir xncsim/synplify
40 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work synplify ../../lib/synplify/sim/synplify.vhd
41 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work synplify ../../lib/synplify/sim/synattr.vhd
42 mkdir xncsim/techmap
43 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work techmap ../../lib/techmap/gencomp/gencomp.vhd
44 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work techmap ../../lib/techmap/gencomp/netcomp.vhd
45 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work techmap ../../lib/techmap/inferred/memory_inferred.vhd
46 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work techmap ../../lib/techmap/inferred/ddr_inferred.vhd
47 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work techmap ../../lib/techmap/inferred/mul_inferred.vhd
48 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work techmap ../../lib/techmap/inferred/ddr_phy_inferred.vhd
49 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work techmap ../../lib/techmap/dw02/mul_dw_gen.vhd
50 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work techmap ../../lib/techmap/unisim/memory_unisim.vhd
51 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work techmap ../../lib/techmap/unisim/buffer_unisim.vhd
52 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work techmap ../../lib/techmap/unisim/pads_unisim.vhd
53 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work techmap ../../lib/techmap/unisim/clkgen_unisim.vhd
54 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work techmap ../../lib/techmap/unisim/tap_unisim.vhd
55 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work techmap ../../lib/techmap/unisim/ddr_unisim.vhd
56 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work techmap ../../lib/techmap/unisim/ddr_phy_unisim.vhd
57 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work techmap ../../lib/techmap/unisim/grspwc_unisim.vhd
58 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work techmap ../../lib/techmap/unisim/grspwc2_unisim.vhd
59 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work techmap ../../lib/techmap/unisim/grusbhc_unisim.vhd
60 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work techmap ../../lib/techmap/unisim/ssrctrl_unisim.vhd
61 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work techmap ../../lib/techmap/unisim/sysmon_unisim.vhd
62 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work techmap ../../lib/techmap/unisim/mul_unisim.vhd
63 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work techmap ../../lib/techmap/unisim/grfpw_0_unisim.vhd
64 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work techmap ../../lib/techmap/maps/allclkgen.vhd
65 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work techmap ../../lib/techmap/maps/allddr.vhd
66 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work techmap ../../lib/techmap/maps/allmem.vhd
67 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work techmap ../../lib/techmap/maps/allpads.vhd
68 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work techmap ../../lib/techmap/maps/alltap.vhd
69 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work techmap ../../lib/techmap/maps/clkgen.vhd
70 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work techmap ../../lib/techmap/maps/clkmux.vhd
71 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work techmap ../../lib/techmap/maps/clkand.vhd
72 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work techmap ../../lib/techmap/maps/ddr_ireg.vhd
73 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work techmap ../../lib/techmap/maps/ddr_oreg.vhd
74 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work techmap ../../lib/techmap/maps/ddrphy.vhd
75 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work techmap ../../lib/techmap/maps/syncram.vhd
76 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work techmap ../../lib/techmap/maps/syncram64.vhd
77 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work techmap ../../lib/techmap/maps/syncram_2p.vhd
78 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work techmap ../../lib/techmap/maps/syncram_dp.vhd
79 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work techmap ../../lib/techmap/maps/syncfifo.vhd
80 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work techmap ../../lib/techmap/maps/regfile_3p.vhd
81 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work techmap ../../lib/techmap/maps/tap.vhd
82 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work techmap ../../lib/techmap/maps/techbuf.vhd
83 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work techmap ../../lib/techmap/maps/nandtree.vhd
84 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work techmap ../../lib/techmap/maps/clkpad.vhd
85 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work techmap ../../lib/techmap/maps/clkpad_ds.vhd
86 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work techmap ../../lib/techmap/maps/inpad.vhd
87 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work techmap ../../lib/techmap/maps/inpad_ds.vhd
88 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work techmap ../../lib/techmap/maps/iodpad.vhd
89 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work techmap ../../lib/techmap/maps/iopad.vhd
90 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work techmap ../../lib/techmap/maps/iopad_ds.vhd
91 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work techmap ../../lib/techmap/maps/lvds_combo.vhd
92 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work techmap ../../lib/techmap/maps/odpad.vhd
93 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work techmap ../../lib/techmap/maps/outpad.vhd
94 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work techmap ../../lib/techmap/maps/outpad_ds.vhd
95 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work techmap ../../lib/techmap/maps/toutpad.vhd
96 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work techmap ../../lib/techmap/maps/skew_outpad.vhd
97 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work techmap ../../lib/techmap/maps/grspwc_net.vhd
98 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work techmap ../../lib/techmap/maps/grspwc2_net.vhd
99 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work techmap ../../lib/techmap/maps/grlfpw_net.vhd
100 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work techmap ../../lib/techmap/maps/grfpw_net.vhd
101 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work techmap ../../lib/techmap/maps/mul_61x61.vhd
102 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work techmap ../../lib/techmap/maps/cpu_disas_net.vhd
103 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work techmap ../../lib/techmap/maps/ringosc.vhd
104 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work techmap ../../lib/techmap/maps/system_monitor.vhd
105 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work techmap ../../lib/techmap/maps/grgates.vhd
106 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work techmap ../../lib/techmap/maps/inpad_ddr.vhd
107 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work techmap ../../lib/techmap/maps/outpad_ddr.vhd
108 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work techmap ../../lib/techmap/maps/iopad_ddr.vhd
109 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work techmap ../../lib/techmap/maps/syncram128bw.vhd
110 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work techmap ../../lib/techmap/maps/syncram128.vhd
111 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work techmap ../../lib/techmap/maps/syncram156bw.vhd
112 mkdir xncsim/eth
113 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work eth ../../lib/eth/comp/ethcomp.vhd
114 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work eth ../../lib/eth/core/greth_pkg.vhd
115 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work eth ../../lib/eth/core/eth_rstgen.vhd
116 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work eth ../../lib/eth/core/eth_ahb_mst.vhd
117 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work eth ../../lib/eth/core/greth_tx.vhd
118 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work eth ../../lib/eth/core/greth_rx.vhd
119 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work eth ../../lib/eth/core/grethc.vhd
120 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work eth ../../lib/eth/wrapper/greth_gen.vhd
121 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work eth ../../lib/eth/wrapper/greth_gbit_gen.vhd
122 mkdir xncsim/gaisler
123 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/arith/arith.vhd
124 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/arith/mul32.vhd
125 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/arith/div32.vhd
126 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/memctrl/memctrl.vhd
127 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/memctrl/sdctrl.vhd
128 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/memctrl/sdctrl64.vhd
129 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/memctrl/sdmctrl.vhd
130 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/memctrl/srctrl.vhd
131 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/memctrl/spimctrl.vhd
132 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/leon3/leon3.vhd
133 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/leon3/mmuconfig.vhd
134 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/leon3/mmuiface.vhd
135 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/leon3/libmmu.vhd
136 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/leon3/libiu.vhd
137 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/leon3/libcache.vhd
138 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/leon3/libproc3.vhd
139 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/leon3/cachemem.vhd
140 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/leon3/mmu_icache.vhd
141 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/leon3/mmu_dcache.vhd
142 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/leon3/mmu_acache.vhd
143 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/leon3/mmutlbcam.vhd
144 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/leon3/mmulrue.vhd
145 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/leon3/mmulru.vhd
146 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/leon3/mmutlb.vhd
147 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/leon3/mmutw.vhd
148 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/leon3/mmu.vhd
149 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/leon3/mmu_cache.vhd
150 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/leon3/cpu_disasx.vhd
151 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/leon3/iu3.vhd
152 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/leon3/grfpwx.vhd
153 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/leon3/mfpwx.vhd
154 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/leon3/grlfpwx.vhd
155 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/leon3/tbufmem.vhd
156 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/leon3/dsu3x.vhd
157 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/leon3/dsu3.vhd
158 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/leon3/proc3.vhd
159 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/leon3/leon3s.vhd
160 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/leon3/leon3cg.vhd
161 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/leon3/irqmp.vhd
162 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/leon3/grfpwxsh.vhd
163 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/leon3/grfpushwx.vhd
164 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/leon3/leon3sh.vhd
165 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/misc/misc.vhd
166 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/misc/rstgen.vhd
167 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/misc/gptimer.vhd
168 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/misc/ahbram.vhd
169 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/misc/ahbdpram.vhd
170 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/misc/ahbtrace.vhd
171 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/misc/ahbtrace_mb.vhd
172 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/misc/ahbmst.vhd
173 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/misc/grgpio.vhd
174 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/misc/ahbstat.vhd
175 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/misc/logan.vhd
176 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/misc/apbps2.vhd
177 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/misc/charrom_package.vhd
178 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/misc/charrom.vhd
179 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/misc/apbvga.vhd
180 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/misc/svgactrl.vhd
181 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/misc/i2cmst_gen.vhd
182 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/misc/spictrl.vhd
183 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/misc/i2cslv.vhd
184 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/misc/wild.vhd
185 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/misc/wild2ahb.vhd
186 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/misc/grsysmon.vhd
187 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/misc/gracectrl.vhd
188 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/misc/grgpreg.vhd
189 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/misc/ahbmst2.vhd
190 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/misc/ahb_mst_iface.vhd
191 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/net/net.vhd
192 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/uart/uart.vhd
193 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/uart/libdcom.vhd
194 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/uart/apbuart.vhd
195 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/uart/dcom.vhd
196 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/uart/dcom_uart.vhd
197 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/uart/ahbuart.vhd
198 ncvlog -nowarn DLCPTH -nocopyright -work gaisler ../../lib/gaisler/sim/i2c_slave_model.v
199 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/sim/sim.vhd
200 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/sim/sram.vhd
201 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/sim/ata_device.vhd
202 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/sim/sram16.vhd
203 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/sim/phy.vhd
204 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/sim/ahbrep.vhd
205 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/sim/delay_wire.vhd
206 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/sim/spi_flash.vhd
207 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/sim/pwm_check.vhd
208 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/sim/usbsim.vhd
209 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/sim/grusbdcsim.vhd
210 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/sim/grusb_dclsim.vhd
211 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/jtag/jtag.vhd
212 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/jtag/libjtagcom.vhd
213 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/jtag/jtagcom.vhd
214 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/jtag/ahbjtag.vhd
215 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/jtag/ahbjtag_bsd.vhd
216 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/jtag/jtagtst.vhd
217 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/greth/ethernet_mac.vhd
218 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/greth/greth.vhd
219 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/greth/greth_gbit.vhd
220 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/greth/grethm.vhd
221 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/ddr/ddr_phy.vhd
222 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/ddr/ddrsp16a.vhd
223 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/ddr/ddrsp32a.vhd
224 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/ddr/ddrsp64a.vhd
225 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/ddr/ddrspa.vhd
226 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/ddr/ddr2spa.vhd
227 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/ddr/ddr2buf.vhd
228 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/ddr/ddr2spax.vhd
229 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/ddr/ddr2spax_ahb.vhd
230 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gaisler ../../lib/gaisler/ddr/ddr2spax_ddr.vhd
231 mkdir xncsim/esa
232 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work esa ../../lib/esa/memoryctrl/memoryctrl.vhd
233 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work esa ../../lib/esa/memoryctrl/mctrl.vhd
234 mkdir xncsim/fmf
235 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work fmf ../../lib/fmf/utilities/conversions.vhd
236 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work fmf ../../lib/fmf/utilities/gen_utils.vhd
237 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work fmf ../../lib/fmf/flash/flash.vhd
238 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work fmf ../../lib/fmf/flash/s25fl064a.vhd
239 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work fmf ../../lib/fmf/flash/m25p80.vhd
240 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work fmf ../../lib/fmf/fifo/idt7202.vhd
241 mkdir xncsim/spansion
242 mkdir xncsim/gsi
243 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gsi ../../lib/gsi/ssram/functions.vhd
244 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gsi ../../lib/gsi/ssram/core_burst.vhd
245 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work gsi ../../lib/gsi/ssram/g880e18bt.vhd
246 mkdir xncsim/lpp
247 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work lpp ../../lib/lpp/./general_purpose/Adder.vhd
248 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work lpp ../../lib/lpp/./general_purpose/ADDRcntr.vhd
249 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work lpp ../../lib/lpp/./general_purpose/ALU.vhd
250 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work lpp ../../lib/lpp/./general_purpose/Clk_divider.vhd
251 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work lpp ../../lib/lpp/./general_purpose/general_purpose.vhd
252 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work lpp ../../lib/lpp/./general_purpose/MAC_CONTROLER.vhd
253 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work lpp ../../lib/lpp/./general_purpose/MAC_MUX2.vhd
254 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work lpp ../../lib/lpp/./general_purpose/MAC_MUX.vhd
255 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work lpp ../../lib/lpp/./general_purpose/MAC_REG.vhd
256 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work lpp ../../lib/lpp/./general_purpose/MAC.vhd
257 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work lpp ../../lib/lpp/./general_purpose/Multiplier.vhd
258 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work lpp ../../lib/lpp/./general_purpose/MUX2.vhd
259 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work lpp ../../lib/lpp/./general_purpose/REG.vhd
260 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work lpp ../../lib/lpp/./general_purpose/Shifter.vhd
261 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work lpp ../../lib/lpp/./lpp_ad_Conv/AD7688_drvr.vhd
262 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work lpp ../../lib/lpp/./lpp_ad_Conv/AD7688_spi_if.vhd
263 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work lpp ../../lib/lpp/./lpp_ad_Conv/ADS7886_drvr.vhd
264 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work lpp ../../lib/lpp/./lpp_ad_Conv/lpp_ad_Conv.vhd
265 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work lpp ../../lib/lpp/./lpp_ad_Conv/lpp_apb_ad_conv.vhd
266 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work lpp ../../lib/lpp/./lpp_CNA_amba/APB_CNA.vhd
267 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work lpp ../../lib/lpp/./lpp_CNA_amba/clock.vhd
268 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work lpp ../../lib/lpp/./lpp_CNA_amba/CNA_TabloC.vhd
269 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work lpp ../../lib/lpp/./lpp_CNA_amba/Convertisseur_config.vhd
270 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work lpp ../../lib/lpp/./lpp_CNA_amba/GeneSYNC_flag.vhd
271 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work lpp ../../lib/lpp/./lpp_CNA_amba/lpp_CNA_amba.vhd
272 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work lpp ../../lib/lpp/./lpp_CNA_amba/Serialize.vhd
273 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work lpp ../../lib/lpp/./lpp_uart/APB_UART.vhd
274 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work lpp ../../lib/lpp/./lpp_uart/BaudGen.vhd
275 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work lpp ../../lib/lpp/./lpp_uart/lpp_uart.vhd
276 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work lpp ../../lib/lpp/./lpp_uart/Shift_REG.vhd
277 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work lpp ../../lib/lpp/./lpp_uart/UART.vhd
278 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work lpp ../../lib/lpp/./lpp_amba/APB_MULTI_DIODE.vhd
279 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work lpp ../../lib/lpp/./lpp_amba/APB_SIMPLE_DIODE.vhd
280 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work lpp ../../lib/lpp/./lpp_amba/lpp_amba.vhd
281 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work lpp ../../lib/lpp/./dsp/iir_filter/APB_IIR_CEL.vhd
282 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work lpp ../../lib/lpp/./dsp/iir_filter/FILTERcfg.vhd
283 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work lpp ../../lib/lpp/./dsp/iir_filter/FilterCTRLR.vhd
284 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work lpp ../../lib/lpp/./dsp/iir_filter/FILTER_RAM_CTRLR.vhd
285 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work lpp ../../lib/lpp/./dsp/iir_filter/FILTER.vhd
286 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work lpp ../../lib/lpp/./dsp/iir_filter/IIR_CEL_CTRLR.vhd
287 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work lpp ../../lib/lpp/./dsp/iir_filter/IIR_CEL_FILTER.vhd
288 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work lpp ../../lib/lpp/./dsp/iir_filter/iir_filter.vhd
289 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work lpp ../../lib/lpp/./dsp/iir_filter/RAM_CEL.vhd
290 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work lpp ../../lib/lpp/./dsp/iir_filter/RAM_CTRLR2.vhd
291 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work lpp ../../lib/lpp/./dsp/iir_filter/RAM.vhd
292 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work lpp ../../lib/lpp/./dsp/iir_filter/Top_Filtre_IIR.vhd
293 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work lpp ../../lib/lpp/./amba_lcd_16x2_ctrlr/amba_lcd_16x2_ctrlr.vhd
294 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work lpp ../../lib/lpp/./amba_lcd_16x2_ctrlr/apb_lcd_ctrlr.vhd
295 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work lpp ../../lib/lpp/./amba_lcd_16x2_ctrlr/FRAME_CLK.vhd
296 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work lpp ../../lib/lpp/./amba_lcd_16x2_ctrlr/LCD_16x2_CFG.vhd
297 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work lpp ../../lib/lpp/./amba_lcd_16x2_ctrlr/LCD_16x2_DRVR.vhd
298 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work lpp ../../lib/lpp/./amba_lcd_16x2_ctrlr/LCD_16x2_ENGINE.vhd
299 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work lpp ../../lib/lpp/./amba_lcd_16x2_ctrlr/LCD_2x16_DRIVER.vhd
300 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work lpp ../../lib/lpp/./amba_lcd_16x2_ctrlr/LCD_CLK_GENERATOR.vhd
301 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work lpp ../../lib/lpp/./amba_lcd_16x2_ctrlr/Top_LCD.vhd
302 mkdir xncsim/cypress
303 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work cypress ../../lib/cypress/ssram/components.vhd
304 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work cypress ../../lib/cypress/ssram/package_utility.vhd
305 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work cypress ../../lib/cypress/ssram/cy7c1354b.vhd
306 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work cypress ../../lib/cypress/ssram/cy7c1380d.vhd
307 mkdir xncsim/hynix
308 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work hynix ../../lib/hynix/ddr2/HY5PS121621F_PACK.vhd
309 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work hynix ../../lib/hynix/ddr2/HY5PS121621F.vhd
310 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work hynix ../../lib/hynix/ddr2/components.vhd
311 mkdir xncsim/micron
312 ncvlog -nowarn DLCPTH -nocopyright -work micron ../../lib/micron/sdram/mobile_sdr.v
313 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work micron ../../lib/micron/sdram/components.vhd
314 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work micron ../../lib/micron/sdram/mt48lc16m16a2.vhd
315 ncvlog -nowarn DLCPTH -nocopyright -work micron ../../lib/micron/ddr/ddr2.v
316 ncvlog -nowarn DLCPTH -nocopyright -work micron ../../lib/micron/ddr/mobile_ddr.v
317 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work micron ../../lib/micron/ddr/mt46v16m16.vhd
318 mkdir xncsim/work
319 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work work ../../lib/work/debug/debug.vhd
320 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work work ../../lib/work/debug/grtestmod.vhd
321 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work work ../../lib/work/debug/cpu_disas.vhd
322 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work work config.vhd
323 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work work ahbrom.vhd
324 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work work leon3mp.vhd
325 ncvhdl -nowarn DLCPTH -NOVITALCHECK -linedebug -v93 -nocopyright -work work testbench.vhd
326 ncelab -timescale 10ps/10ps testbench:behav
@@ -0,0 +1,304
1 sonata-compile:
2 vhdlp -s -work grlib ../../lib/grlib/stdlib/version.vhd
3 vhdlp -s -work grlib ../../lib/grlib/stdlib/config.vhd
4 vhdlp -s -work grlib ../../lib/grlib/stdlib/stdlib.vhd
5 vhdlp -s -work grlib ../../lib/grlib/stdlib/stdio.vhd
6 vhdlp -s -work grlib ../../lib/grlib/stdlib/testlib.vhd
7 vhdlp -s -work grlib ../../lib/grlib/util/util.vhd
8 vhdlp -s -work grlib ../../lib/grlib/sparc/sparc.vhd
9 vhdlp -s -work grlib ../../lib/grlib/sparc/sparc_disas.vhd
10 vhdlp -s -work grlib ../../lib/grlib/sparc/cpu_disas.vhd
11 vhdlp -s -work grlib ../../lib/grlib/modgen/multlib.vhd
12 vhdlp -s -work grlib ../../lib/grlib/modgen/leaves.vhd
13 vhdlp -s -work grlib ../../lib/grlib/amba/amba.vhd
14 vhdlp -s -work grlib ../../lib/grlib/amba/devices.vhd
15 vhdlp -s -work grlib ../../lib/grlib/amba/defmst.vhd
16 vhdlp -s -work grlib ../../lib/grlib/amba/apbctrl.vhd
17 vhdlp -s -work grlib ../../lib/grlib/amba/ahbctrl.vhd
18 vhdlp -s -work grlib ../../lib/grlib/amba/dma2ahb_pkg.vhd
19 vhdlp -s -work grlib ../../lib/grlib/amba/dma2ahb.vhd
20 vhdlp -s -work grlib ../../lib/grlib/amba/dma2ahb_tp.vhd
21 vhdlp -s -work grlib ../../lib/grlib/amba/amba_tp.vhd
22 vhdlp -s -work grlib ../../lib/grlib/amba/at/at_pkg.vhd
23 vhdlp -s -work grlib ../../lib/grlib/amba/at/at_ahb_mst_pkg.vhd
24 vhdlp -s -work grlib ../../lib/grlib/amba/at/at_ahb_slv_pkg.vhd
25 vhdlp -s -work grlib ../../lib/grlib/amba/at/at_util.vhd
26 vhdlp -s -work grlib ../../lib/grlib/amba/at/at_ahb_mst.vhd
27 vhdlp -s -work grlib ../../lib/grlib/amba/at/at_ahb_slv.vhd
28 vhdlp -s -work grlib ../../lib/grlib/amba/at/at_ahbs.vhd
29 vhdlp -s -work grlib ../../lib/grlib/amba/at/at_ahb_ctrl.vhd
30 vhdlp -s -work unisim ../../lib/tech/unisim/ise/unisim_VPKG.vhd
31 vhdlp -s -work unisim ../../lib/tech/unisim/ise/unisim_VCOMP.vhd
32 vhdlp -s -work unisim ../../lib/tech/unisim/ise/simple_simprim.vhd
33 vhdlp -s -work unisim ../../lib/tech/unisim/ise/unisim_VITAL.vhd
34 vhdlp -s -work dw02 ../../lib/tech/dw02/comp/DW02_components.vhd
35 vhdlp -s -work synplify ../../lib/synplify/sim/synplify.vhd
36 vhdlp -s -work synplify ../../lib/synplify/sim/synattr.vhd
37 vhdlp -s -work techmap ../../lib/techmap/gencomp/gencomp.vhd
38 vhdlp -s -work techmap ../../lib/techmap/gencomp/netcomp.vhd
39 vhdlp -s -work techmap ../../lib/techmap/inferred/memory_inferred.vhd
40 vhdlp -s -work techmap ../../lib/techmap/inferred/ddr_inferred.vhd
41 vhdlp -s -work techmap ../../lib/techmap/inferred/mul_inferred.vhd
42 vhdlp -s -work techmap ../../lib/techmap/inferred/ddr_phy_inferred.vhd
43 vhdlp -s -work techmap ../../lib/techmap/dw02/mul_dw_gen.vhd
44 vhdlp -s -work techmap ../../lib/techmap/unisim/memory_unisim.vhd
45 vhdlp -s -work techmap ../../lib/techmap/unisim/buffer_unisim.vhd
46 vhdlp -s -work techmap ../../lib/techmap/unisim/pads_unisim.vhd
47 vhdlp -s -work techmap ../../lib/techmap/unisim/clkgen_unisim.vhd
48 vhdlp -s -work techmap ../../lib/techmap/unisim/tap_unisim.vhd
49 vhdlp -s -work techmap ../../lib/techmap/unisim/ddr_unisim.vhd
50 vhdlp -s -work techmap ../../lib/techmap/unisim/ddr_phy_unisim.vhd
51 vhdlp -s -work techmap ../../lib/techmap/unisim/grspwc_unisim.vhd
52 vhdlp -s -work techmap ../../lib/techmap/unisim/grspwc2_unisim.vhd
53 vhdlp -s -work techmap ../../lib/techmap/unisim/grusbhc_unisim.vhd
54 vhdlp -s -work techmap ../../lib/techmap/unisim/ssrctrl_unisim.vhd
55 vhdlp -s -work techmap ../../lib/techmap/unisim/sysmon_unisim.vhd
56 vhdlp -s -work techmap ../../lib/techmap/unisim/mul_unisim.vhd
57 vhdlp -s -work techmap ../../lib/techmap/unisim/grfpw_0_unisim.vhd
58 vhdlp -s -work techmap ../../lib/techmap/maps/allclkgen.vhd
59 vhdlp -s -work techmap ../../lib/techmap/maps/allddr.vhd
60 vhdlp -s -work techmap ../../lib/techmap/maps/allmem.vhd
61 vhdlp -s -work techmap ../../lib/techmap/maps/allpads.vhd
62 vhdlp -s -work techmap ../../lib/techmap/maps/alltap.vhd
63 vhdlp -s -work techmap ../../lib/techmap/maps/clkgen.vhd
64 vhdlp -s -work techmap ../../lib/techmap/maps/clkmux.vhd
65 vhdlp -s -work techmap ../../lib/techmap/maps/clkand.vhd
66 vhdlp -s -work techmap ../../lib/techmap/maps/ddr_ireg.vhd
67 vhdlp -s -work techmap ../../lib/techmap/maps/ddr_oreg.vhd
68 vhdlp -s -work techmap ../../lib/techmap/maps/ddrphy.vhd
69 vhdlp -s -work techmap ../../lib/techmap/maps/syncram.vhd
70 vhdlp -s -work techmap ../../lib/techmap/maps/syncram64.vhd
71 vhdlp -s -work techmap ../../lib/techmap/maps/syncram_2p.vhd
72 vhdlp -s -work techmap ../../lib/techmap/maps/syncram_dp.vhd
73 vhdlp -s -work techmap ../../lib/techmap/maps/syncfifo.vhd
74 vhdlp -s -work techmap ../../lib/techmap/maps/regfile_3p.vhd
75 vhdlp -s -work techmap ../../lib/techmap/maps/tap.vhd
76 vhdlp -s -work techmap ../../lib/techmap/maps/techbuf.vhd
77 vhdlp -s -work techmap ../../lib/techmap/maps/nandtree.vhd
78 vhdlp -s -work techmap ../../lib/techmap/maps/clkpad.vhd
79 vhdlp -s -work techmap ../../lib/techmap/maps/clkpad_ds.vhd
80 vhdlp -s -work techmap ../../lib/techmap/maps/inpad.vhd
81 vhdlp -s -work techmap ../../lib/techmap/maps/inpad_ds.vhd
82 vhdlp -s -work techmap ../../lib/techmap/maps/iodpad.vhd
83 vhdlp -s -work techmap ../../lib/techmap/maps/iopad.vhd
84 vhdlp -s -work techmap ../../lib/techmap/maps/iopad_ds.vhd
85 vhdlp -s -work techmap ../../lib/techmap/maps/lvds_combo.vhd
86 vhdlp -s -work techmap ../../lib/techmap/maps/odpad.vhd
87 vhdlp -s -work techmap ../../lib/techmap/maps/outpad.vhd
88 vhdlp -s -work techmap ../../lib/techmap/maps/outpad_ds.vhd
89 vhdlp -s -work techmap ../../lib/techmap/maps/toutpad.vhd
90 vhdlp -s -work techmap ../../lib/techmap/maps/skew_outpad.vhd
91 vhdlp -s -work techmap ../../lib/techmap/maps/grspwc_net.vhd
92 vhdlp -s -work techmap ../../lib/techmap/maps/grspwc2_net.vhd
93 vhdlp -s -work techmap ../../lib/techmap/maps/grlfpw_net.vhd
94 vhdlp -s -work techmap ../../lib/techmap/maps/grfpw_net.vhd
95 vhdlp -s -work techmap ../../lib/techmap/maps/mul_61x61.vhd
96 vhdlp -s -work techmap ../../lib/techmap/maps/cpu_disas_net.vhd
97 vhdlp -s -work techmap ../../lib/techmap/maps/ringosc.vhd
98 vhdlp -s -work techmap ../../lib/techmap/maps/system_monitor.vhd
99 vhdlp -s -work techmap ../../lib/techmap/maps/grgates.vhd
100 vhdlp -s -work techmap ../../lib/techmap/maps/inpad_ddr.vhd
101 vhdlp -s -work techmap ../../lib/techmap/maps/outpad_ddr.vhd
102 vhdlp -s -work techmap ../../lib/techmap/maps/iopad_ddr.vhd
103 vhdlp -s -work techmap ../../lib/techmap/maps/syncram128bw.vhd
104 vhdlp -s -work techmap ../../lib/techmap/maps/syncram128.vhd
105 vhdlp -s -work techmap ../../lib/techmap/maps/syncram156bw.vhd
106 vhdlp -s -work eth ../../lib/eth/comp/ethcomp.vhd
107 vhdlp -s -work eth ../../lib/eth/core/greth_pkg.vhd
108 vhdlp -s -work eth ../../lib/eth/core/eth_rstgen.vhd
109 vhdlp -s -work eth ../../lib/eth/core/eth_ahb_mst.vhd
110 vhdlp -s -work eth ../../lib/eth/core/greth_tx.vhd
111 vhdlp -s -work eth ../../lib/eth/core/greth_rx.vhd
112 vhdlp -s -work eth ../../lib/eth/core/grethc.vhd
113 vhdlp -s -work eth ../../lib/eth/wrapper/greth_gen.vhd
114 vhdlp -s -work eth ../../lib/eth/wrapper/greth_gbit_gen.vhd
115 vhdlp -s -work gaisler ../../lib/gaisler/arith/arith.vhd
116 vhdlp -s -work gaisler ../../lib/gaisler/arith/mul32.vhd
117 vhdlp -s -work gaisler ../../lib/gaisler/arith/div32.vhd
118 vhdlp -s -work gaisler ../../lib/gaisler/memctrl/memctrl.vhd
119 vhdlp -s -work gaisler ../../lib/gaisler/memctrl/sdctrl.vhd
120 vhdlp -s -work gaisler ../../lib/gaisler/memctrl/sdctrl64.vhd
121 vhdlp -s -work gaisler ../../lib/gaisler/memctrl/sdmctrl.vhd
122 vhdlp -s -work gaisler ../../lib/gaisler/memctrl/srctrl.vhd
123 vhdlp -s -work gaisler ../../lib/gaisler/memctrl/spimctrl.vhd
124 vhdlp -s -work gaisler ../../lib/gaisler/leon3/leon3.vhd
125 vhdlp -s -work gaisler ../../lib/gaisler/leon3/mmuconfig.vhd
126 vhdlp -s -work gaisler ../../lib/gaisler/leon3/mmuiface.vhd
127 vhdlp -s -work gaisler ../../lib/gaisler/leon3/libmmu.vhd
128 vhdlp -s -work gaisler ../../lib/gaisler/leon3/libiu.vhd
129 vhdlp -s -work gaisler ../../lib/gaisler/leon3/libcache.vhd
130 vhdlp -s -work gaisler ../../lib/gaisler/leon3/libproc3.vhd
131 vhdlp -s -work gaisler ../../lib/gaisler/leon3/cachemem.vhd
132 vhdlp -s -work gaisler ../../lib/gaisler/leon3/mmu_icache.vhd
133 vhdlp -s -work gaisler ../../lib/gaisler/leon3/mmu_dcache.vhd
134 vhdlp -s -work gaisler ../../lib/gaisler/leon3/mmu_acache.vhd
135 vhdlp -s -work gaisler ../../lib/gaisler/leon3/mmutlbcam.vhd
136 vhdlp -s -work gaisler ../../lib/gaisler/leon3/mmulrue.vhd
137 vhdlp -s -work gaisler ../../lib/gaisler/leon3/mmulru.vhd
138 vhdlp -s -work gaisler ../../lib/gaisler/leon3/mmutlb.vhd
139 vhdlp -s -work gaisler ../../lib/gaisler/leon3/mmutw.vhd
140 vhdlp -s -work gaisler ../../lib/gaisler/leon3/mmu.vhd
141 vhdlp -s -work gaisler ../../lib/gaisler/leon3/mmu_cache.vhd
142 vhdlp -s -work gaisler ../../lib/gaisler/leon3/cpu_disasx.vhd
143 vhdlp -s -work gaisler ../../lib/gaisler/leon3/iu3.vhd
144 vhdlp -s -work gaisler ../../lib/gaisler/leon3/grfpwx.vhd
145 vhdlp -s -work gaisler ../../lib/gaisler/leon3/mfpwx.vhd
146 vhdlp -s -work gaisler ../../lib/gaisler/leon3/grlfpwx.vhd
147 vhdlp -s -work gaisler ../../lib/gaisler/leon3/tbufmem.vhd
148 vhdlp -s -work gaisler ../../lib/gaisler/leon3/dsu3x.vhd
149 vhdlp -s -work gaisler ../../lib/gaisler/leon3/dsu3.vhd
150 vhdlp -s -work gaisler ../../lib/gaisler/leon3/proc3.vhd
151 vhdlp -s -work gaisler ../../lib/gaisler/leon3/leon3s.vhd
152 vhdlp -s -work gaisler ../../lib/gaisler/leon3/leon3cg.vhd
153 vhdlp -s -work gaisler ../../lib/gaisler/leon3/irqmp.vhd
154 vhdlp -s -work gaisler ../../lib/gaisler/leon3/grfpwxsh.vhd
155 vhdlp -s -work gaisler ../../lib/gaisler/leon3/grfpushwx.vhd
156 vhdlp -s -work gaisler ../../lib/gaisler/leon3/leon3sh.vhd
157 vhdlp -s -work gaisler ../../lib/gaisler/misc/misc.vhd
158 vhdlp -s -work gaisler ../../lib/gaisler/misc/rstgen.vhd
159 vhdlp -s -work gaisler ../../lib/gaisler/misc/gptimer.vhd
160 vhdlp -s -work gaisler ../../lib/gaisler/misc/ahbram.vhd
161 vhdlp -s -work gaisler ../../lib/gaisler/misc/ahbdpram.vhd
162 vhdlp -s -work gaisler ../../lib/gaisler/misc/ahbtrace.vhd
163 vhdlp -s -work gaisler ../../lib/gaisler/misc/ahbtrace_mb.vhd
164 vhdlp -s -work gaisler ../../lib/gaisler/misc/ahbmst.vhd
165 vhdlp -s -work gaisler ../../lib/gaisler/misc/grgpio.vhd
166 vhdlp -s -work gaisler ../../lib/gaisler/misc/ahbstat.vhd
167 vhdlp -s -work gaisler ../../lib/gaisler/misc/logan.vhd
168 vhdlp -s -work gaisler ../../lib/gaisler/misc/apbps2.vhd
169 vhdlp -s -work gaisler ../../lib/gaisler/misc/charrom_package.vhd
170 vhdlp -s -work gaisler ../../lib/gaisler/misc/charrom.vhd
171 vhdlp -s -work gaisler ../../lib/gaisler/misc/apbvga.vhd
172 vhdlp -s -work gaisler ../../lib/gaisler/misc/svgactrl.vhd
173 vhdlp -s -work gaisler ../../lib/gaisler/misc/i2cmst_gen.vhd
174 vhdlp -s -work gaisler ../../lib/gaisler/misc/spictrl.vhd
175 vhdlp -s -work gaisler ../../lib/gaisler/misc/i2cslv.vhd
176 vhdlp -s -work gaisler ../../lib/gaisler/misc/wild.vhd
177 vhdlp -s -work gaisler ../../lib/gaisler/misc/wild2ahb.vhd
178 vhdlp -s -work gaisler ../../lib/gaisler/misc/grsysmon.vhd
179 vhdlp -s -work gaisler ../../lib/gaisler/misc/gracectrl.vhd
180 vhdlp -s -work gaisler ../../lib/gaisler/misc/grgpreg.vhd
181 vhdlp -s -work gaisler ../../lib/gaisler/misc/ahbmst2.vhd
182 vhdlp -s -work gaisler ../../lib/gaisler/misc/ahb_mst_iface.vhd
183 vhdlp -s -work gaisler ../../lib/gaisler/net/net.vhd
184 vhdlp -s -work gaisler ../../lib/gaisler/uart/uart.vhd
185 vhdlp -s -work gaisler ../../lib/gaisler/uart/libdcom.vhd
186 vhdlp -s -work gaisler ../../lib/gaisler/uart/apbuart.vhd
187 vhdlp -s -work gaisler ../../lib/gaisler/uart/dcom.vhd
188 vhdlp -s -work gaisler ../../lib/gaisler/uart/dcom_uart.vhd
189 vhdlp -s -work gaisler ../../lib/gaisler/uart/ahbuart.vhd
190 vhdlp -s -work gaisler ../../lib/gaisler/sim/sim.vhd
191 vhdlp -s -work gaisler ../../lib/gaisler/sim/sram.vhd
192 vhdlp -s -work gaisler ../../lib/gaisler/sim/ata_device.vhd
193 vhdlp -s -work gaisler ../../lib/gaisler/sim/sram16.vhd
194 vhdlp -s -work gaisler ../../lib/gaisler/sim/phy.vhd
195 vhdlp -s -work gaisler ../../lib/gaisler/sim/ahbrep.vhd
196 vhdlp -s -work gaisler ../../lib/gaisler/sim/delay_wire.vhd
197 vhdlp -s -work gaisler ../../lib/gaisler/sim/spi_flash.vhd
198 vhdlp -s -work gaisler ../../lib/gaisler/sim/pwm_check.vhd
199 vhdlp -s -work gaisler ../../lib/gaisler/sim/usbsim.vhd
200 vhdlp -s -work gaisler ../../lib/gaisler/sim/grusbdcsim.vhd
201 vhdlp -s -work gaisler ../../lib/gaisler/sim/grusb_dclsim.vhd
202 vhdlp -s -work gaisler ../../lib/gaisler/jtag/jtag.vhd
203 vhdlp -s -work gaisler ../../lib/gaisler/jtag/libjtagcom.vhd
204 vhdlp -s -work gaisler ../../lib/gaisler/jtag/jtagcom.vhd
205 vhdlp -s -work gaisler ../../lib/gaisler/jtag/ahbjtag.vhd
206 vhdlp -s -work gaisler ../../lib/gaisler/jtag/ahbjtag_bsd.vhd
207 vhdlp -s -work gaisler ../../lib/gaisler/jtag/jtagtst.vhd
208 vhdlp -s -work gaisler ../../lib/gaisler/greth/ethernet_mac.vhd
209 vhdlp -s -work gaisler ../../lib/gaisler/greth/greth.vhd
210 vhdlp -s -work gaisler ../../lib/gaisler/greth/greth_gbit.vhd
211 vhdlp -s -work gaisler ../../lib/gaisler/greth/grethm.vhd
212 vhdlp -s -work gaisler ../../lib/gaisler/ddr/ddr_phy.vhd
213 vhdlp -s -work gaisler ../../lib/gaisler/ddr/ddrsp16a.vhd
214 vhdlp -s -work gaisler ../../lib/gaisler/ddr/ddrsp32a.vhd
215 vhdlp -s -work gaisler ../../lib/gaisler/ddr/ddrsp64a.vhd
216 vhdlp -s -work gaisler ../../lib/gaisler/ddr/ddrspa.vhd
217 vhdlp -s -work gaisler ../../lib/gaisler/ddr/ddr2spa.vhd
218 vhdlp -s -work gaisler ../../lib/gaisler/ddr/ddr2buf.vhd
219 vhdlp -s -work gaisler ../../lib/gaisler/ddr/ddr2spax.vhd
220 vhdlp -s -work gaisler ../../lib/gaisler/ddr/ddr2spax_ahb.vhd
221 vhdlp -s -work gaisler ../../lib/gaisler/ddr/ddr2spax_ddr.vhd
222 vhdlp -s -work esa ../../lib/esa/memoryctrl/memoryctrl.vhd
223 vhdlp -s -work esa ../../lib/esa/memoryctrl/mctrl.vhd
224 vhdlp -s -work fmf ../../lib/fmf/utilities/conversions.vhd
225 vhdlp -s -work fmf ../../lib/fmf/utilities/gen_utils.vhd
226 vhdlp -s -work fmf ../../lib/fmf/flash/flash.vhd
227 vhdlp -s -work fmf ../../lib/fmf/flash/s25fl064a.vhd
228 vhdlp -s -work fmf ../../lib/fmf/flash/m25p80.vhd
229 vhdlp -s -work fmf ../../lib/fmf/fifo/idt7202.vhd
230 vhdlp -s -work gsi ../../lib/gsi/ssram/functions.vhd
231 vhdlp -s -work gsi ../../lib/gsi/ssram/core_burst.vhd
232 vhdlp -s -work gsi ../../lib/gsi/ssram/g880e18bt.vhd
233 vhdlp -s -work lpp ../../lib/lpp/./general_purpose/Adder.vhd
234 vhdlp -s -work lpp ../../lib/lpp/./general_purpose/ADDRcntr.vhd
235 vhdlp -s -work lpp ../../lib/lpp/./general_purpose/ALU.vhd
236 vhdlp -s -work lpp ../../lib/lpp/./general_purpose/Clk_divider.vhd
237 vhdlp -s -work lpp ../../lib/lpp/./general_purpose/general_purpose.vhd
238 vhdlp -s -work lpp ../../lib/lpp/./general_purpose/MAC_CONTROLER.vhd
239 vhdlp -s -work lpp ../../lib/lpp/./general_purpose/MAC_MUX2.vhd
240 vhdlp -s -work lpp ../../lib/lpp/./general_purpose/MAC_MUX.vhd
241 vhdlp -s -work lpp ../../lib/lpp/./general_purpose/MAC_REG.vhd
242 vhdlp -s -work lpp ../../lib/lpp/./general_purpose/MAC.vhd
243 vhdlp -s -work lpp ../../lib/lpp/./general_purpose/Multiplier.vhd
244 vhdlp -s -work lpp ../../lib/lpp/./general_purpose/MUX2.vhd
245 vhdlp -s -work lpp ../../lib/lpp/./general_purpose/REG.vhd
246 vhdlp -s -work lpp ../../lib/lpp/./general_purpose/Shifter.vhd
247 vhdlp -s -work lpp ../../lib/lpp/./lpp_ad_Conv/AD7688_drvr.vhd
248 vhdlp -s -work lpp ../../lib/lpp/./lpp_ad_Conv/AD7688_spi_if.vhd
249 vhdlp -s -work lpp ../../lib/lpp/./lpp_ad_Conv/ADS7886_drvr.vhd
250 vhdlp -s -work lpp ../../lib/lpp/./lpp_ad_Conv/lpp_ad_Conv.vhd
251 vhdlp -s -work lpp ../../lib/lpp/./lpp_ad_Conv/lpp_apb_ad_conv.vhd
252 vhdlp -s -work lpp ../../lib/lpp/./lpp_CNA_amba/APB_CNA.vhd
253 vhdlp -s -work lpp ../../lib/lpp/./lpp_CNA_amba/clock.vhd
254 vhdlp -s -work lpp ../../lib/lpp/./lpp_CNA_amba/CNA_TabloC.vhd
255 vhdlp -s -work lpp ../../lib/lpp/./lpp_CNA_amba/Convertisseur_config.vhd
256 vhdlp -s -work lpp ../../lib/lpp/./lpp_CNA_amba/GeneSYNC_flag.vhd
257 vhdlp -s -work lpp ../../lib/lpp/./lpp_CNA_amba/lpp_CNA_amba.vhd
258 vhdlp -s -work lpp ../../lib/lpp/./lpp_CNA_amba/Serialize.vhd
259 vhdlp -s -work lpp ../../lib/lpp/./lpp_uart/APB_UART.vhd
260 vhdlp -s -work lpp ../../lib/lpp/./lpp_uart/BaudGen.vhd
261 vhdlp -s -work lpp ../../lib/lpp/./lpp_uart/lpp_uart.vhd
262 vhdlp -s -work lpp ../../lib/lpp/./lpp_uart/Shift_REG.vhd
263 vhdlp -s -work lpp ../../lib/lpp/./lpp_uart/UART.vhd
264 vhdlp -s -work lpp ../../lib/lpp/./lpp_amba/APB_MULTI_DIODE.vhd
265 vhdlp -s -work lpp ../../lib/lpp/./lpp_amba/APB_SIMPLE_DIODE.vhd
266 vhdlp -s -work lpp ../../lib/lpp/./lpp_amba/lpp_amba.vhd
267 vhdlp -s -work lpp ../../lib/lpp/./dsp/iir_filter/APB_IIR_CEL.vhd
268 vhdlp -s -work lpp ../../lib/lpp/./dsp/iir_filter/FILTERcfg.vhd
269 vhdlp -s -work lpp ../../lib/lpp/./dsp/iir_filter/FilterCTRLR.vhd
270 vhdlp -s -work lpp ../../lib/lpp/./dsp/iir_filter/FILTER_RAM_CTRLR.vhd
271 vhdlp -s -work lpp ../../lib/lpp/./dsp/iir_filter/FILTER.vhd
272 vhdlp -s -work lpp ../../lib/lpp/./dsp/iir_filter/IIR_CEL_CTRLR.vhd
273 vhdlp -s -work lpp ../../lib/lpp/./dsp/iir_filter/IIR_CEL_FILTER.vhd
274 vhdlp -s -work lpp ../../lib/lpp/./dsp/iir_filter/iir_filter.vhd
275 vhdlp -s -work lpp ../../lib/lpp/./dsp/iir_filter/RAM_CEL.vhd
276 vhdlp -s -work lpp ../../lib/lpp/./dsp/iir_filter/RAM_CTRLR2.vhd
277 vhdlp -s -work lpp ../../lib/lpp/./dsp/iir_filter/RAM.vhd
278 vhdlp -s -work lpp ../../lib/lpp/./dsp/iir_filter/Top_Filtre_IIR.vhd
279 vhdlp -s -work lpp ../../lib/lpp/./amba_lcd_16x2_ctrlr/amba_lcd_16x2_ctrlr.vhd
280 vhdlp -s -work lpp ../../lib/lpp/./amba_lcd_16x2_ctrlr/apb_lcd_ctrlr.vhd
281 vhdlp -s -work lpp ../../lib/lpp/./amba_lcd_16x2_ctrlr/FRAME_CLK.vhd
282 vhdlp -s -work lpp ../../lib/lpp/./amba_lcd_16x2_ctrlr/LCD_16x2_CFG.vhd
283 vhdlp -s -work lpp ../../lib/lpp/./amba_lcd_16x2_ctrlr/LCD_16x2_DRVR.vhd
284 vhdlp -s -work lpp ../../lib/lpp/./amba_lcd_16x2_ctrlr/LCD_16x2_ENGINE.vhd
285 vhdlp -s -work lpp ../../lib/lpp/./amba_lcd_16x2_ctrlr/LCD_2x16_DRIVER.vhd
286 vhdlp -s -work lpp ../../lib/lpp/./amba_lcd_16x2_ctrlr/LCD_CLK_GENERATOR.vhd
287 vhdlp -s -work lpp ../../lib/lpp/./amba_lcd_16x2_ctrlr/Top_LCD.vhd
288 vhdlp -s -work cypress ../../lib/cypress/ssram/components.vhd
289 vhdlp -s -work cypress ../../lib/cypress/ssram/package_utility.vhd
290 vhdlp -s -work cypress ../../lib/cypress/ssram/cy7c1354b.vhd
291 vhdlp -s -work cypress ../../lib/cypress/ssram/cy7c1380d.vhd
292 vhdlp -s -work hynix ../../lib/hynix/ddr2/HY5PS121621F_PACK.vhd
293 vhdlp -s -work hynix ../../lib/hynix/ddr2/HY5PS121621F.vhd
294 vhdlp -s -work hynix ../../lib/hynix/ddr2/components.vhd
295 vhdlp -s -work micron ../../lib/micron/sdram/components.vhd
296 vhdlp -s -work micron ../../lib/micron/sdram/mt48lc16m16a2.vhd
297 vhdlp -s -work micron ../../lib/micron/ddr/mt46v16m16.vhd
298 vhdlp -s -work sonata ../../lib/work/debug/debug.vhd
299 vhdlp -s -work sonata ../../lib/work/debug/grtestmod.vhd
300 vhdlp -s -work sonata ../../lib/work/debug/cpu_disas.vhd
301 vhdlp -s -work sonata config.vhd
302 vhdlp -s -work sonata ahbrom.vhd
303 vhdlp -s -work sonata leon3mp.vhd
304 vhdlp -s -work sonata testbench.vhd
@@ -0,0 +1,308
1 vsim:
2 vcom -quiet -93 -work grlib ../../lib/grlib/stdlib/version.vhd
3 vcom -quiet -93 -work grlib ../../lib/grlib/stdlib/config.vhd
4 vcom -quiet -93 -work grlib ../../lib/grlib/stdlib/stdlib.vhd
5 vcom -quiet -93 -work grlib ../../lib/grlib/stdlib/stdio.vhd
6 vcom -quiet -93 -work grlib ../../lib/grlib/stdlib/testlib.vhd
7 vcom -quiet -93 -work grlib ../../lib/grlib/util/util.vhd
8 vcom -quiet -93 -work grlib ../../lib/grlib/sparc/sparc.vhd
9 vcom -quiet -93 -work grlib ../../lib/grlib/sparc/sparc_disas.vhd
10 vcom -quiet -93 -work grlib ../../lib/grlib/sparc/cpu_disas.vhd
11 vcom -quiet -93 -work grlib ../../lib/grlib/modgen/multlib.vhd
12 vcom -quiet -93 -work grlib ../../lib/grlib/modgen/leaves.vhd
13 vcom -quiet -93 -work grlib ../../lib/grlib/amba/amba.vhd
14 vcom -quiet -93 -work grlib ../../lib/grlib/amba/devices.vhd
15 vcom -quiet -93 -work grlib ../../lib/grlib/amba/defmst.vhd
16 vcom -quiet -93 -work grlib ../../lib/grlib/amba/apbctrl.vhd
17 vcom -quiet -93 -work grlib ../../lib/grlib/amba/ahbctrl.vhd
18 vcom -quiet -93 -work grlib ../../lib/grlib/amba/dma2ahb_pkg.vhd
19 vcom -quiet -93 -work grlib ../../lib/grlib/amba/dma2ahb.vhd
20 vcom -quiet -93 -work grlib ../../lib/grlib/amba/dma2ahb_tp.vhd
21 vcom -quiet -93 -work grlib ../../lib/grlib/amba/amba_tp.vhd
22 vcom -quiet -93 -work grlib ../../lib/grlib/amba/at/at_pkg.vhd
23 vcom -quiet -93 -work grlib ../../lib/grlib/amba/at/at_ahb_mst_pkg.vhd
24 vcom -quiet -93 -work grlib ../../lib/grlib/amba/at/at_ahb_slv_pkg.vhd
25 vcom -quiet -93 -work grlib ../../lib/grlib/amba/at/at_util.vhd
26 vcom -quiet -93 -work grlib ../../lib/grlib/amba/at/at_ahb_mst.vhd
27 vcom -quiet -93 -work grlib ../../lib/grlib/amba/at/at_ahb_slv.vhd
28 vcom -quiet -93 -work grlib ../../lib/grlib/amba/at/at_ahbs.vhd
29 vcom -quiet -93 -work grlib ../../lib/grlib/amba/at/at_ahb_ctrl.vhd
30 vcom -quiet -93 -work unisim ../../lib/tech/unisim/ise/unisim_VPKG.vhd
31 vcom -quiet -93 -work unisim ../../lib/tech/unisim/ise/unisim_VCOMP.vhd
32 vcom -quiet -93 -work unisim ../../lib/tech/unisim/ise/simple_simprim.vhd
33 vcom -quiet -93 -work unisim ../../lib/tech/unisim/ise/unisim_VITAL.vhd
34 vcom -quiet -93 -work dw02 ../../lib/tech/dw02/comp/DW02_components.vhd
35 vcom -quiet -93 -work synplify ../../lib/synplify/sim/synplify.vhd
36 vcom -quiet -93 -work synplify ../../lib/synplify/sim/synattr.vhd
37 vcom -quiet -93 -work techmap ../../lib/techmap/gencomp/gencomp.vhd
38 vcom -quiet -93 -work techmap ../../lib/techmap/gencomp/netcomp.vhd
39 vcom -quiet -93 -work techmap ../../lib/techmap/inferred/memory_inferred.vhd
40 vcom -quiet -93 -work techmap ../../lib/techmap/inferred/ddr_inferred.vhd
41 vcom -quiet -93 -work techmap ../../lib/techmap/inferred/mul_inferred.vhd
42 vcom -quiet -93 -work techmap ../../lib/techmap/inferred/ddr_phy_inferred.vhd
43 vcom -quiet -93 -work techmap ../../lib/techmap/dw02/mul_dw_gen.vhd
44 vcom -quiet -93 -work techmap ../../lib/techmap/unisim/memory_unisim.vhd
45 vcom -quiet -93 -work techmap ../../lib/techmap/unisim/buffer_unisim.vhd
46 vcom -quiet -93 -work techmap ../../lib/techmap/unisim/pads_unisim.vhd
47 vcom -quiet -93 -work techmap ../../lib/techmap/unisim/clkgen_unisim.vhd
48 vcom -quiet -93 -work techmap ../../lib/techmap/unisim/tap_unisim.vhd
49 vcom -quiet -93 -work techmap ../../lib/techmap/unisim/ddr_unisim.vhd
50 vcom -quiet -93 -work techmap ../../lib/techmap/unisim/ddr_phy_unisim.vhd
51 vcom -quiet -93 -work techmap ../../lib/techmap/unisim/grspwc_unisim.vhd
52 vcom -quiet -93 -work techmap ../../lib/techmap/unisim/grspwc2_unisim.vhd
53 vcom -quiet -93 -work techmap ../../lib/techmap/unisim/grusbhc_unisim.vhd
54 vcom -quiet -93 -work techmap ../../lib/techmap/unisim/ssrctrl_unisim.vhd
55 vcom -quiet -93 -work techmap ../../lib/techmap/unisim/sysmon_unisim.vhd
56 vcom -quiet -93 -work techmap ../../lib/techmap/unisim/mul_unisim.vhd
57 vcom -quiet -93 -work techmap ../../lib/techmap/unisim/grfpw_0_unisim.vhd
58 vcom -quiet -93 -work techmap ../../lib/techmap/maps/allclkgen.vhd
59 vcom -quiet -93 -work techmap ../../lib/techmap/maps/allddr.vhd
60 vcom -quiet -93 -work techmap ../../lib/techmap/maps/allmem.vhd
61 vcom -quiet -93 -work techmap ../../lib/techmap/maps/allpads.vhd
62 vcom -quiet -93 -work techmap ../../lib/techmap/maps/alltap.vhd
63 vcom -quiet -93 -work techmap ../../lib/techmap/maps/clkgen.vhd
64 vcom -quiet -93 -work techmap ../../lib/techmap/maps/clkmux.vhd
65 vcom -quiet -93 -work techmap ../../lib/techmap/maps/clkand.vhd
66 vcom -quiet -93 -work techmap ../../lib/techmap/maps/ddr_ireg.vhd
67 vcom -quiet -93 -work techmap ../../lib/techmap/maps/ddr_oreg.vhd
68 vcom -quiet -93 -work techmap ../../lib/techmap/maps/ddrphy.vhd
69 vcom -quiet -93 -work techmap ../../lib/techmap/maps/syncram.vhd
70 vcom -quiet -93 -work techmap ../../lib/techmap/maps/syncram64.vhd
71 vcom -quiet -93 -work techmap ../../lib/techmap/maps/syncram_2p.vhd
72 vcom -quiet -93 -work techmap ../../lib/techmap/maps/syncram_dp.vhd
73 vcom -quiet -93 -work techmap ../../lib/techmap/maps/syncfifo.vhd
74 vcom -quiet -93 -work techmap ../../lib/techmap/maps/regfile_3p.vhd
75 vcom -quiet -93 -work techmap ../../lib/techmap/maps/tap.vhd
76 vcom -quiet -93 -work techmap ../../lib/techmap/maps/techbuf.vhd
77 vcom -quiet -93 -work techmap ../../lib/techmap/maps/nandtree.vhd
78 vcom -quiet -93 -work techmap ../../lib/techmap/maps/clkpad.vhd
79 vcom -quiet -93 -work techmap ../../lib/techmap/maps/clkpad_ds.vhd
80 vcom -quiet -93 -work techmap ../../lib/techmap/maps/inpad.vhd
81 vcom -quiet -93 -work techmap ../../lib/techmap/maps/inpad_ds.vhd
82 vcom -quiet -93 -work techmap ../../lib/techmap/maps/iodpad.vhd
83 vcom -quiet -93 -work techmap ../../lib/techmap/maps/iopad.vhd
84 vcom -quiet -93 -work techmap ../../lib/techmap/maps/iopad_ds.vhd
85 vcom -quiet -93 -work techmap ../../lib/techmap/maps/lvds_combo.vhd
86 vcom -quiet -93 -work techmap ../../lib/techmap/maps/odpad.vhd
87 vcom -quiet -93 -work techmap ../../lib/techmap/maps/outpad.vhd
88 vcom -quiet -93 -work techmap ../../lib/techmap/maps/outpad_ds.vhd
89 vcom -quiet -93 -work techmap ../../lib/techmap/maps/toutpad.vhd
90 vcom -quiet -93 -work techmap ../../lib/techmap/maps/skew_outpad.vhd
91 vcom -quiet -93 -work techmap ../../lib/techmap/maps/grspwc_net.vhd
92 vcom -quiet -93 -work techmap ../../lib/techmap/maps/grspwc2_net.vhd
93 vcom -quiet -93 -work techmap ../../lib/techmap/maps/grlfpw_net.vhd
94 vcom -quiet -93 -work techmap ../../lib/techmap/maps/grfpw_net.vhd
95 vcom -quiet -93 -work techmap ../../lib/techmap/maps/mul_61x61.vhd
96 vcom -quiet -93 -work techmap ../../lib/techmap/maps/cpu_disas_net.vhd
97 vcom -quiet -93 -work techmap ../../lib/techmap/maps/ringosc.vhd
98 vcom -quiet -93 -work techmap ../../lib/techmap/maps/system_monitor.vhd
99 vcom -quiet -93 -work techmap ../../lib/techmap/maps/grgates.vhd
100 vcom -quiet -93 -work techmap ../../lib/techmap/maps/inpad_ddr.vhd
101 vcom -quiet -93 -work techmap ../../lib/techmap/maps/outpad_ddr.vhd
102 vcom -quiet -93 -work techmap ../../lib/techmap/maps/iopad_ddr.vhd
103 vcom -quiet -93 -work techmap ../../lib/techmap/maps/syncram128bw.vhd
104 vcom -quiet -93 -work techmap ../../lib/techmap/maps/syncram128.vhd
105 vcom -quiet -93 -work techmap ../../lib/techmap/maps/syncram156bw.vhd
106 vcom -quiet -93 -work eth ../../lib/eth/comp/ethcomp.vhd
107 vcom -quiet -93 -work eth ../../lib/eth/core/greth_pkg.vhd
108 vcom -quiet -93 -work eth ../../lib/eth/core/eth_rstgen.vhd
109 vcom -quiet -93 -work eth ../../lib/eth/core/eth_ahb_mst.vhd
110 vcom -quiet -93 -work eth ../../lib/eth/core/greth_tx.vhd
111 vcom -quiet -93 -work eth ../../lib/eth/core/greth_rx.vhd
112 vcom -quiet -93 -work eth ../../lib/eth/core/grethc.vhd
113 vcom -quiet -93 -work eth ../../lib/eth/wrapper/greth_gen.vhd
114 vcom -quiet -93 -work eth ../../lib/eth/wrapper/greth_gbit_gen.vhd
115 vcom -quiet -93 -work gaisler ../../lib/gaisler/arith/arith.vhd
116 vcom -quiet -93 -work gaisler ../../lib/gaisler/arith/mul32.vhd
117 vcom -quiet -93 -work gaisler ../../lib/gaisler/arith/div32.vhd
118 vcom -quiet -93 -work gaisler ../../lib/gaisler/memctrl/memctrl.vhd
119 vcom -quiet -93 -work gaisler ../../lib/gaisler/memctrl/sdctrl.vhd
120 vcom -quiet -93 -work gaisler ../../lib/gaisler/memctrl/sdctrl64.vhd
121 vcom -quiet -93 -work gaisler ../../lib/gaisler/memctrl/sdmctrl.vhd
122 vcom -quiet -93 -work gaisler ../../lib/gaisler/memctrl/srctrl.vhd
123 vcom -quiet -93 -work gaisler ../../lib/gaisler/memctrl/spimctrl.vhd
124 vcom -quiet -93 -work gaisler ../../lib/gaisler/leon3/leon3.vhd
125 vcom -quiet -93 -work gaisler ../../lib/gaisler/leon3/mmuconfig.vhd
126 vcom -quiet -93 -work gaisler ../../lib/gaisler/leon3/mmuiface.vhd
127 vcom -quiet -93 -work gaisler ../../lib/gaisler/leon3/libmmu.vhd
128 vcom -quiet -93 -work gaisler ../../lib/gaisler/leon3/libiu.vhd
129 vcom -quiet -93 -work gaisler ../../lib/gaisler/leon3/libcache.vhd
130 vcom -quiet -93 -work gaisler ../../lib/gaisler/leon3/libproc3.vhd
131 vcom -quiet -93 -work gaisler ../../lib/gaisler/leon3/cachemem.vhd
132 vcom -quiet -93 -work gaisler ../../lib/gaisler/leon3/mmu_icache.vhd
133 vcom -quiet -93 -work gaisler ../../lib/gaisler/leon3/mmu_dcache.vhd
134 vcom -quiet -93 -work gaisler ../../lib/gaisler/leon3/mmu_acache.vhd
135 vcom -quiet -93 -work gaisler ../../lib/gaisler/leon3/mmutlbcam.vhd
136 vcom -quiet -93 -work gaisler ../../lib/gaisler/leon3/mmulrue.vhd
137 vcom -quiet -93 -work gaisler ../../lib/gaisler/leon3/mmulru.vhd
138 vcom -quiet -93 -work gaisler ../../lib/gaisler/leon3/mmutlb.vhd
139 vcom -quiet -93 -work gaisler ../../lib/gaisler/leon3/mmutw.vhd
140 vcom -quiet -93 -work gaisler ../../lib/gaisler/leon3/mmu.vhd
141 vcom -quiet -93 -work gaisler ../../lib/gaisler/leon3/mmu_cache.vhd
142 vcom -quiet -93 -work gaisler ../../lib/gaisler/leon3/cpu_disasx.vhd
143 vcom -quiet -93 -work gaisler ../../lib/gaisler/leon3/iu3.vhd
144 vcom -quiet -93 -work gaisler ../../lib/gaisler/leon3/grfpwx.vhd
145 vcom -quiet -93 -work gaisler ../../lib/gaisler/leon3/mfpwx.vhd
146 vcom -quiet -93 -work gaisler ../../lib/gaisler/leon3/grlfpwx.vhd
147 vcom -quiet -93 -work gaisler ../../lib/gaisler/leon3/tbufmem.vhd
148 vcom -quiet -93 -work gaisler ../../lib/gaisler/leon3/dsu3x.vhd
149 vcom -quiet -93 -work gaisler ../../lib/gaisler/leon3/dsu3.vhd
150 vcom -quiet -93 -work gaisler ../../lib/gaisler/leon3/proc3.vhd
151 vcom -quiet -93 -work gaisler ../../lib/gaisler/leon3/leon3s.vhd
152 vcom -quiet -93 -work gaisler ../../lib/gaisler/leon3/leon3cg.vhd
153 vcom -quiet -93 -work gaisler ../../lib/gaisler/leon3/irqmp.vhd
154 vcom -quiet -93 -work gaisler ../../lib/gaisler/leon3/grfpwxsh.vhd
155 vcom -quiet -93 -work gaisler ../../lib/gaisler/leon3/grfpushwx.vhd
156 vcom -quiet -93 -work gaisler ../../lib/gaisler/leon3/leon3sh.vhd
157 vcom -quiet -93 -work gaisler ../../lib/gaisler/misc/misc.vhd
158 vcom -quiet -93 -work gaisler ../../lib/gaisler/misc/rstgen.vhd
159 vcom -quiet -93 -work gaisler ../../lib/gaisler/misc/gptimer.vhd
160 vcom -quiet -93 -work gaisler ../../lib/gaisler/misc/ahbram.vhd
161 vcom -quiet -93 -work gaisler ../../lib/gaisler/misc/ahbdpram.vhd
162 vcom -quiet -93 -work gaisler ../../lib/gaisler/misc/ahbtrace.vhd
163 vcom -quiet -93 -work gaisler ../../lib/gaisler/misc/ahbtrace_mb.vhd
164 vcom -quiet -93 -work gaisler ../../lib/gaisler/misc/ahbmst.vhd
165 vcom -quiet -93 -work gaisler ../../lib/gaisler/misc/grgpio.vhd
166 vcom -quiet -93 -work gaisler ../../lib/gaisler/misc/ahbstat.vhd
167 vcom -quiet -93 -work gaisler ../../lib/gaisler/misc/logan.vhd
168 vcom -quiet -93 -work gaisler ../../lib/gaisler/misc/apbps2.vhd
169 vcom -quiet -93 -work gaisler ../../lib/gaisler/misc/charrom_package.vhd
170 vcom -quiet -93 -work gaisler ../../lib/gaisler/misc/charrom.vhd
171 vcom -quiet -93 -work gaisler ../../lib/gaisler/misc/apbvga.vhd
172 vcom -quiet -93 -work gaisler ../../lib/gaisler/misc/svgactrl.vhd
173 vcom -quiet -93 -work gaisler ../../lib/gaisler/misc/i2cmst_gen.vhd
174 vcom -quiet -93 -work gaisler ../../lib/gaisler/misc/spictrl.vhd
175 vcom -quiet -93 -work gaisler ../../lib/gaisler/misc/i2cslv.vhd
176 vcom -quiet -93 -work gaisler ../../lib/gaisler/misc/wild.vhd
177 vcom -quiet -93 -work gaisler ../../lib/gaisler/misc/wild2ahb.vhd
178 vcom -quiet -93 -work gaisler ../../lib/gaisler/misc/grsysmon.vhd
179 vcom -quiet -93 -work gaisler ../../lib/gaisler/misc/gracectrl.vhd
180 vcom -quiet -93 -work gaisler ../../lib/gaisler/misc/grgpreg.vhd
181 vcom -quiet -93 -work gaisler ../../lib/gaisler/misc/ahbmst2.vhd
182 vcom -quiet -93 -work gaisler ../../lib/gaisler/misc/ahb_mst_iface.vhd
183 vcom -quiet -93 -work gaisler ../../lib/gaisler/net/net.vhd
184 vcom -quiet -93 -work gaisler ../../lib/gaisler/uart/uart.vhd
185 vcom -quiet -93 -work gaisler ../../lib/gaisler/uart/libdcom.vhd
186 vcom -quiet -93 -work gaisler ../../lib/gaisler/uart/apbuart.vhd
187 vcom -quiet -93 -work gaisler ../../lib/gaisler/uart/dcom.vhd
188 vcom -quiet -93 -work gaisler ../../lib/gaisler/uart/dcom_uart.vhd
189 vcom -quiet -93 -work gaisler ../../lib/gaisler/uart/ahbuart.vhd
190 vlog -quiet -work gaisler ../../lib/gaisler/sim/i2c_slave_model.v
191 vcom -quiet -93 -work gaisler ../../lib/gaisler/sim/sim.vhd
192 vcom -quiet -93 -work gaisler ../../lib/gaisler/sim/sram.vhd
193 vcom -quiet -93 -work gaisler ../../lib/gaisler/sim/ata_device.vhd
194 vcom -quiet -93 -work gaisler ../../lib/gaisler/sim/sram16.vhd
195 vcom -quiet -93 -work gaisler ../../lib/gaisler/sim/phy.vhd
196 vcom -quiet -93 -work gaisler ../../lib/gaisler/sim/ahbrep.vhd
197 vcom -quiet -93 -work gaisler ../../lib/gaisler/sim/delay_wire.vhd
198 vcom -quiet -93 -work gaisler ../../lib/gaisler/sim/spi_flash.vhd
199 vcom -quiet -93 -work gaisler ../../lib/gaisler/sim/pwm_check.vhd
200 vcom -quiet -93 -work gaisler ../../lib/gaisler/sim/usbsim.vhd
201 vcom -quiet -93 -work gaisler ../../lib/gaisler/sim/grusbdcsim.vhd
202 vcom -quiet -93 -work gaisler ../../lib/gaisler/sim/grusb_dclsim.vhd
203 vcom -quiet -93 -work gaisler ../../lib/gaisler/jtag/jtag.vhd
204 vcom -quiet -93 -work gaisler ../../lib/gaisler/jtag/libjtagcom.vhd
205 vcom -quiet -93 -work gaisler ../../lib/gaisler/jtag/jtagcom.vhd
206 vcom -quiet -93 -work gaisler ../../lib/gaisler/jtag/ahbjtag.vhd
207 vcom -quiet -93 -work gaisler ../../lib/gaisler/jtag/ahbjtag_bsd.vhd
208 vcom -quiet -93 -work gaisler ../../lib/gaisler/jtag/jtagtst.vhd
209 vcom -quiet -93 -work gaisler ../../lib/gaisler/greth/ethernet_mac.vhd
210 vcom -quiet -93 -work gaisler ../../lib/gaisler/greth/greth.vhd
211 vcom -quiet -93 -work gaisler ../../lib/gaisler/greth/greth_gbit.vhd
212 vcom -quiet -93 -work gaisler ../../lib/gaisler/greth/grethm.vhd
213 vcom -quiet -93 -work gaisler ../../lib/gaisler/ddr/ddr_phy.vhd
214 vcom -quiet -93 -work gaisler ../../lib/gaisler/ddr/ddrsp16a.vhd
215 vcom -quiet -93 -work gaisler ../../lib/gaisler/ddr/ddrsp32a.vhd
216 vcom -quiet -93 -work gaisler ../../lib/gaisler/ddr/ddrsp64a.vhd
217 vcom -quiet -93 -work gaisler ../../lib/gaisler/ddr/ddrspa.vhd
218 vcom -quiet -93 -work gaisler ../../lib/gaisler/ddr/ddr2spa.vhd
219 vcom -quiet -93 -work gaisler ../../lib/gaisler/ddr/ddr2buf.vhd
220 vcom -quiet -93 -work gaisler ../../lib/gaisler/ddr/ddr2spax.vhd
221 vcom -quiet -93 -work gaisler ../../lib/gaisler/ddr/ddr2spax_ahb.vhd
222 vcom -quiet -93 -work gaisler ../../lib/gaisler/ddr/ddr2spax_ddr.vhd
223 vcom -quiet -93 -work esa ../../lib/esa/memoryctrl/memoryctrl.vhd
224 vcom -quiet -93 -work esa ../../lib/esa/memoryctrl/mctrl.vhd
225 vcom -quiet -93 -work fmf ../../lib/fmf/utilities/conversions.vhd
226 vcom -quiet -93 -work fmf ../../lib/fmf/utilities/gen_utils.vhd
227 vcom -quiet -93 -work fmf ../../lib/fmf/flash/flash.vhd
228 vcom -quiet -93 -work fmf ../../lib/fmf/flash/s25fl064a.vhd
229 vcom -quiet -93 -work fmf ../../lib/fmf/flash/m25p80.vhd
230 vcom -quiet -93 -work fmf ../../lib/fmf/fifo/idt7202.vhd
231 vcom -quiet -93 -work gsi ../../lib/gsi/ssram/functions.vhd
232 vcom -quiet -93 -work gsi ../../lib/gsi/ssram/core_burst.vhd
233 vcom -quiet -93 -work gsi ../../lib/gsi/ssram/g880e18bt.vhd
234 vcom -quiet -93 -work lpp ../../lib/lpp/./general_purpose/Adder.vhd
235 vcom -quiet -93 -work lpp ../../lib/lpp/./general_purpose/ADDRcntr.vhd
236 vcom -quiet -93 -work lpp ../../lib/lpp/./general_purpose/ALU.vhd
237 vcom -quiet -93 -work lpp ../../lib/lpp/./general_purpose/Clk_divider.vhd
238 vcom -quiet -93 -work lpp ../../lib/lpp/./general_purpose/general_purpose.vhd
239 vcom -quiet -93 -work lpp ../../lib/lpp/./general_purpose/MAC_CONTROLER.vhd
240 vcom -quiet -93 -work lpp ../../lib/lpp/./general_purpose/MAC_MUX2.vhd
241 vcom -quiet -93 -work lpp ../../lib/lpp/./general_purpose/MAC_MUX.vhd
242 vcom -quiet -93 -work lpp ../../lib/lpp/./general_purpose/MAC_REG.vhd
243 vcom -quiet -93 -work lpp ../../lib/lpp/./general_purpose/MAC.vhd
244 vcom -quiet -93 -work lpp ../../lib/lpp/./general_purpose/Multiplier.vhd
245 vcom -quiet -93 -work lpp ../../lib/lpp/./general_purpose/MUX2.vhd
246 vcom -quiet -93 -work lpp ../../lib/lpp/./general_purpose/REG.vhd
247 vcom -quiet -93 -work lpp ../../lib/lpp/./general_purpose/Shifter.vhd
248 vcom -quiet -93 -work lpp ../../lib/lpp/./lpp_ad_Conv/AD7688_drvr.vhd
249 vcom -quiet -93 -work lpp ../../lib/lpp/./lpp_ad_Conv/AD7688_spi_if.vhd
250 vcom -quiet -93 -work lpp ../../lib/lpp/./lpp_ad_Conv/ADS7886_drvr.vhd
251 vcom -quiet -93 -work lpp ../../lib/lpp/./lpp_ad_Conv/lpp_ad_Conv.vhd
252 vcom -quiet -93 -work lpp ../../lib/lpp/./lpp_ad_Conv/lpp_apb_ad_conv.vhd
253 vcom -quiet -93 -work lpp ../../lib/lpp/./lpp_CNA_amba/APB_CNA.vhd
254 vcom -quiet -93 -work lpp ../../lib/lpp/./lpp_CNA_amba/clock.vhd
255 vcom -quiet -93 -work lpp ../../lib/lpp/./lpp_CNA_amba/CNA_TabloC.vhd
256 vcom -quiet -93 -work lpp ../../lib/lpp/./lpp_CNA_amba/Convertisseur_config.vhd
257 vcom -quiet -93 -work lpp ../../lib/lpp/./lpp_CNA_amba/GeneSYNC_flag.vhd
258 vcom -quiet -93 -work lpp ../../lib/lpp/./lpp_CNA_amba/lpp_CNA_amba.vhd
259 vcom -quiet -93 -work lpp ../../lib/lpp/./lpp_CNA_amba/Serialize.vhd
260 vcom -quiet -93 -work lpp ../../lib/lpp/./lpp_uart/APB_UART.vhd
261 vcom -quiet -93 -work lpp ../../lib/lpp/./lpp_uart/BaudGen.vhd
262 vcom -quiet -93 -work lpp ../../lib/lpp/./lpp_uart/lpp_uart.vhd
263 vcom -quiet -93 -work lpp ../../lib/lpp/./lpp_uart/Shift_REG.vhd
264 vcom -quiet -93 -work lpp ../../lib/lpp/./lpp_uart/UART.vhd
265 vcom -quiet -93 -work lpp ../../lib/lpp/./lpp_amba/APB_MULTI_DIODE.vhd
266 vcom -quiet -93 -work lpp ../../lib/lpp/./lpp_amba/APB_SIMPLE_DIODE.vhd
267 vcom -quiet -93 -work lpp ../../lib/lpp/./lpp_amba/lpp_amba.vhd
268 vcom -quiet -93 -work lpp ../../lib/lpp/./dsp/iir_filter/APB_IIR_CEL.vhd
269 vcom -quiet -93 -work lpp ../../lib/lpp/./dsp/iir_filter/FILTERcfg.vhd
270 vcom -quiet -93 -work lpp ../../lib/lpp/./dsp/iir_filter/FilterCTRLR.vhd
271 vcom -quiet -93 -work lpp ../../lib/lpp/./dsp/iir_filter/FILTER_RAM_CTRLR.vhd
272 vcom -quiet -93 -work lpp ../../lib/lpp/./dsp/iir_filter/FILTER.vhd
273 vcom -quiet -93 -work lpp ../../lib/lpp/./dsp/iir_filter/IIR_CEL_CTRLR.vhd
274 vcom -quiet -93 -work lpp ../../lib/lpp/./dsp/iir_filter/IIR_CEL_FILTER.vhd
275 vcom -quiet -93 -work lpp ../../lib/lpp/./dsp/iir_filter/iir_filter.vhd
276 vcom -quiet -93 -work lpp ../../lib/lpp/./dsp/iir_filter/RAM_CEL.vhd
277 vcom -quiet -93 -work lpp ../../lib/lpp/./dsp/iir_filter/RAM_CTRLR2.vhd
278 vcom -quiet -93 -work lpp ../../lib/lpp/./dsp/iir_filter/RAM.vhd
279 vcom -quiet -93 -work lpp ../../lib/lpp/./dsp/iir_filter/Top_Filtre_IIR.vhd
280 vcom -quiet -93 -work lpp ../../lib/lpp/./amba_lcd_16x2_ctrlr/amba_lcd_16x2_ctrlr.vhd
281 vcom -quiet -93 -work lpp ../../lib/lpp/./amba_lcd_16x2_ctrlr/apb_lcd_ctrlr.vhd
282 vcom -quiet -93 -work lpp ../../lib/lpp/./amba_lcd_16x2_ctrlr/FRAME_CLK.vhd
283 vcom -quiet -93 -work lpp ../../lib/lpp/./amba_lcd_16x2_ctrlr/LCD_16x2_CFG.vhd
284 vcom -quiet -93 -work lpp ../../lib/lpp/./amba_lcd_16x2_ctrlr/LCD_16x2_DRVR.vhd
285 vcom -quiet -93 -work lpp ../../lib/lpp/./amba_lcd_16x2_ctrlr/LCD_16x2_ENGINE.vhd
286 vcom -quiet -93 -work lpp ../../lib/lpp/./amba_lcd_16x2_ctrlr/LCD_2x16_DRIVER.vhd
287 vcom -quiet -93 -work lpp ../../lib/lpp/./amba_lcd_16x2_ctrlr/LCD_CLK_GENERATOR.vhd
288 vcom -quiet -93 -work lpp ../../lib/lpp/./amba_lcd_16x2_ctrlr/Top_LCD.vhd
289 vcom -quiet -93 -work cypress ../../lib/cypress/ssram/components.vhd
290 vcom -quiet -93 -work cypress ../../lib/cypress/ssram/package_utility.vhd
291 vcom -quiet -93 -work cypress ../../lib/cypress/ssram/cy7c1354b.vhd
292 vcom -quiet -93 -work cypress ../../lib/cypress/ssram/cy7c1380d.vhd
293 vcom -quiet -93 -work hynix ../../lib/hynix/ddr2/HY5PS121621F_PACK.vhd
294 vcom -quiet -93 -work hynix ../../lib/hynix/ddr2/HY5PS121621F.vhd
295 vcom -quiet -93 -work hynix ../../lib/hynix/ddr2/components.vhd
296 vlog -quiet -work micron ../../lib/micron/sdram/mobile_sdr.v
297 vcom -quiet -93 -work micron ../../lib/micron/sdram/components.vhd
298 vcom -quiet -93 -work micron ../../lib/micron/sdram/mt48lc16m16a2.vhd
299 vlog -quiet -work micron ../../lib/micron/ddr/ddr2.v
300 vlog -quiet -work micron ../../lib/micron/ddr/mobile_ddr.v
301 vcom -quiet -93 -work micron ../../lib/micron/ddr/mt46v16m16.vhd
302 vcom -quiet -93 -work work ../../lib/work/debug/debug.vhd
303 vcom -quiet -93 -work work ../../lib/work/debug/grtestmod.vhd
304 vcom -quiet -93 -work work ../../lib/work/debug/cpu_disas.vhd
305 vcom -quiet -93 -work work config.vhd
306 vcom -quiet -93 -work work ahbrom.vhd
307 vcom -quiet -93 -work work leon3mp.vhd
308 vcom -quiet -93 -work work testbench.vhd
@@ -0,0 +1,227
1 [Library]
2 grlib = modelsim/grlib
3 unisim = modelsim/unisim
4 dw02 = modelsim/dw02
5 synplify = modelsim/synplify
6 techmap = modelsim/techmap
7 eth = modelsim/eth
8 gaisler = modelsim/gaisler
9 esa = modelsim/esa
10 fmf = modelsim/fmf
11 spansion = modelsim/spansion
12 gsi = modelsim/gsi
13 lpp = modelsim/lpp
14 cypress = modelsim/cypress
15 hynix = modelsim/hynix
16 micron = modelsim/micron
17 work = modelsim/work
18 std = $MODEL_TECH/../std
19 ieee = $MODEL_TECH/../ieee
20 vital2000 = $MODEL_TECH/../vital2000
21 verilog = $MODEL_TECH/../verilog
22 arithmetic = $MODEL_TECH/../arithmetic
23 mgc_portable = $MODEL_TECH/../mgc_portable
24 std_developerskit = $MODEL_TECH/../std_developerskit
25 synopsys = $MODEL_TECH/../synopsys
26
27 [vcom]
28 ; Turn on VHDL-1993 as the default. Normally is off.
29 VHDL93 = 1
30
31 ; Show source line containing error. Default is off.
32 Show_source = 1
33
34 ; Turn off unbound-component warnings. Default is on.
35 Show_Warning1 = 0
36
37 ; Turn off process-without-a-wait-statement warnings. Default is on.
38 ; Show_Warning2 = 0
39
40 ; Turn off null-range warnings. Default is on.
41 ; Show_Warning3 = 0
42
43 ; Turn off no-space-in-time-literal warnings. Default is on.
44 ; Show_Warning4 = 0
45
46 ; Turn off multiple-drivers-on-unresolved-signal warnings. Default is on.
47 Show_Warning5 = 0
48
49 ; Turn off optimization for IEEE std_logic_1164 package. Default is on.
50 ; Optimize_1164 = 0
51
52 ; Turn on resolving of ambiguous function overloading in favor of the
53 ; "explicit" function declaration (not the one automatically created by
54 ; the compiler for each type declaration). Default is off.
55 Explicit = 1
56
57 ; Turn off VITAL compliance checking. Default is checking on.
58 ; NoVitalCheck = 1
59
60 ; Ignore VITAL compliance checking errors. Default is to not ignore.
61 ; IgnoreVitalErrors = 1
62
63 ; Turn off VITAL compliance checking warnings. Default is to show warnings.
64 ; Show_VitalChecksWarnings = false
65
66 ; Turn off acceleration of the VITAL packages. Default is to accelerate.
67 ; NoVital = 1
68
69 ; Turn off inclusion of debugging info within design units. Default is to include.
70 ; NoDebug = 1
71
72 ; Turn off "loading..." messages. Default is messages on.
73 Quiet = 1
74
75 ; Turn on some limited synthesis rule compliance checking. Checks only:
76 ; -- signals used (read) by a process must be in the sensitivity list
77 ; CheckSynthesis = 1
78
79 [vlog]
80
81 ; Turn off inclusion of debugging info within design units. Default is to include.
82 ; NoDebug = 1
83
84 ; Turn off "loading..." messages. Default is messages on.
85 Quiet = 1
86
87 ; Turn on Verilog hazard checking (order-dependent accessing of global vars).
88 ; Default is off.
89 ; Hazard = 1
90
91 ; Turn on converting regular Verilog identifiers to uppercase. Allows case
92 ; insensitivity for module names. Default is no conversion.
93 ; UpCase = 1
94
95 [vsim]
96
97 ; vopt flow
98 ; Set to turn on automatic optimization of a design.
99 ; Default is off (pre-6.0 flow without vopt).
100 VoptFlow = 0
101
102 ; Simulator resolution
103 ; Set to fs, ps, ns, us, ms, or sec with optional prefix of 1, 10, or 100.
104 Resolution = 1ps
105
106 ; User time unit for run commands
107 ; Set to default, fs, ps, ns, us, ms, or sec. The default is to use the
108 ; unit specified for Resolution. For example, if Resolution is 100ps,
109 ; then UserTimeUnit defaults to ps.
110 UserTimeUnit = ns
111
112 ; Default run length
113 RunLength = 100
114
115 ; Maximum iterations that can be run without advancing simulation time
116 IterationLimit = 5000
117
118 ; Directive to license manager:
119 ; vhdl Immediately reserve a VHDL license
120 ; vlog Immediately reserve a Verilog license
121 ; plus Immediately reserve a VHDL and Verilog license
122 ; nomgc Do not look for Mentor Graphics Licenses
123 ; nomti Do not look for Model Technology Licenses
124 ; noqueue Do not wait in the license queue when a license isn't available
125 ; License = plus
126
127 ; Stop the simulator after an assertion message
128 ; 0 = Note 1 = Warning 2 = Error 3 = Failure 4 = Fatal
129 BreakOnAssertion = 3
130
131 ; Assertion Message Format
132 ; %S - Severity Level
133 ; %R - Report Message
134 ; %T - Time of assertion
135 ; %D - Delta
136 ; %I - Instance or Region pathname (if available)
137 ; %% - print '%' character
138 ; AssertionFormat = "** %S: %R\n Time: %T Iteration: %D%I\n"
139
140 ; Default radix for all windows and commands...
141 ; Set to symbolic, ascii, binary, octal, decimal, hex, unsigned
142 DefaultRadix = symbolic
143
144 ; VSIM Startup command
145 ; Startup = do startup.do
146
147 ; File for saving command transcript
148 TranscriptFile = transcript
149
150 ; Specify whether paths in simulator commands should be described
151 ; in VHDL or Verilog format. For VHDL, PathSeparator = /
152 ; for Verilog, PathSeparator = .
153 PathSeparator = /
154
155 ; Disable assertion messages
156 ; IgnoreNote = 1
157 ; IgnoreWarning = 1
158 ; IgnoreError = 1
159 ; IgnoreFailure = 1
160
161 ; Default force kind. May be freeze, drive, or deposit
162 ; or in other terms, fixed, wired or charged.
163 ; DefaultForceKind = freeze
164
165 ; If zero, open files when elaborated
166 ; else open files on first read or write
167 ; DelayFileOpen = 0
168
169 ; Control VHDL files opened for write
170 ; 0 = Buffered, 1 = Unbuffered
171 UnbufferedOutput = 0
172
173 ; This controls the number of characters of a signal name
174 ; shown in the waveform window and the postscript plot.
175 ; The default value or a value of zero tells VSIM to display
176 ; the full name.
177 ; WaveSignalNameWidth = 10
178
179 ; Turn off warnings from the std_logic_arith, std_logic_unsigned
180 ; and std_logic_signed packages.
181 ; StdArithNoWarnings = 1
182
183 ; Turn off warnings from the IEEE numeric_std and numeric_bit
184 ; packages.
185 ; NumericStdNoWarnings = 1
186
187 ; Control the format of a generate statement label. Don't quote it.
188 ; GenerateFormat = %s__%d
189
190 ; Specify whether checkpoint files should be compressed.
191 ; The default is to be compressed.
192 ; CheckpointCompressMode = 0
193
194 ; List of dynamically loaded objects for Verilog PLI applications
195 ; Veriuser = veriuser.sl
196
197 [lmc]
198 ; ModelSim's interface to Logic Modeling's SmartModel SWIFT software
199 libsm = $MODEL_TECH/libsm.sl
200 ; ModelSim's interface to Logic Modeling's SmartModel SWIFT software (Windows NT)
201 ; libsm = $MODEL_TECH/libsm.dll
202 ; Logic Modeling's SmartModel SWIFT software (HP 9000 Series 700)
203 ; libswift = $LMC_HOME/lib/hp700.lib/libswift.sl
204 ; Logic Modeling's SmartModel SWIFT software (IBM RISC System/6000)
205 ; libswift = $LMC_HOME/lib/ibmrs.lib/swift.o
206 ; Logic Modeling's SmartModel SWIFT software (Sun4 Solaris)
207 ; libswift = $LMC_HOME/lib/sun4Solaris.lib/libswift.so
208 ; Logic Modeling's SmartModel SWIFT software (Sun4 SunOS)
209 ; do setenv LD_LIBRARY_PATH $LMC_HOME/lib/sun4SunOS.lib
210 ; and run "vsim.swift".
211 ; Logic Modeling's SmartModel SWIFT software (Windows NT)
212 ; libswift = $LMC_HOME/lib/pcnt.lib/libswift.dll
213
214 ; ModelSim's interface to Logic Modeling's hardware modeler SFI software
215 libhm = $MODEL_TECH/libhm.sl
216 ; ModelSim's interface to Logic Modeling's hardware modeler SFI software (Windows NT)
217 ; libhm = $MODEL_TECH/libhm.dll
218 ; Logic Modeling's hardware modeler SFI software (HP 9000 Series 700)
219 ; libsfi = <sfi_dir>/lib/hp700/libsfi.sl
220 ; Logic Modeling's hardware modeler SFI software (IBM RISC System/6000)
221 ; libsfi = <sfi_dir>/lib/rs6000/libsfi.a
222 ; Logic Modeling's hardware modeler SFI software (Sun4 Solaris)
223 ; libsfi = <sfi_dir>/lib/sun4.solaris/libsfi.so
224 ; Logic Modeling's hardware modeler SFI software (Sun4 SunOS)
225 ; libsfi = <sfi_dir>/lib/sun4.sunos/libsfi.so
226 ; Logic Modeling's hardware modeler SFI software (Window NT)
227 ; libsfi = <sfi_dir>/lib/pcnt/lm_sfi.dll
@@ -0,0 +1,321
1 ghdl:
2 mkdir gnu
3 mkdir gnu/grlib
4 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/grlib --work=grlib -Pgnu -Pgnu/grlib ../../lib/grlib/stdlib/version.vhd
5 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/grlib --work=grlib -Pgnu -Pgnu/grlib ../../lib/grlib/stdlib/config.vhd
6 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/grlib --work=grlib -Pgnu -Pgnu/grlib ../../lib/grlib/stdlib/stdlib.vhd
7 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/grlib --work=grlib -Pgnu -Pgnu/grlib ../../lib/grlib/stdlib/stdio.vhd
8 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/grlib --work=grlib -Pgnu -Pgnu/grlib ../../lib/grlib/stdlib/testlib.vhd
9 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/grlib --work=grlib -Pgnu -Pgnu/grlib ../../lib/grlib/util/util.vhd
10 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/grlib --work=grlib -Pgnu -Pgnu/grlib ../../lib/grlib/sparc/sparc.vhd
11 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/grlib --work=grlib -Pgnu -Pgnu/grlib ../../lib/grlib/sparc/sparc_disas.vhd
12 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/grlib --work=grlib -Pgnu -Pgnu/grlib ../../lib/grlib/sparc/cpu_disas.vhd
13 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/grlib --work=grlib -Pgnu -Pgnu/grlib ../../lib/grlib/modgen/multlib.vhd
14 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/grlib --work=grlib -Pgnu -Pgnu/grlib ../../lib/grlib/modgen/leaves.vhd
15 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/grlib --work=grlib -Pgnu -Pgnu/grlib ../../lib/grlib/amba/amba.vhd
16 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/grlib --work=grlib -Pgnu -Pgnu/grlib ../../lib/grlib/amba/devices.vhd
17 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/grlib --work=grlib -Pgnu -Pgnu/grlib ../../lib/grlib/amba/defmst.vhd
18 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/grlib --work=grlib -Pgnu -Pgnu/grlib ../../lib/grlib/amba/apbctrl.vhd
19 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/grlib --work=grlib -Pgnu -Pgnu/grlib ../../lib/grlib/amba/ahbctrl.vhd
20 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/grlib --work=grlib -Pgnu -Pgnu/grlib ../../lib/grlib/amba/dma2ahb_pkg.vhd
21 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/grlib --work=grlib -Pgnu -Pgnu/grlib ../../lib/grlib/amba/dma2ahb.vhd
22 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/grlib --work=grlib -Pgnu -Pgnu/grlib ../../lib/grlib/amba/dma2ahb_tp.vhd
23 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/grlib --work=grlib -Pgnu -Pgnu/grlib ../../lib/grlib/amba/amba_tp.vhd
24 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/grlib --work=grlib -Pgnu -Pgnu/grlib ../../lib/grlib/amba/at/at_pkg.vhd
25 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/grlib --work=grlib -Pgnu -Pgnu/grlib ../../lib/grlib/amba/at/at_ahb_mst_pkg.vhd
26 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/grlib --work=grlib -Pgnu -Pgnu/grlib ../../lib/grlib/amba/at/at_ahb_slv_pkg.vhd
27 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/grlib --work=grlib -Pgnu -Pgnu/grlib ../../lib/grlib/amba/at/at_util.vhd
28 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/grlib --work=grlib -Pgnu -Pgnu/grlib ../../lib/grlib/amba/at/at_ahb_mst.vhd
29 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/grlib --work=grlib -Pgnu -Pgnu/grlib ../../lib/grlib/amba/at/at_ahb_slv.vhd
30 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/grlib --work=grlib -Pgnu -Pgnu/grlib ../../lib/grlib/amba/at/at_ahbs.vhd
31 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/grlib --work=grlib -Pgnu -Pgnu/grlib ../../lib/grlib/amba/at/at_ahb_ctrl.vhd
32 mkdir gnu/unisim
33 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/unisim --work=unisim -Pgnu -Pgnu/grlib -Pgnu/unisim ../../lib/tech/unisim/ise/unisim_VPKG.vhd
34 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/unisim --work=unisim -Pgnu -Pgnu/grlib -Pgnu/unisim ../../lib/tech/unisim/ise/unisim_VCOMP.vhd
35 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/unisim --work=unisim -Pgnu -Pgnu/grlib -Pgnu/unisim ../../lib/tech/unisim/ise/simple_simprim.vhd
36 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/unisim --work=unisim -Pgnu -Pgnu/grlib -Pgnu/unisim ../../lib/tech/unisim/ise/unisim_VITAL.vhd
37 mkdir gnu/dw02
38 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/dw02 --work=dw02 -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 ../../lib/tech/dw02/comp/DW02_components.vhd
39 mkdir gnu/synplify
40 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/synplify --work=synplify -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify ../../lib/synplify/sim/synplify.vhd
41 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/synplify --work=synplify -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify ../../lib/synplify/sim/synattr.vhd
42 mkdir gnu/techmap
43 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/techmap --work=techmap -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap ../../lib/techmap/gencomp/gencomp.vhd
44 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/techmap --work=techmap -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap ../../lib/techmap/gencomp/netcomp.vhd
45 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/techmap --work=techmap -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap ../../lib/techmap/inferred/memory_inferred.vhd
46 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/techmap --work=techmap -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap ../../lib/techmap/inferred/ddr_inferred.vhd
47 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/techmap --work=techmap -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap ../../lib/techmap/inferred/mul_inferred.vhd
48 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/techmap --work=techmap -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap ../../lib/techmap/inferred/ddr_phy_inferred.vhd
49 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/techmap --work=techmap -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap ../../lib/techmap/dw02/mul_dw_gen.vhd
50 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/techmap --work=techmap -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap ../../lib/techmap/unisim/memory_unisim.vhd
51 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/techmap --work=techmap -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap ../../lib/techmap/unisim/buffer_unisim.vhd
52 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/techmap --work=techmap -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap ../../lib/techmap/unisim/pads_unisim.vhd
53 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/techmap --work=techmap -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap ../../lib/techmap/unisim/clkgen_unisim.vhd
54 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/techmap --work=techmap -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap ../../lib/techmap/unisim/tap_unisim.vhd
55 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/techmap --work=techmap -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap ../../lib/techmap/unisim/ddr_unisim.vhd
56 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/techmap --work=techmap -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap ../../lib/techmap/unisim/ddr_phy_unisim.vhd
57 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/techmap --work=techmap -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap ../../lib/techmap/unisim/grspwc_unisim.vhd
58 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/techmap --work=techmap -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap ../../lib/techmap/unisim/grspwc2_unisim.vhd
59 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/techmap --work=techmap -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap ../../lib/techmap/unisim/grusbhc_unisim.vhd
60 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/techmap --work=techmap -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap ../../lib/techmap/unisim/ssrctrl_unisim.vhd
61 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/techmap --work=techmap -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap ../../lib/techmap/unisim/sysmon_unisim.vhd
62 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/techmap --work=techmap -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap ../../lib/techmap/unisim/mul_unisim.vhd
63 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/techmap --work=techmap -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap ../../lib/techmap/unisim/grfpw_0_unisim.vhd
64 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/techmap --work=techmap -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap ../../lib/techmap/maps/allclkgen.vhd
65 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/techmap --work=techmap -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap ../../lib/techmap/maps/allddr.vhd
66 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/techmap --work=techmap -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap ../../lib/techmap/maps/allmem.vhd
67 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/techmap --work=techmap -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap ../../lib/techmap/maps/allpads.vhd
68 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/techmap --work=techmap -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap ../../lib/techmap/maps/alltap.vhd
69 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/techmap --work=techmap -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap ../../lib/techmap/maps/clkgen.vhd
70 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/techmap --work=techmap -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap ../../lib/techmap/maps/clkmux.vhd
71 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/techmap --work=techmap -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap ../../lib/techmap/maps/clkand.vhd
72 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/techmap --work=techmap -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap ../../lib/techmap/maps/ddr_ireg.vhd
73 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/techmap --work=techmap -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap ../../lib/techmap/maps/ddr_oreg.vhd
74 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/techmap --work=techmap -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap ../../lib/techmap/maps/ddrphy.vhd
75 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/techmap --work=techmap -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap ../../lib/techmap/maps/syncram.vhd
76 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/techmap --work=techmap -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap ../../lib/techmap/maps/syncram64.vhd
77 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/techmap --work=techmap -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap ../../lib/techmap/maps/syncram_2p.vhd
78 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/techmap --work=techmap -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap ../../lib/techmap/maps/syncram_dp.vhd
79 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/techmap --work=techmap -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap ../../lib/techmap/maps/syncfifo.vhd
80 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/techmap --work=techmap -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap ../../lib/techmap/maps/regfile_3p.vhd
81 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/techmap --work=techmap -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap ../../lib/techmap/maps/tap.vhd
82 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/techmap --work=techmap -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap ../../lib/techmap/maps/techbuf.vhd
83 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/techmap --work=techmap -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap ../../lib/techmap/maps/nandtree.vhd
84 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/techmap --work=techmap -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap ../../lib/techmap/maps/clkpad.vhd
85 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/techmap --work=techmap -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap ../../lib/techmap/maps/clkpad_ds.vhd
86 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/techmap --work=techmap -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap ../../lib/techmap/maps/inpad.vhd
87 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/techmap --work=techmap -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap ../../lib/techmap/maps/inpad_ds.vhd
88 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/techmap --work=techmap -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap ../../lib/techmap/maps/iodpad.vhd
89 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/techmap --work=techmap -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap ../../lib/techmap/maps/iopad.vhd
90 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/techmap --work=techmap -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap ../../lib/techmap/maps/iopad_ds.vhd
91 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/techmap --work=techmap -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap ../../lib/techmap/maps/lvds_combo.vhd
92 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/techmap --work=techmap -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap ../../lib/techmap/maps/odpad.vhd
93 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/techmap --work=techmap -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap ../../lib/techmap/maps/outpad.vhd
94 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/techmap --work=techmap -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap ../../lib/techmap/maps/outpad_ds.vhd
95 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/techmap --work=techmap -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap ../../lib/techmap/maps/toutpad.vhd
96 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/techmap --work=techmap -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap ../../lib/techmap/maps/skew_outpad.vhd
97 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/techmap --work=techmap -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap ../../lib/techmap/maps/grspwc_net.vhd
98 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/techmap --work=techmap -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap ../../lib/techmap/maps/grspwc2_net.vhd
99 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/techmap --work=techmap -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap ../../lib/techmap/maps/grlfpw_net.vhd
100 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/techmap --work=techmap -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap ../../lib/techmap/maps/grfpw_net.vhd
101 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/techmap --work=techmap -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap ../../lib/techmap/maps/mul_61x61.vhd
102 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/techmap --work=techmap -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap ../../lib/techmap/maps/cpu_disas_net.vhd
103 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/techmap --work=techmap -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap ../../lib/techmap/maps/ringosc.vhd
104 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/techmap --work=techmap -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap ../../lib/techmap/maps/system_monitor.vhd
105 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/techmap --work=techmap -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap ../../lib/techmap/maps/grgates.vhd
106 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/techmap --work=techmap -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap ../../lib/techmap/maps/inpad_ddr.vhd
107 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/techmap --work=techmap -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap ../../lib/techmap/maps/outpad_ddr.vhd
108 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/techmap --work=techmap -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap ../../lib/techmap/maps/iopad_ddr.vhd
109 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/techmap --work=techmap -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap ../../lib/techmap/maps/syncram128bw.vhd
110 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/techmap --work=techmap -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap ../../lib/techmap/maps/syncram128.vhd
111 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/techmap --work=techmap -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap ../../lib/techmap/maps/syncram156bw.vhd
112 mkdir gnu/eth
113 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/eth --work=eth -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth ../../lib/eth/comp/ethcomp.vhd
114 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/eth --work=eth -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth ../../lib/eth/core/greth_pkg.vhd
115 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/eth --work=eth -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth ../../lib/eth/core/eth_rstgen.vhd
116 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/eth --work=eth -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth ../../lib/eth/core/eth_ahb_mst.vhd
117 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/eth --work=eth -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth ../../lib/eth/core/greth_tx.vhd
118 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/eth --work=eth -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth ../../lib/eth/core/greth_rx.vhd
119 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/eth --work=eth -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth ../../lib/eth/core/grethc.vhd
120 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/eth --work=eth -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth ../../lib/eth/wrapper/greth_gen.vhd
121 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/eth --work=eth -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth ../../lib/eth/wrapper/greth_gbit_gen.vhd
122 mkdir gnu/gaisler
123 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/arith/arith.vhd
124 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/arith/mul32.vhd
125 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/arith/div32.vhd
126 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/memctrl/memctrl.vhd
127 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/memctrl/sdctrl.vhd
128 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/memctrl/sdctrl64.vhd
129 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/memctrl/sdmctrl.vhd
130 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/memctrl/srctrl.vhd
131 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/memctrl/spimctrl.vhd
132 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/leon3/leon3.vhd
133 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/leon3/mmuconfig.vhd
134 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/leon3/mmuiface.vhd
135 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/leon3/libmmu.vhd
136 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/leon3/libiu.vhd
137 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/leon3/libcache.vhd
138 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/leon3/libproc3.vhd
139 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/leon3/cachemem.vhd
140 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/leon3/mmu_icache.vhd
141 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/leon3/mmu_dcache.vhd
142 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/leon3/mmu_acache.vhd
143 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/leon3/mmutlbcam.vhd
144 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/leon3/mmulrue.vhd
145 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/leon3/mmulru.vhd
146 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/leon3/mmutlb.vhd
147 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/leon3/mmutw.vhd
148 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/leon3/mmu.vhd
149 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/leon3/mmu_cache.vhd
150 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/leon3/cpu_disasx.vhd
151 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/leon3/iu3.vhd
152 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/leon3/grfpwx.vhd
153 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/leon3/mfpwx.vhd
154 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/leon3/grlfpwx.vhd
155 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/leon3/tbufmem.vhd
156 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/leon3/dsu3x.vhd
157 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/leon3/dsu3.vhd
158 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/leon3/proc3.vhd
159 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/leon3/leon3s.vhd
160 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/leon3/leon3cg.vhd
161 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/leon3/irqmp.vhd
162 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/leon3/grfpwxsh.vhd
163 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/leon3/grfpushwx.vhd
164 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/leon3/leon3sh.vhd
165 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/misc/misc.vhd
166 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/misc/rstgen.vhd
167 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/misc/gptimer.vhd
168 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/misc/ahbram.vhd
169 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/misc/ahbdpram.vhd
170 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/misc/ahbtrace.vhd
171 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/misc/ahbtrace_mb.vhd
172 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/misc/ahbmst.vhd
173 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/misc/grgpio.vhd
174 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/misc/ahbstat.vhd
175 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/misc/logan.vhd
176 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/misc/apbps2.vhd
177 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/misc/charrom_package.vhd
178 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/misc/charrom.vhd
179 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/misc/apbvga.vhd
180 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/misc/svgactrl.vhd
181 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/misc/i2cmst_gen.vhd
182 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/misc/spictrl.vhd
183 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/misc/i2cslv.vhd
184 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/misc/wild.vhd
185 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/misc/wild2ahb.vhd
186 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/misc/grsysmon.vhd
187 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/misc/gracectrl.vhd
188 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/misc/grgpreg.vhd
189 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/misc/ahbmst2.vhd
190 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/misc/ahb_mst_iface.vhd
191 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/net/net.vhd
192 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/uart/uart.vhd
193 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/uart/libdcom.vhd
194 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/uart/apbuart.vhd
195 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/uart/dcom.vhd
196 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/uart/dcom_uart.vhd
197 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/uart/ahbuart.vhd
198 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/sim/sim.vhd
199 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/sim/sram.vhd
200 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/sim/ata_device.vhd
201 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/sim/sram16.vhd
202 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/sim/phy.vhd
203 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/sim/ahbrep.vhd
204 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/sim/delay_wire.vhd
205 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/sim/spi_flash.vhd
206 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/sim/pwm_check.vhd
207 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/sim/usbsim.vhd
208 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/sim/grusbdcsim.vhd
209 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/sim/grusb_dclsim.vhd
210 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/jtag/jtag.vhd
211 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/jtag/libjtagcom.vhd
212 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/jtag/jtagcom.vhd
213 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/jtag/ahbjtag.vhd
214 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/jtag/ahbjtag_bsd.vhd
215 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/jtag/jtagtst.vhd
216 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/greth/ethernet_mac.vhd
217 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/greth/greth.vhd
218 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/greth/greth_gbit.vhd
219 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/greth/grethm.vhd
220 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/ddr/ddr_phy.vhd
221 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/ddr/ddrsp16a.vhd
222 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/ddr/ddrsp32a.vhd
223 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/ddr/ddrsp64a.vhd
224 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/ddr/ddrspa.vhd
225 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/ddr/ddr2spa.vhd
226 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/ddr/ddr2buf.vhd
227 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/ddr/ddr2spax.vhd
228 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/ddr/ddr2spax_ahb.vhd
229 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gaisler --work=gaisler -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler ../../lib/gaisler/ddr/ddr2spax_ddr.vhd
230 mkdir gnu/esa
231 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/esa --work=esa -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler -Pgnu/esa ../../lib/esa/memoryctrl/memoryctrl.vhd
232 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/esa --work=esa -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler -Pgnu/esa ../../lib/esa/memoryctrl/mctrl.vhd
233 mkdir gnu/fmf
234 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/fmf --work=fmf -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler -Pgnu/esa -Pgnu/#nasa -Pgnu/gleichmann -Pgnu/fmf ../../lib/fmf/utilities/conversions.vhd
235 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/fmf --work=fmf -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler -Pgnu/esa -Pgnu/#nasa -Pgnu/gleichmann -Pgnu/fmf ../../lib/fmf/utilities/gen_utils.vhd
236 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/fmf --work=fmf -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler -Pgnu/esa -Pgnu/#nasa -Pgnu/gleichmann -Pgnu/fmf ../../lib/fmf/flash/flash.vhd
237 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/fmf --work=fmf -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler -Pgnu/esa -Pgnu/#nasa -Pgnu/gleichmann -Pgnu/fmf ../../lib/fmf/flash/s25fl064a.vhd
238 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/fmf --work=fmf -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler -Pgnu/esa -Pgnu/#nasa -Pgnu/gleichmann -Pgnu/fmf ../../lib/fmf/flash/m25p80.vhd
239 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/fmf --work=fmf -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler -Pgnu/esa -Pgnu/#nasa -Pgnu/gleichmann -Pgnu/fmf ../../lib/fmf/fifo/idt7202.vhd
240 mkdir gnu/spansion
241 mkdir gnu/gsi
242 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gsi --work=gsi -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler -Pgnu/esa -Pgnu/#nasa -Pgnu/gleichmann -Pgnu/fmf -Pgnu/spansion -Pgnu/gsi ../../lib/gsi/ssram/functions.vhd
243 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gsi --work=gsi -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler -Pgnu/esa -Pgnu/#nasa -Pgnu/gleichmann -Pgnu/fmf -Pgnu/spansion -Pgnu/gsi ../../lib/gsi/ssram/core_burst.vhd
244 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/gsi --work=gsi -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler -Pgnu/esa -Pgnu/#nasa -Pgnu/gleichmann -Pgnu/fmf -Pgnu/spansion -Pgnu/gsi ../../lib/gsi/ssram/g880e18bt.vhd
245 mkdir gnu/lpp
246 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/lpp --work=lpp -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler -Pgnu/esa -Pgnu/#nasa -Pgnu/gleichmann -Pgnu/fmf -Pgnu/spansion -Pgnu/gsi -Pgnu/lpp ../../lib/lpp/./general_purpose/Adder.vhd
247 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/lpp --work=lpp -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler -Pgnu/esa -Pgnu/#nasa -Pgnu/gleichmann -Pgnu/fmf -Pgnu/spansion -Pgnu/gsi -Pgnu/lpp ../../lib/lpp/./general_purpose/ADDRcntr.vhd
248 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/lpp --work=lpp -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler -Pgnu/esa -Pgnu/#nasa -Pgnu/gleichmann -Pgnu/fmf -Pgnu/spansion -Pgnu/gsi -Pgnu/lpp ../../lib/lpp/./general_purpose/ALU.vhd
249 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/lpp --work=lpp -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler -Pgnu/esa -Pgnu/#nasa -Pgnu/gleichmann -Pgnu/fmf -Pgnu/spansion -Pgnu/gsi -Pgnu/lpp ../../lib/lpp/./general_purpose/Clk_divider.vhd
250 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/lpp --work=lpp -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler -Pgnu/esa -Pgnu/#nasa -Pgnu/gleichmann -Pgnu/fmf -Pgnu/spansion -Pgnu/gsi -Pgnu/lpp ../../lib/lpp/./general_purpose/general_purpose.vhd
251 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/lpp --work=lpp -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler -Pgnu/esa -Pgnu/#nasa -Pgnu/gleichmann -Pgnu/fmf -Pgnu/spansion -Pgnu/gsi -Pgnu/lpp ../../lib/lpp/./general_purpose/MAC_CONTROLER.vhd
252 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/lpp --work=lpp -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler -Pgnu/esa -Pgnu/#nasa -Pgnu/gleichmann -Pgnu/fmf -Pgnu/spansion -Pgnu/gsi -Pgnu/lpp ../../lib/lpp/./general_purpose/MAC_MUX2.vhd
253 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/lpp --work=lpp -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler -Pgnu/esa -Pgnu/#nasa -Pgnu/gleichmann -Pgnu/fmf -Pgnu/spansion -Pgnu/gsi -Pgnu/lpp ../../lib/lpp/./general_purpose/MAC_MUX.vhd
254 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/lpp --work=lpp -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler -Pgnu/esa -Pgnu/#nasa -Pgnu/gleichmann -Pgnu/fmf -Pgnu/spansion -Pgnu/gsi -Pgnu/lpp ../../lib/lpp/./general_purpose/MAC_REG.vhd
255 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/lpp --work=lpp -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler -Pgnu/esa -Pgnu/#nasa -Pgnu/gleichmann -Pgnu/fmf -Pgnu/spansion -Pgnu/gsi -Pgnu/lpp ../../lib/lpp/./general_purpose/MAC.vhd
256 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/lpp --work=lpp -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler -Pgnu/esa -Pgnu/#nasa -Pgnu/gleichmann -Pgnu/fmf -Pgnu/spansion -Pgnu/gsi -Pgnu/lpp ../../lib/lpp/./general_purpose/Multiplier.vhd
257 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/lpp --work=lpp -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler -Pgnu/esa -Pgnu/#nasa -Pgnu/gleichmann -Pgnu/fmf -Pgnu/spansion -Pgnu/gsi -Pgnu/lpp ../../lib/lpp/./general_purpose/MUX2.vhd
258 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/lpp --work=lpp -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler -Pgnu/esa -Pgnu/#nasa -Pgnu/gleichmann -Pgnu/fmf -Pgnu/spansion -Pgnu/gsi -Pgnu/lpp ../../lib/lpp/./general_purpose/REG.vhd
259 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/lpp --work=lpp -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler -Pgnu/esa -Pgnu/#nasa -Pgnu/gleichmann -Pgnu/fmf -Pgnu/spansion -Pgnu/gsi -Pgnu/lpp ../../lib/lpp/./general_purpose/Shifter.vhd
260 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/lpp --work=lpp -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler -Pgnu/esa -Pgnu/#nasa -Pgnu/gleichmann -Pgnu/fmf -Pgnu/spansion -Pgnu/gsi -Pgnu/lpp ../../lib/lpp/./lpp_ad_Conv/AD7688_drvr.vhd
261 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/lpp --work=lpp -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler -Pgnu/esa -Pgnu/#nasa -Pgnu/gleichmann -Pgnu/fmf -Pgnu/spansion -Pgnu/gsi -Pgnu/lpp ../../lib/lpp/./lpp_ad_Conv/AD7688_spi_if.vhd
262 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/lpp --work=lpp -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler -Pgnu/esa -Pgnu/#nasa -Pgnu/gleichmann -Pgnu/fmf -Pgnu/spansion -Pgnu/gsi -Pgnu/lpp ../../lib/lpp/./lpp_ad_Conv/ADS7886_drvr.vhd
263 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/lpp --work=lpp -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler -Pgnu/esa -Pgnu/#nasa -Pgnu/gleichmann -Pgnu/fmf -Pgnu/spansion -Pgnu/gsi -Pgnu/lpp ../../lib/lpp/./lpp_ad_Conv/lpp_ad_Conv.vhd
264 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/lpp --work=lpp -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler -Pgnu/esa -Pgnu/#nasa -Pgnu/gleichmann -Pgnu/fmf -Pgnu/spansion -Pgnu/gsi -Pgnu/lpp ../../lib/lpp/./lpp_ad_Conv/lpp_apb_ad_conv.vhd
265 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/lpp --work=lpp -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler -Pgnu/esa -Pgnu/#nasa -Pgnu/gleichmann -Pgnu/fmf -Pgnu/spansion -Pgnu/gsi -Pgnu/lpp ../../lib/lpp/./lpp_CNA_amba/APB_CNA.vhd
266 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/lpp --work=lpp -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler -Pgnu/esa -Pgnu/#nasa -Pgnu/gleichmann -Pgnu/fmf -Pgnu/spansion -Pgnu/gsi -Pgnu/lpp ../../lib/lpp/./lpp_CNA_amba/clock.vhd
267 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/lpp --work=lpp -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler -Pgnu/esa -Pgnu/#nasa -Pgnu/gleichmann -Pgnu/fmf -Pgnu/spansion -Pgnu/gsi -Pgnu/lpp ../../lib/lpp/./lpp_CNA_amba/CNA_TabloC.vhd
268 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/lpp --work=lpp -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler -Pgnu/esa -Pgnu/#nasa -Pgnu/gleichmann -Pgnu/fmf -Pgnu/spansion -Pgnu/gsi -Pgnu/lpp ../../lib/lpp/./lpp_CNA_amba/Convertisseur_config.vhd
269 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/lpp --work=lpp -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler -Pgnu/esa -Pgnu/#nasa -Pgnu/gleichmann -Pgnu/fmf -Pgnu/spansion -Pgnu/gsi -Pgnu/lpp ../../lib/lpp/./lpp_CNA_amba/GeneSYNC_flag.vhd
270 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/lpp --work=lpp -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler -Pgnu/esa -Pgnu/#nasa -Pgnu/gleichmann -Pgnu/fmf -Pgnu/spansion -Pgnu/gsi -Pgnu/lpp ../../lib/lpp/./lpp_CNA_amba/lpp_CNA_amba.vhd
271 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/lpp --work=lpp -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler -Pgnu/esa -Pgnu/#nasa -Pgnu/gleichmann -Pgnu/fmf -Pgnu/spansion -Pgnu/gsi -Pgnu/lpp ../../lib/lpp/./lpp_CNA_amba/Serialize.vhd
272 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/lpp --work=lpp -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler -Pgnu/esa -Pgnu/#nasa -Pgnu/gleichmann -Pgnu/fmf -Pgnu/spansion -Pgnu/gsi -Pgnu/lpp ../../lib/lpp/./lpp_uart/APB_UART.vhd
273 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/lpp --work=lpp -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler -Pgnu/esa -Pgnu/#nasa -Pgnu/gleichmann -Pgnu/fmf -Pgnu/spansion -Pgnu/gsi -Pgnu/lpp ../../lib/lpp/./lpp_uart/BaudGen.vhd
274 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/lpp --work=lpp -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler -Pgnu/esa -Pgnu/#nasa -Pgnu/gleichmann -Pgnu/fmf -Pgnu/spansion -Pgnu/gsi -Pgnu/lpp ../../lib/lpp/./lpp_uart/lpp_uart.vhd
275 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/lpp --work=lpp -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler -Pgnu/esa -Pgnu/#nasa -Pgnu/gleichmann -Pgnu/fmf -Pgnu/spansion -Pgnu/gsi -Pgnu/lpp ../../lib/lpp/./lpp_uart/Shift_REG.vhd
276 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/lpp --work=lpp -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler -Pgnu/esa -Pgnu/#nasa -Pgnu/gleichmann -Pgnu/fmf -Pgnu/spansion -Pgnu/gsi -Pgnu/lpp ../../lib/lpp/./lpp_uart/UART.vhd
277 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/lpp --work=lpp -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler -Pgnu/esa -Pgnu/#nasa -Pgnu/gleichmann -Pgnu/fmf -Pgnu/spansion -Pgnu/gsi -Pgnu/lpp ../../lib/lpp/./lpp_amba/APB_MULTI_DIODE.vhd
278 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/lpp --work=lpp -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler -Pgnu/esa -Pgnu/#nasa -Pgnu/gleichmann -Pgnu/fmf -Pgnu/spansion -Pgnu/gsi -Pgnu/lpp ../../lib/lpp/./lpp_amba/APB_SIMPLE_DIODE.vhd
279 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/lpp --work=lpp -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler -Pgnu/esa -Pgnu/#nasa -Pgnu/gleichmann -Pgnu/fmf -Pgnu/spansion -Pgnu/gsi -Pgnu/lpp ../../lib/lpp/./lpp_amba/lpp_amba.vhd
280 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/lpp --work=lpp -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler -Pgnu/esa -Pgnu/#nasa -Pgnu/gleichmann -Pgnu/fmf -Pgnu/spansion -Pgnu/gsi -Pgnu/lpp ../../lib/lpp/./dsp/iir_filter/APB_IIR_CEL.vhd
281 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/lpp --work=lpp -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler -Pgnu/esa -Pgnu/#nasa -Pgnu/gleichmann -Pgnu/fmf -Pgnu/spansion -Pgnu/gsi -Pgnu/lpp ../../lib/lpp/./dsp/iir_filter/FILTERcfg.vhd
282 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/lpp --work=lpp -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler -Pgnu/esa -Pgnu/#nasa -Pgnu/gleichmann -Pgnu/fmf -Pgnu/spansion -Pgnu/gsi -Pgnu/lpp ../../lib/lpp/./dsp/iir_filter/FilterCTRLR.vhd
283 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/lpp --work=lpp -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler -Pgnu/esa -Pgnu/#nasa -Pgnu/gleichmann -Pgnu/fmf -Pgnu/spansion -Pgnu/gsi -Pgnu/lpp ../../lib/lpp/./dsp/iir_filter/FILTER_RAM_CTRLR.vhd
284 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/lpp --work=lpp -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler -Pgnu/esa -Pgnu/#nasa -Pgnu/gleichmann -Pgnu/fmf -Pgnu/spansion -Pgnu/gsi -Pgnu/lpp ../../lib/lpp/./dsp/iir_filter/FILTER.vhd
285 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/lpp --work=lpp -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler -Pgnu/esa -Pgnu/#nasa -Pgnu/gleichmann -Pgnu/fmf -Pgnu/spansion -Pgnu/gsi -Pgnu/lpp ../../lib/lpp/./dsp/iir_filter/IIR_CEL_CTRLR.vhd
286 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/lpp --work=lpp -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler -Pgnu/esa -Pgnu/#nasa -Pgnu/gleichmann -Pgnu/fmf -Pgnu/spansion -Pgnu/gsi -Pgnu/lpp ../../lib/lpp/./dsp/iir_filter/IIR_CEL_FILTER.vhd
287 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/lpp --work=lpp -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler -Pgnu/esa -Pgnu/#nasa -Pgnu/gleichmann -Pgnu/fmf -Pgnu/spansion -Pgnu/gsi -Pgnu/lpp ../../lib/lpp/./dsp/iir_filter/iir_filter.vhd
288 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/lpp --work=lpp -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler -Pgnu/esa -Pgnu/#nasa -Pgnu/gleichmann -Pgnu/fmf -Pgnu/spansion -Pgnu/gsi -Pgnu/lpp ../../lib/lpp/./dsp/iir_filter/RAM_CEL.vhd
289 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/lpp --work=lpp -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler -Pgnu/esa -Pgnu/#nasa -Pgnu/gleichmann -Pgnu/fmf -Pgnu/spansion -Pgnu/gsi -Pgnu/lpp ../../lib/lpp/./dsp/iir_filter/RAM_CTRLR2.vhd
290 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/lpp --work=lpp -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler -Pgnu/esa -Pgnu/#nasa -Pgnu/gleichmann -Pgnu/fmf -Pgnu/spansion -Pgnu/gsi -Pgnu/lpp ../../lib/lpp/./dsp/iir_filter/RAM.vhd
291 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/lpp --work=lpp -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler -Pgnu/esa -Pgnu/#nasa -Pgnu/gleichmann -Pgnu/fmf -Pgnu/spansion -Pgnu/gsi -Pgnu/lpp ../../lib/lpp/./dsp/iir_filter/Top_Filtre_IIR.vhd
292 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/lpp --work=lpp -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler -Pgnu/esa -Pgnu/#nasa -Pgnu/gleichmann -Pgnu/fmf -Pgnu/spansion -Pgnu/gsi -Pgnu/lpp ../../lib/lpp/./amba_lcd_16x2_ctrlr/amba_lcd_16x2_ctrlr.vhd
293 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/lpp --work=lpp -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler -Pgnu/esa -Pgnu/#nasa -Pgnu/gleichmann -Pgnu/fmf -Pgnu/spansion -Pgnu/gsi -Pgnu/lpp ../../lib/lpp/./amba_lcd_16x2_ctrlr/apb_lcd_ctrlr.vhd
294 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/lpp --work=lpp -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler -Pgnu/esa -Pgnu/#nasa -Pgnu/gleichmann -Pgnu/fmf -Pgnu/spansion -Pgnu/gsi -Pgnu/lpp ../../lib/lpp/./amba_lcd_16x2_ctrlr/FRAME_CLK.vhd
295 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/lpp --work=lpp -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler -Pgnu/esa -Pgnu/#nasa -Pgnu/gleichmann -Pgnu/fmf -Pgnu/spansion -Pgnu/gsi -Pgnu/lpp ../../lib/lpp/./amba_lcd_16x2_ctrlr/LCD_16x2_CFG.vhd
296 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/lpp --work=lpp -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler -Pgnu/esa -Pgnu/#nasa -Pgnu/gleichmann -Pgnu/fmf -Pgnu/spansion -Pgnu/gsi -Pgnu/lpp ../../lib/lpp/./amba_lcd_16x2_ctrlr/LCD_16x2_DRVR.vhd
297 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/lpp --work=lpp -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler -Pgnu/esa -Pgnu/#nasa -Pgnu/gleichmann -Pgnu/fmf -Pgnu/spansion -Pgnu/gsi -Pgnu/lpp ../../lib/lpp/./amba_lcd_16x2_ctrlr/LCD_16x2_ENGINE.vhd
298 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/lpp --work=lpp -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler -Pgnu/esa -Pgnu/#nasa -Pgnu/gleichmann -Pgnu/fmf -Pgnu/spansion -Pgnu/gsi -Pgnu/lpp ../../lib/lpp/./amba_lcd_16x2_ctrlr/LCD_2x16_DRIVER.vhd
299 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/lpp --work=lpp -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler -Pgnu/esa -Pgnu/#nasa -Pgnu/gleichmann -Pgnu/fmf -Pgnu/spansion -Pgnu/gsi -Pgnu/lpp ../../lib/lpp/./amba_lcd_16x2_ctrlr/LCD_CLK_GENERATOR.vhd
300 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/lpp --work=lpp -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler -Pgnu/esa -Pgnu/#nasa -Pgnu/gleichmann -Pgnu/fmf -Pgnu/spansion -Pgnu/gsi -Pgnu/lpp ../../lib/lpp/./amba_lcd_16x2_ctrlr/Top_LCD.vhd
301 mkdir gnu/cypress
302 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/cypress --work=cypress -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler -Pgnu/esa -Pgnu/#nasa -Pgnu/gleichmann -Pgnu/fmf -Pgnu/spansion -Pgnu/gsi -Pgnu/lpp -Pgnu/cypress ../../lib/cypress/ssram/components.vhd
303 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/cypress --work=cypress -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler -Pgnu/esa -Pgnu/#nasa -Pgnu/gleichmann -Pgnu/fmf -Pgnu/spansion -Pgnu/gsi -Pgnu/lpp -Pgnu/cypress ../../lib/cypress/ssram/package_utility.vhd
304 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/cypress --work=cypress -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler -Pgnu/esa -Pgnu/#nasa -Pgnu/gleichmann -Pgnu/fmf -Pgnu/spansion -Pgnu/gsi -Pgnu/lpp -Pgnu/cypress ../../lib/cypress/ssram/cy7c1354b.vhd
305 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/cypress --work=cypress -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler -Pgnu/esa -Pgnu/#nasa -Pgnu/gleichmann -Pgnu/fmf -Pgnu/spansion -Pgnu/gsi -Pgnu/lpp -Pgnu/cypress ../../lib/cypress/ssram/cy7c1380d.vhd
306 mkdir gnu/hynix
307 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/hynix --work=hynix -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler -Pgnu/esa -Pgnu/#nasa -Pgnu/gleichmann -Pgnu/fmf -Pgnu/spansion -Pgnu/gsi -Pgnu/lpp -Pgnu/cypress -Pgnu/hynix ../../lib/hynix/ddr2/HY5PS121621F_PACK.vhd
308 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/hynix --work=hynix -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler -Pgnu/esa -Pgnu/#nasa -Pgnu/gleichmann -Pgnu/fmf -Pgnu/spansion -Pgnu/gsi -Pgnu/lpp -Pgnu/cypress -Pgnu/hynix ../../lib/hynix/ddr2/HY5PS121621F.vhd
309 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/hynix --work=hynix -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler -Pgnu/esa -Pgnu/#nasa -Pgnu/gleichmann -Pgnu/fmf -Pgnu/spansion -Pgnu/gsi -Pgnu/lpp -Pgnu/cypress -Pgnu/hynix ../../lib/hynix/ddr2/components.vhd
310 mkdir gnu/micron
311 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/micron --work=micron -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler -Pgnu/esa -Pgnu/#nasa -Pgnu/gleichmann -Pgnu/fmf -Pgnu/spansion -Pgnu/gsi -Pgnu/lpp -Pgnu/cypress -Pgnu/hynix -Pgnu/micron ../../lib/micron/sdram/components.vhd
312 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/micron --work=micron -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler -Pgnu/esa -Pgnu/#nasa -Pgnu/gleichmann -Pgnu/fmf -Pgnu/spansion -Pgnu/gsi -Pgnu/lpp -Pgnu/cypress -Pgnu/hynix -Pgnu/micron ../../lib/micron/sdram/mt48lc16m16a2.vhd
313 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/micron --work=micron -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler -Pgnu/esa -Pgnu/#nasa -Pgnu/gleichmann -Pgnu/fmf -Pgnu/spansion -Pgnu/gsi -Pgnu/lpp -Pgnu/cypress -Pgnu/hynix -Pgnu/micron ../../lib/micron/ddr/mt46v16m16.vhd
314 mkdir gnu/work
315 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/work --work=work -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler -Pgnu/esa -Pgnu/#nasa -Pgnu/gleichmann -Pgnu/fmf -Pgnu/spansion -Pgnu/gsi -Pgnu/lpp -Pgnu/cypress -Pgnu/hynix -Pgnu/micron -Pgnu/openchip -Pgnu/work ../../lib/work/debug/debug.vhd
316 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/work --work=work -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler -Pgnu/esa -Pgnu/#nasa -Pgnu/gleichmann -Pgnu/fmf -Pgnu/spansion -Pgnu/gsi -Pgnu/lpp -Pgnu/cypress -Pgnu/hynix -Pgnu/micron -Pgnu/openchip -Pgnu/work ../../lib/work/debug/grtestmod.vhd
317 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/work --work=work -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler -Pgnu/esa -Pgnu/#nasa -Pgnu/gleichmann -Pgnu/fmf -Pgnu/spansion -Pgnu/gsi -Pgnu/lpp -Pgnu/cypress -Pgnu/hynix -Pgnu/micron -Pgnu/openchip -Pgnu/work ../../lib/work/debug/cpu_disas.vhd
318 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/work --work=work -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler -Pgnu/esa -Pgnu/#nasa -Pgnu/gleichmann -Pgnu/fmf -Pgnu/spansion -Pgnu/gsi -Pgnu/lpp -Pgnu/cypress -Pgnu/hynix -Pgnu/micron -Pgnu/openchip -Pgnu/work config.vhd
319 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/work --work=work -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler -Pgnu/esa -Pgnu/#nasa -Pgnu/gleichmann -Pgnu/fmf -Pgnu/spansion -Pgnu/gsi -Pgnu/lpp -Pgnu/cypress -Pgnu/hynix -Pgnu/micron -Pgnu/openchip -Pgnu/work ahbrom.vhd
320 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/work --work=work -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler -Pgnu/esa -Pgnu/#nasa -Pgnu/gleichmann -Pgnu/fmf -Pgnu/spansion -Pgnu/gsi -Pgnu/lpp -Pgnu/cypress -Pgnu/hynix -Pgnu/micron -Pgnu/openchip -Pgnu/work leon3mp.vhd
321 ghdl -a -fexplicit --ieee=synopsys --workdir=gnu/work --work=work -Pgnu -Pgnu/grlib -Pgnu/unisim -Pgnu/dw02 -Pgnu/synplify -Pgnu/techmap -Pgnu/spw -Pgnu/eth -Pgnu/opencores -Pgnu/ihp -Pgnu/core1553bbc -Pgnu/core1553brt -Pgnu/core1553brm -Pgnu/corePCIF -Pgnu/gr1553 -Pgnu/gaisler -Pgnu/esa -Pgnu/#nasa -Pgnu/gleichmann -Pgnu/fmf -Pgnu/spansion -Pgnu/gsi -Pgnu/lpp -Pgnu/cypress -Pgnu/hynix -Pgnu/micron -Pgnu/openchip -Pgnu/work testbench.vhd
1 NO CONTENT: modified file, binary diff hidden
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1 NO CONTENT: modified file chmod 100644 => 100755
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@@ -1,193 +1,395
1 <?xml version='1.0' encoding='utf-8'?>
1 <?xml version='1.0' encoding='utf-8'?>
2 <!--This is an ISE project configuration file.-->
2 <!--This is an ISE project configuration file.-->
3 <!--It holds project specific layout data for the projectmgr plugin.-->
3 <!--It holds project specific layout data for the projectmgr plugin.-->
4 <!--Copyright (c) 1995-2009 Xilinx, Inc. All rights reserved.-->
4 <!--Copyright (c) 1995-2009 Xilinx, Inc. All rights reserved.-->
5 <Project version="2" owner="projectmgr" name="leon3mp" >
5 <Project version="2" owner="projectmgr" name="leon3mp" >
6 <!--This is an ISE project configuration file.-->
6 <!--This is an ISE project configuration file.-->
7 <ItemView engineview="SynthesisOnly" guiview="Source" compilemode="AutoCompile" >
7 <ItemView engineview="SynthesisOnly" guiview="Source" compilemode="AutoCompile" >
8 <ClosedNodes>
8 <ClosedNodes>
9 <ClosedNodesVersion>2</ClosedNodesVersion>
9 <ClosedNodesVersion>2</ClosedNodesVersion>
10 <ClosedNode>/Unassigned User Library Modules</ClosedNode>
10 <ClosedNode>/Unassigned User Library Modules</ClosedNode>
11 <ClosedNode>/Unassigned User Library Modules/ADD32 - A</ClosedNode>
12 <ClosedNode>/Unassigned User Library Modules/AMBA_LCD_16x2_DRIVER - Behavioral</ClosedNode>
13 <ClosedNode>/Unassigned User Library Modules/APB_CNA - ar_APB_CNA</ClosedNode>
14 <ClosedNode>/Unassigned User Library Modules/APB_IIR_CEL - AR_APB_IIR_CEL/filter - IIR_CEL_FILTER - ar_IIR_CEL_FILTER/CTRLR - IIR_CEL_CTRLR - ar_IIR_CEL_CTRLR</ClosedNode>
15 <ClosedNode>/Unassigned User Library Modules/APB_UART - ar_APB_UART</ClosedNode>
16 <ClosedNode>/Unassigned User Library Modules/FILTER - ar_FILTER</ClosedNode>
17 <ClosedNode>/Unassigned User Library Modules/FILTER_RAM_CTRLR - ar_FILTER_RAM_CTRLR</ClosedNode>
18 <ClosedNode>/Unassigned User Library Modules/LCD_2x16_DRIVER - Behavioral</ClosedNode>
19 <ClosedNode>/Unassigned User Library Modules/Wild2AHB - RTL</ClosedNode>
20 <ClosedNode>/Unassigned User Library Modules/ahbdpram - rtl</ClosedNode>
21 <ClosedNode>/Unassigned User Library Modules/ahbjtag_bsd - struct</ClosedNode>
22 <ClosedNode>/Unassigned User Library Modules/ahbtrace - rtl</ClosedNode>
23 <ClosedNode>/Unassigned User Library Modules/apbvga - rtl</ClosedNode>
24 <ClosedNode>/Unassigned User Library Modules/clkmux - rtl</ClosedNode>
25 <ClosedNode>/Unassigned User Library Modules/clkpad_ds - rtl</ClosedNode>
26 <ClosedNode>/Unassigned User Library Modules/ddr2spa - rtl</ClosedNode>
27 <ClosedNode>/Unassigned User Library Modules/greth_gbit_gen - rtl</ClosedNode>
28 <ClosedNode>/Unassigned User Library Modules/greth_gen - rtl</ClosedNode>
29 <ClosedNode>/Unassigned User Library Modules/grfpushwx - rtl</ClosedNode>
30 <ClosedNode>/Unassigned User Library Modules/grspwc2_net - rtl</ClosedNode>
31 <ClosedNode>/Unassigned User Library Modules/grspwc_net - rtl</ClosedNode>
32 <ClosedNode>/Unassigned User Library Modules/grsysmon - rtl</ClosedNode>
33 <ClosedNode>/Unassigned User Library Modules/grusbhc_unisim - rtl</ClosedNode>
34 <ClosedNode>/Unassigned User Library Modules/i2cmst_gen - rtl</ClosedNode>
35 <ClosedNode>/Unassigned User Library Modules/inpad_ddrv - rtl</ClosedNode>
36 <ClosedNode>/Unassigned User Library Modules/inpad_dsv - rtl</ClosedNode>
37 <ClosedNode>/Unassigned User Library Modules/iodpadv - rtl</ClosedNode>
38 <ClosedNode>/Unassigned User Library Modules/iopad_ddrv - rtl</ClosedNode>
39 <ClosedNode>/Unassigned User Library Modules/iopad_ddrvv - rtl</ClosedNode>
40 <ClosedNode>/Unassigned User Library Modules/iopad_dsv - rtl</ClosedNode>
41 <ClosedNode>/Unassigned User Library Modules/iopad_dsvv - rtl</ClosedNode>
42 <ClosedNode>/Unassigned User Library Modules/iopadv - rtl</ClosedNode>
43 <ClosedNode>/Unassigned User Library Modules/iopadvv - rtl</ClosedNode>
44 <ClosedNode>/Unassigned User Library Modules/leon3cg - rtl</ClosedNode>
45 <ClosedNode>/Unassigned User Library Modules/leon3sh - rtl</ClosedNode>
46 <ClosedNode>/Unassigned User Library Modules/logan - rtl</ClosedNode>
47 <ClosedNode>/Unassigned User Library Modules/lvds_combo - rtl</ClosedNode>
48 <ClosedNode>/Unassigned User Library Modules/mul_61x61 - rtl</ClosedNode>
49 <ClosedNode>/Unassigned User Library Modules/nandtree - rtl</ClosedNode>
50 <ClosedNode>/Unassigned User Library Modules/odpadv - rtl</ClosedNode>
51 <ClosedNode>/Unassigned User Library Modules/outpad_ddrv - rtl</ClosedNode>
52 <ClosedNode>/Unassigned User Library Modules/outpad_dsv - rtl</ClosedNode>
53 <ClosedNode>/Unassigned User Library Modules/ringosc - rtl</ClosedNode>
54 <ClosedNode>/Unassigned User Library Modules/skew_outpad - rtl</ClosedNode>
55 <ClosedNode>/Unassigned User Library Modules/spartan6_ddr2_phy - rtl</ClosedNode>
56 <ClosedNode>/Unassigned User Library Modules/ssrctrl_unisim - beh</ClosedNode>
57 <ClosedNode>/Unassigned User Library Modules/syncfifo - rtl</ClosedNode>
58 <ClosedNode>/Unassigned User Library Modules/syncram128 - rtl</ClosedNode>
59 <ClosedNode>/Unassigned User Library Modules/syncram128bw - rtl</ClosedNode>
60 <ClosedNode>/Unassigned User Library Modules/syncram156bw - rtl</ClosedNode>
61 <ClosedNode>/Unassigned User Library Modules/toutpadv - rtl</ClosedNode>
62 <ClosedNode>/Unassigned User Library Modules/toutpadvv - rtl</ClosedNode>
63 <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-APB_LCD-digilent-xc3s1600e|leon3mp.vhd/ADC0 - lpp_apb_ad_conv - ar_lpp_apb_ad_conv</ClosedNode>
64 <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-APB_LCD-digilent-xc3s1600e|leon3mp.vhd/ADC0 - lpp_apb_ad_conv - ar_lpp_apb_ad_conv/AD7688 - AD7688_drvr - ar_AD7688_drvr</ClosedNode>
65 <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-APB_LCD-digilent-xc3s1600e|leon3mp.vhd/ADC0 - lpp_apb_ad_conv - ar_lpp_apb_ad_conv/ADS7886 - ADS7886_drvr - ar_ADS7886_drvr</ClosedNode>
66 <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-APB_LCD-digilent-xc3s1600e|leon3mp.vhd/FILTER0 - APB_IIR_CEL - AR_APB_IIR_CEL</ClosedNode>
67 <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-APB_LCD-digilent-xc3s1600e|leon3mp.vhd/FILTER0 - APB_IIR_CEL - AR_APB_IIR_CEL/filter - IIR_CEL_FILTER - ar_IIR_CEL_FILTER/CTRLR - IIR_CEL_CTRLR - ar_IIR_CEL_CTRLR/ALU_inst - ALU - ar_ALU</ClosedNode>
11 <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-APB_LCD-digilent-xc3s1600e|leon3mp.vhd/LCD0 - apb_lcd_ctrlr - Behavioral</ClosedNode>
68 <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-APB_LCD-digilent-xc3s1600e|leon3mp.vhd/LCD0 - apb_lcd_ctrlr - Behavioral</ClosedNode>
69 <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-APB_LCD-digilent-xc3s1600e|leon3mp.vhd/LCD0 - apb_lcd_ctrlr - Behavioral/Driver0 - LCD_16x2_ENGINE - ar_LCD_16x2_ENGINE</ClosedNode>
12 <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-APB_LCD-digilent-xc3s1600e|leon3mp.vhd/addr_pad - outpadv - rtl</ClosedNode>
70 <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-APB_LCD-digilent-xc3s1600e|leon3mp.vhd/addr_pad - outpadv - rtl</ClosedNode>
13 <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-APB_LCD-digilent-xc3s1600e|leon3mp.vhd/ahbjtag0 - ahbjtag - struct</ClosedNode>
71 <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-APB_LCD-digilent-xc3s1600e|leon3mp.vhd/ahbjtag0 - ahbjtag - struct</ClosedNode>
14 <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-APB_LCD-digilent-xc3s1600e|leon3mp.vhd/ahbram0 - ahbram - rtl</ClosedNode>
72 <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-APB_LCD-digilent-xc3s1600e|leon3mp.vhd/ahbram0 - ahbram - rtl</ClosedNode>
15 <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-APB_LCD-digilent-xc3s1600e|leon3mp.vhd/clk_pad - clkpad - rtl</ClosedNode>
73 <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-APB_LCD-digilent-xc3s1600e|leon3mp.vhd/clk_pad - clkpad - rtl</ClosedNode>
16 <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-APB_LCD-digilent-xc3s1600e|leon3mp.vhd/clkgen0 - clkgen - struct</ClosedNode>
74 <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-APB_LCD-digilent-xc3s1600e|leon3mp.vhd/clkgen0 - clkgen - struct</ClosedNode>
17 <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-APB_LCD-digilent-xc3s1600e|leon3mp.vhd/dcom0 - ahbuart - struct</ClosedNode>
75 <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-APB_LCD-digilent-xc3s1600e|leon3mp.vhd/dcom0 - ahbuart - struct</ClosedNode>
18 <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-APB_LCD-digilent-xc3s1600e|leon3mp.vhd/ddrc - ddrspa - rtl</ClosedNode>
76 <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-APB_LCD-digilent-xc3s1600e|leon3mp.vhd/ddrc - ddrspa - rtl</ClosedNode>
19 <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-APB_LCD-digilent-xc3s1600e|leon3mp.vhd/dsu0 - dsu3 - rtl</ClosedNode>
77 <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-APB_LCD-digilent-xc3s1600e|leon3mp.vhd/dsu0 - dsu3 - rtl</ClosedNode>
20 <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-APB_LCD-digilent-xc3s1600e|leon3mp.vhd/dsubre_pad - inpad - rtl</ClosedNode>
78 <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-APB_LCD-digilent-xc3s1600e|leon3mp.vhd/dsubre_pad - inpad - rtl</ClosedNode>
21 <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-APB_LCD-digilent-xc3s1600e|leon3mp.vhd/dsurx_pad - inpad - rtl</ClosedNode>
79 <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-APB_LCD-digilent-xc3s1600e|leon3mp.vhd/dsurx_pad - inpad - rtl</ClosedNode>
22 <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-APB_LCD-digilent-xc3s1600e|leon3mp.vhd/dsutx_pad - outpad - rtl</ClosedNode>
80 <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-APB_LCD-digilent-xc3s1600e|leon3mp.vhd/dsutx_pad - outpad - rtl</ClosedNode>
23 <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-APB_LCD-digilent-xc3s1600e|leon3mp.vhd/e1 - grethm - rtl</ClosedNode>
81 <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-APB_LCD-digilent-xc3s1600e|leon3mp.vhd/e1 - grethm - rtl</ClosedNode>
24 <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-APB_LCD-digilent-xc3s1600e|leon3mp.vhd/emdc_pad - outpad - rtl</ClosedNode>
82 <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-APB_LCD-digilent-xc3s1600e|leon3mp.vhd/emdc_pad - outpad - rtl</ClosedNode>
25 <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-APB_LCD-digilent-xc3s1600e|leon3mp.vhd/emdio_pad - iopad - rtl</ClosedNode>
83 <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-APB_LCD-digilent-xc3s1600e|leon3mp.vhd/emdio_pad - iopad - rtl</ClosedNode>
26 <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-APB_LCD-digilent-xc3s1600e|leon3mp.vhd/error_pad - odpad - rtl</ClosedNode>
84 <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-APB_LCD-digilent-xc3s1600e|leon3mp.vhd/error_pad - odpad - rtl</ClosedNode>
27 <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-APB_LCD-digilent-xc3s1600e|leon3mp.vhd/erxc_pad - inpad - rtl</ClosedNode>
85 <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-APB_LCD-digilent-xc3s1600e|leon3mp.vhd/erxc_pad - inpad - rtl</ClosedNode>
28 <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-APB_LCD-digilent-xc3s1600e|leon3mp.vhd/erxco_pad - inpad - rtl</ClosedNode>
86 <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-APB_LCD-digilent-xc3s1600e|leon3mp.vhd/erxco_pad - inpad - rtl</ClosedNode>
29 <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-APB_LCD-digilent-xc3s1600e|leon3mp.vhd/erxcr_pad - inpad - rtl</ClosedNode>
87 <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-APB_LCD-digilent-xc3s1600e|leon3mp.vhd/erxcr_pad - inpad - rtl</ClosedNode>
30 <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-APB_LCD-digilent-xc3s1600e|leon3mp.vhd/erxd_pad - inpadv - rtl</ClosedNode>
88 <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-APB_LCD-digilent-xc3s1600e|leon3mp.vhd/erxd_pad - inpadv - rtl</ClosedNode>
31 <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-APB_LCD-digilent-xc3s1600e|leon3mp.vhd/erxdv_pad - inpad - rtl</ClosedNode>
89 <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-APB_LCD-digilent-xc3s1600e|leon3mp.vhd/erxdv_pad - inpad - rtl</ClosedNode>
32 <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-APB_LCD-digilent-xc3s1600e|leon3mp.vhd/erxer_pad - inpad - rtl</ClosedNode>
90 <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-APB_LCD-digilent-xc3s1600e|leon3mp.vhd/erxer_pad - inpad - rtl</ClosedNode>
33 <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-APB_LCD-digilent-xc3s1600e|leon3mp.vhd/etxc_pad - inpad - rtl</ClosedNode>
91 <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-APB_LCD-digilent-xc3s1600e|leon3mp.vhd/etxc_pad - inpad - rtl</ClosedNode>
34 <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-APB_LCD-digilent-xc3s1600e|leon3mp.vhd/etxd_pad - outpadv - rtl</ClosedNode>
92 <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-APB_LCD-digilent-xc3s1600e|leon3mp.vhd/etxd_pad - outpadv - rtl</ClosedNode>
35 <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-APB_LCD-digilent-xc3s1600e|leon3mp.vhd/etxen_pad - outpad - rtl</ClosedNode>
93 <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-APB_LCD-digilent-xc3s1600e|leon3mp.vhd/etxen_pad - outpad - rtl</ClosedNode>
36 <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-APB_LCD-digilent-xc3s1600e|leon3mp.vhd/etxer_pad - outpad - rtl</ClosedNode>
94 <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-APB_LCD-digilent-xc3s1600e|leon3mp.vhd/etxer_pad - outpad - rtl</ClosedNode>
37 <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-APB_LCD-digilent-xc3s1600e|leon3mp.vhd/horiz_sync_pad - outpad - rtl</ClosedNode>
95 <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-APB_LCD-digilent-xc3s1600e|leon3mp.vhd/horiz_sync_pad - outpad - rtl</ClosedNode>
38 <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-APB_LCD-digilent-xc3s1600e|leon3mp.vhd/kbdata_pad - iopad - rtl</ClosedNode>
96 <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-APB_LCD-digilent-xc3s1600e|leon3mp.vhd/kbdata_pad - iopad - rtl</ClosedNode>
39 <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-APB_LCD-digilent-xc3s1600e|leon3mp.vhd/kbdclk_pad - iopad - rtl</ClosedNode>
97 <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-APB_LCD-digilent-xc3s1600e|leon3mp.vhd/kbdclk_pad - iopad - rtl</ClosedNode>
40 <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-APB_LCD-digilent-xc3s1600e|leon3mp.vhd/oen_pad - outpad - rtl</ClosedNode>
98 <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-APB_LCD-digilent-xc3s1600e|leon3mp.vhd/oen_pad - outpad - rtl</ClosedNode>
41 <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-APB_LCD-digilent-xc3s1600e|leon3mp.vhd/roms_pad - outpad - rtl</ClosedNode>
99 <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-APB_LCD-digilent-xc3s1600e|leon3mp.vhd/roms_pad - outpad - rtl</ClosedNode>
42 <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-APB_LCD-digilent-xc3s1600e|leon3mp.vhd/serrx_pad - inpad - rtl</ClosedNode>
100 <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-APB_LCD-digilent-xc3s1600e|leon3mp.vhd/serrx_pad - inpad - rtl</ClosedNode>
43 <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-APB_LCD-digilent-xc3s1600e|leon3mp.vhd/sertx_pad - outpad - rtl</ClosedNode>
101 <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-APB_LCD-digilent-xc3s1600e|leon3mp.vhd/sertx_pad - outpad - rtl</ClosedNode>
44 <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-APB_LCD-digilent-xc3s1600e|leon3mp.vhd/sr1 - mctrl - rtl</ClosedNode>
102 <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-APB_LCD-digilent-xc3s1600e|leon3mp.vhd/sr1 - mctrl - rtl</ClosedNode>
45 <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-APB_LCD-digilent-xc3s1600e|leon3mp.vhd/svga0 - svgactrl - rtl</ClosedNode>
103 <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-APB_LCD-digilent-xc3s1600e|leon3mp.vhd/svga0 - svgactrl - rtl</ClosedNode>
46 <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-APB_LCD-digilent-xc3s1600e|leon3mp.vhd/u0 - leon3s - rtl</ClosedNode>
104 <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-APB_LCD-digilent-xc3s1600e|leon3mp.vhd/u0 - leon3s - rtl</ClosedNode>
47 <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-APB_LCD-digilent-xc3s1600e|leon3mp.vhd/vert_sync_pad - outpad - rtl</ClosedNode>
105 <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-APB_LCD-digilent-xc3s1600e|leon3mp.vhd/vert_sync_pad - outpad - rtl</ClosedNode>
48 <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-APB_LCD-digilent-xc3s1600e|leon3mp.vhd/video_out_b_pad - outpad - rtl</ClosedNode>
106 <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-APB_LCD-digilent-xc3s1600e|leon3mp.vhd/video_out_b_pad - outpad - rtl</ClosedNode>
49 <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-APB_LCD-digilent-xc3s1600e|leon3mp.vhd/video_out_g_pad - outpad - rtl</ClosedNode>
107 <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-APB_LCD-digilent-xc3s1600e|leon3mp.vhd/video_out_g_pad - outpad - rtl</ClosedNode>
50 <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-APB_LCD-digilent-xc3s1600e|leon3mp.vhd/video_out_r_pad - outpad - rtl</ClosedNode>
108 <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-APB_LCD-digilent-xc3s1600e|leon3mp.vhd/video_out_r_pad - outpad - rtl</ClosedNode>
51 <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-APB_LCD-digilent-xc3s1600e|leon3mp.vhd/wri_pad - outpad - rtl</ClosedNode>
109 <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-APB_LCD-digilent-xc3s1600e|leon3mp.vhd/wri_pad - outpad - rtl</ClosedNode>
52 <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-digilent-xc3s1600e|leon3mp.vhd/LCD0 - apb_lcd_ctrlr - Behavioral</ClosedNode>
110 <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-digilent-xc3s1600e|leon3mp.vhd/LCD0 - apb_lcd_ctrlr - Behavioral</ClosedNode>
53 <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-digilent-xc3s1600e|leon3mp.vhd/addr_pad - outpadv - rtl</ClosedNode>
111 <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-digilent-xc3s1600e|leon3mp.vhd/addr_pad - outpadv - rtl</ClosedNode>
54 <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-digilent-xc3s1600e|leon3mp.vhd/ahbjtag0 - ahbjtag - struct</ClosedNode>
112 <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-digilent-xc3s1600e|leon3mp.vhd/ahbjtag0 - ahbjtag - struct</ClosedNode>
55 <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-digilent-xc3s1600e|leon3mp.vhd/ahbram0 - ahbram - rtl</ClosedNode>
113 <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-digilent-xc3s1600e|leon3mp.vhd/ahbram0 - ahbram - rtl</ClosedNode>
56 <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-digilent-xc3s1600e|leon3mp.vhd/clk_pad - clkpad - rtl</ClosedNode>
114 <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-digilent-xc3s1600e|leon3mp.vhd/clk_pad - clkpad - rtl</ClosedNode>
57 <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-digilent-xc3s1600e|leon3mp.vhd/clkgen0 - clkgen - struct</ClosedNode>
115 <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-digilent-xc3s1600e|leon3mp.vhd/clkgen0 - clkgen - struct</ClosedNode>
58 <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-digilent-xc3s1600e|leon3mp.vhd/data_pad - iopadv - rtl</ClosedNode>
116 <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-digilent-xc3s1600e|leon3mp.vhd/data_pad - iopadv - rtl</ClosedNode>
59 <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-digilent-xc3s1600e|leon3mp.vhd/dcom0 - ahbuart - struct</ClosedNode>
117 <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-digilent-xc3s1600e|leon3mp.vhd/dcom0 - ahbuart - struct</ClosedNode>
60 <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-digilent-xc3s1600e|leon3mp.vhd/ddrc - ddrspa - rtl</ClosedNode>
118 <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-digilent-xc3s1600e|leon3mp.vhd/ddrc - ddrspa - rtl</ClosedNode>
61 <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-digilent-xc3s1600e|leon3mp.vhd/dsu0 - dsu3 - rtl</ClosedNode>
119 <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-digilent-xc3s1600e|leon3mp.vhd/dsu0 - dsu3 - rtl</ClosedNode>
62 <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-digilent-xc3s1600e|leon3mp.vhd/dsubre_pad - inpad - rtl</ClosedNode>
120 <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-digilent-xc3s1600e|leon3mp.vhd/dsubre_pad - inpad - rtl</ClosedNode>
63 <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-digilent-xc3s1600e|leon3mp.vhd/dsurx_pad - inpad - rtl</ClosedNode>
121 <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-digilent-xc3s1600e|leon3mp.vhd/dsurx_pad - inpad - rtl</ClosedNode>
64 <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-digilent-xc3s1600e|leon3mp.vhd/dsutx_pad - outpad - rtl</ClosedNode>
122 <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-digilent-xc3s1600e|leon3mp.vhd/dsutx_pad - outpad - rtl</ClosedNode>
65 <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-digilent-xc3s1600e|leon3mp.vhd/e1 - grethm - rtl</ClosedNode>
123 <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-digilent-xc3s1600e|leon3mp.vhd/e1 - grethm - rtl</ClosedNode>
66 <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-digilent-xc3s1600e|leon3mp.vhd/emdc_pad - outpad - rtl</ClosedNode>
124 <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-digilent-xc3s1600e|leon3mp.vhd/emdc_pad - outpad - rtl</ClosedNode>
67 <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-digilent-xc3s1600e|leon3mp.vhd/emdio_pad - iopad - rtl</ClosedNode>
125 <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-digilent-xc3s1600e|leon3mp.vhd/emdio_pad - iopad - rtl</ClosedNode>
68 <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-digilent-xc3s1600e|leon3mp.vhd/error_pad - odpad - rtl</ClosedNode>
126 <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-digilent-xc3s1600e|leon3mp.vhd/error_pad - odpad - rtl</ClosedNode>
69 <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-digilent-xc3s1600e|leon3mp.vhd/erxc_pad - inpad - rtl</ClosedNode>
127 <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-digilent-xc3s1600e|leon3mp.vhd/erxc_pad - inpad - rtl</ClosedNode>
70 <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-digilent-xc3s1600e|leon3mp.vhd/erxco_pad - inpad - rtl</ClosedNode>
128 <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-digilent-xc3s1600e|leon3mp.vhd/erxco_pad - inpad - rtl</ClosedNode>
71 <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-digilent-xc3s1600e|leon3mp.vhd/erxcr_pad - inpad - rtl</ClosedNode>
129 <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-digilent-xc3s1600e|leon3mp.vhd/erxcr_pad - inpad - rtl</ClosedNode>
72 <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-digilent-xc3s1600e|leon3mp.vhd/erxd_pad - inpadv - rtl</ClosedNode>
130 <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-digilent-xc3s1600e|leon3mp.vhd/erxd_pad - inpadv - rtl</ClosedNode>
73 <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-digilent-xc3s1600e|leon3mp.vhd/erxdv_pad - inpad - rtl</ClosedNode>
131 <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-digilent-xc3s1600e|leon3mp.vhd/erxdv_pad - inpad - rtl</ClosedNode>
74 <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-digilent-xc3s1600e|leon3mp.vhd/erxer_pad - inpad - rtl</ClosedNode>
132 <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-digilent-xc3s1600e|leon3mp.vhd/erxer_pad - inpad - rtl</ClosedNode>
75 <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-digilent-xc3s1600e|leon3mp.vhd/etxc_pad - inpad - rtl</ClosedNode>
133 <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-digilent-xc3s1600e|leon3mp.vhd/etxc_pad - inpad - rtl</ClosedNode>
76 <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-digilent-xc3s1600e|leon3mp.vhd/etxd_pad - outpadv - rtl</ClosedNode>
134 <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-digilent-xc3s1600e|leon3mp.vhd/etxd_pad - outpadv - rtl</ClosedNode>
77 <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-digilent-xc3s1600e|leon3mp.vhd/etxen_pad - outpad - rtl</ClosedNode>
135 <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-digilent-xc3s1600e|leon3mp.vhd/etxen_pad - outpad - rtl</ClosedNode>
78 <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-digilent-xc3s1600e|leon3mp.vhd/etxer_pad - outpad - rtl</ClosedNode>
136 <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-digilent-xc3s1600e|leon3mp.vhd/etxer_pad - outpad - rtl</ClosedNode>
79 <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-digilent-xc3s1600e|leon3mp.vhd/horiz_sync_pad - outpad - rtl</ClosedNode>
137 <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-digilent-xc3s1600e|leon3mp.vhd/horiz_sync_pad - outpad - rtl</ClosedNode>
80 <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-digilent-xc3s1600e|leon3mp.vhd/kbdata_pad - iopad - rtl</ClosedNode>
138 <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-digilent-xc3s1600e|leon3mp.vhd/kbdata_pad - iopad - rtl</ClosedNode>
81 <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-digilent-xc3s1600e|leon3mp.vhd/kbdclk_pad - iopad - rtl</ClosedNode>
139 <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-digilent-xc3s1600e|leon3mp.vhd/kbdclk_pad - iopad - rtl</ClosedNode>
82 <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-digilent-xc3s1600e|leon3mp.vhd/oen_pad - outpad - rtl</ClosedNode>
140 <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-digilent-xc3s1600e|leon3mp.vhd/oen_pad - outpad - rtl</ClosedNode>
83 <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-digilent-xc3s1600e|leon3mp.vhd/roms_pad - outpad - rtl</ClosedNode>
141 <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-digilent-xc3s1600e|leon3mp.vhd/roms_pad - outpad - rtl</ClosedNode>
84 <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-digilent-xc3s1600e|leon3mp.vhd/serrx_pad - inpad - rtl</ClosedNode>
142 <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-digilent-xc3s1600e|leon3mp.vhd/serrx_pad - inpad - rtl</ClosedNode>
85 <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-digilent-xc3s1600e|leon3mp.vhd/sertx_pad - outpad - rtl</ClosedNode>
143 <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-digilent-xc3s1600e|leon3mp.vhd/sertx_pad - outpad - rtl</ClosedNode>
86 <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-digilent-xc3s1600e|leon3mp.vhd/sr1 - mctrl - rtl</ClosedNode>
144 <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-digilent-xc3s1600e|leon3mp.vhd/sr1 - mctrl - rtl</ClosedNode>
87 <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-digilent-xc3s1600e|leon3mp.vhd/svga0 - svgactrl - rtl</ClosedNode>
145 <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-digilent-xc3s1600e|leon3mp.vhd/svga0 - svgactrl - rtl</ClosedNode>
88 <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-digilent-xc3s1600e|leon3mp.vhd/u0 - leon3s - rtl</ClosedNode>
146 <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-digilent-xc3s1600e|leon3mp.vhd/u0 - leon3s - rtl</ClosedNode>
89 <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-digilent-xc3s1600e|leon3mp.vhd/vert_sync_pad - outpad - rtl</ClosedNode>
147 <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-digilent-xc3s1600e|leon3mp.vhd/vert_sync_pad - outpad - rtl</ClosedNode>
90 <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-digilent-xc3s1600e|leon3mp.vhd/video_out_b_pad - outpad - rtl</ClosedNode>
148 <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-digilent-xc3s1600e|leon3mp.vhd/video_out_b_pad - outpad - rtl</ClosedNode>
91 <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-digilent-xc3s1600e|leon3mp.vhd/video_out_g_pad - outpad - rtl</ClosedNode>
149 <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-digilent-xc3s1600e|leon3mp.vhd/video_out_g_pad - outpad - rtl</ClosedNode>
92 <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-digilent-xc3s1600e|leon3mp.vhd/video_out_r_pad - outpad - rtl</ClosedNode>
150 <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-digilent-xc3s1600e|leon3mp.vhd/video_out_r_pad - outpad - rtl</ClosedNode>
93 <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-digilent-xc3s1600e|leon3mp.vhd/wri_pad - outpad - rtl</ClosedNode>
151 <ClosedNode>/leon3mp - rtl |opt|GRLIB|grlib-gpl-1.1.0-b4104|designs|leon3-digilent-xc3s1600e|leon3mp.vhd/wri_pad - outpad - rtl</ClosedNode>
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154 <SelectedItem>leon3mp - rtl (/opt/GRLIB/grlib-gpl-1.1.0-b4104/designs/leon3-APB_LCD-digilent-xc3s1600e/leon3mp.vhd)</SelectedItem>
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164 <ClosedNodesVersion>1</ClosedNodesVersion>
107 <ClosedNode>Configure Target Device</ClosedNode>
165 <ClosedNode>Configure Target Device</ClosedNode>
108 <ClosedNode>Design Utilities</ClosedNode>
166 <ClosedNode>Design Utilities</ClosedNode>
109 <ClosedNode>Implement Design</ClosedNode>
167 <ClosedNode>Implement Design</ClosedNode>
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30 <view inputState="Fitted" program="taengine" contextTags="CPLD_ONLY,EDK_OFF" hidden="true" type="EXTERNAL_HTML" file="leon3mp_html/tim/report.htm" label="CPLD Timing Report" />
30 <view inputState="Fitted" program="taengine" contextTags="CPLD_ONLY,EDK_OFF" hidden="true" type="EXTERNAL_HTML" file="leon3mp_html/tim/report.htm" label="CPLD Timing Report" />
31 </viewgroup>
31 </viewgroup>
32 <viewgroup label="XPS Errors and Warnings" >
32 <viewgroup label="XPS Errors and Warnings" >
33 <view program="platgen" WrapMessages="true" contextTags="EDK_ON" hidden="true" type="MessageList" hideColumns="Filtered" file="__xps/ise/_xmsgs/platgen.xmsgs" label="Platgen Messages" />
33 <view program="platgen" WrapMessages="true" contextTags="EDK_ON" hidden="true" type="MessageList" hideColumns="Filtered" file="__xps/ise/_xmsgs/platgen.xmsgs" label="Platgen Messages" />
34 <view program="libgen" WrapMessages="true" contextTags="EDK_ON" hidden="true" type="MessageList" hideColumns="Filtered" file="__xps/ise/_xmsgs/libgen.xmsgs" label="Libgen Messages" />
34 <view program="libgen" WrapMessages="true" contextTags="EDK_ON" hidden="true" type="MessageList" hideColumns="Filtered" file="__xps/ise/_xmsgs/libgen.xmsgs" label="Libgen Messages" />
35 <view program="simgen" WrapMessages="true" contextTags="EDK_ON" hidden="true" type="MessageList" hideColumns="Filtered" file="__xps/ise/_xmsgs/simgen.xmsgs" label="Simgen Messages" />
35 <view program="simgen" WrapMessages="true" contextTags="EDK_ON" hidden="true" type="MessageList" hideColumns="Filtered" file="__xps/ise/_xmsgs/simgen.xmsgs" label="Simgen Messages" />
36 <view program="bitinit" WrapMessages="true" contextTags="EDK_ON" hidden="true" type="MessageList" hideColumns="Filtered" file="__xps/ise/_xmsgs/bitinit.xmsgs" label="BitInit Messages" />
36 <view program="bitinit" WrapMessages="true" contextTags="EDK_ON" hidden="true" type="MessageList" hideColumns="Filtered" file="__xps/ise/_xmsgs/bitinit.xmsgs" label="BitInit Messages" />
37 </viewgroup>
37 </viewgroup>
38 <viewgroup label="XPS Reports" >
38 <viewgroup label="XPS Reports" >
39 <view inputState="PreSynthesized" program="platgen" contextTags="EDK_ON" hidden="true" type="Secondary_Report" file="platgen.log" label="Platgen Log File" />
39 <view inputState="PreSynthesized" program="platgen" contextTags="EDK_ON" hidden="true" type="Secondary_Report" file="platgen.log" label="Platgen Log File" />
40 <view inputState="PreSynthesized" program="libgen" contextTags="EDK_ON" hidden="true" type="Secondary_Report" file="libgen.log" label="Libgen Log File" />
40 <view inputState="PreSynthesized" program="libgen" contextTags="EDK_ON" hidden="true" type="Secondary_Report" file="libgen.log" label="Libgen Log File" />
41 <view inputState="PreSynthesized" program="simgen" contextTags="EDK_ON" hidden="true" type="Secondary_Report" file="simgen.log" label="Simgen Log File" />
41 <view inputState="PreSynthesized" program="simgen" contextTags="EDK_ON" hidden="true" type="Secondary_Report" file="simgen.log" label="Simgen Log File" />
42 <view inputState="PreSynthesized" program="bitinit" contextTags="EDK_ON" hidden="true" type="Secondary_Report" file="bitinit.log" label="BitInit Log File" />
42 <view inputState="PreSynthesized" program="bitinit" contextTags="EDK_ON" hidden="true" type="Secondary_Report" file="bitinit.log" label="BitInit Log File" />
43 <view inputState="PreSynthesized" program="system" contextTags="EDK_ON" hidden="true" type="Secondary_Report" file="leon3mp.log" label="System Log File" />
43 <view inputState="PreSynthesized" program="system" contextTags="EDK_ON" hidden="true" type="Secondary_Report" file="leon3mp.log" label="System Log File" />
44 </viewgroup>
44 </viewgroup>
45 <viewgroup label="Errors and Warnings" >
45 <viewgroup label="Errors and Warnings" >
46 <view program="pn" WrapMessages="true" contextTags="EDK_OFF" type="MessageList" hideColumns="Filtered, New" file="_xmsgs/pn_parser.xmsgs" label="Parser Messages" />
46 <view program="pn" WrapMessages="true" contextTags="EDK_OFF" type="MessageList" hideColumns="Filtered, New" file="_xmsgs/pn_parser.xmsgs" label="Parser Messages" />
47 <view program="xst" WrapMessages="true" contextTags="XST_ONLY,EDK_OFF" hidden="false" type="MessageList" hideColumns="Filtered" file="_xmsgs/xst.xmsgs" label="Synthesis Messages" />
47 <view program="xst" WrapMessages="true" contextTags="XST_ONLY,EDK_OFF" hidden="false" type="MessageList" hideColumns="Filtered" file="_xmsgs/xst.xmsgs" label="Synthesis Messages" />
48 <view inputState="Synthesized" program="ngdbuild" WrapMessages="true" type="MessageList" hideColumns="Filtered" file="_xmsgs/ngdbuild.xmsgs" label="Translation Messages" />
48 <view inputState="Synthesized" program="ngdbuild" WrapMessages="true" type="MessageList" hideColumns="Filtered" file="_xmsgs/ngdbuild.xmsgs" label="Translation Messages" />
49 <view inputState="Translated" program="map" WrapMessages="true" contextTags="FPGA_ONLY" type="MessageList" hideColumns="Filtered" file="_xmsgs/map.xmsgs" label="Map Messages" />
49 <view inputState="Translated" program="map" WrapMessages="true" contextTags="FPGA_ONLY" type="MessageList" hideColumns="Filtered" file="_xmsgs/map.xmsgs" label="Map Messages" />
50 <view inputState="Mapped" program="par" WrapMessages="true" contextTags="FPGA_ONLY" type="MessageList" hideColumns="Filtered" file="_xmsgs/par.xmsgs" label="Place and Route Messages" />
50 <view inputState="Mapped" program="par" WrapMessages="true" contextTags="FPGA_ONLY" type="MessageList" hideColumns="Filtered" file="_xmsgs/par.xmsgs" label="Place and Route Messages" />
51 <view inputState="Routed" program="trce" WrapMessages="true" contextTags="FPGA_ONLY" type="MessageList" hideColumns="Filtered" file="_xmsgs/trce.xmsgs" label="Timing Messages" />
51 <view inputState="Routed" program="trce" WrapMessages="true" contextTags="FPGA_ONLY" type="MessageList" hideColumns="Filtered" file="_xmsgs/trce.xmsgs" label="Timing Messages" />
52 <view inputState="Routed" program="xpwr" WrapMessages="true" contextTags="EDK_OFF" hidden="true" type="MessageList" hideColumns="Filtered" file="_xmsgs/xpwr.xmsgs" label="Power Messages" />
52 <view inputState="Routed" program="xpwr" WrapMessages="true" contextTags="EDK_OFF" hidden="true" type="MessageList" hideColumns="Filtered" file="_xmsgs/xpwr.xmsgs" label="Power Messages" />
53 <view inputState="Routed" program="bitgen" WrapMessages="true" contextTags="FPGA_ONLY" type="MessageList" hideColumns="Filtered" file="_xmsgs/bitgen.xmsgs" label="Bitgen Messages" />
53 <view inputState="Routed" program="bitgen" WrapMessages="true" contextTags="FPGA_ONLY" type="MessageList" hideColumns="Filtered" file="_xmsgs/bitgen.xmsgs" label="Bitgen Messages" />
54 <view inputState="Translated" program="cpldfit" WrapMessages="true" contextTags="CPLD_ONLY,EDK_OFF" hidden="true" type="MessageList" hideColumns="Filtered" file="_xmsgs/cpldfit.xmsgs" label="Fitter Messages" />
54 <view inputState="Translated" program="cpldfit" WrapMessages="true" contextTags="CPLD_ONLY,EDK_OFF" hidden="true" type="MessageList" hideColumns="Filtered" file="_xmsgs/cpldfit.xmsgs" label="Fitter Messages" />
55 <view inputState="Current" program="implementation" WrapMessages="true" fileList="_xmsgs/xst.xmsgs,_xmsgs/ngdbuild.xmsgs,_xmsgs/map.xmsgs,_xmsgs/par.xmsgs,_xmsgs/trce.xmsgs,_xmsgs/xpwr.xmsgs,_xmsgs/bitgen.xmsgs" contextTags="FPGA_ONLY" type="MessageList" hideColumns="Filtered" file="_xmsgs/*.xmsgs" label="All Implementation Messages" />
55 <view inputState="Current" program="implementation" WrapMessages="true" fileList="_xmsgs/xst.xmsgs,_xmsgs/ngdbuild.xmsgs,_xmsgs/map.xmsgs,_xmsgs/par.xmsgs,_xmsgs/trce.xmsgs,_xmsgs/xpwr.xmsgs,_xmsgs/bitgen.xmsgs" contextTags="FPGA_ONLY" type="MessageList" hideColumns="Filtered" file="_xmsgs/*.xmsgs" label="All Implementation Messages" />
56 <view inputState="Current" program="fitting" WrapMessages="true" fileList="_xmsgs/xst.xmsgs,_xmsgs/ngdbuild.xmsgs,_xmsgs/cpldfit.xmsgs,_xmsgs/xpwr.xmsgs" contextTags="CPLD_ONLY,EDK_OFF" hidden="true" type="CPLD_MessageList" hideColumns="Filtered" file="_xmsgs/*.xmsgs" label="All Implementation Messages (CPLD)" />
56 <view inputState="Current" program="fitting" WrapMessages="true" fileList="_xmsgs/xst.xmsgs,_xmsgs/ngdbuild.xmsgs,_xmsgs/cpldfit.xmsgs,_xmsgs/xpwr.xmsgs" contextTags="CPLD_ONLY,EDK_OFF" hidden="true" type="CPLD_MessageList" hideColumns="Filtered" file="_xmsgs/*.xmsgs" label="All Implementation Messages (CPLD)" />
57 </viewgroup>
57 </viewgroup>
58 <viewgroup label="Detailed Reports" >
58 <viewgroup label="Detailed Reports" >
59 <view program="xst" contextTags="XST_ONLY,EDK_OFF" hidden="false" type="Report" file="leon3mp.syr" label="Synthesis Report" >
59 <view program="xst" contextTags="XST_ONLY,EDK_OFF" hidden="false" type="Report" file="leon3mp.syr" label="Synthesis Report" >
60 <toc-item title="Top of Report" target="Copyright " searchDir="Forward" />
60 <toc-item title="Top of Report" target="Copyright " searchDir="Forward" />
61 <toc-item title="Synthesis Options Summary" target=" Synthesis Options Summary " />
61 <toc-item title="Synthesis Options Summary" target=" Synthesis Options Summary " />
62 <toc-item title="HDL Compilation" target=" HDL Compilation " />
62 <toc-item title="HDL Compilation" target=" HDL Compilation " />
63 <toc-item title="Design Hierarchy Analysis" target=" Design Hierarchy Analysis " />
63 <toc-item title="Design Hierarchy Analysis" target=" Design Hierarchy Analysis " />
64 <toc-item title="HDL Analysis" target=" HDL Analysis " />
64 <toc-item title="HDL Analysis" target=" HDL Analysis " />
65 <toc-item title="HDL Parsing" target=" HDL Parsing " />
65 <toc-item title="HDL Parsing" target=" HDL Parsing " />
66 <toc-item title="HDL Elaboration" target=" HDL Elaboration " />
66 <toc-item title="HDL Elaboration" target=" HDL Elaboration " />
67 <toc-item title="HDL Synthesis" target=" HDL Synthesis " />
67 <toc-item title="HDL Synthesis" target=" HDL Synthesis " />
68 <toc-item title="HDL Synthesis Report" target="HDL Synthesis Report" searchCnt="2" searchDir="Backward" subItemLevel="1" />
68 <toc-item title="HDL Synthesis Report" target="HDL Synthesis Report" searchCnt="2" searchDir="Backward" subItemLevel="1" />
69 <toc-item title="Advanced HDL Synthesis" target=" Advanced HDL Synthesis " searchDir="Backward" />
69 <toc-item title="Advanced HDL Synthesis" target=" Advanced HDL Synthesis " searchDir="Backward" />
70 <toc-item title="Advanced HDL Synthesis Report" target="Advanced HDL Synthesis Report" subItemLevel="1" />
70 <toc-item title="Advanced HDL Synthesis Report" target="Advanced HDL Synthesis Report" subItemLevel="1" />
71 <toc-item title="Low Level Synthesis" target=" Low Level Synthesis " />
71 <toc-item title="Low Level Synthesis" target=" Low Level Synthesis " />
72 <toc-item title="Partition Report" target=" Partition Report " />
72 <toc-item title="Partition Report" target=" Partition Report " />
73 <toc-item title="Final Report" target=" Final Report " />
73 <toc-item title="Final Report" target=" Final Report " />
74 <toc-item title="Design Summary" target=" Design Summary " />
74 <toc-item title="Design Summary" target=" Design Summary " />
75 <toc-item title="Primitive and Black Box Usage" target="Primitive and Black Box Usage:" subItemLevel="1" />
75 <toc-item title="Primitive and Black Box Usage" target="Primitive and Black Box Usage:" subItemLevel="1" />
76 <toc-item title="Device Utilization Summary" target="Device utilization summary:" subItemLevel="1" />
76 <toc-item title="Device Utilization Summary" target="Device utilization summary:" subItemLevel="1" />
77 <toc-item title="Partition Resource Summary" target="Partition Resource Summary:" subItemLevel="1" />
77 <toc-item title="Partition Resource Summary" target="Partition Resource Summary:" subItemLevel="1" />
78 <toc-item title="Timing Report" target="Timing Report" subItemLevel="1" />
78 <toc-item title="Timing Report" target="Timing Report" subItemLevel="1" />
79 <toc-item title="Clock Information" target="Clock Information" subItemLevel="2" />
79 <toc-item title="Clock Information" target="Clock Information" subItemLevel="2" />
80 <toc-item title="Asynchronous Control Signals Information" target="Asynchronous Control Signals Information" subItemLevel="2" />
80 <toc-item title="Asynchronous Control Signals Information" target="Asynchronous Control Signals Information" subItemLevel="2" />
81 <toc-item title="Timing Summary" target="Timing Summary" subItemLevel="2" />
81 <toc-item title="Timing Summary" target="Timing Summary" subItemLevel="2" />
82 <toc-item title="Timing Details" target="Timing Details" subItemLevel="2" />
82 <toc-item title="Timing Details" target="Timing Details" subItemLevel="2" />
83 <toc-item title="Cross Clock Domains Report" target="Cross Clock Domains Report:" subItemLevel="2" />
83 <toc-item title="Cross Clock Domains Report" target="Cross Clock Domains Report:" subItemLevel="2" />
84 </view>
84 </view>
85 <view program="synplify" contextTags="SYNPLIFY_ONLY,EDK_OFF" hidden="true" type="Report" file="leon3mp.srr" label="Synplify Report" />
85 <view program="synplify" contextTags="SYNPLIFY_ONLY,EDK_OFF" hidden="true" type="Report" file="leon3mp.srr" label="Synplify Report" />
86 <view program="precision" contextTags="PRECISION_ONLY,EDK_OFF" hidden="true" type="Report" file="leon3mp.prec_log" label="Precision Report" />
86 <view program="precision" contextTags="PRECISION_ONLY,EDK_OFF" hidden="true" type="Report" file="leon3mp.prec_log" label="Precision Report" />
87 <view inputState="Synthesized" program="ngdbuild" type="Report" file="leon3mp.bld" label="Translation Report" >
87 <view inputState="Synthesized" program="ngdbuild" type="Report" file="leon3mp.bld" label="Translation Report" >
88 <toc-item title="Top of Report" target="Copyright (c)" searchDir="Forward" />
88 <toc-item title="Top of Report" target="Copyright (c)" searchDir="Forward" />
89 <toc-item title="Command Line" target="Command Line:" />
89 <toc-item title="Command Line" target="Command Line:" />
90 <toc-item title="Partition Status" target="Partition Implementation Status" />
90 <toc-item title="Partition Status" target="Partition Implementation Status" />
91 <toc-item title="Final Summary" target="NGDBUILD Design Results Summary:" />
91 <toc-item title="Final Summary" target="NGDBUILD Design Results Summary:" />
92 </view>
92 </view>
93 <view inputState="Translated" program="map" contextTags="FPGA_ONLY" type="Report" file="leon3mp_map.mrp" label="Map Report" >
93 <view inputState="Translated" program="map" contextTags="FPGA_ONLY" type="Report" file="leon3mp_map.mrp" label="Map Report" >
94 <toc-item title="Top of Report" target="Release" searchDir="Forward" />
94 <toc-item title="Top of Report" target="Release" searchDir="Forward" />
95 <toc-item title="Section 1: Errors" target="Section 1 -" searchDir="Backward" />
95 <toc-item title="Section 1: Errors" target="Section 1 -" searchDir="Backward" />
96 <toc-item title="Section 2: Warnings" target="Section 2 -" searchDir="Backward" />
96 <toc-item title="Section 2: Warnings" target="Section 2 -" searchDir="Backward" />
97 <toc-item title="Section 3: Infos" target="Section 3 -" searchDir="Backward" />
97 <toc-item title="Section 3: Infos" target="Section 3 -" searchDir="Backward" />
98 <toc-item title="Section 4: Removed Logic Summary" target="Section 4 -" searchDir="Backward" />
98 <toc-item title="Section 4: Removed Logic Summary" target="Section 4 -" searchDir="Backward" />
99 <toc-item title="Section 5: Removed Logic" target="Section 5 -" searchDir="Backward" />
99 <toc-item title="Section 5: Removed Logic" target="Section 5 -" searchDir="Backward" />
100 <toc-item title="Section 6: IOB Properties" target="Section 6 -" searchDir="Backward" />
100 <toc-item title="Section 6: IOB Properties" target="Section 6 -" searchDir="Backward" />
101 <toc-item title="Section 7: RPMs" target="Section 7 -" searchDir="Backward" />
101 <toc-item title="Section 7: RPMs" target="Section 7 -" searchDir="Backward" />
102 <toc-item title="Section 8: Guide Report" target="Section 8 -" searchDir="Backward" />
102 <toc-item title="Section 8: Guide Report" target="Section 8 -" searchDir="Backward" />
103 <toc-item title="Section 9: Area Group and Partition Summary" target="Section 9 -" searchDir="Backward" />
103 <toc-item title="Section 9: Area Group and Partition Summary" target="Section 9 -" searchDir="Backward" />
104 <toc-item title="Section 10: Timing Report" target="Section 10 -" searchDir="Backward" />
104 <toc-item title="Section 10: Timing Report" target="Section 10 -" searchDir="Backward" />
105 <toc-item title="Section 11: Configuration String Details" target="Section 11 -" searchDir="Backward" />
105 <toc-item title="Section 11: Configuration String Details" target="Section 11 -" searchDir="Backward" />
106 <toc-item title="Section 12: Control Set Information" target="Section 12 -" searchDir="Backward" />
106 <toc-item title="Section 12: Control Set Information" target="Section 12 -" searchDir="Backward" />
107 <toc-item title="Section 13: Utilization by Hierarchy" target="Section 13 -" searchDir="Backward" />
107 <toc-item title="Section 13: Utilization by Hierarchy" target="Section 13 -" searchDir="Backward" />
108 </view>
108 </view>
109 <view inputState="Mapped" program="par" contextTags="FPGA_ONLY" type="Report" file="leon3mp.par" label="Place and Route Report" >
109 <view inputState="Mapped" program="par" contextTags="FPGA_ONLY" type="Report" file="leon3mp.par" label="Place and Route Report" >
110 <toc-item title="Top of Report" target="Copyright (c)" searchDir="Forward" />
110 <toc-item title="Top of Report" target="Copyright (c)" searchDir="Forward" />
111 <toc-item title="Device Utilization" target="Device Utilization Summary:" />
111 <toc-item title="Device Utilization" target="Device Utilization Summary:" />
112 <toc-item title="Router Information" target="Starting Router" />
112 <toc-item title="Router Information" target="Starting Router" />
113 <toc-item title="Partition Status" target="Partition Implementation Status" />
113 <toc-item title="Partition Status" target="Partition Implementation Status" />
114 <toc-item title="Clock Report" target="Generating Clock Report" />
114 <toc-item title="Clock Report" target="Generating Clock Report" />
115 <toc-item title="Timing Results" target="Timing Score:" />
115 <toc-item title="Timing Results" target="Timing Score:" />
116 <toc-item title="Final Summary" target="Peak Memory Usage:" />
116 <toc-item title="Final Summary" target="Peak Memory Usage:" />
117 </view>
117 </view>
118 <view inputState="Routed" program="trce" contextTags="FPGA_ONLY" type="Report" file="leon3mp.twr" label="Post-PAR Static Timing Report" >
118 <view inputState="Routed" program="trce" contextTags="FPGA_ONLY" type="Report" file="leon3mp.twr" label="Post-PAR Static Timing Report" >
119 <toc-item title="Top of Report" target="Copyright (c)" searchDir="Forward" />
119 <toc-item title="Top of Report" target="Copyright (c)" searchDir="Forward" />
120 <toc-item title="Timing Report Description" target="Device,package,speed:" />
120 <toc-item title="Timing Report Description" target="Device,package,speed:" />
121 <toc-item title="Informational Messages" target="INFO:" />
121 <toc-item title="Informational Messages" target="INFO:" />
122 <toc-item title="Warning Messages" target="WARNING:" />
122 <toc-item title="Warning Messages" target="WARNING:" />
123 <toc-item title="Timing Constraints" target="Timing constraint:" />
123 <toc-item title="Timing Constraints" target="Timing constraint:" />
124 <toc-item title="Derived Constraint Report" target="Derived Constraint Report" />
124 <toc-item title="Derived Constraint Report" target="Derived Constraint Report" />
125 <toc-item title="Data Sheet Report" target="Data Sheet report:" />
125 <toc-item title="Data Sheet Report" target="Data Sheet report:" />
126 <toc-item title="Timing Summary" target="Timing summary:" />
126 <toc-item title="Timing Summary" target="Timing summary:" />
127 <toc-item title="Trace Settings" target="Trace Settings:" />
127 <toc-item title="Trace Settings" target="Trace Settings:" />
128 </view>
128 </view>
129 <view inputState="Translated" program="cpldfit" contextTags="CPLD_ONLY,EDK_OFF" hidden="true" type="Report" file="leon3mp.rpt" label="CPLD Fitter Report (Text)" >
129 <view inputState="Translated" program="cpldfit" contextTags="CPLD_ONLY,EDK_OFF" hidden="true" type="Report" file="leon3mp.rpt" label="CPLD Fitter Report (Text)" >
130 <toc-item title="Top of Report" target="cpldfit:" searchDir="Forward" />
130 <toc-item title="Top of Report" target="cpldfit:" searchDir="Forward" />
131 <toc-item title="Resources Summary" target="** Mapped Resource Summary **" />
131 <toc-item title="Resources Summary" target="** Mapped Resource Summary **" />
132 <toc-item title="Pin Resources" target="** Pin Resources **" />
132 <toc-item title="Pin Resources" target="** Pin Resources **" />
133 <toc-item title="Global Resources" target="** Global Control Resources **" />
133 <toc-item title="Global Resources" target="** Global Control Resources **" />
134 </view>
134 </view>
135 <view inputState="Fitted" program="taengine" contextTags="CPLD_ONLY,EDK_OFF" hidden="true" type="Report" file="leon3mp.tim" label="CPLD Timing Report (Text)" >
135 <view inputState="Fitted" program="taengine" contextTags="CPLD_ONLY,EDK_OFF" hidden="true" type="Report" file="leon3mp.tim" label="CPLD Timing Report (Text)" >
136 <toc-item title="Top of Report" target="Performance Summary Report" searchDir="Forward" />
136 <toc-item title="Top of Report" target="Performance Summary Report" searchDir="Forward" />
137 <toc-item title="Performance Summary" target="Performance Summary:" />
137 <toc-item title="Performance Summary" target="Performance Summary:" />
138 </view>
138 </view>
139 <view inputState="Routed" program="xpwr" contextTags="EDK_OFF" type="Report" file="leon3mp.pwr" label="Power Report" >
139 <view inputState="Routed" program="xpwr" contextTags="EDK_OFF" type="Report" file="leon3mp.pwr" label="Power Report" >
140 <toc-item title="Top of Report" target="Copyright (c)" searchDir="Forward" />
140 <toc-item title="Top of Report" target="Copyright (c)" searchDir="Forward" />
141 <toc-item title="Power summary" target="Power summary" />
141 <toc-item title="Power summary" target="Power summary" />
142 <toc-item title="Thermal summary" target="Thermal summary" />
142 <toc-item title="Thermal summary" target="Thermal summary" />
143 </view>
143 </view>
144 <view inputState="Routed" program="bitgen" contextTags="FPGA_ONLY" type="Report" file="leon3mp.bgn" label="Bitgen Report" >
144 <view inputState="Routed" program="bitgen" contextTags="FPGA_ONLY" type="Report" file="leon3mp.bgn" label="Bitgen Report" >
145 <toc-item title="Top of Report" target="Copyright (c)" searchDir="Forward" />
145 <toc-item title="Top of Report" target="Copyright (c)" searchDir="Forward" />
146 <toc-item title="Bitgen Options" target="Summary of Bitgen Options:" />
146 <toc-item title="Bitgen Options" target="Summary of Bitgen Options:" />
147 <toc-item title="Final Summary" target="DRC detected" />
147 <toc-item title="Final Summary" target="DRC detected" />
148 </view>
148 </view>
149 </viewgroup>
149 </viewgroup>
150 <viewgroup label="Secondary Reports" >
150 <viewgroup label="Secondary Reports" >
151 <view inputState="PreSynthesized" program="isim" hidden="if_missing" type="Secondary_Report" file="isim.log" label="ISIM Simulator Log" />
151 <view inputState="PreSynthesized" program="isim" hidden="if_missing" type="Secondary_Report" file="isim.log" label="ISIM Simulator Log" />
152 <view inputState="Synthesized" program="netgen" hidden="if_missing" type="Secondary_Report" file="netgen/synthesis/leon3mp_synthesis.nlf" label="Post-Synthesis Simulation Model Report" >
152 <view inputState="Synthesized" program="netgen" hidden="if_missing" type="Secondary_Report" file="netgen/synthesis/leon3mp_synthesis.nlf" label="Post-Synthesis Simulation Model Report" >
153 <toc-item title="Top of Report" target="Release" searchDir="Forward" />
153 <toc-item title="Top of Report" target="Release" searchDir="Forward" />
154 </view>
154 </view>
155 <view inputState="Translated" program="netgen" hidden="if_missing" type="Secondary_Report" file="netgen/translate/leon3mp_translate.nlf" label="Post-Translate Simulation Model Report" >
155 <view inputState="Translated" program="netgen" hidden="if_missing" type="Secondary_Report" file="netgen/translate/leon3mp_translate.nlf" label="Post-Translate Simulation Model Report" >
156 <toc-item title="Top of Report" target="Release" searchDir="Forward" />
156 <toc-item title="Top of Report" target="Release" searchDir="Forward" />
157 </view>
157 </view>
158 <view inputState="Translated" program="netgen" hidden="if_missing" type="Secondary_Report" file="leon3mp_tran_fecn.nlf" label="Post-Translate Formality Netlist Report" />
158 <view inputState="Translated" program="netgen" hidden="if_missing" type="Secondary_Report" file="leon3mp_tran_fecn.nlf" label="Post-Translate Formality Netlist Report" />
159 <view inputState="Translated" program="map" contextTags="FPGA_ONLY" hidden="true" type="Secondary_Report" file="leon3mp_map.map" label="Map Log File" >
159 <view inputState="Translated" program="map" contextTags="FPGA_ONLY" hidden="true" type="Secondary_Report" file="leon3mp_map.map" label="Map Log File" >
160 <toc-item title="Top of Report" target="Release" searchDir="Forward" />
160 <toc-item title="Top of Report" target="Release" searchDir="Forward" />
161 <toc-item title="Design Information" target="Design Information" />
161 <toc-item title="Design Information" target="Design Information" />
162 <toc-item title="Design Summary" target="Design Summary" />
162 <toc-item title="Design Summary" target="Design Summary" />
163 </view>
163 </view>
164 <view inputState="Routed" program="smartxplorer" contextTags="FPGA_ONLY" hidden="if_missing" type="Secondary_Report" file="smartxplorer_results/smartxplorer.txt" label="SmartXplorer Report" />
164 <view inputState="Routed" program="smartxplorer" contextTags="FPGA_ONLY" hidden="if_missing" type="Secondary_Report" file="smartxplorer_results/smartxplorer.txt" label="SmartXplorer Report" />
165 <view inputState="Mapped" program="trce" contextTags="FPGA_ONLY" hidden="if_missing" type="Secondary_Report" file="leon3mp_preroute.twr" label="Post-Map Static Timing Report" >
165 <view inputState="Mapped" program="trce" contextTags="FPGA_ONLY" hidden="if_missing" type="Secondary_Report" file="leon3mp_preroute.twr" label="Post-Map Static Timing Report" >
166 <toc-item title="Top of Report" target="Copyright (c)" searchDir="Forward" />
166 <toc-item title="Top of Report" target="Copyright (c)" searchDir="Forward" />
167 <toc-item title="Timing Report Description" target="Device,package,speed:" />
167 <toc-item title="Timing Report Description" target="Device,package,speed:" />
168 <toc-item title="Informational Messages" target="INFO:" />
168 <toc-item title="Informational Messages" target="INFO:" />
169 <toc-item title="Warning Messages" target="WARNING:" />
169 <toc-item title="Warning Messages" target="WARNING:" />
170 <toc-item title="Timing Constraints" target="Timing constraint:" />
170 <toc-item title="Timing Constraints" target="Timing constraint:" />
171 <toc-item title="Derived Constraint Report" target="Derived Constraint Report" />
171 <toc-item title="Derived Constraint Report" target="Derived Constraint Report" />
172 <toc-item title="Data Sheet Report" target="Data Sheet report:" />
172 <toc-item title="Data Sheet Report" target="Data Sheet report:" />
173 <toc-item title="Timing Summary" target="Timing summary:" />
173 <toc-item title="Timing Summary" target="Timing summary:" />
174 <toc-item title="Trace Settings" target="Trace Settings:" />
174 <toc-item title="Trace Settings" target="Trace Settings:" />
175 </view>
175 </view>
176 <view inputState="Mapped" program="netgen" hidden="if_missing" type="Secondary_Report" file="netgen/map/leon3mp_map.nlf" label="Post-Map Simulation Model Report" />
176 <view inputState="Mapped" program="netgen" hidden="if_missing" type="Secondary_Report" file="netgen/map/leon3mp_map.nlf" label="Post-Map Simulation Model Report" />
177 <view inputState="Mapped" program="map" contextTags="FPGA_ONLY" hidden="if_missing" type="Secondary_Report" file="leon3mp_map.psr" label="Physical Synthesis Report" >
177 <view inputState="Mapped" program="map" contextTags="FPGA_ONLY" hidden="if_missing" type="Secondary_Report" file="leon3mp_map.psr" label="Physical Synthesis Report" >
178 <toc-item title="Top of Report" target="Copyright (c)" searchDir="Forward" />
178 <toc-item title="Top of Report" target="Copyright (c)" searchDir="Forward" />
179 </view>
179 </view>
180 <view inputState="Mapped" program="par" contextTags="FPGA_ONLY" hidden="true" type="Pad_Report" file="leon3mp_pad.txt" label="Pad Report" >
180 <view inputState="Mapped" program="par" contextTags="FPGA_ONLY" hidden="true" type="Pad_Report" file="leon3mp_pad.txt" label="Pad Report" >
181 <toc-item title="Top of Report" target="Copyright (c)" searchDir="Forward" />
181 <toc-item title="Top of Report" target="Copyright (c)" searchDir="Forward" />
182 </view>
182 </view>
183 <view inputState="Mapped" program="par" contextTags="FPGA_ONLY" hidden="true" type="Secondary_Report" file="leon3mp.unroutes" label="Unroutes Report" >
183 <view inputState="Mapped" program="par" contextTags="FPGA_ONLY" hidden="true" type="Secondary_Report" file="leon3mp.unroutes" label="Unroutes Report" >
184 <toc-item title="Top of Report" target="Copyright (c)" searchDir="Forward" />
184 <toc-item title="Top of Report" target="Copyright (c)" searchDir="Forward" />
185 </view>
185 </view>
186 <view inputState="Mapped" program="map" contextTags="FPGA_ONLY" hidden="if_missing" type="Secondary_Report" file="leon3mp_preroute.tsi" label="Post-Map Constraints Interaction Report" >
186 <view inputState="Mapped" program="map" contextTags="FPGA_ONLY" hidden="if_missing" type="Secondary_Report" file="leon3mp_preroute.tsi" label="Post-Map Constraints Interaction Report" >
187 <toc-item title="Top of Report" target="Release" searchDir="Forward" />
187 <toc-item title="Top of Report" target="Release" searchDir="Forward" />
188 </view>
188 </view>
189 <view inputState="Mapped" program="par" contextTags="FPGA_ONLY" hidden="if_missing" type="Secondary_Report" file="leon3mp.grf" label="Guide Results Report" />
189 <view inputState="Mapped" program="par" contextTags="FPGA_ONLY" hidden="if_missing" type="Secondary_Report" file="leon3mp.grf" label="Guide Results Report" />
190 <view inputState="Routed" program="par" contextTags="FPGA_ONLY" hidden="if_missing" type="Secondary_Report" file="leon3mp.dly" label="Asynchronous Delay Report" />
190 <view inputState="Routed" program="par" contextTags="FPGA_ONLY" hidden="if_missing" type="Secondary_Report" file="leon3mp.dly" label="Asynchronous Delay Report" />
191 <view inputState="Routed" program="par" contextTags="FPGA_ONLY" hidden="if_missing" type="Secondary_Report" file="leon3mp.clk_rgn" label="Clock Region Report" />
191 <view inputState="Routed" program="par" contextTags="FPGA_ONLY" hidden="if_missing" type="Secondary_Report" file="leon3mp.clk_rgn" label="Clock Region Report" />
192 <view inputState="Routed" program="par" contextTags="FPGA_ONLY" hidden="if_missing" type="Secondary_Report" file="leon3mp.tsi" label="Post-Place and Route Constraints Interaction Report" >
192 <view inputState="Routed" program="par" contextTags="FPGA_ONLY" hidden="if_missing" type="Secondary_Report" file="leon3mp.tsi" label="Post-Place and Route Constraints Interaction Report" >
193 <toc-item title="Top of Report" target="Copyright (c)" searchDir="Forward" />
193 <toc-item title="Top of Report" target="Copyright (c)" searchDir="Forward" />
194 </view>
194 </view>
195 <view inputState="Routed" program="netgen" hidden="if_missing" type="Secondary_Report" file="leon3mp_par_fecn.nlf" label="Post-Place and Route Formality Netlist Report" />
195 <view inputState="Routed" program="netgen" hidden="if_missing" type="Secondary_Report" file="leon3mp_par_fecn.nlf" label="Post-Place and Route Formality Netlist Report" />
196 <view inputState="Routed" program="netgen" contextTags="FPGA_ONLY" hidden="if_missing" type="Secondary_Report" file="netgen/par/leon3mp_timesim.nlf" label="Post-Place and Route Simulation Model Report" />
196 <view inputState="Routed" program="netgen" contextTags="FPGA_ONLY" hidden="if_missing" type="Secondary_Report" file="netgen/par/leon3mp_timesim.nlf" label="Post-Place and Route Simulation Model Report" />
197 <view inputState="Routed" program="netgen" hidden="if_missing" type="Secondary_Report" file="leon3mp_sta.nlf" label="Primetime Netlist Report" >
197 <view inputState="Routed" program="netgen" hidden="if_missing" type="Secondary_Report" file="leon3mp_sta.nlf" label="Primetime Netlist Report" >
198 <toc-item title="Top of Report" target="Release" searchDir="Forward" />
198 <toc-item title="Top of Report" target="Release" searchDir="Forward" />
199 </view>
199 </view>
200 <view inputState="Routed" program="ibiswriter" hidden="if_missing" type="Secondary_Report" file="leon3mp.ibs" label="IBIS Model" >
200 <view inputState="Routed" program="ibiswriter" hidden="if_missing" type="Secondary_Report" file="leon3mp.ibs" label="IBIS Model" >
201 <toc-item title="Top of Report" target="IBIS Models for" searchDir="Forward" />
201 <toc-item title="Top of Report" target="IBIS Models for" searchDir="Forward" />
202 <toc-item title="Component" target="Component " />
202 <toc-item title="Component" target="Component " />
203 </view>
203 </view>
204 <view inputState="Routed" program="pin2ucf" contextTags="FPGA_ONLY" hidden="if_missing" type="Secondary_Report" file="leon3mp.lck" label="Back-annotate Pin Report" >
204 <view inputState="Routed" program="pin2ucf" contextTags="FPGA_ONLY" hidden="if_missing" type="Secondary_Report" file="leon3mp.lck" label="Back-annotate Pin Report" >
205 <toc-item title="Top of Report" target="pin2ucf Report File" searchDir="Forward" />
205 <toc-item title="Top of Report" target="pin2ucf Report File" searchDir="Forward" />
206 <toc-item title="Constraint Conflicts Information" target="Constraint Conflicts Information" />
206 <toc-item title="Constraint Conflicts Information" target="Constraint Conflicts Information" />
207 </view>
207 </view>
208 <view inputState="Routed" program="pin2ucf" contextTags="FPGA_ONLY" hidden="if_missing" type="Secondary_Report" file="leon3mp.lpc" label="Locked Pin Constraints" >
208 <view inputState="Routed" program="pin2ucf" contextTags="FPGA_ONLY" hidden="if_missing" type="Secondary_Report" file="leon3mp.lpc" label="Locked Pin Constraints" >
209 <toc-item title="Top of Report" target="top.lpc" searchDir="Forward" />
209 <toc-item title="Top of Report" target="top.lpc" searchDir="Forward" />
210 <toc-item title="Newly Added Constraints" target="The following constraints were newly added" />
210 <toc-item title="Newly Added Constraints" target="The following constraints were newly added" />
211 </view>
211 </view>
212 <view inputState="Translated" program="netgen" contextTags="CPLD_ONLY,EDK_OFF" hidden="if_missing" type="Secondary_Report" file="netgen/fit/leon3mp_timesim.nlf" label="Post-Fit Simulation Model Report" />
212 <view inputState="Translated" program="netgen" contextTags="CPLD_ONLY,EDK_OFF" hidden="if_missing" type="Secondary_Report" file="netgen/fit/leon3mp_timesim.nlf" label="Post-Fit Simulation Model Report" />
213 <view inputState="Routed" program="bitgen" contextTags="FPGA_ONLY" hidden="if_missing" type="HTML" file="usage_statistics_webtalk.html" label="WebTalk Report" />
213 <view inputState="Routed" program="bitgen" contextTags="FPGA_ONLY" hidden="if_missing" type="HTML" file="usage_statistics_webtalk.html" label="WebTalk Report" />
214 <view inputState="Routed" program="bitgen" contextTags="FPGA_ONLY" hidden="if_missing" type="Secondary_Report" file="webtalk.log" label="WebTalk Log File" />
214 <view inputState="Routed" program="bitgen" contextTags="FPGA_ONLY" hidden="if_missing" type="Secondary_Report" file="webtalk.log" label="WebTalk Log File" />
215 </viewgroup>
215 </viewgroup>
216 </body>
216 </body>
217 </report-views>
217 </report-views>
1 NO CONTENT: modified file chmod 100644 => 100755
NO CONTENT: modified file chmod 100644 => 100755
@@ -1,255 +1,256
1
1
2 # ==== Clock inputs (CLK) ====
2 # ==== Clock inputs (CLK) ====
3 NET "clk_50mhz" LOC = "C9" | IOSTANDARD = LVCMOS33 ;
3 NET "clk_50mhz" LOC = "C9" | IOSTANDARD = LVCMOS33 ;
4 #NET "clk_67mhz" LOC = "B8" | IOSTANDARD = LVCMOS33 ;
4 #NET "clk_67mhz" LOC = "B8" | IOSTANDARD = LVCMOS33 ;
5 NET "clk_50mhz" PERIOD = 20ns HIGH 40%;
5 NET "clk_50mhz" PERIOD = 20ns HIGH 40%;
6
6
7 NET erx_clk PERIOD = 40.000 ;
7 NET erx_clk PERIOD = 40.000 ;
8 OFFSET = IN : 10.000 : BEFORE erx_clk ;
8 OFFSET = IN : 10.000 : BEFORE erx_clk ;
9 NET etx_clk PERIOD = 40.000 ;
9 NET etx_clk PERIOD = 40.000 ;
10 OFFSET = OUT : 20.000 : AFTER etx_clk ;
10 OFFSET = OUT : 20.000 : AFTER etx_clk ;
11 OFFSET = IN : 8.000 : BEFORE etx_clk ;
11 OFFSET = IN : 8.000 : BEFORE etx_clk ;
12
12
13 NET "clkm" TNM_NET = "clkm";
13 NET "clkm" TNM_NET = "clkm";
14 NET "clkml" TNM_NET = "clkml";
14 NET "clkml" TNM_NET = "clkml";
15 TIMESPEC "TS_clkm_clkml" = FROM "clkm" TO "clkml" TIG;
15 TIMESPEC "TS_clkm_clkml" = FROM "clkm" TO "clkml" TIG;
16 TIMESPEC "TS_clkml_clkm" = FROM "clkml" TO "clkm" TIG;
16 TIMESPEC "TS_clkml_clkm" = FROM "clkml" TO "clkm" TIG;
17 NET "lock" TIG;
17 NET "lock" TIG;
18
18
19 NET "ddr_clk_fb" TNM_NET = "ddr_clk_fb";
19 NET "ddr_clk_fb" TNM_NET = "ddr_clk_fb";
20 TIMESPEC "TS_ddr_clk_fb" = PERIOD "ddr_clk_fb" 10.00 ns HIGH 50 %;
20 TIMESPEC "TS_ddr_clk_fb" = PERIOD "ddr_clk_fb" 10.00 ns HIGH 50 %;
21 NET "ddr_clk_fb" MAXDELAY = 1660 ps;
21 NET "ddr_clk_fb" MAXDELAY = 1660 ps;
22 NET "*dqinl*" MAXDELAY = 1900 ps;
22 NET "*dqinl*" MAXDELAY = 1900 ps;
23 NET "ddrsp0.ddrc/ddr16.ddrc/rwdata*" MAXDELAY = 2100 ps;
23 NET "ddrsp0.ddrc/ddr16.ddrc/rwdata*" MAXDELAY = 2100 ps;
24
24
25 INST "ddrsp0.ddrc/ddr_phy0/ddr_phy0/xc3se.ddr_phy0/nops.read_dll" LOC = DCM_X1Y3;
25 INST "ddrsp0.ddrc/ddr_phy0/ddr_phy0/xc3se.ddr_phy0/nops.read_dll" LOC = DCM_X1Y3;
26 INST "ddrsp0.ddrc/ddr_phy0/ddr_phy0/xc3se.ddr_phy0/ps.read_dll" LOC = DCM_X1Y3;
26 INST "ddrsp0.ddrc/ddr_phy0/ddr_phy0/xc3se.ddr_phy0/ps.read_dll" LOC = DCM_X1Y3;
27 INST "ddrsp0.ddrc/ddr_phy0/ddr_phy0/xc3se.ddr_phy0/dll" LOC = DCM_X0Y2;
27 INST "ddrsp0.ddrc/ddr_phy0/ddr_phy0/xc3se.ddr_phy0/dll" LOC = DCM_X0Y2;
28
28
29 # Enable this for ISE-10
29 # Enable this for ISE-10
30 PIN "ddrsp0.ddrc/ddr_phy0/ddr_phy0/xc3se.ddr_phy0/dll.CLK270" CLOCK_DEDICATED_ROUTE = FALSE;
30 PIN "ddrsp0.ddrc/ddr_phy0/ddr_phy0/xc3se.ddr_phy0/dll.CLK270" CLOCK_DEDICATED_ROUTE = FALSE;
31 NET etx_clk CLOCK_DEDICATED_ROUTE = FALSE;
31 NET etx_clk CLOCK_DEDICATED_ROUTE = FALSE;
32 NET erx_clk CLOCK_DEDICATED_ROUTE = FALSE;
32 NET erx_clk CLOCK_DEDICATED_ROUTE = FALSE;
33 PIN "clkgen0/xc3s.v/dll0.CLK2X" CLOCK_DEDICATED_ROUTE = FALSE;
33 PIN "clkgen0/xc3s.v/dll0.CLK2X" CLOCK_DEDICATED_ROUTE = FALSE;
34 PIN "clkgen0/xc3s.v/dll0.CLKIN" CLOCK_DEDICATED_ROUTE = FALSE;
34 PIN "clkgen0/xc3s.v/dll0.CLKIN" CLOCK_DEDICATED_ROUTE = FALSE;
35 NET "clk_50mhz" CLOCK_DEDICATED_ROUTE = FALSE;
35 NET "clk_50mhz" CLOCK_DEDICATED_ROUTE = FALSE;
36
36
37 #NET "ddrsp0.ddrc/ddr_phy0/ddr_phy0/xc3se.ddr_phy0/vlockl_1" TIG;
37 #NET "ddrsp0.ddrc/ddr_phy0/ddr_phy0/xc3se.ddr_phy0/vlockl_1" TIG;
38
38
39 NET "ddrsp0.ddrc/ddr_phy0/ddr_phy0/xc3se.ddr_phy0/rclk90b" TNM_NET = "rclk90b";
39 NET "ddrsp0.ddrc/ddr_phy0/ddr_phy0/xc3se.ddr_phy0/rclk90b" TNM_NET = "rclk90b";
40 TIMEGRP "rclk270b_rise" = FALLING "rclk90b";
40 TIMEGRP "rclk270b_rise" = FALLING "rclk90b";
41 TIMEGRP "clkml_rise" = RISING "clkml";
41 TIMEGRP "clkml_rise" = RISING "clkml";
42 TIMESPEC "TS_rclk270b_clkml_rise" = FROM "rclk270b_rise" TO "clkml_rise" 4.500;
42 TIMESPEC "TS_rclk270b_clkml_rise" = FROM "rclk270b_rise" TO "clkml_rise" 4.500;
43
43
44 # ==== Pushbuttons (BTN) ====
44 # ==== Pushbuttons (BTN) ====
45 #NET "BTN_EAST" LOC = "H13" | IOSTANDARD = LVTTL | PULLDOWN ;
45 #NET "BTN_EAST" LOC = "H13" | IOSTANDARD = LVTTL | PULLDOWN ;
46 NET "dsubre" LOC = "H13" | IOSTANDARD = LVTTL | PULLDOWN ;
46 NET "dsubre" LOC = "H13" | IOSTANDARD = LVTTL | PULLDOWN ;
47 NET "BTN_NORTH" LOC = "V4" | IOSTANDARD = LVTTL | PULLDOWN ;
47 NET "BTN_NORTH" LOC = "V4" | IOSTANDARD = LVTTL | PULLDOWN ;
48 #NET "BTN_SOUTH" LOC = "K17" | IOSTANDARD = LVTTL | PULLDOWN ;
48 #NET "BTN_SOUTH" LOC = "K17" | IOSTANDARD = LVTTL | PULLDOWN ;
49 NET "reset" LOC = "K17" | IOSTANDARD = LVTTL | PULLDOWN ;
49 NET "reset" LOC = "K17" | IOSTANDARD = LVTTL | PULLDOWN ;
50 NET "BTN_WEST" LOC = "D18" | IOSTANDARD = LVTTL | PULLDOWN ;
50 NET "BTN_WEST" LOC = "D18" | IOSTANDARD = LVTTL | PULLDOWN ;
51 #NET "btn0" LOC = "H13" | IOSTANDARD = LVTTL | PULLDOWN ;
51 #NET "btn0" LOC = "H13" | IOSTANDARD = LVTTL | PULLDOWN ;
52 #NET "btn1" LOC = "V4" | IOSTANDARD = LVTTL | PULLDOWN ;
52 #NET "btn1" LOC = "V4" | IOSTANDARD = LVTTL | PULLDOWN ;
53 #NET "btn2" LOC = "K17" | IOSTANDARD = LVTTL | PULLDOWN ;
53 #NET "btn2" LOC = "K17" | IOSTANDARD = LVTTL | PULLDOWN ;
54
54
55
55
56 # ==== Discrete LEDs (LED) ====
56 # ==== Discrete LEDs (LED) ====
57 # These are shared connections with the FX2 connector
57 # These are shared connections with the FX2 connector
58 NET "led(0)" LOC = "R14" | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 8 ;
58 NET "led(0)" LOC = "R14" | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 8 ;
59 NET "led(1)" LOC = "C3" | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 8 ;
59 NET "led(1)" LOC = "C3" | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 8 ;
60 NET "led(2)" LOC = "E6" | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 8 ;
60 NET "led(2)" LOC = "E6" | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 8 ;
61 NET "led(3)" LOC = "D6" | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 8 ;
61 NET "led(3)" LOC = "D6" | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 8 ;
62 NET "led(4)" LOC = "D13" | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 8 ;
62 NET "led(4)" LOC = "D13" | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 8 ;
63 NET "led(5)" LOC = "A7" | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 8 ;
63 NET "led(5)" LOC = "A7" | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 8 ;
64 #NET "led(6)" LOC = "G9" | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 8 ;
64 #NET "led(6)" LOC = "G9" | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 8 ;
65 #NET "dsuact" LOC = "G9" | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 8 ;
65 #NET "dsuact" LOC = "G9" | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 8 ;
66 #NET "led(7)" LOC = "A8" | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 8 ;
66 #NET "led(7)" LOC = "A8" | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 8 ;
67 NET "errorn" LOC = "A8" | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 8 ;
67 NET "errorn" LOC = "A8" | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 8 ;
68
68
69 # ==== Rotary Encoder ====
69 # ==== Rotary Encoder ====
70 #NET "rotary(0)" LOC = "K18" | IOSTANDARD = LVTTL | PULLUP ;
70 #NET "rotary(0)" LOC = "K18" | IOSTANDARD = LVTTL | PULLUP ;
71 #NET "rotary(1)" LOC = "G18" | IOSTANDARD = LVTTL | PULLUP ;
71 #NET "rotary(1)" LOC = "G18" | IOSTANDARD = LVTTL | PULLUP ;
72 #NET "rotary(2)" LOC = "V16" | IOSTANDARD = LVTTL | PULLDOWN ;
72 #NET "rotary(2)" LOC = "V16" | IOSTANDARD = LVTTL | PULLDOWN ;
73
73
74 # ==== Slide Switches (SW) ====
74 # ==== Slide Switches (SW) ====
75 #NET "sw(0)" LOC = "L13" | IOSTANDARD = LVTTL | PULLUP ;
75 #NET "sw(0)" LOC = "L13" | IOSTANDARD = LVTTL | PULLUP ;
76 #NET "sw(1)" LOC = "L14" | IOSTANDARD = LVTTL | PULLUP ;
76 #NET "sw(1)" LOC = "L14" | IOSTANDARD = LVTTL | PULLUP ;
77 #NET "sw(2)" LOC = "H18" | IOSTANDARD = LVTTL | PULLUP ;
77 #NET "sw(2)" LOC = "H18" | IOSTANDARD = LVTTL | PULLUP ;
78 #NET "sw(3)" LOC = "N17" | IOSTANDARD = LVTTL | PULLUP ;
78 #NET "sw(3)" LOC = "N17" | IOSTANDARD = LVTTL | PULLUP ;
79
79
80 # ==== RS-232 Serial Ports (RS232) ====
80 # ==== RS-232 Serial Ports (RS232) ====
81 NET "urxd1" LOC = "U8" | IOSTANDARD = LVTTL ;
81 NET "urxd1" LOC = "U8" | IOSTANDARD = LVTTL ;
82 NET "dsurx" LOC = "R7" | IOSTANDARD = LVTTL ;
82 NET "dsurx" LOC = "R7" | IOSTANDARD = LVTTL ;
83 NET "utxd1" LOC = "M13" | IOSTANDARD = LVTTL | DRIVE = 8 | SLEW = SLOW ;
83 NET "utxd1" LOC = "M13" | IOSTANDARD = LVTTL | DRIVE = 8 | SLEW = SLOW ;
84 NET "dsutx" LOC = "M14" | IOSTANDARD = LVTTL | DRIVE = 8 | SLEW = SLOW ;
84 NET "dsutx" LOC = "M14" | IOSTANDARD = LVTTL | DRIVE = 8 | SLEW = SLOW ;
85
85
86
86
87 # ==== DDR SDRAM (SD) ==== (I/O Bank 3, VCCO=2.5V)
87 # ==== DDR SDRAM (SD) ==== (I/O Bank 3, VCCO=2.5V)
88 NET "ddr_ad(0)" LOC = "T1" | IOSTANDARD = SSTL2_I ;
88 NET "ddr_ad(0)" LOC = "T1" | IOSTANDARD = SSTL2_I ;
89 NET "ddr_ad(1)" LOC = "R3" | IOSTANDARD = SSTL2_I ;
89 NET "ddr_ad(1)" LOC = "R3" | IOSTANDARD = SSTL2_I ;
90 NET "ddr_ad(2)" LOC = "R2" | IOSTANDARD = SSTL2_I ;
90 NET "ddr_ad(2)" LOC = "R2" | IOSTANDARD = SSTL2_I ;
91 NET "ddr_ad(3)" LOC = "P1" | IOSTANDARD = SSTL2_I ;
91 NET "ddr_ad(3)" LOC = "P1" | IOSTANDARD = SSTL2_I ;
92 NET "ddr_ad(4)" LOC = "E4" | IOSTANDARD = SSTL2_I ;
92 NET "ddr_ad(4)" LOC = "E4" | IOSTANDARD = SSTL2_I ;
93 NET "ddr_ad(5)" LOC = "H4" | IOSTANDARD = SSTL2_I ;
93 NET "ddr_ad(5)" LOC = "H4" | IOSTANDARD = SSTL2_I ;
94 NET "ddr_ad(6)" LOC = "H3" | IOSTANDARD = SSTL2_I ;
94 NET "ddr_ad(6)" LOC = "H3" | IOSTANDARD = SSTL2_I ;
95 NET "ddr_ad(7)" LOC = "H1" | IOSTANDARD = SSTL2_I ;
95 NET "ddr_ad(7)" LOC = "H1" | IOSTANDARD = SSTL2_I ;
96 NET "ddr_ad(8)" LOC = "H2" | IOSTANDARD = SSTL2_I ;
96 NET "ddr_ad(8)" LOC = "H2" | IOSTANDARD = SSTL2_I ;
97 NET "ddr_ad(9)" LOC = "N4" | IOSTANDARD = SSTL2_I ;
97 NET "ddr_ad(9)" LOC = "N4" | IOSTANDARD = SSTL2_I ;
98 NET "ddr_ad(10)" LOC = "T2" | IOSTANDARD = SSTL2_I ;
98 NET "ddr_ad(10)" LOC = "T2" | IOSTANDARD = SSTL2_I ;
99 NET "ddr_ad(11)" LOC = "N5" | IOSTANDARD = SSTL2_I ;
99 NET "ddr_ad(11)" LOC = "N5" | IOSTANDARD = SSTL2_I ;
100 NET "ddr_ad(12)" LOC = "P2" | IOSTANDARD = SSTL2_I ;
100 NET "ddr_ad(12)" LOC = "P2" | IOSTANDARD = SSTL2_I ;
101 NET "ddr_ba(0)" LOC = "K5" | IOSTANDARD = SSTL2_I ;
101 NET "ddr_ba(0)" LOC = "K5" | IOSTANDARD = SSTL2_I ;
102 NET "ddr_ba(1)" LOC = "K6" | IOSTANDARD = SSTL2_I ;
102 NET "ddr_ba(1)" LOC = "K6" | IOSTANDARD = SSTL2_I ;
103 NET "ddr_casb" LOC = "C2" | IOSTANDARD = SSTL2_I ;
103 NET "ddr_casb" LOC = "C2" | IOSTANDARD = SSTL2_I ;
104 NET "ddr_clk0b" LOC = "J4" | IOSTANDARD = SSTL2_I ;
104 NET "ddr_clk0b" LOC = "J4" | IOSTANDARD = SSTL2_I ;
105 NET "ddr_clk0" LOC = "J5" | IOSTANDARD = SSTL2_I ;
105 NET "ddr_clk0" LOC = "J5" | IOSTANDARD = SSTL2_I ;
106 NET "ddr_cke0" LOC = "K3" | IOSTANDARD = SSTL2_I ;
106 NET "ddr_cke0" LOC = "K3" | IOSTANDARD = SSTL2_I ;
107 NET "ddr_cs0b" LOC = "K4" | IOSTANDARD = SSTL2_I ;
107 NET "ddr_cs0b" LOC = "K4" | IOSTANDARD = SSTL2_I ;
108 NET "ddr_dq(0)" LOC = "L2" | IOSTANDARD = SSTL2_I ;
108 NET "ddr_dq(0)" LOC = "L2" | IOSTANDARD = SSTL2_I ;
109 NET "ddr_dq(1)" LOC = "L1" | IOSTANDARD = SSTL2_I ;
109 NET "ddr_dq(1)" LOC = "L1" | IOSTANDARD = SSTL2_I ;
110 NET "ddr_dq(2)" LOC = "L3" | IOSTANDARD = SSTL2_I ;
110 NET "ddr_dq(2)" LOC = "L3" | IOSTANDARD = SSTL2_I ;
111 NET "ddr_dq(3)" LOC = "L4" | IOSTANDARD = SSTL2_I ;
111 NET "ddr_dq(3)" LOC = "L4" | IOSTANDARD = SSTL2_I ;
112 NET "ddr_dq(4)" LOC = "M3" | IOSTANDARD = SSTL2_I ;
112 NET "ddr_dq(4)" LOC = "M3" | IOSTANDARD = SSTL2_I ;
113 NET "ddr_dq(5)" LOC = "M4" | IOSTANDARD = SSTL2_I ;
113 NET "ddr_dq(5)" LOC = "M4" | IOSTANDARD = SSTL2_I ;
114 NET "ddr_dq(6)" LOC = "M5" | IOSTANDARD = SSTL2_I ;
114 NET "ddr_dq(6)" LOC = "M5" | IOSTANDARD = SSTL2_I ;
115 NET "ddr_dq(7)" LOC = "M6" | IOSTANDARD = SSTL2_I ;
115 NET "ddr_dq(7)" LOC = "M6" | IOSTANDARD = SSTL2_I ;
116 NET "ddr_dq(8)" LOC = "E2" | IOSTANDARD = SSTL2_I ;
116 NET "ddr_dq(8)" LOC = "E2" | IOSTANDARD = SSTL2_I ;
117 NET "ddr_dq(9)" LOC = "E1" | IOSTANDARD = SSTL2_I ;
117 NET "ddr_dq(9)" LOC = "E1" | IOSTANDARD = SSTL2_I ;
118 NET "ddr_dq(10)" LOC = "F1" | IOSTANDARD = SSTL2_I ;
118 NET "ddr_dq(10)" LOC = "F1" | IOSTANDARD = SSTL2_I ;
119 NET "ddr_dq(11)" LOC = "F2" | IOSTANDARD = SSTL2_I ;
119 NET "ddr_dq(11)" LOC = "F2" | IOSTANDARD = SSTL2_I ;
120 NET "ddr_dq(12)" LOC = "G6" | IOSTANDARD = SSTL2_I ;
120 NET "ddr_dq(12)" LOC = "G6" | IOSTANDARD = SSTL2_I ;
121 NET "ddr_dq(13)" LOC = "G5" | IOSTANDARD = SSTL2_I ;
121 NET "ddr_dq(13)" LOC = "G5" | IOSTANDARD = SSTL2_I ;
122 NET "ddr_dq(14)" LOC = "H6" | IOSTANDARD = SSTL2_I ;
122 NET "ddr_dq(14)" LOC = "H6" | IOSTANDARD = SSTL2_I ;
123 NET "ddr_dq(15)" LOC = "H5" | IOSTANDARD = SSTL2_I ;
123 NET "ddr_dq(15)" LOC = "H5" | IOSTANDARD = SSTL2_I ;
124 NET "ddr_dm(0)" LOC = "J2" | IOSTANDARD = SSTL2_I ;
124 NET "ddr_dm(0)" LOC = "J2" | IOSTANDARD = SSTL2_I ;
125 NET "ddr_dqs(0)" LOC = "L6" | IOSTANDARD = SSTL2_I ;
125 NET "ddr_dqs(0)" LOC = "L6" | IOSTANDARD = SSTL2_I ;
126 NET "ddr_rasb" LOC = "C1" | IOSTANDARD = SSTL2_I ;
126 NET "ddr_rasb" LOC = "C1" | IOSTANDARD = SSTL2_I ;
127 NET "ddr_dm(1)" LOC = "J1" | IOSTANDARD = SSTL2_I ;
127 NET "ddr_dm(1)" LOC = "J1" | IOSTANDARD = SSTL2_I ;
128 NET "ddr_dqs(1)" LOC = "G3" | IOSTANDARD = SSTL2_I ;
128 NET "ddr_dqs(1)" LOC = "G3" | IOSTANDARD = SSTL2_I ;
129 NET "ddr_web" LOC = "D1" | IOSTANDARD = SSTL2_I ;
129 NET "ddr_web" LOC = "D1" | IOSTANDARD = SSTL2_I ;
130
130
131 Net ddr_clk_fb LOC=B9 | IOSTANDARD = LVCMOS33;
131 Net ddr_clk_fb LOC=B9 | IOSTANDARD = LVCMOS33;
132
132
133 Net etx_clk LOC=T7;
133 Net etx_clk LOC=T7;
134 Net etx_clk IOSTANDARD = LVCMOS33;
134 Net etx_clk IOSTANDARD = LVCMOS33;
135 Net erx_clk LOC=V3 ;
135 Net erx_clk LOC=V3 ;
136 Net erx_clk IOSTANDARD = LVCMOS33;
136 Net erx_clk IOSTANDARD = LVCMOS33;
137 Net erx_crs LOC=U13;
137 Net erx_crs LOC=U13;
138 Net erx_crs IOSTANDARD = LVCMOS33;
138 Net erx_crs IOSTANDARD = LVCMOS33;
139 Net erx_dv LOC=V2;
139 Net erx_dv LOC=V2;
140 Net erx_dv IOSTANDARD = LVCMOS33;
140 Net erx_dv IOSTANDARD = LVCMOS33;
141 Net erxd(0) LOC=V8;
141 Net erxd(0) LOC=V8;
142 Net erxd(0) IOSTANDARD = LVCMOS33;
142 Net erxd(0) IOSTANDARD = LVCMOS33;
143 Net erxd(1) LOC=T11;
143 Net erxd(1) LOC=T11;
144 Net erxd(1) IOSTANDARD = LVCMOS33;
144 Net erxd(1) IOSTANDARD = LVCMOS33;
145 Net erxd(2) LOC=U11;
145 Net erxd(2) LOC=U11;
146 Net erxd(2) IOSTANDARD = LVCMOS33;
146 Net erxd(2) IOSTANDARD = LVCMOS33;
147 Net erxd(3) LOC=V14;
147 Net erxd(3) LOC=V14;
148 Net erxd(3) IOSTANDARD = LVCMOS33;
148 Net erxd(3) IOSTANDARD = LVCMOS33;
149 Net erx_col LOC=U6;
149 Net erx_col LOC=U6;
150 Net erx_col IOSTANDARD = LVCMOS33;
150 Net erx_col IOSTANDARD = LVCMOS33;
151 Net erx_er LOC=U14;
151 Net erx_er LOC=U14;
152 Net erx_er IOSTANDARD = LVCMOS33;
152 Net erx_er IOSTANDARD = LVCMOS33;
153 Net etx_en LOC=P16;
153 Net etx_en LOC=P16;
154 Net etx_en IOSTANDARD = LVCMOS33;
154 Net etx_en IOSTANDARD = LVCMOS33;
155 Net etxd(0) LOC=R11;
155 Net etxd(0) LOC=R11;
156 Net etxd(0) IOSTANDARD = LVCMOS33;
156 Net etxd(0) IOSTANDARD = LVCMOS33;
157 Net etxd(1) LOC=T15;
157 Net etxd(1) LOC=T15;
158 Net etxd(1) IOSTANDARD = LVCMOS33;
158 Net etxd(1) IOSTANDARD = LVCMOS33;
159 Net etxd(2) LOC=R5;
159 Net etxd(2) LOC=R5;
160 Net etxd(2) IOSTANDARD = LVCMOS33;
160 Net etxd(2) IOSTANDARD = LVCMOS33;
161 Net etxd(3) LOC=T5;
161 Net etxd(3) LOC=T5;
162 Net etxd(3) IOSTANDARD = LVCMOS33;
162 Net etxd(3) IOSTANDARD = LVCMOS33;
163 Net etx_er LOC=R6 | IOSTANDARD = LVCMOS33;
163 Net etx_er LOC=R6 | IOSTANDARD = LVCMOS33;
164 Net emdc LOC=P9;
164 Net emdc LOC=P9;
165 Net emdc IOSTANDARD = LVCMOS33;
165 Net emdc IOSTANDARD = LVCMOS33;
166 Net emdio LOC=U5;
166 Net emdio LOC=U5;
167 Net emdio IOSTANDARD = LVCMOS33;
167 Net emdio IOSTANDARD = LVCMOS33;
168
168
169 Net address(23) LOC=N11 | IOSTANDARD = LVCMOS33;
169 Net address(23) LOC=N11 | IOSTANDARD = LVCMOS33;
170 Net address(22) LOC=V12 | IOSTANDARD = LVCMOS33;
170 Net address(22) LOC=V12 | IOSTANDARD = LVCMOS33;
171 Net address(21) LOC=V13 | IOSTANDARD = LVCMOS33;
171 Net address(21) LOC=V13 | IOSTANDARD = LVCMOS33;
172 Net address(20) LOC=T12 | IOSTANDARD = LVCMOS33;
172 Net address(20) LOC=T12 | IOSTANDARD = LVCMOS33;
173 Net address(19) LOC=V15 | IOSTANDARD = LVCMOS33;
173 Net address(19) LOC=V15 | IOSTANDARD = LVCMOS33;
174 Net address(18) LOC=U15 | IOSTANDARD = LVCMOS33;
174 Net address(18) LOC=U15 | IOSTANDARD = LVCMOS33;
175 Net address(17) LOC=T16 | IOSTANDARD = LVCMOS33;
175 Net address(17) LOC=T16 | IOSTANDARD = LVCMOS33;
176 Net address(16) LOC=U18 | IOSTANDARD = LVCMOS33;
176 Net address(16) LOC=U18 | IOSTANDARD = LVCMOS33;
177 Net address(15) LOC=T17 | IOSTANDARD = LVCMOS33;
177 Net address(15) LOC=T17 | IOSTANDARD = LVCMOS33;
178 Net address(14) LOC=R18 | IOSTANDARD = LVCMOS33;
178 Net address(14) LOC=R18 | IOSTANDARD = LVCMOS33;
179 Net address(13) LOC=T18 | IOSTANDARD = LVCMOS33;
179 Net address(13) LOC=T18 | IOSTANDARD = LVCMOS33;
180 Net address(12) LOC=L16 | IOSTANDARD = LVCMOS33;
180 Net address(12) LOC=L16 | IOSTANDARD = LVCMOS33;
181 Net address(11) LOC=L15 | IOSTANDARD = LVCMOS33;
181 Net address(11) LOC=L15 | IOSTANDARD = LVCMOS33;
182 Net address(10) LOC=K13 | IOSTANDARD = LVCMOS33;
182 Net address(10) LOC=K13 | IOSTANDARD = LVCMOS33;
183 Net address(9) LOC=K12 | IOSTANDARD = LVCMOS33;
183 Net address(9) LOC=K12 | IOSTANDARD = LVCMOS33;
184 Net address(8) LOC=K15 | IOSTANDARD = LVCMOS33;
184 Net address(8) LOC=K15 | IOSTANDARD = LVCMOS33;
185 Net address(7) LOC=K14 | IOSTANDARD = LVCMOS33;
185 Net address(7) LOC=K14 | IOSTANDARD = LVCMOS33;
186 Net address(6) LOC=J17 | IOSTANDARD = LVCMOS33;
186 Net address(6) LOC=J17 | IOSTANDARD = LVCMOS33;
187 Net address(5) LOC=J16 | IOSTANDARD = LVCMOS33;
187 Net address(5) LOC=J16 | IOSTANDARD = LVCMOS33;
188 Net address(4) LOC=J15 | IOSTANDARD = LVCMOS33;
188 Net address(4) LOC=J15 | IOSTANDARD = LVCMOS33;
189 Net address(3) LOC=J14 | IOSTANDARD = LVCMOS33;
189 Net address(3) LOC=J14 | IOSTANDARD = LVCMOS33;
190 Net address(2) LOC=J12 | IOSTANDARD = LVCMOS33;
190 Net address(2) LOC=J12 | IOSTANDARD = LVCMOS33;
191 Net address(1) LOC=J13 | IOSTANDARD = LVCMOS33;
191 Net address(1) LOC=J13 | IOSTANDARD = LVCMOS33;
192 Net address(0) LOC=H17 | IOSTANDARD = LVCMOS33;
192 Net address(0) LOC=H17 | IOSTANDARD = LVCMOS33;
193
193
194 Net data(15) LOC=T8 | IOSTANDARD = LVCMOS33;
194 Net data(15) LOC=T8 | IOSTANDARD = LVCMOS33;
195 Net data(14) LOC=R8 | IOSTANDARD = LVCMOS33;
195 Net data(14) LOC=R8 | IOSTANDARD = LVCMOS33;
196 Net data(13) LOC=P6 | IOSTANDARD = LVCMOS33;
196 Net data(13) LOC=P6 | IOSTANDARD = LVCMOS33;
197 Net data(12) LOC=M16 | IOSTANDARD = LVCMOS33;
197 Net data(12) LOC=M16 | IOSTANDARD = LVCMOS33;
198 Net data(11) LOC=M15 | IOSTANDARD = LVCMOS33;
198 Net data(11) LOC=M15 | IOSTANDARD = LVCMOS33;
199 Net data(10) LOC=P17 | IOSTANDARD = LVCMOS33;
199 Net data(10) LOC=P17 | IOSTANDARD = LVCMOS33;
200 Net data(9) LOC=R16 | IOSTANDARD = LVCMOS33;
200 Net data(9) LOC=R16 | IOSTANDARD = LVCMOS33;
201 Net data(8) LOC=R15 | IOSTANDARD = LVCMOS33;
201 Net data(8) LOC=R15 | IOSTANDARD = LVCMOS33;
202 Net data(7) LOC=N9 | IOSTANDARD = LVCMOS33;
202 Net data(7) LOC=N9 | IOSTANDARD = LVCMOS33;
203 Net data(6) LOC=M9 | IOSTANDARD = LVCMOS33;
203 Net data(6) LOC=M9 | IOSTANDARD = LVCMOS33;
204 Net data(5) LOC=R9 | IOSTANDARD = LVCMOS33;
204 Net data(5) LOC=R9 | IOSTANDARD = LVCMOS33;
205 Net data(4) LOC=U9 | IOSTANDARD = LVCMOS33;
205 Net data(4) LOC=U9 | IOSTANDARD = LVCMOS33;
206 Net data(3) LOC=V9 | IOSTANDARD = LVCMOS33;
206 Net data(3) LOC=V9 | IOSTANDARD = LVCMOS33;
207 Net data(2) LOC=R10 | IOSTANDARD = LVCMOS33;
207 Net data(2) LOC=R10 | IOSTANDARD = LVCMOS33;
208 Net data(1) LOC=P10 | IOSTANDARD = LVCMOS33;
208 Net data(1) LOC=P10 | IOSTANDARD = LVCMOS33;
209 Net data(0) LOC=N10 | IOSTANDARD = LVCMOS33;
209 Net data(0) LOC=N10 | IOSTANDARD = LVCMOS33;
210 Net oen LOC=C18 | IOSTANDARD = LVCMOS33;
210 Net oen LOC=C18 | IOSTANDARD = LVCMOS33;
211 Net writen LOC=D17 | IOSTANDARD = LVCMOS33;
211 Net writen LOC=D17 | IOSTANDARD = LVCMOS33;
212 Net romsn LOC=D16 | IOSTANDARD = LVCMOS33;
212 Net romsn LOC=D16 | IOSTANDARD = LVCMOS33;
213 Net byten LOC=C17 | IOSTANDARD = LVCMOS33;
213 Net byten LOC=C17 | IOSTANDARD = LVCMOS33;
214 Net sts LOC=B18 ;
214 Net sts LOC=B18 ;
215
215
216 NET ps2data LOC = G13 | IOSTANDARD = LVCMOS33;
216 NET ps2data LOC = G13 | IOSTANDARD = LVCMOS33;
217 NET ps2clk LOC = G14 | IOSTANDARD = LVCMOS33;
217 NET ps2clk LOC = G14 | IOSTANDARD = LVCMOS33;
218
218
219 NET vid_r LOC = H14 | IOSTANDARD = LVCMOS33;
219 NET vid_r LOC = H14 | IOSTANDARD = LVCMOS33;
220 NET vid_g LOC = H15 | IOSTANDARD = LVCMOS33;
220 NET vid_g LOC = H15 | IOSTANDARD = LVCMOS33;
221 NET vid_b LOC = G15 | IOSTANDARD = LVCMOS33;
221 NET vid_b LOC = G15 | IOSTANDARD = LVCMOS33;
222 NET vid_hsync LOC = F15 | IOSTANDARD = LVCMOS33;
222 NET vid_hsync LOC = F15 | IOSTANDARD = LVCMOS33;
223 NET vid_vsync LOC = F14 | IOSTANDARD = LVCMOS33;
223 NET vid_vsync LOC = F14 | IOSTANDARD = LVCMOS33;
224
224
225 NET spi LOC=U3 | PULLUP; ## This is to force the SPI ROM to not be selected(drive high)
225 NET spi LOC=U3 | PULLUP; ## This is to force the SPI ROM to not be selected(drive high)
226 Net spi IOSTANDARD = LVCMOS33;
226 Net spi IOSTANDARD = LVCMOS33;
227
227
228
228
229 # Prohibit VREF pins
229 # Prohibit VREF pins
230 CONFIG PROHIBIT = D2;
230 CONFIG PROHIBIT = D2;
231 CONFIG PROHIBIT = G4;
231 CONFIG PROHIBIT = G4;
232 CONFIG PROHIBIT = J6;
232 CONFIG PROHIBIT = J6;
233 CONFIG PROHIBIT = L5;
233 CONFIG PROHIBIT = L5;
234 CONFIG PROHIBIT = R4;
234 CONFIG PROHIBIT = R4;
235
235
236 NET "LCD_RS" LOC = "L18" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 4 ;
236 NET "LCD_RS" LOC = "L18" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 4 ;
237 NET "LCD_RW" LOC = "L17" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 4 ;
237 NET "LCD_RW" LOC = "L17" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 4 ;
238 NET "LCD_E" LOC = "M18" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 4 ;
238 NET "LCD_E" LOC = "M18" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 4 ;
239 NET "LCD_RET" LOC = "E3" | IOSTANDARD = SSTL2_I ;
239 NET "LCD_RET" LOC = "E3" | IOSTANDARD = SSTL2_I ;
240 NET "LCD_CS1" LOC = "P3" | IOSTANDARD = SSTL2_I ;
240 NET "LCD_CS1" LOC = "P3" | IOSTANDARD = SSTL2_I ;
241 NET "LCD_CS2" LOC = "P4" | IOSTANDARD = SSTL2_I ;
241 NET "LCD_CS2" LOC = "P4" | IOSTANDARD = SSTL2_I ;
242 NET "ADC_SCK" LOC = "P13" | IOSTANDARD = LVTTL ;
242 NET "ADC_SCK" LOC = "P13" | IOSTANDARD = LVTTL ;
243 NET "ADC_CNV" LOC = "T14" | IOSTANDARD = LVTTL ;
243 NET "ADC_CNV" LOC = "T14" | IOSTANDARD = LVTTL ;
244 NET "ADC_SDI" LOC = "R13" | IOSTANDARD = LVTTL ;
244 NET "ADC_SDI" LOC = "R13" | IOSTANDARD = LVTTL ;
245 NET "lppTXD" LOC = "N14" | IOSTANDARD = LVTTL ;
246 NET "lppRXD" LOC = "V7" | IOSTANDARD = LVTTL ;
245
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@@ -1,609 +1,643
1 ------------------------------------------------------------------------------
1 ------------------------------------------------------------------------------
2 -- LEON3 Demonstration design
2 -- LEON3 Demonstration design
3 -- Copyright (C) 2006 Jiri Gaisler, Gaisler Research
3 -- Copyright (C) 2006 Jiri Gaisler, Gaisler Research
4 ------------------------------------------------------------------------------
4 ------------------------------------------------------------------------------
5 -- This file is a part of the GRLIB VHDL IP LIBRARY
5 -- This file is a part of the GRLIB VHDL IP LIBRARY
6 -- Copyright (C) 2003 - 2008, Gaisler Research
6 -- Copyright (C) 2003 - 2008, Gaisler Research
7 -- Copyright (C) 2008 - 2010, Aeroflex Gaisler
7 -- Copyright (C) 2008 - 2010, Aeroflex Gaisler
8 --
8 --
9 -- This program is free software; you can redistribute it and/or modify
9 -- This program is free software; you can redistribute it and/or modify
10 -- it under the terms of the GNU General Public License as published by
10 -- it under the terms of the GNU General Public License as published by
11 -- the Free Software Foundation; either version 2 of the License, or
11 -- the Free Software Foundation; either version 2 of the License, or
12 -- (at your option) any later version.
12 -- (at your option) any later version.
13 --
13 --
14 -- This program is distributed in the hope that it will be useful,
14 -- This program is distributed in the hope that it will be useful,
15 -- but WITHOUT ANY WARRANTY; without even the implied warranty of
15 -- but WITHOUT ANY WARRANTY; without even the implied warranty of
16 -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 -- GNU General Public License for more details.
17 -- GNU General Public License for more details.
18 --
18 --
19 -- You should have received a copy of the GNU General Public License
19 -- You should have received a copy of the GNU General Public License
20 -- along with this program; if not, write to the Free Software
20 -- along with this program; if not, write to the Free Software
21 -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21 -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
22 ------------------------------------------------------------------------------
22 ------------------------------------------------------------------------------
23
23
24 library ieee;
24 library ieee;
25 use ieee.std_logic_1164.all;
25 use ieee.std_logic_1164.all;
26 library grlib;
26 library grlib;
27 use grlib.amba.all;
27 use grlib.amba.all;
28 use grlib.stdlib.all;
28 use grlib.stdlib.all;
29 use grlib.devices.all;
29 use grlib.devices.all;
30 library techmap;
30 library techmap;
31 use techmap.gencomp.all;
31 use techmap.gencomp.all;
32 use techmap.allclkgen.all;
32 use techmap.allclkgen.all;
33 library gaisler;
33 library gaisler;
34 use gaisler.memctrl.all;
34 use gaisler.memctrl.all;
35 use gaisler.leon3.all;
35 use gaisler.leon3.all;
36 use gaisler.uart.all;
36 use gaisler.uart.all;
37 use gaisler.misc.all;
37 use gaisler.misc.all;
38 use gaisler.net.all;
38 use gaisler.net.all;
39 use gaisler.jtag.all;
39 use gaisler.jtag.all;
40 library esa;
40 library esa;
41 use esa.memoryctrl.all;
41 use esa.memoryctrl.all;
42 use work.config.all;
42 use work.config.all;
43 library lpp;
43 library lpp;
44 use lpp.amba_lcd_16x2_ctrlr.all;
44 use lpp.amba_lcd_16x2_ctrlr.all;
45 use lpp.LCD_16x2_CFG.all;
45 use lpp.LCD_16x2_CFG.all;
46 use lpp.lpp_ad_conv.all;
46 use lpp.lpp_ad_conv.all;
47
47 use lpp.iir_filter.all;
48 use lpp.general_purpose.all;
49 use lpp.lpp_uart.all;
48
50
49 entity leon3mp is
51 entity leon3mp is
50 generic (
52 generic (
51 fabtech : integer := CFG_FABTECH;
53 fabtech : integer := CFG_FABTECH;
52 memtech : integer := CFG_MEMTECH;
54 memtech : integer := CFG_MEMTECH;
53 padtech : integer := CFG_PADTECH;
55 padtech : integer := CFG_PADTECH;
54 clktech : integer := CFG_CLKTECH;
56 clktech : integer := CFG_CLKTECH;
55 disas : integer := CFG_DISAS; -- Enable disassembly to console
57 disas : integer := CFG_DISAS; -- Enable disassembly to console
56 dbguart : integer := CFG_DUART; -- Print UART on console
58 dbguart : integer := CFG_DUART; -- Print UART on console
57 pclow : integer := CFG_PCLOW;
59 pclow : integer := CFG_PCLOW;
58 ddrfreq : integer := 100000 -- frequency of ddr clock in kHz
60 ddrfreq : integer := 100000 -- frequency of ddr clock in kHz
59 );
61 );
60 port (
62 port (
61 reset : in std_ulogic;
63 reset : in std_ulogic;
62 -- resoutn : out std_logic;
64 -- resoutn : out std_logic;
63 clk_50mhz : in std_ulogic;
65 clk_50mhz : in std_ulogic;
64 errorn : out std_ulogic;
66 errorn : out std_ulogic;
65
67
66 -- prom interface
68 -- prom interface
67 address : out std_logic_vector(23 downto 0);
69 address : out std_logic_vector(23 downto 0);
68 data : inout std_logic_vector(15 downto 0);
70 data : inout std_logic_vector(15 downto 0);
69 romsn : out std_ulogic;
71 romsn : out std_ulogic;
70 oen : out std_ulogic;
72 oen : out std_ulogic;
71 writen : out std_ulogic;
73 writen : out std_ulogic;
72 byten : out std_ulogic;
74 byten : out std_ulogic;
73 -- pragma translate_off
75 -- pragma translate_off
74 iosn : out std_ulogic;
76 iosn : out std_ulogic;
75 testdata : inout std_logic_vector(15 downto 0);
77 testdata : inout std_logic_vector(15 downto 0);
76 -- pragma translate_on
78 -- pragma translate_on
77
79
78 -- ddr memory
80 -- ddr memory
79 ddr_clk0 : out std_logic;
81 ddr_clk0 : out std_logic;
80 ddr_clk0b : out std_logic;
82 ddr_clk0b : out std_logic;
81 -- ddr_clk_fb_out : out std_logic;
83 -- ddr_clk_fb_out : out std_logic;
82 ddr_clk_fb : in std_logic;
84 ddr_clk_fb : in std_logic;
83 ddr_cke0 : out std_logic;
85 ddr_cke0 : out std_logic;
84 ddr_cs0b : out std_logic;
86 ddr_cs0b : out std_logic;
85 ddr_web : out std_ulogic; -- ddr write enable
87 ddr_web : out std_ulogic; -- ddr write enable
86 ddr_rasb : out std_ulogic; -- ddr ras
88 ddr_rasb : out std_ulogic; -- ddr ras
87 ddr_casb : out std_ulogic; -- ddr cas
89 ddr_casb : out std_ulogic; -- ddr cas
88 ddr_dm : out std_logic_vector (1 downto 0); -- ddr dm
90 ddr_dm : out std_logic_vector (1 downto 0); -- ddr dm
89 ddr_dqs : inout std_logic_vector (1 downto 0); -- ddr dqs
91 ddr_dqs : inout std_logic_vector (1 downto 0); -- ddr dqs
90 ddr_ad : out std_logic_vector (12 downto 0); -- ddr address
92 ddr_ad : out std_logic_vector (12 downto 0); -- ddr address
91 ddr_ba : out std_logic_vector (1 downto 0); -- ddr bank address
93 ddr_ba : out std_logic_vector (1 downto 0); -- ddr bank address
92 ddr_dq : inout std_logic_vector (15 downto 0); -- ddr data
94 ddr_dq : inout std_logic_vector (15 downto 0); -- ddr data
93
95
94 -- debug support unit
96 -- debug support unit
95 dsuen : in std_ulogic;
97 dsuen : in std_ulogic;
96 dsubre : in std_ulogic;
98 dsubre : in std_ulogic;
97 -- dsuact : out std_ulogic;
99 -- dsuact : out std_ulogic;
98 dsurx : in std_ulogic;
100 dsurx : in std_ulogic;
99 dsutx : out std_ulogic;
101 dsutx : out std_ulogic;
100
102
101 -- UART for serial console I/O
103 -- UART for serial console I/O
102 urxd1 : in std_ulogic;
104 urxd1 : in std_ulogic;
103 utxd1 : out std_ulogic;
105 utxd1 : out std_ulogic;
104
106
105 -- ethernet signals
107 -- ethernet signals
106 emdio : inout std_logic; -- ethernet PHY interface
108 emdio : inout std_logic; -- ethernet PHY interface
107 etx_clk : in std_ulogic;
109 etx_clk : in std_ulogic;
108 erx_clk : in std_ulogic;
110 erx_clk : in std_ulogic;
109 erxd : in std_logic_vector(3 downto 0);
111 erxd : in std_logic_vector(3 downto 0);
110 erx_dv : in std_ulogic;
112 erx_dv : in std_ulogic;
111 erx_er : in std_ulogic;
113 erx_er : in std_ulogic;
112 erx_col : in std_ulogic;
114 erx_col : in std_ulogic;
113 erx_crs : in std_ulogic;
115 erx_crs : in std_ulogic;
114 etxd : out std_logic_vector(3 downto 0);
116 etxd : out std_logic_vector(3 downto 0);
115 etx_en : out std_ulogic;
117 etx_en : out std_ulogic;
116 etx_er : out std_ulogic;
118 etx_er : out std_ulogic;
117 emdc : out std_ulogic;
119 emdc : out std_ulogic;
118
120
119 spi : out std_ulogic;
121 spi : out std_ulogic;
120
122
121 led : out std_logic_vector(5 downto 0);
123 led : out std_logic_vector(5 downto 0);
122 ps2clk : inout std_logic;
124 ps2clk : inout std_logic;
123 ps2data : inout std_logic;
125 ps2data : inout std_logic;
124
126
125 vid_hsync : out std_ulogic;
127 vid_hsync : out std_ulogic;
126 vid_vsync : out std_ulogic;
128 vid_vsync : out std_ulogic;
127 vid_r : out std_logic;
129 vid_r : out std_logic;
128 vid_g : out std_logic;
130 vid_g : out std_logic;
129 vid_b : out std_logic;
131 vid_b : out std_logic;
130 LCD_RS : out STD_LOGIC;
132 LCD_RS : out STD_LOGIC;
131 LCD_RW : out STD_LOGIC;
133 LCD_RW : out STD_LOGIC;
132 LCD_E : out STD_LOGIC;
134 LCD_E : out STD_LOGIC;
133 LCD_RET : out STD_LOGIC;
135 LCD_RET : out STD_LOGIC;
134 LCD_CS1 : out STD_LOGIC;
136 LCD_CS1 : out STD_LOGIC;
135 LCD_CS2 : out STD_LOGIC;
137 LCD_CS2 : out STD_LOGIC;
136 SF_CE0 : out std_logic;
138 SF_CE0 : out std_logic;
137 BTN_NORTH : in std_ulogic;
139 BTN_NORTH : in std_ulogic;
138 BTN_WEST : in std_ulogic;
140 BTN_WEST : in std_ulogic;
139 ADC_SCK : out std_logic;
141 ADC_SCK : out std_logic;
140 ADC_CNV : out std_logic;
142 ADC_CNV : out std_logic;
141 ADC_SDI : in std_logic
143 ADC_SDI : in std_logic;
144 lppTXD : out std_logic;
145 lppRXD : in std_logic
142 );
146 );
143 end;
147 end;
144
148
145 architecture rtl of leon3mp is
149 architecture rtl of leon3mp is
146
150
147 constant blength : integer := 12;
151 constant blength : integer := 12;
148 constant fifodepth : integer := 8;
152 constant fifodepth : integer := 8;
149
153
150 signal vcc, gnd : std_logic_vector(4 downto 0);
154 signal vcc, gnd : std_logic_vector(4 downto 0);
151 signal memi : memory_in_type;
155 signal memi : memory_in_type;
152 signal memo : memory_out_type;
156 signal memo : memory_out_type;
153 signal wpo : wprot_out_type;
157 signal wpo : wprot_out_type;
154 signal sdi : sdctrl_in_type;
158 signal sdi : sdctrl_in_type;
155 signal sdo : sdctrl_out_type;
159 signal sdo : sdctrl_out_type;
156
160
157 signal gpioi : gpio_in_type;
161 signal gpioi : gpio_in_type;
158 signal gpioo : gpio_out_type;
162 signal gpioo : gpio_out_type;
159
163
160 signal apbi : apb_slv_in_type;
164 signal apbi : apb_slv_in_type;
161 signal apbo : apb_slv_out_vector := (others => apb_none);
165 signal apbo : apb_slv_out_vector := (others => apb_none);
162 signal ahbsi : ahb_slv_in_type;
166 signal ahbsi : ahb_slv_in_type;
163 signal ahbso : ahb_slv_out_vector := (others => ahbs_none);
167 signal ahbso : ahb_slv_out_vector := (others => ahbs_none);
164 signal ahbmi : ahb_mst_in_type;
168 signal ahbmi : ahb_mst_in_type;
165 signal ahbmo : ahb_mst_out_vector := (others => ahbm_none);
169 signal ahbmo : ahb_mst_out_vector := (others => ahbm_none);
166
170
167 signal lclk : std_ulogic;
171 signal lclk : std_ulogic;
168 signal ddrclk, ddrrst, ddrclkfb : std_ulogic;
172 signal ddrclk, ddrrst, ddrclkfb : std_ulogic;
169
173
170 signal clkm, rstn, clkml, clk2x : std_ulogic;
174 signal clkm, rstn, clkml, clk2x : std_ulogic;
171 signal cgi : clkgen_in_type;
175 signal cgi : clkgen_in_type;
172 signal cgo : clkgen_out_type;
176 signal cgo : clkgen_out_type;
173 signal u1i, dui : uart_in_type;
177 signal u1i, dui : uart_in_type;
174 signal u1o, duo : uart_out_type;
178 signal u1o, duo : uart_out_type;
175
179
176 signal irqi : irq_in_vector(0 to CFG_NCPU-1);
180 signal irqi : irq_in_vector(0 to CFG_NCPU-1);
177 signal irqo : irq_out_vector(0 to CFG_NCPU-1);
181 signal irqo : irq_out_vector(0 to CFG_NCPU-1);
178
182
179 signal dbgi : l3_debug_in_vector(0 to CFG_NCPU-1);
183 signal dbgi : l3_debug_in_vector(0 to CFG_NCPU-1);
180 signal dbgo : l3_debug_out_vector(0 to CFG_NCPU-1);
184 signal dbgo : l3_debug_out_vector(0 to CFG_NCPU-1);
181
185
182 signal dsui : dsu_in_type;
186 signal dsui : dsu_in_type;
183 signal dsuo : dsu_out_type;
187 signal dsuo : dsu_out_type;
184
188
185 signal ethi, ethi1, ethi2 : eth_in_type;
189 signal ethi, ethi1, ethi2 : eth_in_type;
186 signal etho, etho1, etho2 : eth_out_type;
190 signal etho, etho1, etho2 : eth_out_type;
187
191
188 signal gpti : gptimer_in_type;
192 signal gpti : gptimer_in_type;
189
193
190 signal tck, tms, tdi, tdo : std_ulogic;
194 signal tck, tms, tdi, tdo : std_ulogic;
191
195
192 signal kbdi : ps2_in_type;
196 signal kbdi : ps2_in_type;
193 signal kbdo : ps2_out_type;
197 signal kbdo : ps2_out_type;
194 signal vgao : apbvga_out_type;
198 signal vgao : apbvga_out_type;
195
199
196 signal ldsubre : std_logic;
200 signal ldsubre : std_logic;
197 signal duart, ldsuen : std_logic;
201 signal duart, ldsuen : std_logic;
198 signal rsertx, rserrx, rdsuen : std_logic;
202 signal rsertx, rserrx, rdsuen : std_logic;
199
203
200 signal rstraw : std_logic;
204 signal rstraw : std_logic;
201 signal rstneg : std_logic;
205 signal rstneg : std_logic;
202 signal rxd1, rxd2 : std_logic;
206 signal rxd1, rxd2 : std_logic;
203 signal txd1 : std_logic;
207 signal txd1 : std_logic;
204 signal lock : std_logic;
208 signal lock : std_logic;
205
209
206 signal ddr_clk : std_logic_vector(2 downto 0);
210 signal ddr_clk : std_logic_vector(2 downto 0);
207 signal ddr_clkb : std_logic_vector(2 downto 0);
211 signal ddr_clkb : std_logic_vector(2 downto 0);
208 signal ddr_cke : std_logic_vector(1 downto 0);
212 signal ddr_cke : std_logic_vector(1 downto 0);
209 signal ddr_csb : std_logic_vector(1 downto 0);
213 signal ddr_csb : std_logic_vector(1 downto 0);
210 signal ddr_adl : std_logic_vector(13 downto 0); -- ddr address
214 signal ddr_adl : std_logic_vector(13 downto 0); -- ddr address
211
215
212 signal AD_in : AD7688_in(0 downto 0);
216 signal AD_in : AD7688_in(0 downto 0);
213 signal AD_out : AD7688_out;
217 signal AD_out : AD7688_out;
218 signal smpclk_out : std_logic;
219 signal smpclk_in : std_logic;
220 signal sample_out : samplT(0 downto 0,11 downto 0);
221 signal sample_in : samplT(0 downto 0,11 downto 0);
222 signal sample_clk : std_logic;
223 signal sample_clk_out : std_logic;
214
224
215 attribute keep : boolean;
225 attribute keep : boolean;
216 attribute syn_keep : boolean;
226 attribute syn_keep : boolean;
217 attribute syn_preserve : boolean;
227 attribute syn_preserve : boolean;
218 attribute syn_keep of lock : signal is true;
228 attribute syn_keep of lock : signal is true;
219 attribute syn_keep of clkml : signal is true;
229 attribute syn_keep of clkml : signal is true;
220 attribute syn_preserve of clkml : signal is true;
230 attribute syn_preserve of clkml : signal is true;
221 attribute keep of lock : signal is true;
231 attribute keep of lock : signal is true;
222 attribute keep of clkml : signal is true;
232 attribute keep of clkml : signal is true;
223 attribute keep of clkm : signal is true;
233 attribute keep of clkm : signal is true;
224
234
225
235
226 constant BOARD_FREQ : integer := 50000; -- input frequency in KHz
236 constant BOARD_FREQ : integer := 50000; -- input frequency in KHz
227 constant CPU_FREQ : integer := BOARD_FREQ * CFG_CLKMUL / CFG_CLKDIV; -- cpu frequency in KHz
237 constant CPU_FREQ : integer := BOARD_FREQ * CFG_CLKMUL / CFG_CLKDIV; -- cpu frequency in KHz
228
238
229 begin
239 begin
230
240
231 ----------------------------------------------------------------------
241 ----------------------------------------------------------------------
232 --- Reset and Clock generation -------------------------------------
242 --- Reset and Clock generation -------------------------------------
233 ----------------------------------------------------------------------
243 ----------------------------------------------------------------------
234
244
235 vcc <= (others => '1'); gnd <= (others => '0');
245 vcc <= (others => '1'); gnd <= (others => '0');
236 cgi.pllctrl <= "00"; cgi.pllrst <= rstraw;
246 cgi.pllctrl <= "00"; cgi.pllrst <= rstraw;
237 rstneg <= not reset; spi <= '1';
247 rstneg <= not reset; spi <= '1';
238
248
239 rst0 : rstgen port map (rstneg, clkm, lock, rstn, rstraw);
249 rst0 : rstgen port map (rstneg, clkm, lock, rstn, rstraw);
240 led(5) <= lock;
250 led(5) <= lock;
241
251
242 clk_pad : clkpad generic map (tech => padtech) port map (clk_50mhz, lclk);
252 clk_pad : clkpad generic map (tech => padtech) port map (clk_50mhz, lclk);
243
253
244 clkgen0 : clkgen -- clock generator
254 clkgen0 : clkgen -- clock generator
245 generic map (fabtech, CFG_CLKMUL, CFG_CLKDIV, 0, 0, 0, 0, 0, BOARD_FREQ, 0)
255 generic map (fabtech, CFG_CLKMUL, CFG_CLKDIV, 0, 0, 0, 0, 0, BOARD_FREQ, 0)
246 port map (lclk, gnd(0), clkm, open, open, open, open, cgi, cgo, open, open, clk2x);
256 port map (lclk, gnd(0), clkm, open, open, open, open, cgi, cgo, open, open, clk2x);
247
257
248 -- cgo.clklock <= '1';
258 -- cgo.clklock <= '1';
249
259
250 ----------------------------------------------------------------------
260 ----------------------------------------------------------------------
251 --- AHB CONTROLLER --------------------------------------------------
261 --- AHB CONTROLLER --------------------------------------------------
252 ----------------------------------------------------------------------
262 ----------------------------------------------------------------------
253
263
254 ahb0 : ahbctrl -- AHB arbiter/multiplexer
264 ahb0 : ahbctrl -- AHB arbiter/multiplexer
255 generic map (defmast => CFG_DEFMST, split => CFG_SPLIT,
265 generic map (defmast => CFG_DEFMST, split => CFG_SPLIT,
256 rrobin => CFG_RROBIN, ioaddr => CFG_AHBIO, ioen => 1,
266 rrobin => CFG_RROBIN, ioaddr => CFG_AHBIO, ioen => 1,
257 nahbm => CFG_NCPU+CFG_AHB_UART+CFG_AHB_JTAG+CFG_GRETH+CFG_SVGA_ENABLE,
267 nahbm => CFG_NCPU+CFG_AHB_UART+CFG_AHB_JTAG+CFG_GRETH+CFG_SVGA_ENABLE,
258 nahbs => 8)
268 nahbs => 8)
259 port map (rstn, clkm, ahbmi, ahbmo, ahbsi, ahbso);
269 port map (rstn, clkm, ahbmi, ahbmo, ahbsi, ahbso);
260
270
261 ----------------------------------------------------------------------
271 ----------------------------------------------------------------------
262 --- LEON3 processor and DSU -----------------------------------------
272 --- LEON3 processor and DSU -----------------------------------------
263 ----------------------------------------------------------------------
273 ----------------------------------------------------------------------
264
274
265 leon3gen : if CFG_LEON3 = 1 generate
275 leon3gen : if CFG_LEON3 = 1 generate
266 cpu : for i in 0 to CFG_NCPU-1 generate
276 cpu : for i in 0 to CFG_NCPU-1 generate
267 u0 : leon3s -- LEON3 processor
277 u0 : leon3s -- LEON3 processor
268 generic map (i, fabtech, memtech, CFG_NWIN, CFG_DSU, CFG_FPU, CFG_V8,
278 generic map (i, fabtech, memtech, CFG_NWIN, CFG_DSU, CFG_FPU, CFG_V8,
269 0, CFG_MAC, pclow, 0, CFG_NWP, CFG_ICEN, CFG_IREPL, CFG_ISETS, CFG_ILINE,
279 0, CFG_MAC, pclow, 0, CFG_NWP, CFG_ICEN, CFG_IREPL, CFG_ISETS, CFG_ILINE,
270 CFG_ISETSZ, CFG_ILOCK, CFG_DCEN, CFG_DREPL, CFG_DSETS, CFG_DLINE, CFG_DSETSZ,
280 CFG_ISETSZ, CFG_ILOCK, CFG_DCEN, CFG_DREPL, CFG_DSETS, CFG_DLINE, CFG_DSETSZ,
271 CFG_DLOCK, CFG_DSNOOP, CFG_ILRAMEN, CFG_ILRAMSZ, CFG_ILRAMADDR, CFG_DLRAMEN,
281 CFG_DLOCK, CFG_DSNOOP, CFG_ILRAMEN, CFG_ILRAMSZ, CFG_ILRAMADDR, CFG_DLRAMEN,
272 CFG_DLRAMSZ, CFG_DLRAMADDR, CFG_MMUEN, CFG_ITLBNUM, CFG_DTLBNUM, CFG_TLB_TYPE, CFG_TLB_REP,
282 CFG_DLRAMSZ, CFG_DLRAMADDR, CFG_MMUEN, CFG_ITLBNUM, CFG_DTLBNUM, CFG_TLB_TYPE, CFG_TLB_REP,
273 CFG_LDDEL, disas, CFG_ITBSZ, CFG_PWD, CFG_SVT, CFG_RSTADDR,
283 CFG_LDDEL, disas, CFG_ITBSZ, CFG_PWD, CFG_SVT, CFG_RSTADDR,
274 CFG_NCPU-1)
284 CFG_NCPU-1)
275 port map (clkm, rstn, ahbmi, ahbmo(i), ahbsi, ahbso,
285 port map (clkm, rstn, ahbmi, ahbmo(i), ahbsi, ahbso,
276 irqi(i), irqo(i), dbgi(i), dbgo(i));
286 irqi(i), irqo(i), dbgi(i), dbgo(i));
277 end generate;
287 end generate;
278 error_pad : odpad generic map (tech => padtech) port map (errorn, dbgo(0).error);
288 error_pad : odpad generic map (tech => padtech) port map (errorn, dbgo(0).error);
279
289
280 dsugen : if CFG_DSU = 1 generate
290 dsugen : if CFG_DSU = 1 generate
281 dsu0 : dsu3 -- LEON3 Debug Support Unit
291 dsu0 : dsu3 -- LEON3 Debug Support Unit
282 generic map (hindex => 2, haddr => 16#900#, hmask => 16#F00#,
292 generic map (hindex => 2, haddr => 16#900#, hmask => 16#F00#,
283 ncpu => CFG_NCPU, tbits => 30, tech => memtech, irq => 0, kbytes => CFG_ATBSZ)
293 ncpu => CFG_NCPU, tbits => 30, tech => memtech, irq => 0, kbytes => CFG_ATBSZ)
284 port map (rstn, clkm, ahbmi, ahbsi, ahbso(2), dbgo, dbgi, dsui, dsuo);
294 port map (rstn, clkm, ahbmi, ahbsi, ahbso(2), dbgo, dbgi, dsui, dsuo);
285 dsui.enable <= '1';
295 dsui.enable <= '1';
286 dsubre_pad : inpad generic map (tech => padtech) port map (dsubre, ldsubre);
296 dsubre_pad : inpad generic map (tech => padtech) port map (dsubre, ldsubre);
287 dsui.break <= ldsubre;
297 dsui.break <= ldsubre;
288 -- dsuact_pad : outpad generic map (tech => padtech) port map (dsuact, dsuo.active);
298 -- dsuact_pad : outpad generic map (tech => padtech) port map (dsuact, dsuo.active);
289 led(4) <= dsuo.active;
299 led(4) <= dsuo.active;
290 end generate;
300 end generate;
291 end generate;
301 end generate;
292 nodsu : if CFG_DSU = 0 generate
302 nodsu : if CFG_DSU = 0 generate
293 ahbso(2) <= ahbs_none; dsuo.tstop <= '0'; dsuo.active <= '0';
303 ahbso(2) <= ahbs_none; dsuo.tstop <= '0'; dsuo.active <= '0';
294 end generate;
304 end generate;
295
305
296 dcomgen : if CFG_AHB_UART = 1 generate
306 dcomgen : if CFG_AHB_UART = 1 generate
297 dcom0 : ahbuart -- Debug UART
307 dcom0 : ahbuart -- Debug UART
298 generic map (hindex => CFG_NCPU, pindex => 4, paddr => 7)
308 generic map (hindex => CFG_NCPU, pindex => 4, paddr => 7)
299 port map (rstn, clkm, dui, duo, apbi, apbo(4), ahbmi, ahbmo(CFG_NCPU));
309 port map (rstn, clkm, dui, duo, apbi, apbo(4), ahbmi, ahbmo(CFG_NCPU));
300 dsurx_pad : inpad generic map (tech => padtech) port map (dsurx, rxd2);
310 dsurx_pad : inpad generic map (tech => padtech) port map (dsurx, rxd2);
301 dui.rxd <= rxd2;
311 dui.rxd <= rxd2;
302 dsutx_pad : outpad generic map (tech => padtech) port map (dsutx, duo.txd);
312 dsutx_pad : outpad generic map (tech => padtech) port map (dsutx, duo.txd);
303 led(2) <= not rxd2; led(3) <= not duo.txd;
313 led(2) <= not rxd2; led(3) <= not duo.txd;
304 end generate;
314 end generate;
305 nouah : if CFG_AHB_UART = 0 generate apbo(4) <= apb_none; end generate;
315 nouah : if CFG_AHB_UART = 0 generate apbo(4) <= apb_none; end generate;
306
316
307 ahbjtaggen0 :if CFG_AHB_JTAG = 1 generate
317 ahbjtaggen0 :if CFG_AHB_JTAG = 1 generate
308 ahbjtag0 : ahbjtag generic map(tech => fabtech, hindex => CFG_NCPU+CFG_AHB_UART)
318 ahbjtag0 : ahbjtag generic map(tech => fabtech, hindex => CFG_NCPU+CFG_AHB_UART)
309 port map(rstn, clkm, tck, tms, tdi, tdo, ahbmi, ahbmo(CFG_NCPU+CFG_AHB_UART),
319 port map(rstn, clkm, tck, tms, tdi, tdo, ahbmi, ahbmo(CFG_NCPU+CFG_AHB_UART),
310 open, open, open, open, open, open, open, gnd(0));
320 open, open, open, open, open, open, open, gnd(0));
311 end generate;
321 end generate;
312
322
313 ----------------------------------------------------------------------
323 ----------------------------------------------------------------------
314 --- Memory controllers ----------------------------------------------
324 --- Memory controllers ----------------------------------------------
315 ----------------------------------------------------------------------
325 ----------------------------------------------------------------------
316
326
317 mg2 : if CFG_MCTRL_LEON2 = 1 generate -- LEON2 memory controller
327 mg2 : if CFG_MCTRL_LEON2 = 1 generate -- LEON2 memory controller
318 sr1 : mctrl generic map (hindex => 5, pindex => 0,
328 sr1 : mctrl generic map (hindex => 5, pindex => 0,
319 paddr => 0, srbanks => 1, ramaddr => 16#600#, rammask => 16#F00#, ram16 => 1 )
329 paddr => 0, srbanks => 1, ramaddr => 16#600#, rammask => 16#F00#, ram16 => 1 )
320 port map (rstn, clkm, memi, memo, ahbsi, ahbso(5), apbi, apbo(0), wpo, open);
330 port map (rstn, clkm, memi, memo, ahbsi, ahbso(5), apbi, apbo(0), wpo, open);
321 end generate;
331 end generate;
322
332
323 byten <= '1'; -- 16-bit flash
333 byten <= '1'; -- 16-bit flash
324 memi.brdyn <= '1'; memi.bexcn <= '1';
334 memi.brdyn <= '1'; memi.bexcn <= '1';
325 memi.writen <= '1'; memi.wrn <= "1111"; memi.bwidth <= "01";
335 memi.writen <= '1'; memi.wrn <= "1111"; memi.bwidth <= "01";
326
336
327 mg0 : if (CFG_MCTRL_LEON2 = 0) generate
337 mg0 : if (CFG_MCTRL_LEON2 = 0) generate
328 apbo(0) <= apb_none; ahbso(0) <= ahbs_none;
338 apbo(0) <= apb_none; ahbso(0) <= ahbs_none;
329 roms_pad : outpad generic map (tech => padtech)
339 roms_pad : outpad generic map (tech => padtech)
330 port map (romsn, vcc(0));
340 port map (romsn, vcc(0));
331 end generate;
341 end generate;
332
342
333 mgpads : if (CFG_MCTRL_LEON2 /= 0) generate
343 mgpads : if (CFG_MCTRL_LEON2 /= 0) generate
334 addr_pad : outpadv generic map (width => 24, tech => padtech)
344 addr_pad : outpadv generic map (width => 24, tech => padtech)
335 port map (address, memo.address(23 downto 0));
345 port map (address, memo.address(23 downto 0));
336 roms_pad : outpad generic map (tech => padtech)
346 roms_pad : outpad generic map (tech => padtech)
337 port map (romsn, memo.romsn(0));
347 port map (romsn, memo.romsn(0));
338 oen_pad : outpad generic map (tech => padtech)
348 oen_pad : outpad generic map (tech => padtech)
339 port map (oen, memo.oen);
349 port map (oen, memo.oen);
340 wri_pad : outpad generic map (tech => padtech)
350 wri_pad : outpad generic map (tech => padtech)
341 port map (writen, memo.writen);
351 port map (writen, memo.writen);
342
352
343 -- pragma translate_off
353 -- pragma translate_off
344 iosn_pad : outpad generic map (tech => padtech)
354 iosn_pad : outpad generic map (tech => padtech)
345 port map (iosn, memo.iosn);
355 port map (iosn, memo.iosn);
346 tbdr : for i in 0 to 1 generate
356 tbdr : for i in 0 to 1 generate
347 data_pad : iopadv generic map (tech => padtech, width => 8)
357 data_pad : iopadv generic map (tech => padtech, width => 8)
348 port map (testdata(15-i*8 downto 8-i*8), memo.data(15-i*8 downto 8-i*8),
358 port map (testdata(15-i*8 downto 8-i*8), memo.data(15-i*8 downto 8-i*8),
349 memo.bdrive(i+2), memi.data(15-i*8 downto 8-i*8));
359 memo.bdrive(i+2), memi.data(15-i*8 downto 8-i*8));
350 end generate;
360 end generate;
351 -- pragma translate_on
361 -- pragma translate_on
352
362
353 -- bdr : for i in 0 to 1 generate
363 -- bdr : for i in 0 to 1 generate
354 -- data_pad : iopadv generic map (tech => padtech, width => 8)
364 -- data_pad : iopadv generic map (tech => padtech, width => 8)
355 -- port map (data(15-i*8 downto 8-i*8), memo.data(31-i*8 downto 24-i*8),
365 -- port map (data(15-i*8 downto 8-i*8), memo.data(31-i*8 downto 24-i*8),
356 -- memo.bdrive(i), memi.data(31-i*8 downto 24-i*8));
366 -- memo.bdrive(i), memi.data(31-i*8 downto 24-i*8));
357 -- end generate;
367 -- end generate;
358 end generate;
368 end generate;
359
369
360 ----------------------------------------------------------------------
370 ----------------------------------------------------------------------
361 --- DDR memory controller -------------------------------------------
371 --- DDR memory controller -------------------------------------------
362 ----------------------------------------------------------------------
372 ----------------------------------------------------------------------
363
373
364 ddrsp0 : if (CFG_DDRSP /= 0) generate
374 ddrsp0 : if (CFG_DDRSP /= 0) generate
365
375
366 ddrc : ddrspa generic map ( fabtech => spartan3e, memtech => memtech,
376 ddrc : ddrspa generic map ( fabtech => spartan3e, memtech => memtech,
367 hindex => 4, haddr => 16#400#, hmask => 16#F00#, ioaddr => 1,
377 hindex => 4, haddr => 16#400#, hmask => 16#F00#, ioaddr => 1,
368 pwron => CFG_DDRSP_INIT, MHz => 2*BOARD_FREQ/1000, rskew => CFG_DDRSP_RSKEW,
378 pwron => CFG_DDRSP_INIT, MHz => 2*BOARD_FREQ/1000, rskew => CFG_DDRSP_RSKEW,
369 clkmul => CFG_DDRSP_FREQ/10, clkdiv => 2*5, col => CFG_DDRSP_COL,
379 clkmul => CFG_DDRSP_FREQ/10, clkdiv => 2*5, col => CFG_DDRSP_COL,
370 Mbyte => CFG_DDRSP_SIZE, ahbfreq => CPU_FREQ/1000, ddrbits => 16)
380 Mbyte => CFG_DDRSP_SIZE, ahbfreq => CPU_FREQ/1000, ddrbits => 16)
371 port map (
381 port map (
372 cgo.clklock, rstn, clk2x, clkm, lock, clkml, clkml, ahbsi, ahbso(4),
382 cgo.clklock, rstn, clk2x, clkm, lock, clkml, clkml, ahbsi, ahbso(4),
373 ddr_clk, ddr_clkb, open, ddr_clk_fb,
383 ddr_clk, ddr_clkb, open, ddr_clk_fb,
374 ddr_cke, ddr_csb, ddr_web, ddr_rasb, ddr_casb,
384 ddr_cke, ddr_csb, ddr_web, ddr_rasb, ddr_casb,
375 ddr_dm, ddr_dqs, ddr_adl, ddr_ba, ddr_dq);
385 ddr_dm, ddr_dqs, ddr_adl, ddr_ba, ddr_dq);
376
386
377 ddr_clk0 <= ddr_clk(0); ddr_clk0b <= ddr_clkb(0);
387 ddr_clk0 <= ddr_clk(0); ddr_clk0b <= ddr_clkb(0);
378 ddr_cke0 <= ddr_cke(0); ddr_cs0b <= ddr_csb(0);
388 ddr_cke0 <= ddr_cke(0); ddr_cs0b <= ddr_csb(0);
379 ddr_ad <= ddr_adl(12 downto 0);
389 ddr_ad <= ddr_adl(12 downto 0);
380 end generate;
390 end generate;
381
391
382 noddr : if (CFG_DDRSP = 0) generate lock <= '1'; end generate;
392 noddr : if (CFG_DDRSP = 0) generate lock <= '1'; end generate;
383
393
384 ----------------------------------------------------------------------
394 ----------------------------------------------------------------------
385 --- APB Bridge and various periherals -------------------------------
395 --- APB Bridge and various periherals -------------------------------
386 ----------------------------------------------------------------------
396 ----------------------------------------------------------------------
387
397
388 apb0 : apbctrl -- AHB/APB bridge
398 apb0 : apbctrl -- AHB/APB bridge
389 generic map (hindex => 1, haddr => CFG_APBADDR)
399 generic map (hindex => 1, haddr => CFG_APBADDR)
390 port map (rstn, clkm, ahbsi, ahbso(1), apbi, apbo);
400 port map (rstn, clkm, ahbsi, ahbso(1), apbi, apbo);
391
401
392 ua1 : if CFG_UART1_ENABLE /= 0 generate
402 ua1 : if CFG_UART1_ENABLE /= 0 generate
393 uart1 : apbuart -- UART 1
403 uart1 : apbuart -- UART 1
394 generic map (pindex => 1, paddr => 1, pirq => 2, console => dbguart,
404 generic map (pindex => 1, paddr => 1, pirq => 2, console => dbguart,
395 fifosize => CFG_UART1_FIFO)
405 fifosize => CFG_UART1_FIFO)
396 port map (rstn, clkm, apbi, apbo(1), u1i, u1o);
406 port map (rstn, clkm, apbi, apbo(1), u1i, u1o);
397 u1i.rxd <= rxd1; u1i.ctsn <= '0'; u1i.extclk <= '0'; txd1 <= u1o.txd;
407 u1i.rxd <= rxd1; u1i.ctsn <= '0'; u1i.extclk <= '0'; txd1 <= u1o.txd;
398 serrx_pad : inpad generic map (tech => padtech) port map (urxd1, rxd1);
408 serrx_pad : inpad generic map (tech => padtech) port map (urxd1, rxd1);
399 sertx_pad : outpad generic map (tech => padtech) port map (utxd1, txd1);
409 sertx_pad : outpad generic map (tech => padtech) port map (utxd1, txd1);
400 led(0) <= not rxd1; led(1) <= not txd1;
410 led(0) <= not rxd1; led(1) <= not txd1;
401 end generate;
411 end generate;
402 noua0 : if CFG_UART1_ENABLE = 0 generate apbo(1) <= apb_none; end generate;
412 noua0 : if CFG_UART1_ENABLE = 0 generate apbo(1) <= apb_none; end generate;
403
413
404 irqctrl : if CFG_IRQ3_ENABLE /= 0 generate
414 irqctrl : if CFG_IRQ3_ENABLE /= 0 generate
405 irqctrl0 : irqmp -- interrupt controller
415 irqctrl0 : irqmp -- interrupt controller
406 generic map (pindex => 2, paddr => 2, ncpu => CFG_NCPU)
416 generic map (pindex => 2, paddr => 2, ncpu => CFG_NCPU)
407 port map (rstn, clkm, apbi, apbo(2), irqo, irqi);
417 port map (rstn, clkm, apbi, apbo(2), irqo, irqi);
408 end generate;
418 end generate;
409 irq3 : if CFG_IRQ3_ENABLE = 0 generate
419 irq3 : if CFG_IRQ3_ENABLE = 0 generate
410 x : for i in 0 to CFG_NCPU-1 generate
420 x : for i in 0 to CFG_NCPU-1 generate
411 irqi(i).irl <= "0000";
421 irqi(i).irl <= "0000";
412 end generate;
422 end generate;
413 apbo(2) <= apb_none;
423 apbo(2) <= apb_none;
414 end generate;
424 end generate;
415
425
416 gpt : if CFG_GPT_ENABLE /= 0 generate
426 gpt : if CFG_GPT_ENABLE /= 0 generate
417 timer0 : gptimer -- timer unit
427 timer0 : gptimer -- timer unit
418 generic map (pindex => 3, paddr => 3, pirq => CFG_GPT_IRQ,
428 generic map (pindex => 3, paddr => 3, pirq => CFG_GPT_IRQ,
419 sepirq => CFG_GPT_SEPIRQ, sbits => CFG_GPT_SW, ntimers => CFG_GPT_NTIM,
429 sepirq => CFG_GPT_SEPIRQ, sbits => CFG_GPT_SW, ntimers => CFG_GPT_NTIM,
420 nbits => CFG_GPT_TW)
430 nbits => CFG_GPT_TW)
421 port map (rstn, clkm, apbi, apbo(3), gpti, open);
431 port map (rstn, clkm, apbi, apbo(3), gpti, open);
422 gpti.dhalt <= dsuo.tstop; gpti.extclk <= '0';
432 gpti.dhalt <= dsuo.tstop; gpti.extclk <= '0';
423 end generate;
433 end generate;
424 notim : if CFG_GPT_ENABLE = 0 generate apbo(3) <= apb_none; end generate;
434 notim : if CFG_GPT_ENABLE = 0 generate apbo(3) <= apb_none; end generate;
425
435
426 gpio0 : if CFG_GRGPIO_ENABLE /= 0 generate -- GR GPIO unit
436 gpio0 : if CFG_GRGPIO_ENABLE /= 0 generate -- GR GPIO unit
427 grgpio0: grgpio
437 grgpio0: grgpio
428 generic map( pindex => 11, paddr => 11, imask => CFG_GRGPIO_IMASK,
438 generic map( pindex => 11, paddr => 11, imask => CFG_GRGPIO_IMASK,
429 nbits => 12 --CFG_GRGPIO_WIDTH
439 nbits => 12 --CFG_GRGPIO_WIDTH
430 )
440 )
431 port map( rstn, clkm, apbi, apbo(11), gpioi, gpioo);
441 port map( rstn, clkm, apbi, apbo(11), gpioi, gpioo);
432
442
433 end generate;
443 end generate;
434
444
435 kbd : if CFG_KBD_ENABLE /= 0 generate
445 kbd : if CFG_KBD_ENABLE /= 0 generate
436 ps20 : apbps2 generic map(pindex => 5, paddr => 5, pirq => 5)
446 ps20 : apbps2 generic map(pindex => 5, paddr => 5, pirq => 5)
437 port map(rstn, clkm, apbi, apbo(5), kbdi, kbdo);
447 port map(rstn, clkm, apbi, apbo(5), kbdi, kbdo);
438 kbdclk_pad : iopad generic map (tech => padtech)
448 kbdclk_pad : iopad generic map (tech => padtech)
439 port map (ps2clk,kbdo.ps2_clk_o, kbdo.ps2_clk_oe, kbdi.ps2_clk_i);
449 port map (ps2clk,kbdo.ps2_clk_o, kbdo.ps2_clk_oe, kbdi.ps2_clk_i);
440 kbdata_pad : iopad generic map (tech => padtech)
450 kbdata_pad : iopad generic map (tech => padtech)
441 port map (ps2data, kbdo.ps2_data_o, kbdo.ps2_data_oe, kbdi.ps2_data_i);
451 port map (ps2data, kbdo.ps2_data_o, kbdo.ps2_data_oe, kbdi.ps2_data_i);
442 end generate;
452 end generate;
443 nokbd : if CFG_KBD_ENABLE = 0 generate
453 nokbd : if CFG_KBD_ENABLE = 0 generate
444 apbo(5) <= apb_none; kbdo <= ps2o_none;
454 apbo(5) <= apb_none; kbdo <= ps2o_none;
445 end generate;
455 end generate;
446
456
447 -- vga : if CFG_VGA_ENABLE /= 0 generate
457 -- vga : if CFG_VGA_ENABLE /= 0 generate
448 -- vga0 : apbvga generic map(memtech => memtech, pindex => 6, paddr => 6)
458 -- vga0 : apbvga generic map(memtech => memtech, pindex => 6, paddr => 6)
449 -- port map(rstn, clkm, ethclk, apbi, apbo(6), vgao);
459 -- port map(rstn, clkm, ethclk, apbi, apbo(6), vgao);
450 -- video_clock_pad : outpad generic map ( tech => padtech)
460 -- video_clock_pad : outpad generic map ( tech => padtech)
451 -- port map (vid_clock, dac_clk);
461 -- port map (vid_clock, dac_clk);
452 -- dac_clk <= not clkm;
462 -- dac_clk <= not clkm;
453 -- end generate;
463 -- end generate;
454
464
455 svga : if CFG_SVGA_ENABLE /= 0 generate
465 svga : if CFG_SVGA_ENABLE /= 0 generate
456 svga0 : svgactrl generic map(memtech => memtech, pindex => 6, paddr => 6,
466 svga0 : svgactrl generic map(memtech => memtech, pindex => 6, paddr => 6,
457 hindex => CFG_NCPU+CFG_AHB_UART+CFG_AHB_JTAG,
467 hindex => CFG_NCPU+CFG_AHB_UART+CFG_AHB_JTAG,
458 clk0 => 1000000000/((BOARD_FREQ * CFG_CLKMUL)/CFG_CLKDIV),
468 clk0 => 1000000000/((BOARD_FREQ * CFG_CLKMUL)/CFG_CLKDIV),
459 clk1 => 0, clk2 => 0, burstlen => 5)
469 clk1 => 0, clk2 => 0, burstlen => 5)
460 port map(rstn, clkm, clkm, apbi, apbo(6), vgao, ahbmi,
470 port map(rstn, clkm, clkm, apbi, apbo(6), vgao, ahbmi,
461 ahbmo(CFG_NCPU+CFG_AHB_UART+CFG_AHB_JTAG), open);
471 ahbmo(CFG_NCPU+CFG_AHB_UART+CFG_AHB_JTAG), open);
462 end generate;
472 end generate;
463
473
464 -- blank_pad : outpad generic map (tech => padtech)
474 -- blank_pad : outpad generic map (tech => padtech)
465 -- port map (vid_blankn, vgao.blank);
475 -- port map (vid_blankn, vgao.blank);
466 -- comp_sync_pad : outpad generic map (tech => padtech)
476 -- comp_sync_pad : outpad generic map (tech => padtech)
467 -- port map (vid_syncn, vgao.comp_sync);
477 -- port map (vid_syncn, vgao.comp_sync);
468 vert_sync_pad : outpad generic map (tech => padtech)
478 vert_sync_pad : outpad generic map (tech => padtech)
469 port map (vid_vsync, vgao.vsync);
479 port map (vid_vsync, vgao.vsync);
470 horiz_sync_pad : outpad generic map (tech => padtech)
480 horiz_sync_pad : outpad generic map (tech => padtech)
471 port map (vid_hsync, vgao.hsync);
481 port map (vid_hsync, vgao.hsync);
472 video_out_r_pad : outpad generic map (tech => padtech)
482 video_out_r_pad : outpad generic map (tech => padtech)
473 port map (vid_r, vgao.video_out_r(7));
483 port map (vid_r, vgao.video_out_r(7));
474 video_out_g_pad : outpad generic map (tech => padtech)
484 video_out_g_pad : outpad generic map (tech => padtech)
475 port map (vid_g, vgao.video_out_g(7));
485 port map (vid_g, vgao.video_out_g(7));
476 video_out_b_pad : outpad generic map (tech => padtech)
486 video_out_b_pad : outpad generic map (tech => padtech)
477 port map (vid_b, vgao.video_out_b(7));
487 port map (vid_b, vgao.video_out_b(7));
478
488
479
489
480 -----------------------------------------------------------------------
490 -----------------------------------------------------------------------
481 --- LCD CONTROLER ----------------------------------------------------
491 --- LCD CONTROLER ----------------------------------------------------
482 -----------------------------------------------------------------------
492 -----------------------------------------------------------------------
483
493
484 LCD0 : apb_lcd_ctrlr
494 LCD0 : apb_lcd_ctrlr
485 generic map( 8, 8,16#fff#,0,8)
495 generic map( 8, 8,16#fff#,0,8)
486 Port map( rstn,clkm,apbi, apbo(8),data(15 downto 8),LCD_RS,LCD_RW,LCD_E,LCD_RET,LCD_CS1,LCD_CS2,SF_CE0);
496 Port map( rstn,clkm,apbi, apbo(8),data(15 downto 8),LCD_RS,LCD_RW,LCD_E,LCD_RET,LCD_CS1,LCD_CS2,SF_CE0);
487
497
488 -----------------------------------------------------------------------
498 -----------------------------------------------------------------------
499 -------- LPP UART ----------------------------------------------------
500 -----------------------------------------------------------------------
501
502 LPPUART0: APB_UART
503 generic map( 12, 12,16#fff#,0,8,8)
504 port map(clkm,rstn,apbi, apbo(12),lppTXD,lppRXD);
505
506
507 -----------------------------------------------------------------------
489 --- ADS7886 ----------------------------------------------------
508 --- ADS7886 ----------------------------------------------------
490 -----------------------------------------------------------------------
509 -----------------------------------------------------------------------
491
510
492 ADC0 : lpp_apb_ad_conv
511 ADC0 : lpp_apb_ad_conv
493 generic map(9,9,16#fff#,0,8,1,50000,100,ADS7886)
512 generic map(9,9,16#fff#,0,8,1,50000,100,ADS7886)
494 Port map(clkm,rstn,apbi, apbo(9),AD_in,AD_out);
513 Port map(clkm,rstn,apbi, apbo(9),AD_in,AD_out);
495
514
496 AD_in(0).SDI <= ADC_SDI;
515 AD_in(0).SDI <= ADC_SDI;
497 ADC_CNV <= AD_out.CNV;
516 ADC_CNV <= AD_out.CNV;
498 ADC_SCK <= AD_out.SCK;
517 ADC_SCK <= AD_out.SCK;
518
519
520 -----------------------------------------------------------------------
521 --- I I R F I L T E R --------------------------------------------
522 -----------------------------------------------------------------------
523 smplclkgen: Clk_divider
524 generic map(40000000,1000)
525 Port map( clkm ,rstn,sample_clk);
526
527
528 FILTER0: APB_IIR_CEL
529 generic map(10,10,16#fff#,0,8,1,12,9,3,5,use_RAM)
530 port map(rstn,clkm,apbi, apbo(10),sample_clk,sample_clk_out,sample_in,sample_out
531 );
532
499 -----------------------------------------------------------------------
533 -----------------------------------------------------------------------
500 --- ETHERNET ---------------------------------------------------------
534 --- ETHERNET ---------------------------------------------------------
501 -----------------------------------------------------------------------
535 -----------------------------------------------------------------------
502
536
503 eth0 : if CFG_GRETH = 1 generate -- Gaisler ethernet MAC
537 eth0 : if CFG_GRETH = 1 generate -- Gaisler ethernet MAC
504 e1 : grethm generic map(hindex => CFG_NCPU+CFG_AHB_UART+CFG_AHB_JTAG+CFG_SVGA_ENABLE,
538 e1 : grethm generic map(hindex => CFG_NCPU+CFG_AHB_UART+CFG_AHB_JTAG+CFG_SVGA_ENABLE,
505 pindex => 15, paddr => 15, pirq => 12, memtech => memtech,
539 pindex => 15, paddr => 15, pirq => 12, memtech => memtech,
506 mdcscaler => CPU_FREQ/1000, enable_mdio => 1, fifosize => CFG_ETH_FIFO,
540 mdcscaler => CPU_FREQ/1000, enable_mdio => 1, fifosize => CFG_ETH_FIFO,
507 nsync => 1, edcl => CFG_DSU_ETH, edclbufsz => CFG_ETH_BUF,
541 nsync => 1, edcl => CFG_DSU_ETH, edclbufsz => CFG_ETH_BUF,
508 macaddrh => CFG_ETH_ENM, macaddrl => CFG_ETH_ENL,
542 macaddrh => CFG_ETH_ENM, macaddrl => CFG_ETH_ENL,
509 ipaddrh => CFG_ETH_IPM, ipaddrl => CFG_ETH_IPL,
543 ipaddrh => CFG_ETH_IPM, ipaddrl => CFG_ETH_IPL,
510 phyrstadr => 31, giga => CFG_GRETH1G)
544 phyrstadr => 31, giga => CFG_GRETH1G)
511 port map( rst => rstn, clk => clkm, ahbmi => ahbmi,
545 port map( rst => rstn, clk => clkm, ahbmi => ahbmi,
512 ahbmo => ahbmo(CFG_NCPU+CFG_AHB_UART+CFG_AHB_JTAG+CFG_SVGA_ENABLE),
546 ahbmo => ahbmo(CFG_NCPU+CFG_AHB_UART+CFG_AHB_JTAG+CFG_SVGA_ENABLE),
513 apbi => apbi, apbo => apbo(15), ethi => ethi, etho => etho);
547 apbi => apbi, apbo => apbo(15), ethi => ethi, etho => etho);
514
548
515 emdio_pad : iopad generic map (tech => padtech)
549 emdio_pad : iopad generic map (tech => padtech)
516 port map (emdio, etho.mdio_o, etho.mdio_oe, ethi.mdio_i);
550 port map (emdio, etho.mdio_o, etho.mdio_oe, ethi.mdio_i);
517 etxc_pad : inpad generic map (tech => padtech)
551 etxc_pad : inpad generic map (tech => padtech)
518 port map (etx_clk, ethi.tx_clk);
552 port map (etx_clk, ethi.tx_clk);
519 erxc_pad : inpad generic map (tech => padtech)
553 erxc_pad : inpad generic map (tech => padtech)
520 port map (erx_clk, ethi.rx_clk);
554 port map (erx_clk, ethi.rx_clk);
521 erxd_pad : inpadv generic map (tech => padtech, width => 4)
555 erxd_pad : inpadv generic map (tech => padtech, width => 4)
522 port map (erxd, ethi.rxd(3 downto 0));
556 port map (erxd, ethi.rxd(3 downto 0));
523 erxdv_pad : inpad generic map (tech => padtech)
557 erxdv_pad : inpad generic map (tech => padtech)
524 port map (erx_dv, ethi.rx_dv);
558 port map (erx_dv, ethi.rx_dv);
525 erxer_pad : inpad generic map (tech => padtech)
559 erxer_pad : inpad generic map (tech => padtech)
526 port map (erx_er, ethi.rx_er);
560 port map (erx_er, ethi.rx_er);
527 erxco_pad : inpad generic map (tech => padtech)
561 erxco_pad : inpad generic map (tech => padtech)
528 port map (erx_col, ethi.rx_col);
562 port map (erx_col, ethi.rx_col);
529 erxcr_pad : inpad generic map (tech => padtech)
563 erxcr_pad : inpad generic map (tech => padtech)
530 port map (erx_crs, ethi.rx_crs);
564 port map (erx_crs, ethi.rx_crs);
531
565
532 etxd_pad : outpadv generic map (tech => padtech, width => 4)
566 etxd_pad : outpadv generic map (tech => padtech, width => 4)
533 port map (etxd, etho.txd(3 downto 0));
567 port map (etxd, etho.txd(3 downto 0));
534 etxen_pad : outpad generic map (tech => padtech)
568 etxen_pad : outpad generic map (tech => padtech)
535 port map (etx_en, etho.tx_en);
569 port map (etx_en, etho.tx_en);
536 etxer_pad : outpad generic map (tech => padtech)
570 etxer_pad : outpad generic map (tech => padtech)
537 port map (etx_er, etho.tx_er);
571 port map (etx_er, etho.tx_er);
538 emdc_pad : outpad generic map (tech => padtech)
572 emdc_pad : outpad generic map (tech => padtech)
539 port map (emdc, etho.mdc);
573 port map (emdc, etho.mdc);
540
574
541 end generate;
575 end generate;
542
576
543 -----------------------------------------------------------------------
577 -----------------------------------------------------------------------
544 --- AHB DMA ----------------------------------------------------------
578 --- AHB DMA ----------------------------------------------------------
545 -----------------------------------------------------------------------
579 -----------------------------------------------------------------------
546
580
547 -- dma0 : ahbdma
581 -- dma0 : ahbdma
548 -- generic map (hindex => CFG_NCPU+CFG_AHB_UART+CFG_GRETH,
582 -- generic map (hindex => CFG_NCPU+CFG_AHB_UART+CFG_GRETH,
549 -- pindex => 12, paddr => 12, dbuf => 32)
583 -- pindex => 12, paddr => 12, dbuf => 32)
550 -- port map (rstn, clkm, apbi, apbo(12), ahbmi,
584 -- port map (rstn, clkm, apbi, apbo(12), ahbmi,
551 -- ahbmo(CFG_NCPU+CFG_AHB_UART+CFG_GRETH));
585 -- ahbmo(CFG_NCPU+CFG_AHB_UART+CFG_GRETH));
552 --
586 --
553 -- at0 : ahbtrace
587 -- at0 : ahbtrace
554 -- generic map ( hindex => 7, ioaddr => 16#200#, iomask => 16#E00#,
588 -- generic map ( hindex => 7, ioaddr => 16#200#, iomask => 16#E00#,
555 -- tech => memtech, irq => 0, kbytes => 8)
589 -- tech => memtech, irq => 0, kbytes => 8)
556 -- port map ( rstn, clkm, ahbmi, ahbsi, ahbso(7));
590 -- port map ( rstn, clkm, ahbmi, ahbsi, ahbso(7));
557
591
558 -----------------------------------------------------------------------
592 -----------------------------------------------------------------------
559 --- AHB ROM ----------------------------------------------------------
593 --- AHB ROM ----------------------------------------------------------
560 -----------------------------------------------------------------------
594 -----------------------------------------------------------------------
561
595
562 bpromgen : if CFG_AHBROMEN /= 0 generate
596 bpromgen : if CFG_AHBROMEN /= 0 generate
563 brom : entity work.ahbrom
597 brom : entity work.ahbrom
564 generic map (hindex => 6, haddr => CFG_AHBRODDR, pipe => CFG_AHBROPIP)
598 generic map (hindex => 6, haddr => CFG_AHBRODDR, pipe => CFG_AHBROPIP)
565 port map ( rstn, clkm, ahbsi, ahbso(6));
599 port map ( rstn, clkm, ahbsi, ahbso(6));
566 end generate;
600 end generate;
567 nobpromgen : if CFG_AHBROMEN = 0 generate
601 nobpromgen : if CFG_AHBROMEN = 0 generate
568 ahbso(6) <= ahbs_none;
602 ahbso(6) <= ahbs_none;
569 end generate;
603 end generate;
570
604
571 -----------------------------------------------------------------------
605 -----------------------------------------------------------------------
572 --- AHB RAM ----------------------------------------------------------
606 --- AHB RAM ----------------------------------------------------------
573 -----------------------------------------------------------------------
607 -----------------------------------------------------------------------
574
608
575 ahbramgen : if CFG_AHBRAMEN = 1 generate
609 ahbramgen : if CFG_AHBRAMEN = 1 generate
576 ahbram0 : ahbram generic map (hindex => 3, haddr => CFG_AHBRADDR,
610 ahbram0 : ahbram generic map (hindex => 3, haddr => CFG_AHBRADDR,
577 tech => CFG_MEMTECH, kbytes => CFG_AHBRSZ)
611 tech => CFG_MEMTECH, kbytes => CFG_AHBRSZ)
578 port map (rstn, clkm, ahbsi, ahbso(3));
612 port map (rstn, clkm, ahbsi, ahbso(3));
579 end generate;
613 end generate;
580 nram : if CFG_AHBRAMEN = 0 generate ahbso(3) <= ahbs_none; end generate;
614 nram : if CFG_AHBRAMEN = 0 generate ahbso(3) <= ahbs_none; end generate;
581
615
582 -----------------------------------------------------------------------
616 -----------------------------------------------------------------------
583 --- Drive unused bus elements ---------------------------------------
617 --- Drive unused bus elements ---------------------------------------
584 -----------------------------------------------------------------------
618 -----------------------------------------------------------------------
585
619
586 nam1 : for i in (CFG_NCPU+CFG_AHB_UART+CFG_AHB_JTAG+CFG_GRETH+CFG_SVGA_ENABLE+1) to NAHBMST-1 generate
620 nam1 : for i in (CFG_NCPU+CFG_AHB_UART+CFG_AHB_JTAG+CFG_GRETH+CFG_SVGA_ENABLE+5) to NAHBMST-1 generate
587 ahbmo(i) <= ahbm_none;
621 ahbmo(i) <= ahbm_none;
588 end generate;
622 end generate;
589 -- nap0 : for i in 9 to NAPBSLV-1-CFG_GRETH generate apbo(i) <= apb_none; end generate;
623 -- nap0 : for i in 9 to NAPBSLV-1-CFG_GRETH generate apbo(i) <= apb_none; end generate;
590 -- nah0 : for i in 8 to NAHBSLV-1 generate ahbso(i) <= ahbs_none; end generate;
624 -- nah0 : for i in 8 to NAHBSLV-1 generate ahbso(i) <= ahbs_none; end generate;
591
625
592 -- resoutn <= rstn;
626 -- resoutn <= rstn;
593
627
594 -----------------------------------------------------------------------
628 -----------------------------------------------------------------------
595 --- Boot message ----------------------------------------------------
629 --- Boot message ----------------------------------------------------
596 -----------------------------------------------------------------------
630 -----------------------------------------------------------------------
597
631
598 -- pragma translate_off
632 -- pragma translate_off
599 x : report_version
633 x : report_version
600 generic map (
634 generic map (
601 msg1 => "LEON3 Demonstration design for Digilent Spartan3E Eval board",
635 msg1 => "LEON3 Demonstration design for Digilent Spartan3E Eval board",
602 msg2 => "GRLIB Version " & tost(LIBVHDL_VERSION/1000) & "." & tost((LIBVHDL_VERSION mod 1000)/100)
636 msg2 => "GRLIB Version " & tost(LIBVHDL_VERSION/1000) & "." & tost((LIBVHDL_VERSION mod 1000)/100)
603 & "." & tost(LIBVHDL_VERSION mod 100) & ", build " & tost(LIBVHDL_BUILD),
637 & "." & tost(LIBVHDL_VERSION mod 100) & ", build " & tost(LIBVHDL_BUILD),
604 msg3 => "Target technology: " & tech_table(fabtech) & ", memory library: " & tech_table(memtech),
638 msg3 => "Target technology: " & tech_table(fabtech) & ", memory library: " & tech_table(memtech),
605 mdel => 1
639 mdel => 1
606 );
640 );
607 -- pragma translate_on
641 -- pragma translate_on
608
642
609 end rtl;
643 end rtl;
1 NO CONTENT: modified file chmod 100644 => 100755
NO CONTENT: modified file chmod 100644 => 100755
1 NO CONTENT: modified file chmod 100644 => 100755
NO CONTENT: modified file chmod 100644 => 100755
1 NO CONTENT: modified file chmod 100644 => 100755
NO CONTENT: modified file chmod 100644 => 100755
@@ -1,55 +1,56
1 <?xml version="1.0" encoding="UTF-8" ?>
1 <?xml version="1.0" encoding="UTF-8" ?>
2 <document>
2 <document>
3 <!--The data in this file is primarily intended for consumption by Xilinx tools.
3 <!--The data in this file is primarily intended for consumption by Xilinx tools.
4 The structure and the elements are likely to change over the next few releases.
4 The structure and the elements are likely to change over the next few releases.
5 This means code written to parse this file will need to be revisited each subsequent release.-->
5 This means code written to parse this file will need to be revisited each subsequent release.-->
6 <application name="pn" timeStamp="Wed Dec 1 15:45:26 2010">
6 <application name="pn" timeStamp="Wed Dec 8 09:10:18 2010">
7 <section name="Project Information" visible="false">
7 <section name="Project Information" visible="false">
8 <property name="ProjectID" value="144BAC8BCC020358A10E3C9EB2A797A8" type="project"/>
8 <property name="ProjectID" value="314B616C181AFB6097A4EDCB224EA28B" type="project"/>
9 <property name="ProjectIteration" value="9" type="project"/>
9 <property name="ProjectIteration" value="11" type="project"/>
10 <property name="ProjectFile" value="/opt/GRLIB/grlib-gpl-1.1.0-b4104/designs/leon3-APB_LCD-digilent-xc3s1600e/leon3mp.xise" type="project"/>
10 <property name="ProjectFile" value="/opt/GRLIB/grlib-gpl-1.1.0-b4104/designs/leon3-APB_LCD-digilent-xc3s1600e/leon3mp.xise" type="project"/>
11 <property name="ProjectCreationTimestamp" value="2010-12-01T11:32:09" type="project"/>
11 <property name="ProjectCreationTimestamp" value="2010-12-02T08:01:13" type="project"/>
12 </section>
12 </section>
13 <section name="Project Statistics" visible="true">
13 <section name="Project Statistics" visible="true">
14 <property name="PROP_Enable_Message_Filtering" value="false" type="design"/>
14 <property name="PROP_Enable_Message_Filtering" value="false" type="design"/>
15 <property name="PROP_FitterReportFormat" value="HTML" type="process"/>
15 <property name="PROP_FitterReportFormat" value="HTML" type="process"/>
16 <property name="PROP_LastAppliedGoal" value="Balanced" type="design"/>
16 <property name="PROP_LastAppliedGoal" value="Balanced" type="design"/>
17 <property name="PROP_LastAppliedStrategy" value="Xilinx Default (unlocked)" type="design"/>
17 <property name="PROP_LastAppliedStrategy" value="Xilinx Default (unlocked)" type="design"/>
18 <property name="PROP_ManualCompileOrderImp" value="false" type="design"/>
18 <property name="PROP_ManualCompileOrderImp" value="false" type="design"/>
19 <property name="PROP_PropSpecInProjFile" value="Store all values" type="design"/>
19 <property name="PROP_PropSpecInProjFile" value="Store all values" type="design"/>
20 <property name="PROP_SelectedInstanceHierarchicalPath" value="/APB_IIR_CEL/filter" type="process"/>
20 <property name="PROP_Simulator" value="Modelsim-SE Mixed" type="design"/>
21 <property name="PROP_Simulator" value="Modelsim-SE Mixed" type="design"/>
21 <property name="PROP_SynthFsmEncode" value="None" type="process"/>
22 <property name="PROP_SynthFsmEncode" value="None" type="process"/>
22 <property name="PROP_SynthTopFile" value="changed" type="process"/>
23 <property name="PROP_SynthTopFile" value="changed" type="process"/>
23 <property name="PROP_Top_Level_Module_Type" value="HDL" type="design"/>
24 <property name="PROP_Top_Level_Module_Type" value="HDL" type="design"/>
24 <property name="PROP_UseSmartGuide" value="false" type="design"/>
25 <property name="PROP_UseSmartGuide" value="false" type="design"/>
25 <property name="PROP_UserConstraintEditorPreference" value="Text Editor" type="process"/>
26 <property name="PROP_UserConstraintEditorPreference" value="Text Editor" type="process"/>
26 <property name="PROP_intProjectCreationTimestamp" value="2010-12-01T11:32:09" type="design"/>
27 <property name="PROP_intProjectCreationTimestamp" value="2010-12-02T08:01:13" type="design"/>
27 <property name="PROP_intWbtProjectID" value="144BAC8BCC020358A10E3C9EB2A797A8" type="design"/>
28 <property name="PROP_intWbtProjectID" value="314B616C181AFB6097A4EDCB224EA28B" type="design"/>
28 <property name="PROP_intWbtProjectIteration" value="9" type="process"/>
29 <property name="PROP_intWbtProjectIteration" value="11" type="process"/>
29 <property name="PROP_intWorkingDirLocWRTProjDir" value="Same" type="design"/>
30 <property name="PROP_intWorkingDirLocWRTProjDir" value="Same" type="design"/>
30 <property name="PROP_intWorkingDirUsed" value="No" type="design"/>
31 <property name="PROP_intWorkingDirUsed" value="No" type="design"/>
31 <property name="PROP_map_otherCmdLineOptions" value="-timing" type="process"/>
32 <property name="PROP_map_otherCmdLineOptions" value="-timing" type="process"/>
33 <property name="PROP_selectedSimRootSourceNode_behav" value="lpp.IIR_CEL_FILTER" type="process"/>
32 <property name="PROP_xilxBitgCfg_GenOpt_DRC" value="false" type="process"/>
34 <property name="PROP_xilxBitgCfg_GenOpt_DRC" value="false" type="process"/>
33 <property name="PROP_xilxBitgCfg_GenOpt_ReadBack" value="true" type="process"/>
35 <property name="PROP_xilxBitgCfg_GenOpt_ReadBack" value="true" type="process"/>
34 <property name="PROP_xilxBitgStart_Clk_DriveDone" value="true" type="process"/>
36 <property name="PROP_xilxBitgStart_Clk_DriveDone" value="true" type="process"/>
35 <property name="PROP_xilxMapPackRegInto" value="For Inputs and Outputs" type="process"/>
37 <property name="PROP_xilxMapPackRegInto" value="For Inputs and Outputs" type="process"/>
36 <property name="PROP_xilxNgdbldMacro" value="changed" type="process"/>
38 <property name="PROP_xilxNgdbldMacro" value="changed" type="process"/>
37 <property name="PROP_xilxNgdbld_AUL" value="true" type="process"/>
39 <property name="PROP_xilxNgdbld_AUL" value="true" type="process"/>
38 <property name="PROP_xstBusDelimiter" value="()" type="process"/>
40 <property name="PROP_xstBusDelimiter" value="()" type="process"/>
39 <property name="PROP_xstPackIORegister" value="Yes" type="process"/>
41 <property name="PROP_xstPackIORegister" value="Yes" type="process"/>
40 <property name="PROP_xst_otherCmdLineOptions" value="-uc leon3mp.xcf" type="process"/>
42 <property name="PROP_xst_otherCmdLineOptions" value="-uc leon3mp.xcf" type="process"/>
41 <property name="PROP_AutoTop" value="false" type="design"/>
43 <property name="PROP_AutoTop" value="false" type="design"/>
42 <property name="PROP_DevFamily" value="Spartan3E" type="design"/>
44 <property name="PROP_DevFamily" value="Spartan3E" type="design"/>
43 <property name="PROP_WriteDefaultPropToSourceProject" value="false" type="process"/>
44 <property name="PROP_xilxBitgCfg_GenOpt_MaskFile" value="true" type="process"/>
45 <property name="PROP_xilxBitgCfg_GenOpt_MaskFile" value="true" type="process"/>
45 <property name="PROP_DevDevice" value="xc3s1600e" type="design"/>
46 <property name="PROP_DevDevice" value="xc3s1600e" type="design"/>
46 <property name="PROP_DevFamilyPMName" value="spartan3e" type="design"/>
47 <property name="PROP_DevFamilyPMName" value="spartan3e" type="design"/>
47 <property name="PROP_DevPackage" value="fg320" type="design"/>
48 <property name="PROP_DevPackage" value="fg320" type="design"/>
48 <property name="PROP_Synthesis_Tool" value="XST (VHDL/Verilog)" type="design"/>
49 <property name="PROP_Synthesis_Tool" value="XST (VHDL/Verilog)" type="design"/>
49 <property name="PROP_DevSpeed" value="-4" type="design"/>
50 <property name="PROP_DevSpeed" value="-4" type="design"/>
50 <property name="PROP_PreferredLanguage" value="VHDL" type="design"/>
51 <property name="PROP_PreferredLanguage" value="VHDL" type="design"/>
51 <property name="FILE_UCF" value="1" type="source"/>
52 <property name="FILE_UCF" value="1" type="source"/>
52 <property name="FILE_VHDL" value="302" type="source"/>
53 <property name="FILE_VHDL" value="302" type="source"/>
53 </section>
54 </section>
54 </application>
55 </application>
55 </document>
56 </document>
@@ -1,9 +1,9
1 amba_lcd_16x2_ctrlr.vhd
2 apb_lcd_ctrlr.vhd
1 FRAME_CLK.vhd
3 FRAME_CLK.vhd
2 LCD_16x2_CFG.vhd
4 LCD_16x2_CFG.vhd
3 LCD_16x2_DRVR.vhd
5 LCD_16x2_DRVR.vhd
4 LCD_16x2_ENGINE.vhd
6 LCD_16x2_ENGINE.vhd
5 LCD_2x16_DRIVER.vhd
7 LCD_2x16_DRIVER.vhd
6 LCD_CLK_GENERATOR.vhd
8 LCD_CLK_GENERATOR.vhd
7 Top_LCD.vhd
9 Top_LCD.vhd
8 amba_lcd_16x2_ctrlr.vhd
9 apb_lcd_ctrlr.vhd
@@ -1,192 +1,208
1 ------------------------------------------------------------------------------
1 ------------------------------------------------------------------------------
2 -- This file is a part of the LPP VHDL IP LIBRARY
2 -- This file is a part of the LPP VHDL IP LIBRARY
3 -- Copyright (C) 2009 - 2010, Laboratory of Plasmas Physic - CNRS
3 -- Copyright (C) 2009 - 2010, Laboratory of Plasmas Physic - CNRS
4 --
4 --
5 -- This program is free software; you can redistribute it and/or modify
5 -- This program is free software; you can redistribute it and/or modify
6 -- it under the terms of the GNU General Public License as published by
6 -- it under the terms of the GNU General Public License as published by
7 -- the Free Software Foundation; either version 3 of the License, or
7 -- the Free Software Foundation; either version 3 of the License, or
8 -- (at your option) any later version.
8 -- (at your option) any later version.
9 --
9 --
10 -- This program is distributed in the hope that it will be useful,
10 -- This program is distributed in the hope that it will be useful,
11 -- but WITHOUT ANY WARRANTY; without even the implied warranty of
11 -- but WITHOUT ANY WARRANTY; without even the implied warranty of
12 -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 -- GNU General Public License for more details.
13 -- GNU General Public License for more details.
14 --
14 --
15 -- You should have received a copy of the GNU General Public License
15 -- You should have received a copy of the GNU General Public License
16 -- along with this program; if not, write to the Free Software
16 -- along with this program; if not, write to the Free Software
17 -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
17 -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 -------------------------------------------------------------------------------
18 -------------------------------------------------------------------------------
19 library ieee;
19 library ieee;
20 use ieee.std_logic_1164.all;
20 use ieee.std_logic_1164.all;
21 use ieee.numeric_std.all;
21 use ieee.numeric_std.all;
22 library grlib;
22 library grlib;
23 use grlib.amba.all;
23 use grlib.amba.all;
24 use grlib.stdlib.all;
24 use grlib.stdlib.all;
25 use grlib.devices.all;
25 use grlib.devices.all;
26 library lpp;
26 library lpp;
27 use lpp.iir_filter.all;
27 use lpp.iir_filter.all;
28 use lpp.FILTERcfg.all;
29 use lpp.general_purpose.all;
28 use lpp.general_purpose.all;
30 use lpp.lpp_amba.all;
29 use lpp.lpp_amba.all;
31
30
32 entity APB_IIR_CEL is
31 entity APB_IIR_CEL is
33 generic (
32 generic (
34 pindex : integer := 0;
33 pindex : integer := 0;
35 paddr : integer := 0;
34 paddr : integer := 0;
36 pmask : integer := 16#fff#;
35 pmask : integer := 16#fff#;
37 pirq : integer := 0;
36 pirq : integer := 0;
38 abits : integer := 8;
37 abits : integer := 8;
39 Sample_SZ : integer := Smpl_SZ
38 Sample_SZ : integer := 16;
39 ChanelsCount : integer := 1;
40 Coef_SZ : integer := 9;
41 CoefCntPerCel: integer := 3;
42 Cels_count : integer := 5;
43 virgPos : integer := 3;
44 Mem_use : integer := use_RAM
40 );
45 );
41 port (
46 port (
42 rst : in std_logic;
47 rst : in std_logic;
43 clk : in std_logic;
48 clk : in std_logic;
44 apbi : in apb_slv_in_type;
49 apbi : in apb_slv_in_type;
45 apbo : out apb_slv_out_type;
50 apbo : out apb_slv_out_type;
46 sample_clk : in std_logic;
51 sample_clk : in std_logic;
47 sample_clk_out : out std_logic;
52 sample_clk_out : out std_logic;
48 sample_in : in samplT;
53 sample_in : in samplT(ChanelsCount-1 downto 0,Sample_SZ-1 downto 0);
49 sample_out : out samplT
54 sample_out : out samplT(ChanelsCount-1 downto 0,Sample_SZ-1 downto 0)
50 );
55 );
51 end;
56 end;
52
57
53
58
54 architecture AR_APB_IIR_CEL of APB_IIR_CEL is
59 architecture AR_APB_IIR_CEL of APB_IIR_CEL is
55
60
56 constant REVISION : integer := 1;
61 constant REVISION : integer := 1;
57
62
58 constant pconfig : apb_config_type := (
63 constant pconfig : apb_config_type := (
59 0 => ahb_device_reg (VENDOR_LPP, ROCKET_TM, 0, REVISION, 0),
64 0 => ahb_device_reg (VENDOR_LPP, ROCKET_TM, 0, REVISION, 0),
60 1 => apb_iobar(paddr, pmask));
65 1 => apb_iobar(paddr, pmask));
61
66
62
67
63
68
64 type FILTERreg is record
69 type FILTERreg is record
65 regin : in_IIR_CEL_reg;
70 regin : in_IIR_CEL_reg;
66 regout : out_IIR_CEL_reg;
71 regout : out_IIR_CEL_reg;
67 end record;
72 end record;
68
73
74 signal Rdata : std_logic_vector(31 downto 0);
69 signal r : FILTERreg;
75 signal r : FILTERreg;
70 signal filter_reset : std_logic:='0';
76 signal filter_reset : std_logic:='0';
71 signal smp_cnt : integer :=0;
77 signal smp_cnt : integer :=0;
72 signal sample_clk_out_R : std_logic;
78 signal sample_clk_out_R : std_logic;
79
80
81 type CoefCelT is array(CoefCntPerCel-1 downto 0) of std_logic_vector(Coef_SZ-1 downto 0);
82 type CoefTblT is array(Cels_count-1 downto 0) of CoefCelT;
83
84 type CoefsRegT is record
85 numCoefs : CoefTblT;
86 denCoefs : CoefTblT;
87 end record;
88
89 signal CoefsReg : CoefsRegT;
90
73 begin
91 begin
74
92
75 filter_reset <= rst and r.regin.config(0);
93 filter_reset <= rst and r.regin.config(0);
76 sample_clk_out <= sample_clk_out_R;
94 sample_clk_out <= sample_clk_out_R;
77
95
78 filter : IIR_CEL_FILTER
96 filter : IIR_CEL_FILTER
79 generic map(Sample_SZ => Sample_SZ)
97 generic map(Sample_SZ,ChanelsCount,Coef_SZ,CoefCntPerCel,Cels_count,Mem_use)
80 port map(
98 port map(
81 reset => filter_reset,
99 reset => filter_reset,
82 clk => clk,
100 clk => clk,
83 sample_clk => sample_clk,
101 sample_clk => sample_clk,
84 regs_in => r.regin,
102 regs_in => r.regin,
85 regs_out => r.regout,
103 regs_out => r.regout,
86 sample_in => sample_in,
104 sample_in => sample_in,
87 sample_out => sample_out
105 sample_out => sample_out
88 );
106 );
89
107
90 process(rst,sample_clk)
108 process(rst,sample_clk)
91 begin
109 begin
92 if rst = '0' then
110 if rst = '0' then
93 smp_cnt <= 0;
111 smp_cnt <= 0;
94 sample_clk_out_R <= '0';
112 sample_clk_out_R <= '0';
95 elsif sample_clk'event and sample_clk = '1' then
113 elsif sample_clk'event and sample_clk = '1' then
96 if smp_cnt = 1 then
114 if smp_cnt = 1 then
97 smp_cnt <= 0;
115 smp_cnt <= 0;
98 sample_clk_out_R <= not sample_clk_out_R;
116 sample_clk_out_R <= not sample_clk_out_R;
99 else
117 else
100 smp_cnt <= smp_cnt +1;
118 smp_cnt <= smp_cnt +1;
101 end if;
119 end if;
102 end if;
120 end if;
103 end process;
121 end process;
104
122
105
123
106 process(rst,clk)
124 process(rst,clk)
107 begin
125 begin
108 if rst = '0' then
126 if rst = '0' then
109 r.regin.coefsTB.NumCoefs <= NumCoefs_cel;
110 r.regin.coefsTB.DenCoefs <= DenCoefs_cel;
111 r.regin.virgPos <= std_logic_vector(to_unsigned(virgPos,5));
127 r.regin.virgPos <= std_logic_vector(to_unsigned(virgPos,5));
112
128
113 elsif clk'event and clk = '1' then
129 elsif clk'event and clk = '1' then
114
130
115
131
116 --APB Write OP
132 --APB Write OP
117 if (apbi.psel(pindex) and apbi.penable and apbi.pwrite) = '1' then
133 if (apbi.psel(pindex) and apbi.penable and apbi.pwrite) = '1' then
118 case apbi.paddr(7 downto 2) is
134 case apbi.paddr(7 downto 2) is
119 when "000000" =>
135 when "000000" =>
120 r.regin.config(0) <= apbi.pwdata(0);
136 r.regin.config(0) <= apbi.pwdata(0);
121 when "000001" =>
137 when "000001" =>
122 r.regin.virgPos <= apbi.pwdata(4 downto 0);
138 r.regin.virgPos <= apbi.pwdata(4 downto 0);
123 when others =>
139 when others =>
124 for i in 0 to Cels_count-1 loop
140 for i in 0 to Cels_count-1 loop
125 if conv_integer(apbi.paddr(7 downto 5)) = i+1 then
141 if conv_integer(apbi.paddr(7 downto 5)) = i+1 then
126 case apbi.paddr(4 downto 2) is
142 case apbi.paddr(4 downto 2) is
127 when "000" =>
143 when "000" =>
128 r.regin.coefsTB.NumCoefs(i)(0) <= coefT(apbi.pwdata(Coef_SZ-1 downto 0));
144 CoefsReg.numCoefs(i)(0) <= (apbi.pwdata(Coef_SZ-1 downto 0));
129 when "001" =>
145 when "001" =>
130 r.regin.coefsTB.NumCoefs(i)(1) <= coefT(apbi.pwdata(Coef_SZ-1 downto 0));
146 CoefsReg.numCoefs(i)(1) <= (apbi.pwdata(Coef_SZ-1 downto 0));
131 when "010" =>
147 when "010" =>
132 r.regin.coefsTB.NumCoefs(i)(2) <= coefT(apbi.pwdata(Coef_SZ-1 downto 0));
148 CoefsReg.numCoefs(i)(2) <= (apbi.pwdata(Coef_SZ-1 downto 0));
133 when "011" =>
149 when "011" =>
134 r.regin.coefsTB.DenCoefs(i)(0) <= coefT(apbi.pwdata(Coef_SZ-1 downto 0));
150 CoefsReg.denCoefs(i)(0) <= (apbi.pwdata(Coef_SZ-1 downto 0));
135 when "100" =>
151 when "100" =>
136 r.regin.coefsTB.DenCoefs(i)(1) <= coefT(apbi.pwdata(Coef_SZ-1 downto 0));
152 CoefsReg.denCoefs(i)(1) <= (apbi.pwdata(Coef_SZ-1 downto 0));
137 when "101" =>
153 when "101" =>
138 r.regin.coefsTB.DenCoefs(i)(2) <= coefT(apbi.pwdata(Coef_SZ-1 downto 0));
154 CoefsReg.denCoefs(i)(2) <= (apbi.pwdata(Coef_SZ-1 downto 0));
139 when others =>
155 when others =>
140 end case;
156 end case;
141 end if;
157 end if;
142 end loop;
158 end loop;
143 end case;
159 end case;
144 end if;
160 end if;
145
161
146 --APB READ OP
162 --APB READ OP
147 if (apbi.psel(pindex) and apbi.penable and (not apbi.pwrite)) = '1' then
163 if (apbi.psel(pindex) and (not apbi.pwrite)) = '1' then
148 case apbi.paddr(7 downto 2) is
164 case apbi.paddr(7 downto 2) is
149 when "000000" =>
165 when "000000" =>
150
166
151 when "000001" =>
167 when "000001" =>
152 apbo.prdata(4 downto 0) <= r.regin.virgPos;
168 Rdata(4 downto 0) <= r.regin.virgPos;
153 when others =>
169 when others =>
154 for i in 0 to Cels_count-1 loop
170 for i in 0 to Cels_count-1 loop
155 if conv_integer(apbi.paddr(7 downto 5)) = i+1 then
171 if conv_integer(apbi.paddr(7 downto 5)) = i+1 then
156 case apbi.paddr(4 downto 2) is
172 case apbi.paddr(4 downto 2) is
157 when "000" =>
173 when "000" =>
158 apbo.prdata(Coef_SZ-1 downto 0) <= std_logic_vector(r.regin.coefsTB.NumCoefs(i)(0));
174 Rdata(Coef_SZ-1 downto 0) <= std_logic_vector(CoefsReg.numCoefs(i)(0));
159 when "001" =>
175 when "001" =>
160 apbo.prdata(Coef_SZ-1 downto 0) <= std_logic_vector(r.regin.coefsTB.NumCoefs(i)(1));
176 Rdata(Coef_SZ-1 downto 0) <= std_logic_vector(CoefsReg.numCoefs(i)(1));
161 when "010" =>
177 when "010" =>
162 apbo.prdata(Coef_SZ-1 downto 0) <= std_logic_vector(r.regin.coefsTB.NumCoefs(i)(2));
178 Rdata(Coef_SZ-1 downto 0) <= std_logic_vector(CoefsReg.numCoefs(i)(2));
163 when "011" =>
179 when "011" =>
164 apbo.prdata(Coef_SZ-1 downto 0) <= std_logic_vector(r.regin.coefsTB.DenCoefs(i)(0));
180 Rdata(Coef_SZ-1 downto 0) <= std_logic_vector(CoefsReg.denCoefs(i)(0));
165 when "100" =>
181 when "100" =>
166 apbo.prdata(Coef_SZ-1 downto 0) <= std_logic_vector(r.regin.coefsTB.DenCoefs(i)(1));
182 Rdata(Coef_SZ-1 downto 0) <= std_logic_vector(CoefsReg.denCoefs(i)(1));
167 when "101" =>
183 when "101" =>
168 apbo.prdata(Coef_SZ-1 downto 0) <= std_logic_vector(r.regin.coefsTB.DenCoefs(i)(2));
184 Rdata(Coef_SZ-1 downto 0) <= std_logic_vector(CoefsReg.denCoefs(i)(2));
169 when others =>
185 when others =>
170 end case;
186 end case;
171 end if;
187 end if;
172 end loop;
188 end loop;
173 end case;
189 end case;
174 end if;
190 end if;
175
191
176 end if;
192 end if;
177 apbo.pconfig <= pconfig;
193 apbo.pconfig <= pconfig;
178 end process;
194 end process;
179
195
180
196 apbo.prdata <= Rdata when apbi.penable = '1' ;
181
197
182 -- pragma translate_off
198 -- pragma translate_off
183 bootmsg : report_version
199 bootmsg : report_version
184 generic map ("apbuart" & tost(pindex) &
200 generic map ("apbuart" & tost(pindex) &
185 ": Generic UART rev " & tost(REVISION) & ", fifo " & tost(fifosize) &
201 ": Generic UART rev " & tost(REVISION) & ", fifo " & tost(fifosize) &
186 ", irq " & tost(pirq));
202 ", irq " & tost(pirq));
187 -- pragma translate_on
203 -- pragma translate_on
188
204
189
205
190
206
191 end ar_APB_IIR_CEL;
207 end ar_APB_IIR_CEL;
192
208
@@ -1,101 +1,104
1 ------------------------------------------------------------------------------
1 ------------------------------------------------------------------------------
2 -- This file is a part of the LPP VHDL IP LIBRARY
2 -- This file is a part of the LPP VHDL IP LIBRARY
3 -- Copyright (C) 2009 - 2010, Laboratory of Plasmas Physic - CNRS
3 -- Copyright (C) 2009 - 2010, Laboratory of Plasmas Physic - CNRS
4 --
4 --
5 -- This program is free software; you can redistribute it and/or modify
5 -- This program is free software; you can redistribute it and/or modify
6 -- it under the terms of the GNU General Public License as published by
6 -- it under the terms of the GNU General Public License as published by
7 -- the Free Software Foundation; either version 3 of the License, or
7 -- the Free Software Foundation; either version 3 of the License, or
8 -- (at your option) any later version.
8 -- (at your option) any later version.
9 --
9 --
10 -- This program is distributed in the hope that it will be useful,
10 -- This program is distributed in the hope that it will be useful,
11 -- but WITHOUT ANY WARRANTY; without even the implied warranty of
11 -- but WITHOUT ANY WARRANTY; without even the implied warranty of
12 -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 -- GNU General Public License for more details.
13 -- GNU General Public License for more details.
14 --
14 --
15 -- You should have received a copy of the GNU General Public License
15 -- You should have received a copy of the GNU General Public License
16 -- along with this program; if not, write to the Free Software
16 -- along with this program; if not, write to the Free Software
17 -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
17 -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 -------------------------------------------------------------------------------
18 -------------------------------------------------------------------------------
19 library IEEE;
19 library IEEE;
20 use IEEE.numeric_std.all;
20 use IEEE.numeric_std.all;
21 use IEEE.std_logic_1164.all;
21 use IEEE.std_logic_1164.all;
22 library lpp;
22 library lpp;
23 use lpp.iir_filter.all;
23 use lpp.iir_filter.all;
24 use lpp.FILTERcfg.all;
24 use lpp.FILTERcfg.all;
25 use lpp.general_purpose.all;
25 use lpp.general_purpose.all;
26 --Maximum filter speed(smps/s) = Fclk/(Nchanels*Ncoefs)
26 --Maximum filter speed(smps/s) = Fclk/(Nchanels*Ncoefs)
27 --exemple 26MHz sys clock and 6 chanels @ 110ksmps/s
27 --exemple 26MHz sys clock and 6 chanels @ 110ksmps/s
28 --Ncoefs = 26 000 000 /(6 * 110 000) = 39 coefs
28 --Ncoefs = 26 000 000 /(6 * 110 000) = 39 coefs
29
29
30 entity FILTER is
30 entity FILTER is
31 generic(Smpl_SZ : integer := 16;
32 ChanelsCNT : integer := 3
33 );
31 port(
34 port(
32
35
33 reset : in std_logic;
36 reset : in std_logic;
34 clk : in std_logic;
37 clk : in std_logic;
35 sample_clk : in std_logic;
38 sample_clk : in std_logic;
36 Sample_IN : in std_logic_vector(Smpl_SZ*ChanelsCNT-1 downto 0);
39 Sample_IN : in std_logic_vector(Smpl_SZ*ChanelsCNT-1 downto 0);
37 Sample_OUT : out std_logic_vector(Smpl_SZ*ChanelsCNT-1 downto 0)
40 Sample_OUT : out std_logic_vector(Smpl_SZ*ChanelsCNT-1 downto 0)
38 );
41 );
39 end entity;
42 end entity;
40
43
41
44
42
45
43
46
44
47
45 architecture ar_FILTER of FILTER is
48 architecture ar_FILTER of FILTER is
46
49
47
50
48
51
49
52
50 signal ALU_ctrl : std_logic_vector(3 downto 0);
53 signal ALU_ctrl : std_logic_vector(3 downto 0);
51 signal Sample : std_logic_vector(Smpl_SZ-1 downto 0);
54 signal Sample : std_logic_vector(Smpl_SZ-1 downto 0);
52 signal Coef : std_logic_vector(Coef_SZ-1 downto 0);
55 signal Coef : std_logic_vector(Coef_SZ-1 downto 0);
53 signal ALU_OUT : std_logic_vector(Smpl_SZ+Coef_SZ-1 downto 0);
56 signal ALU_OUT : std_logic_vector(Smpl_SZ+Coef_SZ-1 downto 0);
54
57
55 begin
58 begin
56
59
57 --==============================================================
60 --==============================================================
58 --=========================A L U================================
61 --=========================A L U================================
59 --==============================================================
62 --==============================================================
60 ALU1 : entity ALU
63 ALU1 : entity ALU
61 generic map(
64 generic map(
62 Arith_en => 1,
65 Arith_en => 1,
63 Logic_en => 0,
66 Logic_en => 0,
64 Input_SZ_1 => Smpl_SZ,
67 Input_SZ_1 => Smpl_SZ,
65 Input_SZ_2 => Coef_SZ
68 Input_SZ_2 => Coef_SZ
66
69
67 )
70 )
68 port map(
71 port map(
69 clk => clk,
72 clk => clk,
70 reset => reset,
73 reset => reset,
71 ctrl => ALU_ctrl,
74 ctrl => ALU_ctrl,
72 OP1 => Sample,
75 OP1 => Sample,
73 OP2 => Coef,
76 OP2 => Coef,
74 RES => ALU_OUT
77 RES => ALU_OUT
75 );
78 );
76 --==============================================================
79 --==============================================================
77
80
78 --==============================================================
81 --==============================================================
79 --===============F I L T E R C O N T R O L E R================
82 --===============F I L T E R C O N T R O L E R================
80 --==============================================================
83 --==============================================================
81 filterctrlr1 : FilterCTRLR
84 filterctrlr1 : FilterCTRLR
82 port map(
85 port map(
83 reset => reset,
86 reset => reset,
84 clk => clk,
87 clk => clk,
85 sample_clk => sample_clk,
88 sample_clk => sample_clk,
86 ALU_Ctrl => ALU_ctrl,
89 ALU_Ctrl => ALU_ctrl,
87 sample_in => sample_Tbl,
90 sample_in => sample_Tbl,
88 coef => Coef,
91 coef => Coef,
89 sample => Sample
92 sample => Sample
90 );
93 );
91 --==============================================================
94 --==============================================================
92
95
93 chanelCut : for i in 0 to ChanelsCNT-1 generate
96 chanelCut : for i in 0 to ChanelsCNT-1 generate
94 sample_Tbl(i) <= Sample_IN((i+1)*Smpl_SZ-1 downto i*Smpl_SZ);
97 sample_Tbl(i) <= Sample_IN((i+1)*Smpl_SZ-1 downto i*Smpl_SZ);
95 end generate;
98 end generate;
96
99
97
100
98
101
99
102
100 end ar_FILTER;
103 end ar_FILTER;
101
104
@@ -1,241 +1,193
1 ------------------------------------------------------------------------------
1 ------------------------------------------------------------------------------
2 -- This file is a part of the LPP VHDL IP LIBRARY
2 -- This file is a part of the LPP VHDL IP LIBRARY
3 -- Copyright (C) 2009 - 2010, Laboratory of Plasmas Physic - CNRS
3 -- Copyright (C) 2009 - 2010, Laboratory of Plasmas Physic - CNRS
4 --
4 --
5 -- This program is free software; you can redistribute it and/or modify
5 -- This program is free software; you can redistribute it and/or modify
6 -- it under the terms of the GNU General Public License as published by
6 -- it under the terms of the GNU General Public License as published by
7 -- the Free Software Foundation; either version 3 of the License, or
7 -- the Free Software Foundation; either version 3 of the License, or
8 -- (at your option) any later version.
8 -- (at your option) any later version.
9 --
9 --
10 -- This program is distributed in the hope that it will be useful,
10 -- This program is distributed in the hope that it will be useful,
11 -- but WITHOUT ANY WARRANTY; without even the implied warranty of
11 -- but WITHOUT ANY WARRANTY; without even the implied warranty of
12 -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 -- GNU General Public License for more details.
13 -- GNU General Public License for more details.
14 --
14 --
15 -- You should have received a copy of the GNU General Public License
15 -- You should have received a copy of the GNU General Public License
16 -- along with this program; if not, write to the Free Software
16 -- along with this program; if not, write to the Free Software
17 -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
17 -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 -------------------------------------------------------------------------------
18 -------------------------------------------------------------------------------
19 library IEEE;
19 library IEEE;
20 use IEEE.numeric_std.all;
20 use IEEE.numeric_std.all;
21 use IEEE.std_logic_1164.all;
21 use IEEE.std_logic_1164.all;
22
22
23
23
24 package FILTERcfg is
24 package FILTERcfg is
25
25
26
26
27 --===========================================================|
28 --================A L U C O N T R O L======================|
29 --===========================================================|
30 constant IDLE : std_logic_vector(3 downto 0) := "0000";
31 constant MAC_op : std_logic_vector(3 downto 0) := "0001";
32 constant MULT : std_logic_vector(3 downto 0) := "0010";
33 constant ADD : std_logic_vector(3 downto 0) := "0011";
34 constant clr_mac : std_logic_vector(3 downto 0) := "0100";
35
27
36
28
37 --===========================================================|
29 --===========================================================|
38 --========F I L T E R C O N F I G V A L U E S=============|
30 --========F I L T E R C O N F I G V A L U E S=============|
39 --===========================================================|
31 --===========================================================|
40 --____________________________
32 --____________________________
41 --Bus Width and chanels number|
33 --Bus Width and chanels number|
42 --____________________________|
34 --____________________________|
43 constant ChanelsCNT : integer := 6;
35 constant ChanelsCNT : integer := 6;
44 constant Smpl_SZ : integer := 16;
36 constant Smpl_SZ : integer := 16;
45 constant Coef_SZ : integer := 9;
37 constant Coef_SZ : integer := 9;
46 constant Scalefac_SZ: integer := 3;
38 constant Scalefac_SZ: integer := 3;
47 constant Cels_count : integer := 5;
39 constant Cels_count : integer := 5;
48 --____
49 --RAM |
50 --____|
51 constant use_RAM : integer := 1;
52 constant use_CEL : integer := 0;
53
40
54 constant Mem_use : integer := 1;
41 constant Mem_use : integer := 1;
55
42
56 --===========================================================|
57 --=============C O E F S ====================================|
58 --===========================================================|
59 -- create a specific type of data for coefs to avoid errors |
60 --===========================================================|
61
62 type coefT is array(Coef_SZ-1 downto 0) of std_logic;
63 type scaleValT is array(natural range <>) of integer;
64
65 type coef_celT is array(0 to 2) of coefT;
66
67 type coefsT is array(natural range <>) of coefT ;
68
69 type coefs_celT is array(natural range <>) of coef_celT;
70
71 type samplT is array(ChanelsCNT-1 downto 0) of std_logic_vector(Smpl_SZ-1 downto 0);
72
73
74
75
76 type coefs_celsT is record
77 NumCoefs : coefs_celT(0 to Cels_count-1);
78 DenCoefs : coefs_celT(0 to Cels_count-1);
79 end record;
80
81
82 type in_IIR_CEL_reg is record
83 config : std_logic_vector(31 downto 0);
84 coefsTB : coefs_celsT;
85 virgPos : std_logic_vector(4 downto 0);
86 end record;
87 type out_IIR_CEL_reg is record
88 config : std_logic_vector(31 downto 0);
89 status : std_logic_vector(31 downto 0);
90 end record;
91
43
92
44
93 --============================================================
45 --============================================================
94 -- create each initial values for each coefs ============
46 -- create each initial values for each coefs ============
95 --!!!!!!!!!!It should be interfaced with a software !!!!!!!!!!
47 --!!!!!!!!!!It should be interfaced with a software !!!!!!!!!!
96 --============================================================
48 --============================================================
97 constant b0 : coefT := coefT(TO_SIGNED(-30,Coef_SZ));
49 --constant b0 : coefT := coefT(TO_SIGNED(-30,Coef_SZ));
98 constant b1 : coefT := coefT(TO_SIGNED(-81,Coef_SZ));
50 --constant b1 : coefT := coefT(TO_SIGNED(-81,Coef_SZ));
99 constant b2 : coefT := coefT(TO_SIGNED(-153,Coef_SZ));
51 --constant b2 : coefT := coefT(TO_SIGNED(-153,Coef_SZ));
100 constant b3 : coefT := coefT(TO_SIGNED(-171,Coef_SZ));
52 --constant b3 : coefT := coefT(TO_SIGNED(-171,Coef_SZ));
101 constant b4 : coefT := coefT(TO_SIGNED(-144,Coef_SZ));
53 --constant b4 : coefT := coefT(TO_SIGNED(-144,Coef_SZ));
102 constant b5 : coefT := coefT(TO_SIGNED(-72,Coef_SZ));
54 --constant b5 : coefT := coefT(TO_SIGNED(-72,Coef_SZ));
103 constant b6 : coefT := coefT(TO_SIGNED(-25,Coef_SZ));
55 --constant b6 : coefT := coefT(TO_SIGNED(-25,Coef_SZ));
104
56 --
105 constant a0 : coefT := coefT(TO_SIGNED(-128,Coef_SZ));
57 --constant a0 : coefT := coefT(TO_SIGNED(-128,Coef_SZ));
106 constant a1 : coefT := coefT(TO_SIGNED(87,Coef_SZ));
58 --constant a1 : coefT := coefT(TO_SIGNED(87,Coef_SZ));
107 constant a2 : coefT := coefT(TO_SIGNED(-193,Coef_SZ));
59 --constant a2 : coefT := coefT(TO_SIGNED(-193,Coef_SZ));
108 constant a3 : coefT := coefT(TO_SIGNED(60,Coef_SZ));
60 --constant a3 : coefT := coefT(TO_SIGNED(60,Coef_SZ));
109 constant a4 : coefT := coefT(TO_SIGNED(-62,Coef_SZ));
61 --constant a4 : coefT := coefT(TO_SIGNED(-62,Coef_SZ));
110
62 --
111
63 --
112 constant b0_0 : coefT := coefT(TO_SIGNED(58,Coef_SZ));
64 --constant b0_0 : coefT := coefT(TO_SIGNED(58,Coef_SZ));
113 constant b0_1 : coefT := coefT(TO_SIGNED(-66,Coef_SZ));
65 --constant b0_1 : coefT := coefT(TO_SIGNED(-66,Coef_SZ));
114 constant b0_2 : coefT := coefT(TO_SIGNED(58,Coef_SZ));
66 --constant b0_2 : coefT := coefT(TO_SIGNED(58,Coef_SZ));
115
67 --
116 constant b1_0 : coefT := coefT(TO_SIGNED(58,Coef_SZ));
68 --constant b1_0 : coefT := coefT(TO_SIGNED(58,Coef_SZ));
117 constant b1_1 : coefT := coefT(TO_SIGNED(-57,Coef_SZ));
69 --constant b1_1 : coefT := coefT(TO_SIGNED(-57,Coef_SZ));
118 constant b1_2 : coefT := coefT(TO_SIGNED(58,Coef_SZ));
70 --constant b1_2 : coefT := coefT(TO_SIGNED(58,Coef_SZ));
119
71 --
120 constant b2_0 : coefT := coefT(TO_SIGNED(29,Coef_SZ));
72 --constant b2_0 : coefT := coefT(TO_SIGNED(29,Coef_SZ));
121 constant b2_1 : coefT := coefT(TO_SIGNED(-17,Coef_SZ));
73 --constant b2_1 : coefT := coefT(TO_SIGNED(-17,Coef_SZ));
122 constant b2_2 : coefT := coefT(TO_SIGNED(29,Coef_SZ));
74 --constant b2_2 : coefT := coefT(TO_SIGNED(29,Coef_SZ));
123
75 --
124 constant b3_0 : coefT := coefT(TO_SIGNED(15,Coef_SZ));
76 --constant b3_0 : coefT := coefT(TO_SIGNED(15,Coef_SZ));
125 constant b3_1 : coefT := coefT(TO_SIGNED(4,Coef_SZ));
77 --constant b3_1 : coefT := coefT(TO_SIGNED(4,Coef_SZ));
126 constant b3_2 : coefT := coefT(TO_SIGNED(15,Coef_SZ));
78 --constant b3_2 : coefT := coefT(TO_SIGNED(15,Coef_SZ));
127
79 --
128 constant b4_0 : coefT := coefT(TO_SIGNED(15,Coef_SZ));
80 --constant b4_0 : coefT := coefT(TO_SIGNED(15,Coef_SZ));
129 constant b4_1 : coefT := coefT(TO_SIGNED(24,Coef_SZ));
81 --constant b4_1 : coefT := coefT(TO_SIGNED(24,Coef_SZ));
130 constant b4_2 : coefT := coefT(TO_SIGNED(15,Coef_SZ));
82 --constant b4_2 : coefT := coefT(TO_SIGNED(15,Coef_SZ));
131
83 --
132 constant b5_0 : coefT := coefT(TO_SIGNED(-81,Coef_SZ));
84 --constant b5_0 : coefT := coefT(TO_SIGNED(-81,Coef_SZ));
133 constant b5_1 : coefT := coefT(TO_SIGNED(-153,Coef_SZ));
85 --constant b5_1 : coefT := coefT(TO_SIGNED(-153,Coef_SZ));
134 constant b5_2 : coefT := coefT(TO_SIGNED(-171,Coef_SZ));
86 --constant b5_2 : coefT := coefT(TO_SIGNED(-171,Coef_SZ));
135
87 --
136 constant b6_0 : coefT := coefT(TO_SIGNED(-144,Coef_SZ));
88 --constant b6_0 : coefT := coefT(TO_SIGNED(-144,Coef_SZ));
137 constant b6_1 : coefT := coefT(TO_SIGNED(-72,Coef_SZ));
89 --constant b6_1 : coefT := coefT(TO_SIGNED(-72,Coef_SZ));
138 constant b6_2 : coefT := coefT(TO_SIGNED(-25,Coef_SZ));
90 --constant b6_2 : coefT := coefT(TO_SIGNED(-25,Coef_SZ));
139
91 --
140
92 --
141 constant a0_0 : coefT := coefT(TO_SIGNED(-128,Coef_SZ));
93 --constant a0_0 : coefT := coefT(TO_SIGNED(-128,Coef_SZ));
142 constant a0_1 : coefT := coefT(TO_SIGNED(189,Coef_SZ));
94 --constant a0_1 : coefT := coefT(TO_SIGNED(189,Coef_SZ));
143 constant a0_2 : coefT := coefT(TO_SIGNED(-111,Coef_SZ));
95 --constant a0_2 : coefT := coefT(TO_SIGNED(-111,Coef_SZ));
144
96 --
145 constant a1_0 : coefT := coefT(TO_SIGNED(-128,Coef_SZ));
97 --constant a1_0 : coefT := coefT(TO_SIGNED(-128,Coef_SZ));
146 constant a1_1 : coefT := coefT(TO_SIGNED(162,Coef_SZ));
98 --constant a1_1 : coefT := coefT(TO_SIGNED(162,Coef_SZ));
147 constant a1_2 : coefT := coefT(TO_SIGNED(-81,Coef_SZ));
99 --constant a1_2 : coefT := coefT(TO_SIGNED(-81,Coef_SZ));
148
100 --
149 constant a2_0 : coefT := coefT(TO_SIGNED(-128,Coef_SZ));
101 --constant a2_0 : coefT := coefT(TO_SIGNED(-128,Coef_SZ));
150 constant a2_1 : coefT := coefT(TO_SIGNED(136,Coef_SZ));
102 --constant a2_1 : coefT := coefT(TO_SIGNED(136,Coef_SZ));
151 constant a2_2 : coefT := coefT(TO_SIGNED(-55,Coef_SZ));
103 --constant a2_2 : coefT := coefT(TO_SIGNED(-55,Coef_SZ));
152
104 --
153 constant a3_0 : coefT := coefT(TO_SIGNED(-128,Coef_SZ));
105 --constant a3_0 : coefT := coefT(TO_SIGNED(-128,Coef_SZ));
154 constant a3_1 : coefT := coefT(TO_SIGNED(114,Coef_SZ));
106 --constant a3_1 : coefT := coefT(TO_SIGNED(114,Coef_SZ));
155 constant a3_2 : coefT := coefT(TO_SIGNED(-33,Coef_SZ));
107 --constant a3_2 : coefT := coefT(TO_SIGNED(-33,Coef_SZ));
156
108 --
157 constant a4_0 : coefT := coefT(TO_SIGNED(-128,Coef_SZ));
109 --constant a4_0 : coefT := coefT(TO_SIGNED(-128,Coef_SZ));
158 constant a4_1 : coefT := coefT(TO_SIGNED(100,Coef_SZ));
110 --constant a4_1 : coefT := coefT(TO_SIGNED(100,Coef_SZ));
159 constant a4_2 : coefT := coefT(TO_SIGNED(-20,Coef_SZ));
111 --constant a4_2 : coefT := coefT(TO_SIGNED(-20,Coef_SZ));
160
112 --
161 constant a5_0 : coefT := coefT(TO_SIGNED(60,Coef_SZ));
113 --constant a5_0 : coefT := coefT(TO_SIGNED(60,Coef_SZ));
162 constant a5_1 : coefT := coefT(TO_SIGNED(-128,Coef_SZ));
114 --constant a5_1 : coefT := coefT(TO_SIGNED(-128,Coef_SZ));
163 constant a5_2 : coefT := coefT(TO_SIGNED(87,Coef_SZ));
115 --constant a5_2 : coefT := coefT(TO_SIGNED(87,Coef_SZ));
164 constant a6_0 : coefT := coefT(TO_SIGNED(60,Coef_SZ));
116 --constant a6_0 : coefT := coefT(TO_SIGNED(60,Coef_SZ));
165 constant a6_1 : coefT := coefT(TO_SIGNED(-128,Coef_SZ));
117 --constant a6_1 : coefT := coefT(TO_SIGNED(-128,Coef_SZ));
166 constant a6_2 : coefT := coefT(TO_SIGNED(87,Coef_SZ));
118 --constant a6_2 : coefT := coefT(TO_SIGNED(87,Coef_SZ));
167
119 --
168
120 --
169 constant celb0 : coef_celT := (b0_0,b0_1,b0_2);
121 --constant celb0 : coef_celT := (b0_0,b0_1,b0_2);
170 constant celb1 : coef_celT := (b1_0,b1_1,b1_2);
122 --constant celb1 : coef_celT := (b1_0,b1_1,b1_2);
171 constant celb2 : coef_celT := (b2_0,b2_1,b2_2);
123 --constant celb2 : coef_celT := (b2_0,b2_1,b2_2);
172 constant celb3 : coef_celT := (b3_0,b3_1,b3_2);
124 --constant celb3 : coef_celT := (b3_0,b3_1,b3_2);
173 constant celb4 : coef_celT := (b4_0,b4_1,b4_2);
125 --constant celb4 : coef_celT := (b4_0,b4_1,b4_2);
174 constant celb5 : coef_celT := (b5_0,b5_1,b5_2);
126 --constant celb5 : coef_celT := (b5_0,b5_1,b5_2);
175 constant celb6 : coef_celT := (b6_0,b6_1,b6_2);
127 --constant celb6 : coef_celT := (b6_0,b6_1,b6_2);
176
128 --
177 constant cela0 : coef_celT := (a0_0,a0_1,a0_2);
129 --constant cela0 : coef_celT := (a0_0,a0_1,a0_2);
178 constant cela1 : coef_celT := (a1_0,a1_1,a1_2);
130 --constant cela1 : coef_celT := (a1_0,a1_1,a1_2);
179 constant cela2 : coef_celT := (a2_0,a2_1,a2_2);
131 --constant cela2 : coef_celT := (a2_0,a2_1,a2_2);
180 constant cela3 : coef_celT := (a3_0,a3_1,a3_2);
132 --constant cela3 : coef_celT := (a3_0,a3_1,a3_2);
181 constant cela4 : coef_celT := (a4_0,a4_1,a4_2);
133 --constant cela4 : coef_celT := (a4_0,a4_1,a4_2);
182 constant cela5 : coef_celT := (a5_0,a5_1,a5_2);
134 --constant cela5 : coef_celT := (a5_0,a5_1,a5_2);
183 constant cela6 : coef_celT := (a6_0,a6_1,a6_2);
135 --constant cela6 : coef_celT := (a6_0,a6_1,a6_2);
184
136 --
185
137 --
186
138 --
187 constant NumCoefs_cel : coefs_celT(0 to Cels_count-1) := (celb0,celb1,celb2,celb3,celb4);
139 --constant NumCoefs_cel : coefs_celT(0 to Cels_count-1) := (celb0,celb1,celb2,celb3,celb4);
188 constant DenCoefs_cel : coefs_celT(0 to Cels_count-1) := (cela0,cela1,cela2,cela3,cela4);
140 --constant DenCoefs_cel : coefs_celT(0 to Cels_count-1) := (cela0,cela1,cela2,cela3,cela4);
189 constant virgPos : integer := 7;
141 --constant virgPos : integer := 7;
190
142 --
191
143 --
192
144 --
193
145 --
194
146 --
195
147 --
196
148 --
197 signal NumeratorCoefs : coefsT(0 to 6) := (b0,b1,b2,b3,b4,b5,b6);
149 --signal NumeratorCoefs : coefsT(0 to 6) := (b0,b1,b2,b3,b4,b5,b6);
198 signal DenominatorCoefs : coefsT(0 to 4) := (a0,a1,a2,a3,a4);
150 --signal DenominatorCoefs : coefsT(0 to 4) := (a0,a1,a2,a3,a4);
199
151 --
200
152 --
201 signal sample_Tbl : samplT;
153 --signal sample_Tbl : samplT;
202
154
203
155
204 end;
156 end;
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@@ -1,296 +1,327
1 ------------------------------------------------------------------------------
1 ------------------------------------------------------------------------------
2 -- This file is a part of the LPP VHDL IP LIBRARY
2 -- This file is a part of the LPP VHDL IP LIBRARY
3 -- Copyright (C) 2009 - 2010, Laboratory of Plasmas Physic - CNRS
3 -- Copyright (C) 2009 - 2010, Laboratory of Plasmas Physic - CNRS
4 --
4 --
5 -- This program is free software; you can redistribute it and/or modify
5 -- This program is free software; you can redistribute it and/or modify
6 -- it under the terms of the GNU General Public License as published by
6 -- it under the terms of the GNU General Public License as published by
7 -- the Free Software Foundation; either version 3 of the License, or
7 -- the Free Software Foundation; either version 3 of the License, or
8 -- (at your option) any later version.
8 -- (at your option) any later version.
9 --
9 --
10 -- This program is distributed in the hope that it will be useful,
10 -- This program is distributed in the hope that it will be useful,
11 -- but WITHOUT ANY WARRANTY; without even the implied warranty of
11 -- but WITHOUT ANY WARRANTY; without even the implied warranty of
12 -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 -- GNU General Public License for more details.
13 -- GNU General Public License for more details.
14 --
14 --
15 -- You should have received a copy of the GNU General Public License
15 -- You should have received a copy of the GNU General Public License
16 -- along with this program; if not, write to the Free Software
16 -- along with this program; if not, write to the Free Software
17 -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
17 -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 -------------------------------------------------------------------------------
18 -------------------------------------------------------------------------------
19 ------------------------------------------------------------------------------
19 ------------------------------------------------------------------------------
20 -- This file is a part of the LPP VHDL IP LIBRARY
20 -- This file is a part of the LPP VHDL IP LIBRARY
21 -- Copyright (C) 2009 - 2010, Laboratory of Plasmas Physic - CNRS
21 -- Copyright (C) 2009 - 2010, Laboratory of Plasmas Physic - CNRS
22 --
22 --
23
23 library IEEE;
24 library IEEE;
24 use IEEE.numeric_std.all;
25 use IEEE.numeric_std.all;
25 use IEEE.std_logic_1164.all;
26 use IEEE.std_logic_1164.all;
26 library lpp;
27 library lpp;
27 use lpp.iir_filter.all;
28 use lpp.iir_filter.all;
28 use lpp.FILTERcfg.all;
29 use lpp.general_purpose.all;
29 use lpp.general_purpose.all;
30
30
31 --TODO am�liorer la gestion de la RAM et de la flexibilit� du filtre
31 --TODO amliorer la gestion de la RAM et de la flexibilit du filtre
32
32
33 entity IIR_CEL_CTRLR is
33 entity IIR_CEL_CTRLR is
34 generic(Sample_SZ : integer := 16);
34 generic(Sample_SZ : integer := 16;
35 ChanelsCount : integer := 1;
36 Coef_SZ : integer := 9;
37 CoefCntPerCel: integer := 3;
38 Cels_count : integer := 5;
39 Mem_use : integer := use_RAM
40 );
35 port(
41 port(
36 reset : in std_logic;
42 reset : in std_logic;
37 clk : in std_logic;
43 clk : in std_logic;
38 sample_clk : in std_logic;
44 sample_clk : in std_logic;
39 sample_in : in samplT;
45 sample_in : in samplT(ChanelsCount-1 downto 0,Sample_SZ-1 downto 0);
40 sample_out : out samplT;
46 sample_out : out samplT(ChanelsCount-1 downto 0,Sample_SZ-1 downto 0);
41 virg_pos : in integer;
47 virg_pos : in integer;
42 coefs : in coefs_celsT
48 coefs : in std_logic_vector(Coef_SZ*CoefCntPerCel*Cels_count-1 downto 0)
43 );
49 );
44 end IIR_CEL_CTRLR;
50 end IIR_CEL_CTRLR;
45
51
46
52
47
53
48
54
49 architecture ar_IIR_CEL_CTRLR of IIR_CEL_CTRLR is
55 architecture ar_IIR_CEL_CTRLR of IIR_CEL_CTRLR is
50
56
57 subtype sampleVect is std_logic_vector(Sample_SZ-1 downto 0);
58
51 signal smpl_clk_old : std_logic := '0';
59 signal smpl_clk_old : std_logic := '0';
52 signal WD_sel : std_logic := '0';
60 signal WD_sel : std_logic := '0';
53 signal Read : std_logic := '0';
61 signal Read : std_logic := '0';
54 signal SVG_ADDR : std_logic := '0';
62 signal SVG_ADDR : std_logic := '0';
55 signal count : std_logic := '0';
63 signal count : std_logic := '0';
56 signal Write : std_logic := '0';
64 signal Write : std_logic := '0';
57 signal WADDR_sel : std_logic := '0';
65 signal WADDR_sel : std_logic := '0';
58 signal GO_0 : std_logic := '0';
66 signal GO_0 : std_logic := '0';
59
67
60 signal RAM_sample_in : std_logic_vector(Sample_SZ-1 downto 0);
68 signal RAM_sample_in : sampleVect;
61 signal RAM_sample_in_bk: std_logic_vector(Sample_SZ-1 downto 0);
69 signal RAM_sample_in_bk: sampleVect;
62 signal RAM_sample_out : std_logic_vector(Sample_SZ-1 downto 0);
70 signal RAM_sample_out : sampleVect;
63 signal ALU_ctrl : std_logic_vector(3 downto 0);
71 signal ALU_ctrl : std_logic_vector(3 downto 0);
64 signal ALU_sample_in : std_logic_vector(Sample_SZ-1 downto 0);
72 signal ALU_sample_in : sampleVect;
65 signal ALU_Coef_in : std_logic_vector(Coef_SZ-1 downto 0);
73 signal ALU_Coef_in : std_logic_vector(Coef_SZ-1 downto 0);
66 signal ALU_out : std_logic_vector(Sample_SZ+Coef_SZ-1 downto 0);
74 signal ALU_out : std_logic_vector(Sample_SZ+Coef_SZ-1 downto 0);
67 signal curentCel : integer range 0 to Cels_count-1 := 0;
75 signal curentCel : integer range 0 to Cels_count-1 := 0;
68 signal curentChan : integer range 0 to ChanelsCNT-1 := 0;
76 signal curentChan : integer range 0 to ChanelsCount-1 := 0;
69
70 signal sample_in_BUFF : samplT;
71 signal sample_out_BUFF : samplT;
72
77
73
78
79 type sampleBuffT is array(ChanelsCount-1 downto 0) of sampleVect;
80
81 signal sample_in_BUFF : sampleBuffT;
82 signal sample_out_BUFF : sampleBuffT;
83
84 type CoefCelT is array(CoefCntPerCel-1 downto 0) of std_logic_vector(Coef_SZ-1 downto 0);
85 type CoefTblT is array(Cels_count-1 downto 0) of CoefCelT;
86
87 type CoefsRegT is record
88 numCoefs : CoefTblT;
89 denCoefs : CoefTblT;
90 end record;
91
92 signal CoefsReg : CoefsRegT;
74
93
75 type fsmIIR_CEL_T is (waiting,pipe1,computeb1,computeb2,computea1,computea2,next_cel,pipe2,pipe3,next_chan);
94 type fsmIIR_CEL_T is (waiting,pipe1,computeb1,computeb2,computea1,computea2,next_cel,pipe2,pipe3,next_chan);
76
95
77 signal IIR_CEL_STATE : fsmIIR_CEL_T;
96 signal IIR_CEL_STATE : fsmIIR_CEL_T;
78
97
79 begin
98 begin
80
99
81
100
82
101 coefsConnectL0: for z in 0 to Cels_count-1 generate
102 coefsConnectL1: for y in 0 to CoefCntPerCel-1 generate
103 coefsConnectL2: for x in 0 to Coef_SZ-1 generate
104 CoefsReg.numCoefs(z)(y)(x) <= coefs(x + y*Coef_SZ + z*Coef_SZ*CoefCntPerCel);
105 CoefsReg.denCoefs(z)(y)(x) <= coefs(x + y*Coef_SZ + z*Coef_SZ*CoefCntPerCel);
106 end generate;
107 end generate;
108 end generate;
83
109
84
110
85 RAM_CTRLR2inst : RAM_CTRLR2
111 RAM_CTRLR2inst : RAM_CTRLR2
86 generic map(Input_SZ_1 => Sample_SZ)
112 generic map(Sample_SZ,Mem_use)
87 port map(
113 port map(
88 reset => reset,
114 reset => reset,
89 clk => clk,
115 clk => clk,
90 WD_sel => WD_sel,
116 WD_sel => WD_sel,
91 Read => Read,
117 Read => Read,
92 WADDR_sel => WADDR_sel,
118 WADDR_sel => WADDR_sel,
93 count => count,
119 count => count,
94 SVG_ADDR => SVG_ADDR,
120 SVG_ADDR => SVG_ADDR,
95 Write => Write,
121 Write => Write,
96 GO_0 => GO_0,
122 GO_0 => GO_0,
97 sample_in => RAM_sample_in,
123 sample_in => RAM_sample_in,
98 sample_out => RAM_sample_out
124 sample_out => RAM_sample_out
99 );
125 );
100
126
101
127
102
128
103 ALU_inst :ALU
129 ALU_inst :ALU
104 generic map(Logic_en => 0,Input_SZ_1 => Sample_SZ, Input_SZ_2 => Coef_SZ)
130 generic map(Logic_en => 0,Input_SZ_1 => Sample_SZ, Input_SZ_2 => Coef_SZ)
105 port map(
131 port map(
106 clk => clk,
132 clk => clk,
107 reset => reset,
133 reset => reset,
108 ctrl => ALU_ctrl,
134 ctrl => ALU_ctrl,
109 OP1 => ALU_sample_in,
135 OP1 => ALU_sample_in,
110 OP2 => ALU_coef_in,
136 OP2 => ALU_coef_in,
111 RES => ALU_out
137 RES => ALU_out
112 );
138 );
113
139
114
140
115
141
116
142
117
143
118
144
119 WD_sel <= '0' when (IIR_CEL_STATE = waiting or IIR_CEL_STATE = pipe1 or IIR_CEL_STATE = computeb2) else '1';
145 WD_sel <= '0' when (IIR_CEL_STATE = waiting or IIR_CEL_STATE = pipe1 or IIR_CEL_STATE = computeb2) else '1';
120 Read <= '1' when (IIR_CEL_STATE = pipe1 or IIR_CEL_STATE = computeb1 or IIR_CEL_STATE = computeb2 or IIR_CEL_STATE = computea1 or IIR_CEL_STATE = computea2) else '0';
146 Read <= '1' when (IIR_CEL_STATE = pipe1 or IIR_CEL_STATE = computeb1 or IIR_CEL_STATE = computeb2 or IIR_CEL_STATE = computea1 or IIR_CEL_STATE = computea2) else '0';
121 WADDR_sel <= '1' when IIR_CEL_STATE = computea1 else '0';
147 WADDR_sel <= '1' when IIR_CEL_STATE = computea1 else '0';
122 count <= '1' when (IIR_CEL_STATE = pipe1 or IIR_CEL_STATE = computeb1 or IIR_CEL_STATE = computeb2 or IIR_CEL_STATE = computea1) else '0';
148 count <= '1' when (IIR_CEL_STATE = pipe1 or IIR_CEL_STATE = computeb1 or IIR_CEL_STATE = computeb2 or IIR_CEL_STATE = computea1) else '0';
123 SVG_ADDR <= '1' when IIR_CEL_STATE = computeb2 else '0';
149 SVG_ADDR <= '1' when IIR_CEL_STATE = computeb2 else '0';
124 --Write <= '1' when (IIR_CEL_STATE = computeb1 or IIR_CEL_STATE = computeb2 or (IIR_CEL_STATE = computea1 and not(curentChan = 0 and curentCel = 0)) or IIR_CEL_STATE = computea2) else '0';
150 --Write <= '1' when (IIR_CEL_STATE = computeb1 or IIR_CEL_STATE = computeb2 or (IIR_CEL_STATE = computea1 and not(curentChan = 0 and curentCel = 0)) or IIR_CEL_STATE = computea2) else '0';
125 Write <= '1' when (IIR_CEL_STATE = computeb1 or IIR_CEL_STATE = computeb2 or IIR_CEL_STATE = computea1 or IIR_CEL_STATE = computea2) else '0';
151 Write <= '1' when (IIR_CEL_STATE = computeb1 or IIR_CEL_STATE = computeb2 or IIR_CEL_STATE = computea1 or IIR_CEL_STATE = computea2) else '0';
126
152
127 GO_0 <= '1' when IIR_CEL_STATE = waiting else '0';
153 GO_0 <= '1' when IIR_CEL_STATE = waiting else '0';
128
154
129
155
130
156
131
157
132
158
133
159
134
160
135 process(clk,reset)
161 process(clk,reset)
136 variable result : std_logic_vector(Sample_SZ-1 downto 0);
162 variable result : std_logic_vector(Sample_SZ-1 downto 0);
137
163
138 begin
164 begin
139
165
140 if reset = '0' then
166 if reset = '0' then
141
167
142 smpl_clk_old <= '0';
168 smpl_clk_old <= '0';
143 RAM_sample_in <= (others=> '0');
169 RAM_sample_in <= (others=> '0');
144 ALU_ctrl <= IDLE;
170 ALU_ctrl <= IDLE;
145 ALU_sample_in <= (others=> '0');
171 ALU_sample_in <= (others=> '0');
146 ALU_Coef_in <= (others=> '0');
172 ALU_Coef_in <= (others=> '0');
147 RAM_sample_in_bk<= (others=> '0');
173 RAM_sample_in_bk<= (others=> '0');
148 curentCel <= 0;
174 curentCel <= 0;
149 curentChan <= 0;
175 curentChan <= 0;
150 IIR_CEL_STATE <= waiting;
176 IIR_CEL_STATE <= waiting;
151 reset : for i in 0 to ChanelsCNT-1 loop
177 resetL0 : for i in 0 to ChanelsCount-1 loop
152 sample_in_BUFF(i) <= (others => '0');
178 sample_in_BUFF(i) <= (others => '0');
153 sample_out_BUFF(i) <= (others => '0');
179 sample_out_BUFF(i) <= (others => '0');
154 sample_out(i) <= (others => '0');
180 resetL1: for j in 0 to Sample_SZ-1 loop
181 sample_out(i,j) <= '0';
182 end loop;
155 end loop;
183 end loop;
156
184
157 elsif clk'event and clk = '1' then
185 elsif clk'event and clk = '1' then
158
186
159 smpl_clk_old <= sample_clk;
187 smpl_clk_old <= sample_clk;
160
188
161 case IIR_CEL_STATE is
189 case IIR_CEL_STATE is
162
190
163 when waiting =>
191 when waiting =>
164 if sample_clk = '1' and smpl_clk_old = '0' then
192 if sample_clk = '1' and smpl_clk_old = '0' then
165 IIR_CEL_STATE <= pipe1;
193 IIR_CEL_STATE <= pipe1;
166 RAM_sample_in <= sample_in_BUFF(0);
194 RAM_sample_in <= std_logic_vector(sample_in_BUFF(0));
167 ALU_sample_in <= sample_in_BUFF(0);
195 ALU_sample_in <= std_logic_vector(sample_in_BUFF(0));
168
196
169 else
197 else
170 ALU_ctrl <= IDLE;
198 ALU_ctrl <= IDLE;
171 sample_in_BUFF <= sample_in;
199 smplConnectL0: for i in 0 to ChanelsCount-1 loop
172 sample_out <= sample_out_BUFF;
200 smplConnectL1: for j in 0 to Sample_SZ-1 loop
173
201 sample_in_BUFF(i)(j) <= sample_in(i,j);
202 sample_out(i,j) <= sample_out_BUFF(i)(j);
203 end loop;
204 end loop;
174 end if;
205 end if;
175 curentCel <= 0;
206 curentCel <= 0;
176 curentChan <= 0;
207 curentChan <= 0;
177
208
178 when pipe1 =>
209 when pipe1 =>
179 IIR_CEL_STATE <= computeb1;
210 IIR_CEL_STATE <= computeb1;
180 ALU_ctrl <= MAC_op;
211 ALU_ctrl <= MAC_op;
181 ALU_Coef_in <= std_logic_vector(coefs.NumCoefs(curentCel)(0));
212 ALU_Coef_in <= std_logic_vector(CoefsReg.NumCoefs(curentCel)(0));
182
213
183 when computeb1 =>
214 when computeb1 =>
184
215
185 ALU_ctrl <= MAC_op;
216 ALU_ctrl <= MAC_op;
186 ALU_sample_in <= RAM_sample_out;
217 ALU_sample_in <= RAM_sample_out;
187 ALU_Coef_in <= std_logic_vector(coefs.NumCoefs(curentCel)(1));
218 ALU_Coef_in <= std_logic_vector(CoefsReg.NumCoefs(curentCel)(1));
188 IIR_CEL_STATE <= computeb2;
219 IIR_CEL_STATE <= computeb2;
189 RAM_sample_in <= RAM_sample_in_bk;
220 RAM_sample_in <= RAM_sample_in_bk;
190 when computeb2 =>
221 when computeb2 =>
191 ALU_sample_in <= RAM_sample_out;
222 ALU_sample_in <= RAM_sample_out;
192 ALU_Coef_in <= std_logic_vector(coefs.NumCoefs(curentCel)(2));
223 ALU_Coef_in <= std_logic_vector(CoefsReg.NumCoefs(curentCel)(2));
193 IIR_CEL_STATE <= computea1;
224 IIR_CEL_STATE <= computea1;
194
225
195
226
196 when computea1 =>
227 when computea1 =>
197 ALU_sample_in <= RAM_sample_out;
228 ALU_sample_in <= RAM_sample_out;
198 ALU_Coef_in <= std_logic_vector(coefs.DenCoefs(curentCel)(1));
229 ALU_Coef_in <= std_logic_vector(CoefsReg.DenCoefs(curentCel)(1));
199 IIR_CEL_STATE <= computea2;
230 IIR_CEL_STATE <= computea2;
200
231
201
232
202 when computea2 =>
233 when computea2 =>
203 ALU_sample_in <= RAM_sample_out;
234 ALU_sample_in <= RAM_sample_out;
204 ALU_Coef_in <= std_logic_vector(coefs.DenCoefs(curentCel)(2));
235 ALU_Coef_in <= std_logic_vector(CoefsReg.DenCoefs(curentCel)(2));
205 IIR_CEL_STATE <= next_cel;
236 IIR_CEL_STATE <= next_cel;
206
237
207
238
208 when next_cel =>
239 when next_cel =>
209 ALU_ctrl <= clr_mac;
240 ALU_ctrl <= clr_mac;
210 IIR_CEL_STATE <= pipe2;
241 IIR_CEL_STATE <= pipe2;
211
242
212 when pipe2 =>
243 when pipe2 =>
213 IIR_CEL_STATE <= pipe3;
244 IIR_CEL_STATE <= pipe3;
214
245
215
246
216 when pipe3 =>
247 when pipe3 =>
217
248
218 result := ALU_out(Sample_SZ+virg_pos-1 downto virg_pos);
249 result := ALU_out(Sample_SZ+virg_pos-1 downto virg_pos);
219
250
220 sample_out_BUFF(0) <= result;
251 sample_out_BUFF(0) <= result;
221 RAM_sample_in_bk <= result;
252 RAM_sample_in_bk <= result;
222 RAM_sample_in <= result;
253 RAM_sample_in <= result;
223 if curentCel = Cels_count-1 then
254 if curentCel = Cels_count-1 then
224 IIR_CEL_STATE <= next_chan;
255 IIR_CEL_STATE <= next_chan;
225 curentCel <= 0;
256 curentCel <= 0;
226 else
257 else
227 curentCel <= curentCel + 1;
258 curentCel <= curentCel + 1;
228 IIR_CEL_STATE <= pipe1;
259 IIR_CEL_STATE <= pipe1;
229 ALU_sample_in <= result;
260 ALU_sample_in <= result;
230 end if;
261 end if;
231 when next_chan =>
262 when next_chan =>
232
263
233 rotate : for i in 0 to ChanelsCNT-2 loop
264 rotate : for i in 1 to ChanelsCount-1 loop
234 sample_in_BUFF(i) <= sample_in_BUFF(i+1);
265 sample_in_BUFF(i-1) <= sample_in_BUFF(i);
235 sample_out_BUFF(i) <= sample_out_BUFF(i+1);
266 sample_out_BUFF(i-1) <= sample_out_BUFF(i);
236 end loop;
267 end loop;
237 sample_in_BUFF(ChanelsCNT-1) <= sample_in_BUFF(0);
268 sample_in_BUFF(ChanelsCount-1) <= sample_in_BUFF(0);
238 sample_out_BUFF(ChanelsCNT-1)<= sample_out_BUFF(0);
269 sample_out_BUFF(ChanelsCount-1)<= sample_out_BUFF(0);
239
270
240 if curentChan = (ChanelsCNT-1) then
271 if curentChan = (ChanelsCount-1) then
241 IIR_CEL_STATE <= waiting;
272 IIR_CEL_STATE <= waiting;
242 ALU_ctrl <= clr_mac;
273 ALU_ctrl <= clr_mac;
243 else
274 elsif ChanelsCount>1 then
244 curentChan <= curentChan + 1;
275 curentChan <= curentChan + 1;
245 IIR_CEL_STATE <= pipe1;
276 IIR_CEL_STATE <= pipe1;
246 ALU_sample_in <= sample_in_BUFF(1);
277 ALU_sample_in <= sample_in_BUFF(1);
247 RAM_sample_in <= sample_in_BUFF(1);
278 RAM_sample_in <= sample_in_BUFF(1);
248 end if;
279 end if;
249 end case;
280 end case;
250
281
251 end if;
282 end if;
252 end process;
283 end process;
253
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259 end ar_IIR_CEL_CTRLR;
290 end ar_IIR_CEL_CTRLR;
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@@ -1,88 +1,92
1 ------------------------------------------------------------------------------
1 ------------------------------------------------------------------------------
2 -- This file is a part of the LPP VHDL IP LIBRARY
2 -- This file is a part of the LPP VHDL IP LIBRARY
3 -- Copyright (C) 2009 - 2010, Laboratory of Plasmas Physic - CNRS
3 -- Copyright (C) 2009 - 2010, Laboratory of Plasmas Physic - CNRS
4 --
4 --
5 -- This program is free software; you can redistribute it and/or modify
5 -- This program is free software; you can redistribute it and/or modify
6 -- it under the terms of the GNU General Public License as published by
6 -- it under the terms of the GNU General Public License as published by
7 -- the Free Software Foundation; either version 3 of the License, or
7 -- the Free Software Foundation; either version 3 of the License, or
8 -- (at your option) any later version.
8 -- (at your option) any later version.
9 --
9 --
10 -- This program is distributed in the hope that it will be useful,
10 -- This program is distributed in the hope that it will be useful,
11 -- but WITHOUT ANY WARRANTY; without even the implied warranty of
11 -- but WITHOUT ANY WARRANTY; without even the implied warranty of
12 -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 -- GNU General Public License for more details.
13 -- GNU General Public License for more details.
14 --
14 --
15 -- You should have received a copy of the GNU General Public License
15 -- You should have received a copy of the GNU General Public License
16 -- along with this program; if not, write to the Free Software
16 -- along with this program; if not, write to the Free Software
17 -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
17 -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 -------------------------------------------------------------------------------
18 -------------------------------------------------------------------------------
19 library IEEE;
19 library IEEE;
20 use IEEE.numeric_std.all;
20 use IEEE.numeric_std.all;
21 use IEEE.std_logic_1164.all;
21 use IEEE.std_logic_1164.all;
22 library lpp;
22 library lpp;
23 use lpp.iir_filter.all;
23 use lpp.iir_filter.all;
24 use lpp.FILTERcfg.all;
25 use lpp.general_purpose.all;
24 use lpp.general_purpose.all;
26
25
27 --TODO am�liorer la gestion de la RAM et de la flexibilit� du filtre
26 --TODO amliorer la gestion de la RAM et de la flexibilit du filtre
28
27
29 entity IIR_CEL_FILTER is
28 entity IIR_CEL_FILTER is
30 generic(Sample_SZ : integer := 16);
29 generic(Sample_SZ : integer := 16;
30 ChanelsCount : integer := 1;
31 Coef_SZ : integer := 9;
32 CoefCntPerCel: integer := 3;
33 Cels_count : integer := 5;
34 Mem_use : integer := use_RAM);
31 port(
35 port(
32 reset : in std_logic;
36 reset : in std_logic;
33 clk : in std_logic;
37 clk : in std_logic;
34 sample_clk : in std_logic;
38 sample_clk : in std_logic;
35 regs_in : in in_IIR_CEL_reg;
39 regs_in : in in_IIR_CEL_reg;
36 regs_out : in out_IIR_CEL_reg;
40 regs_out : in out_IIR_CEL_reg;
37 sample_in : in samplT;
41 sample_in : in samplT(ChanelsCount-1 downto 0,Sample_SZ-1 downto 0);
38 sample_out : out samplT
42 sample_out : out samplT(ChanelsCount-1 downto 0,Sample_SZ-1 downto 0);
43 coefs : in std_logic_vector(Coef_SZ*CoefCntPerCel*Cels_count-1 downto 0)
39
44
40 );
45 );
41 end IIR_CEL_FILTER;
46 end IIR_CEL_FILTER;
42
47
43
48
44
49
45
50
46 architecture ar_IIR_CEL_FILTER of IIR_CEL_FILTER is
51 architecture ar_IIR_CEL_FILTER of IIR_CEL_FILTER is
47
52
48 signal virg_pos : integer;
53 signal virg_pos : integer;
49 begin
54 begin
50
55
51 virg_pos <= to_integer(unsigned(regs_in.virgPos));
56 virg_pos <= to_integer(unsigned(regs_in.virgPos));
52
57
53
54 CTRLR : IIR_CEL_CTRLR
58 CTRLR : IIR_CEL_CTRLR
55 generic map (Sample_SZ => Sample_SZ)
59 generic map (Sample_SZ,ChanelsCount,Coef_SZ,CoefCntPerCel,Cels_count,Mem_use)
56 port map(
60 port map(
57 reset => reset,
61 reset => reset,
58 clk => clk,
62 clk => clk,
59 sample_clk => sample_clk,
63 sample_clk => sample_clk,
60 sample_in => sample_in,
64 sample_in => sample_in,
61 sample_out => sample_out,
65 sample_out => sample_out,
62 virg_pos => virg_pos,
66 virg_pos => virg_pos,
63 coefs => regs_in.coefsTB
67 coefs => coefs
64 );
68 );
65
69
66
70
67
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68
72
69
73
70 end ar_IIR_CEL_FILTER;
74 end ar_IIR_CEL_FILTER;
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@@ -1,209 +1,210
1 ------------------------------------------------------------------------------
1 ------------------------------------------------------------------------------
2 -- This file is a part of the LPP VHDL IP LIBRARY
2 -- This file is a part of the LPP VHDL IP LIBRARY
3 -- Copyright (C) 2009 - 2010, Laboratory of Plasmas Physic - CNRS
3 -- Copyright (C) 2009 - 2010, Laboratory of Plasmas Physic - CNRS
4 --
4 --
5 -- This program is free software; you can redistribute it and/or modify
5 -- This program is free software; you can redistribute it and/or modify
6 -- it under the terms of the GNU General Public License as published by
6 -- it under the terms of the GNU General Public License as published by
7 -- the Free Software Foundation; either version 3 of the License, or
7 -- the Free Software Foundation; either version 3 of the License, or
8 -- (at your option) any later version.
8 -- (at your option) any later version.
9 --
9 --
10 -- This program is distributed in the hope that it will be useful,
10 -- This program is distributed in the hope that it will be useful,
11 -- but WITHOUT ANY WARRANTY; without even the implied warranty of
11 -- but WITHOUT ANY WARRANTY; without even the implied warranty of
12 -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 -- GNU General Public License for more details.
13 -- GNU General Public License for more details.
14 --
14 --
15 -- You should have received a copy of the GNU General Public License
15 -- You should have received a copy of the GNU General Public License
16 -- along with this program; if not, write to the Free Software
16 -- along with this program; if not, write to the Free Software
17 -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
17 -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 -------------------------------------------------------------------------------
18 -------------------------------------------------------------------------------
19 library IEEE;
19 library IEEE;
20 use IEEE.numeric_std.all;
20 use IEEE.numeric_std.all;
21 use IEEE.std_logic_1164.all;
21 use IEEE.std_logic_1164.all;
22 library lpp;
22 library lpp;
23 use lpp.iir_filter.all;
23 use lpp.iir_filter.all;
24 use lpp.FILTERcfg.all;
24 use lpp.FILTERcfg.all;
25 use lpp.general_purpose.all;
25 use lpp.general_purpose.all;
26
26
27 --TODO am�liorer la flexibilit� de la config de la RAM.
27 --TODO amliorer la flexibilit de la config de la RAM.
28
28
29 entity RAM_CTRLR2 is
29 entity RAM_CTRLR2 is
30 generic(
30 generic(
31 Input_SZ_1 : integer := 16
31 Input_SZ_1 : integer := 16;
32 Mem_use : integer := use_RAM
32 );
33 );
33 port(
34 port(
34 reset : in std_logic;
35 reset : in std_logic;
35 clk : in std_logic;
36 clk : in std_logic;
36 WD_sel : in std_logic;
37 WD_sel : in std_logic;
37 Read : in std_logic;
38 Read : in std_logic;
38 WADDR_sel : in std_logic;
39 WADDR_sel : in std_logic;
39 count : in std_logic;
40 count : in std_logic;
40 SVG_ADDR : in std_logic;
41 SVG_ADDR : in std_logic;
41 Write : in std_logic;
42 Write : in std_logic;
42 GO_0 : in std_logic;
43 GO_0 : in std_logic;
43 sample_in : in std_logic_vector(Input_SZ_1-1 downto 0);
44 sample_in : in std_logic_vector(Input_SZ_1-1 downto 0);
44 sample_out : out std_logic_vector(Input_SZ_1-1 downto 0)
45 sample_out : out std_logic_vector(Input_SZ_1-1 downto 0)
45 );
46 );
46 end RAM_CTRLR2;
47 end RAM_CTRLR2;
47
48
48
49
49 architecture ar_RAM_CTRLR2 of RAM_CTRLR2 is
50 architecture ar_RAM_CTRLR2 of RAM_CTRLR2 is
50
51
51 signal WD : std_logic_vector(35 downto 0);
52 signal WD : std_logic_vector(35 downto 0);
52 signal WD_D : std_logic_vector(35 downto 0);
53 signal WD_D : std_logic_vector(35 downto 0);
53 signal RD : std_logic_vector(35 downto 0);
54 signal RD : std_logic_vector(35 downto 0);
54 signal WEN, REN : std_logic;
55 signal WEN, REN : std_logic;
55 signal WADDR_back : std_logic_vector(7 downto 0);
56 signal WADDR_back : std_logic_vector(7 downto 0);
56 signal WADDR_back_D: std_logic_vector(7 downto 0);
57 signal WADDR_back_D: std_logic_vector(7 downto 0);
57 signal RADDR : std_logic_vector(7 downto 0);
58 signal RADDR : std_logic_vector(7 downto 0);
58 signal WADDR : std_logic_vector(7 downto 0);
59 signal WADDR : std_logic_vector(7 downto 0);
59 signal WADDR_D : std_logic_vector(7 downto 0);
60 signal WADDR_D : std_logic_vector(7 downto 0);
60
61
61
62
62
63
63 begin
64 begin
64
65
65 sample_out <= RD(Smpl_SZ-1 downto 0);
66 sample_out <= RD(Input_SZ_1-1 downto 0);
66
67
67
68
68 WEN <= not Write;
69 WEN <= not Write;
69 REN <= not read;
70 REN <= not read;
70
71
71
72
72 --==============================================================
73 --==============================================================
73 --=========================R A M================================
74 --=========================R A M================================
74 --==============================================================
75 --==============================================================
75 memRAM : if Mem_use = use_RAM generate
76 memRAM : if Mem_use = use_RAM generate
76 RAMblk :RAM
77 RAMblk :RAM
77 port map(
78 port map(
78 WD => WD_D,
79 WD => WD_D,
79 RD => RD,
80 RD => RD,
80 WEN => WEN,
81 WEN => WEN,
81 REN => REN,
82 REN => REN,
82 WADDR => WADDR,
83 WADDR => WADDR,
83 RADDR => RADDR,
84 RADDR => RADDR,
84 RWCLK => clk,
85 RWCLK => clk,
85 RESET => reset
86 RESET => reset
86 ) ;
87 ) ;
87 end generate;
88 end generate;
88
89
89 memCEL : if Mem_use = use_CEL generate
90 memCEL : if Mem_use = use_CEL generate
90 RAMblk :RAM_CEL
91 RAMblk :RAM_CEL
91 port map(
92 port map(
92 WD => WD_D,
93 WD => WD_D,
93 RD => RD,
94 RD => RD,
94 WEN => WEN,
95 WEN => WEN,
95 REN => REN,
96 REN => REN,
96 WADDR => WADDR,
97 WADDR => WADDR,
97 RADDR => RADDR,
98 RADDR => RADDR,
98 RWCLK => clk,
99 RWCLK => clk,
99 RESET => reset
100 RESET => reset
100 ) ;
101 ) ;
101 end generate;
102 end generate;
102 --==============================================================
103 --==============================================================
103 --==============================================================
104 --==============================================================
104
105
105
106
106 ADDRcntr_inst : ADDRcntr
107 ADDRcntr_inst : ADDRcntr
107 port map(
108 port map(
108 clk => clk,
109 clk => clk,
109 reset => reset,
110 reset => reset,
110 count => count,
111 count => count,
111 clr => GO_0,
112 clr => GO_0,
112 Q => RADDR
113 Q => RADDR
113 );
114 );
114
115
115
116
116
117
117 MUX2_inst1 :MUX2
118 MUX2_inst1 :MUX2
118 generic map(Input_SZ => Smpl_SZ)
119 generic map(Input_SZ => Input_SZ_1)
119 port map(
120 port map(
120 sel => WD_sel,
121 sel => WD_sel,
121 IN1 => sample_in,
122 IN1 => sample_in,
122 IN2 => RD(Smpl_SZ-1 downto 0),
123 IN2 => RD(Input_SZ_1-1 downto 0),
123 RES => WD(Smpl_SZ-1 downto 0)
124 RES => WD(Input_SZ_1-1 downto 0)
124 );
125 );
125
126
126
127
127 MUX2_inst2 :MUX2
128 MUX2_inst2 :MUX2
128 generic map(Input_SZ => 8)
129 generic map(Input_SZ => 8)
129 port map(
130 port map(
130 sel => WADDR_sel,
131 sel => WADDR_sel,
131 IN1 => WADDR_D,
132 IN1 => WADDR_D,
132 IN2 => WADDR_back_D,
133 IN2 => WADDR_back_D,
133 RES => WADDR
134 RES => WADDR
134 );
135 );
135
136
136
137
137
138
138
139
139 WADDR_backreg :REG
140 WADDR_backreg :REG
140 generic map(size => 8,initial_VALUE =>ChanelsCNT*Cels_count*4-2)
141 generic map(size => 8,initial_VALUE =>ChanelsCNT*Cels_count*4-2)
141 port map(
142 port map(
142 reset => reset,
143 reset => reset,
143 clk => SVG_ADDR,
144 clk => SVG_ADDR,
144 D => RADDR,
145 D => RADDR,
145 Q => WADDR_back
146 Q => WADDR_back
146 );
147 );
147
148
148 WADDR_backreg2 :REG
149 WADDR_backreg2 :REG
149 generic map(size => 8)
150 generic map(size => 8)
150 port map(
151 port map(
151 reset => reset,
152 reset => reset,
152 clk => SVG_ADDR,
153 clk => SVG_ADDR,
153 D => WADDR_back,
154 D => WADDR_back,
154 Q => WADDR_back_D
155 Q => WADDR_back_D
155 );
156 );
156
157
157 WDRreg :REG
158 WDRreg :REG
158 generic map(size => Smpl_SZ)
159 generic map(size => Input_SZ_1)
159 port map(
160 port map(
160 reset => reset,
161 reset => reset,
161 clk => clk,
162 clk => clk,
162 D => WD(Smpl_SZ-1 downto 0),
163 D => WD(Input_SZ_1-1 downto 0),
163 Q => WD_D(Smpl_SZ-1 downto 0)
164 Q => WD_D(Input_SZ_1-1 downto 0)
164 );
165 );
165
166
166
167
167
168
168
169
169 ADDRreg :REG
170 ADDRreg :REG
170 generic map(size => 8)
171 generic map(size => 8)
171 port map(
172 port map(
172 reset => reset,
173 reset => reset,
173 clk => clk,
174 clk => clk,
174 D => RADDR,
175 D => RADDR,
175 Q => WADDR_D
176 Q => WADDR_D
176 );
177 );
177
178
178
179
179
180
180 end ar_RAM_CTRLR2;
181 end ar_RAM_CTRLR2;
181
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@@ -1,162 +1,223
1 ------------------------------------------------------------------------------
1 ------------------------------------------------------------------------------
2 -- This file is a part of the LPP VHDL IP LIBRARY
2 -- This file is a part of the LPP VHDL IP LIBRARY
3 -- Copyright (C) 2009 - 2010, Laboratory of Plasmas Physic - CNRS
3 -- Copyright (C) 2009 - 2010, Laboratory of Plasmas Physic - CNRS
4 --
4 --
5 -- This program is free software; you can redistribute it and/or modify
5 -- This program is free software; you can redistribute it and/or modify
6 -- it under the terms of the GNU General Public License as published by
6 -- it under the terms of the GNU General Public License as published by
7 -- the Free Software Foundation; either version 3 of the License, or
7 -- the Free Software Foundation; either version 3 of the License, or
8 -- (at your option) any later version.
8 -- (at your option) any later version.
9 --
9 --
10 -- This program is distributed in the hope that it will be useful,
10 -- This program is distributed in the hope that it will be useful,
11 -- but WITHOUT ANY WARRANTY; without even the implied warranty of
11 -- but WITHOUT ANY WARRANTY; without even the implied warranty of
12 -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 -- GNU General Public License for more details.
13 -- GNU General Public License for more details.
14 --
14 --
15 -- You should have received a copy of the GNU General Public License
15 -- You should have received a copy of the GNU General Public License
16 -- along with this program; if not, write to the Free Software
16 -- along with this program; if not, write to the Free Software
17 -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
17 -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 -------------------------------------------------------------------------------
18 -------------------------------------------------------------------------------
19 ------------------------------------------------------------------------------
19 ------------------------------------------------------------------------------
20 library ieee;
20 library ieee;
21 use ieee.std_logic_1164.all;
21 use ieee.std_logic_1164.all;
22 library grlib;
22 library grlib;
23 use grlib.amba.all;
23 use grlib.amba.all;
24 use grlib.stdlib.all;
24 use grlib.stdlib.all;
25 use grlib.devices.all;
25 use grlib.devices.all;
26 library lpp;
26 library lpp;
27 use lpp.FILTERcfg.all;
27
28
28
29
29
30
30
31 package iir_filter is
31 package iir_filter is
32
32
33
34 --===========================================================|
35 --================A L U C O N T R O L======================|
36 --===========================================================|
37 constant IDLE : std_logic_vector(3 downto 0) := "0000";
38 constant MAC_op : std_logic_vector(3 downto 0) := "0001";
39 constant MULT : std_logic_vector(3 downto 0) := "0010";
40 constant ADD : std_logic_vector(3 downto 0) := "0011";
41 constant clr_mac : std_logic_vector(3 downto 0) := "0100";
42
43 --____
44 --RAM |
45 --____|
46 constant use_RAM : integer := 1;
47 constant use_CEL : integer := 0;
48
49
50 --===========================================================|
51 --=============C O E F S ====================================|
52 --===========================================================|
53 -- create a specific type of data for coefs to avoid errors |
54 --===========================================================|
55
56 type scaleValT is array(natural range <>) of integer;
57
58 type samplT is array(natural range <>,natural range <>) of std_logic;
59
60 type in_IIR_CEL_reg is record
61 config : std_logic_vector(31 downto 0);
62 virgPos : std_logic_vector(4 downto 0);
63 end record;
64
65 type out_IIR_CEL_reg is record
66 config : std_logic_vector(31 downto 0);
67 status : std_logic_vector(31 downto 0);
68 end record;
69
70
71
33 component APB_IIR_CEL is
72 component APB_IIR_CEL is
34 generic (
73 generic (
35 pindex : integer := 0;
74 pindex : integer := 0;
36 paddr : integer := 0;
75 paddr : integer := 0;
37 pmask : integer := 16#fff#;
76 pmask : integer := 16#fff#;
38 pirq : integer := 0;
77 pirq : integer := 0;
39 abits : integer := 8;
78 abits : integer := 8;
40 Sample_SZ : integer := Smpl_SZ
79 Sample_SZ : integer := 16;
80 ChanelsCount : integer := 1;
81 Coef_SZ : integer := 9;
82 CoefCntPerCel: integer := 3;
83 Cels_count : integer := 5;
84 virgPos : integer := 3;
85 Mem_use : integer := use_RAM
41 );
86 );
42 port (
87 port (
43 rst : in std_logic;
88 rst : in std_logic;
44 clk : in std_logic;
89 clk : in std_logic;
45 apbi : in apb_slv_in_type;
90 apbi : in apb_slv_in_type;
46 apbo : out apb_slv_out_type;
91 apbo : out apb_slv_out_type;
47 sample_clk : in std_logic;
92 sample_clk : in std_logic;
48 sample_clk_out : out std_logic;
93 sample_clk_out : out std_logic;
49 sample_in : in samplT;
94 sample_in : in samplT(ChanelsCount-1 downto 0,Sample_SZ-1 downto 0);
50 sample_out : out samplT
95 sample_out : out samplT(ChanelsCount-1 downto 0,Sample_SZ-1 downto 0)
51 );
96 );
52 end component;
97 end component;
53
98
54
99
55 component FILTER is
100 --component FILTER is
56 port(
101 --generic(Smpl_SZ : integer := 16;
57
102 -- ChanelsCNT : integer := 3
58 reset : in std_logic;
103 --);
59 clk : in std_logic;
104 --port(
60 sample_clk : in std_logic;
105 --
61 Sample_IN : in std_logic_vector(Smpl_SZ*ChanelsCNT-1 downto 0);
106 -- reset : in std_logic;
62 Sample_OUT : out std_logic_vector(Smpl_SZ*ChanelsCNT-1 downto 0)
107 -- clk : in std_logic;
63 );
108 -- sample_clk : in std_logic;
64 end component;
109 -- Sample_IN : in std_logic_vector(Smpl_SZ*ChanelsCNT-1 downto 0);
110 -- Sample_OUT : out std_logic_vector(Smpl_SZ*ChanelsCNT-1 downto 0)
111 --);
112 --end component;
65
113
66
114
67
115
68 component FilterCTRLR is
116 --component FilterCTRLR is
117 --port(
118 -- reset : in std_logic;
119 -- clk : in std_logic;
120 -- sample_clk : in std_logic;
121 -- ALU_Ctrl : out std_logic_vector(3 downto 0);
122 -- sample_in : in samplT;
123 -- coef : out std_logic_vector(Coef_SZ-1 downto 0);
124 -- sample : out std_logic_vector(Smpl_SZ-1 downto 0)
125 --);
126 --end component;
127
128
129 --component FILTER_RAM_CTRLR is
130 --port(
131 -- reset : in std_logic;
132 -- clk : in std_logic;
133 -- run : in std_logic;
134 -- GO_0 : in std_logic;
135 -- B_A : in std_logic;
136 -- writeForce : in std_logic;
137 -- next_blk : in std_logic;
138 -- sample_in : in std_logic_vector(Smpl_SZ-1 downto 0);
139 -- sample_out : out std_logic_vector(Smpl_SZ-1 downto 0)
140 --);
141 --end component;
142
143
144 component IIR_CEL_CTRLR is
145 generic(Sample_SZ : integer := 16;
146 ChanelsCount : integer := 1;
147 Coef_SZ : integer := 9;
148 CoefCntPerCel: integer := 3;
149 Cels_count : integer := 5;
150 Mem_use : integer := use_RAM
151 );
69 port(
152 port(
70 reset : in std_logic;
153 reset : in std_logic;
71 clk : in std_logic;
154 clk : in std_logic;
72 sample_clk : in std_logic;
155 sample_clk : in std_logic;
73 ALU_Ctrl : out std_logic_vector(3 downto 0);
156 sample_in : in samplT(ChanelsCount-1 downto 0,Sample_SZ-1 downto 0);
74 sample_in : in samplT;
157 sample_out : out samplT(ChanelsCount-1 downto 0,Sample_SZ-1 downto 0);
75 coef : out std_logic_vector(Coef_SZ-1 downto 0);
76 sample : out std_logic_vector(Smpl_SZ-1 downto 0)
77 );
78 end component;
79
80
81 component FILTER_RAM_CTRLR is
82 port(
83 reset : in std_logic;
84 clk : in std_logic;
85 run : in std_logic;
86 GO_0 : in std_logic;
87 B_A : in std_logic;
88 writeForce : in std_logic;
89 next_blk : in std_logic;
90 sample_in : in std_logic_vector(Smpl_SZ-1 downto 0);
91 sample_out : out std_logic_vector(Smpl_SZ-1 downto 0)
92 );
93 end component;
94
95
96 component IIR_CEL_CTRLR is
97 generic(Sample_SZ : integer := 16);
98 port(
99 reset : in std_logic;
100 clk : in std_logic;
101 sample_clk : in std_logic;
102 sample_in : in samplT;
103 sample_out : out samplT;
104 virg_pos : in integer;
158 virg_pos : in integer;
105 coefs : in coefs_celsT
159 coefs : in std_logic_vector(Coef_SZ*CoefCntPerCel*Cels_count-1 downto 0)
106 );
160 );
107 end component;
161 end component;
108
162
109
163
110 component RAM is
164 component RAM is
111 port( WD : in std_logic_vector(35 downto 0); RD : out
165 port( WD : in std_logic_vector(35 downto 0); RD : out
112 std_logic_vector(35 downto 0);WEN, REN : in std_logic;
166 std_logic_vector(35 downto 0);WEN, REN : in std_logic;
113 WADDR : in std_logic_vector(7 downto 0); RADDR : in
167 WADDR : in std_logic_vector(7 downto 0); RADDR : in
114 std_logic_vector(7 downto 0);RWCLK, RESET : in std_logic
168 std_logic_vector(7 downto 0);RWCLK, RESET : in std_logic
115 ) ;
169 ) ;
116 end component;
170 end component;
117
171
118
172
119 component RAM_CEL is
173 component RAM_CEL is
120 port( WD : in std_logic_vector(35 downto 0); RD : out
174 port( WD : in std_logic_vector(35 downto 0); RD : out
121 std_logic_vector(35 downto 0);WEN, REN : in std_logic;
175 std_logic_vector(35 downto 0);WEN, REN : in std_logic;
122 WADDR : in std_logic_vector(7 downto 0); RADDR : in
176 WADDR : in std_logic_vector(7 downto 0); RADDR : in
123 std_logic_vector(7 downto 0);RWCLK, RESET : in std_logic
177 std_logic_vector(7 downto 0);RWCLK, RESET : in std_logic
124 ) ;
178 ) ;
125 end component;
179 end component;
126
180
127 component IIR_CEL_FILTER is
181 component IIR_CEL_FILTER is
128 generic(Sample_SZ : integer := 16);
182 generic(Sample_SZ : integer := 16;
183 ChanelsCount : integer := 1;
184 Coef_SZ : integer := 9;
185 CoefCntPerCel: integer := 3;
186 Cels_count : integer := 5;
187 Mem_use : integer := use_RAM);
129 port(
188 port(
130 reset : in std_logic;
189 reset : in std_logic;
131 clk : in std_logic;
190 clk : in std_logic;
132 sample_clk : in std_logic;
191 sample_clk : in std_logic;
133 regs_in : in in_IIR_CEL_reg;
192 regs_in : in in_IIR_CEL_reg;
134 regs_out : in out_IIR_CEL_reg;
193 regs_out : in out_IIR_CEL_reg;
135 sample_in : in samplT;
194 sample_in : in samplT(ChanelsCount-1 downto 0,Sample_SZ-1 downto 0);
136 sample_out : out samplT
195 sample_out : out samplT(ChanelsCount-1 downto 0,Sample_SZ-1 downto 0);
196 coefs : in std_logic_vector(Coef_SZ*CoefCntPerCel*Cels_count-1 downto 0)
137
197
138 );
198 );
139 end component;
199 end component;
140
200
141
201
142 component RAM_CTRLR2 is
202 component RAM_CTRLR2 is
143 generic(
203 generic(
144 Input_SZ_1 : integer := 16
204 Input_SZ_1 : integer := 16;
205 Mem_use : integer := use_RAM
145 );
206 );
146 port(
207 port(
147 reset : in std_logic;
208 reset : in std_logic;
148 clk : in std_logic;
209 clk : in std_logic;
149 WD_sel : in std_logic;
210 WD_sel : in std_logic;
150 Read : in std_logic;
211 Read : in std_logic;
151 WADDR_sel : in std_logic;
212 WADDR_sel : in std_logic;
152 count : in std_logic;
213 count : in std_logic;
153 SVG_ADDR : in std_logic;
214 SVG_ADDR : in std_logic;
154 Write : in std_logic;
215 Write : in std_logic;
155 GO_0 : in std_logic;
216 GO_0 : in std_logic;
156 sample_in : in std_logic_vector(Input_SZ_1-1 downto 0);
217 sample_in : in std_logic_vector(Input_SZ_1-1 downto 0);
157 sample_out : out std_logic_vector(Input_SZ_1-1 downto 0)
218 sample_out : out std_logic_vector(Input_SZ_1-1 downto 0)
158 );
219 );
159 end component;
220 end component;
160
221
161
222
162 end;
223 end;
@@ -1,12 +1,12
1 APB_IIR_CEL.vhd
1 APB_IIR_CEL.vhd
2 FILTER.vhd
3 FILTER_RAM_CTRLR.vhd
4 FILTERcfg.vhd
2 FILTERcfg.vhd
5 FilterCTRLR.vhd
3 FilterCTRLR.vhd
4 FILTER_RAM_CTRLR.vhd
5 FILTER.vhd
6 IIR_CEL_CTRLR.vhd
6 IIR_CEL_CTRLR.vhd
7 IIR_CEL_FILTER.vhd
7 IIR_CEL_FILTER.vhd
8 RAM.vhd
8 iir_filter.vhd
9 RAM_CEL.vhd
9 RAM_CEL.vhd
10 RAM_CTRLR2.vhd
10 RAM_CTRLR2.vhd
11 RAM.vhd
11 Top_Filtre_IIR.vhd
12 Top_Filtre_IIR.vhd
12 iir_filter.vhd
@@ -1,103 +1,81
1 ------------------------------------------------------------------------------
1 ------------------------------------------------------------------------------
2 -- This file is a part of the LPP VHDL IP LIBRARY
2 -- This file is a part of the LPP VHDL IP LIBRARY
3 -- Copyright (C) 2009 - 2010, Laboratory of Plasmas Physic - CNRS
3 -- Copyright (C) 2009 - 2010, Laboratory of Plasmas Physic - CNRS
4 --
4 --
5 -- This program is free software; you can redistribute it and/or modify
5 -- This program is free software; you can redistribute it and/or modify
6 -- it under the terms of the GNU General Public License as published by
6 -- it under the terms of the GNU General Public License as published by
7 -- the Free Software Foundation; either version 3 of the License, or
7 -- the Free Software Foundation; either version 3 of the License, or
8 -- (at your option) any later version.
8 -- (at your option) any later version.
9 --
9 --
10 -- This program is distributed in the hope that it will be useful,
10 -- This program is distributed in the hope that it will be useful,
11 -- but WITHOUT ANY WARRANTY; without even the implied warranty of
11 -- but WITHOUT ANY WARRANTY; without even the implied warranty of
12 -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 -- GNU General Public License for more details.
13 -- GNU General Public License for more details.
14 --
14 --
15 -- You should have received a copy of the GNU General Public License
15 -- You should have received a copy of the GNU General Public License
16 -- along with this program; if not, write to the Free Software
16 -- along with this program; if not, write to the Free Software
17 -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
17 -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 -------------------------------------------------------------------------------
18 -------------------------------------------------------------------------------
19 ------------------------------------------------------------------------------
19 ------------------------------------------------------------------------------
20 -- This file is a part of the LPP VHDL IP LIBRARY
20 -- This file is a part of the LPP VHDL IP LIBRARY
21 -- Copyright (C) 2009 - 2010, Laboratory of Plasmas Physic - CNRS
21 -- Copyright (C) 2009 - 2010, Laboratory of Plasmas Physic - CNRS
22 library IEEE;
22 library IEEE;
23 use IEEE.numeric_std.all;
23 use IEEE.numeric_std.all;
24 use IEEE.std_logic_1164.all;
24 use IEEE.std_logic_1164.all;
25 library lpp;
25 library lpp;
26 use lpp.general_purpose.all;
26 use lpp.general_purpose.all;
27 --IDLE =0000 MAC =0001 MULT =0010 ADD =0011 CLRMAC =0100
27 --IDLE =0000 MAC =0001 MULT =0010 ADD =0011 CLRMAC =0100
28 --NOT =0101 AND =0110 OR =0111 XOR =1000
28 --NOT =0101 AND =0110 OR =0111 XOR =1000
29 --SHIFTleft =1001 SHIFTright =1010
29 --SHIFTleft =1001 SHIFTright =1010
30
30
31 entity ALU is
31 entity ALU is
32 generic(
32 generic(
33 Arith_en : integer := 1;
33 Arith_en : integer := 1;
34 Logic_en : integer := 1;
34 Logic_en : integer := 1;
35 Input_SZ_1 : integer := 16;
35 Input_SZ_1 : integer := 16;
36 Input_SZ_2 : integer := 9
36 Input_SZ_2 : integer := 9
37
37
38 );
38 );
39 port(
39 port(
40 clk : in std_logic;
40 clk : in std_logic;
41 reset : in std_logic;
41 reset : in std_logic;
42 ctrl : in std_logic_vector(3 downto 0);
42 ctrl : in std_logic_vector(3 downto 0);
43 OP1 : in std_logic_vector(Input_SZ_1-1 downto 0);
43 OP1 : in std_logic_vector(Input_SZ_1-1 downto 0);
44 OP2 : in std_logic_vector(Input_SZ_2-1 downto 0);
44 OP2 : in std_logic_vector(Input_SZ_2-1 downto 0);
45 RES : out std_logic_vector(Input_SZ_1+Input_SZ_2-1 downto 0)
45 RES : out std_logic_vector(Input_SZ_1+Input_SZ_2-1 downto 0)
46 );
46 );
47 end entity;
47 end entity;
48
48
49
49
50
50
51 architecture ar_ALU of ALU is
51 architecture ar_ALU of ALU is
52
52
53
53
54
54
55 signal clr_MAC : std_logic:='1';
55 signal clr_MAC : std_logic:='1';
56
56
57
57
58 begin
58 begin
59
59
60 clr_MAC <= '1' when ctrl = "0100" else '0';
60 clr_MAC <= '1' when ctrl = "0100" else '0';
61
61
62
62
63 arith : if Arith_en = 1 generate
63 arith : if Arith_en = 1 generate
64
65
66 MACinst : MAC
64 MACinst : MAC
67 generic map(
65 generic map(Input_SZ_1,Input_SZ_2)
68 Input_SZ_A => Input_SZ_1,
66 port map(clk,reset,clr_MAC,ctrl(1 downto 0),OP1,OP2,RES);
69 Input_SZ_B => Input_SZ_2
70
71 )
72 port map(
73 clk => clk,
74 reset => reset,
75 clr_MAC => clr_MAC,
76 MAC_MUL_ADD => ctrl(1 downto 0),
77 OP1 => OP1,
78 OP2 => OP2,
79 RES => RES
80 );
81
82 end generate;
67 end generate;
83
68
84 process(clk,reset)
85 begin
86 if reset = '0' then
87 elsif clk'event and clk ='1' then
88
89 end if;
90 end process;
91 end architecture;
69 end architecture;
92
70
93
71
94
72
95
73
96
74
97
75
98
76
99
77
100
78
101
79
102
80
103
81
@@ -1,14 +1,14
1 Adder.vhd
1 ADDRcntr.vhd
2 ADDRcntr.vhd
2 ALU.vhd
3 ALU.vhd
3 Adder.vhd
4 Clk_divider.vhd
4 Clk_divider.vhd
5 MAC.vhd
5 general_purpose.vhd
6 MAC_CONTROLER.vhd
6 MAC_CONTROLER.vhd
7 MAC_MUX2.vhd
7 MAC_MUX.vhd
8 MAC_MUX.vhd
8 MAC_MUX2.vhd
9 MAC_REG.vhd
9 MAC_REG.vhd
10 MAC.vhd
11 Multiplier.vhd
10 MUX2.vhd
12 MUX2.vhd
11 Multiplier.vhd
12 REG.vhd
13 REG.vhd
13 Shifter.vhd
14 Shifter.vhd
14 general_purpose.vhd
@@ -1,4 +1,5
1 APB_CHENILLARD.vhd
2 APB_MULTI_DIODE.vhd
1 APB_MULTI_DIODE.vhd
2 APB_MULTI_DIODE.vhd.orig
3 APB_SIMPLE_DIODE.vhd
3 APB_SIMPLE_DIODE.vhd
4 APB_SIMPLE_DIODE.vhd.orig
4 lpp_amba.vhd
5 lpp_amba.vhd
@@ -1,129 +1,135
1 ------------------------------------------------------------------------------
1 ------------------------------------------------------------------------------
2 -- This file is a part of the LPP VHDL IP LIBRARY
2 -- This file is a part of the LPP VHDL IP LIBRARY
3 -- Copyright (C) 2009 - 2010, Laboratory of Plasmas Physic - CNRS
3 -- Copyright (C) 2009 - 2010, Laboratory of Plasmas Physic - CNRS
4 --
4 --
5 -- This program is free software; you can redistribute it and/or modify
5 -- This program is free software; you can redistribute it and/or modify
6 -- it under the terms of the GNU General Public License as published by
6 -- it under the terms of the GNU General Public License as published by
7 -- the Free Software Foundation; either version 3 of the License, or
7 -- the Free Software Foundation; either version 3 of the License, or
8 -- (at your option) any later version.
8 -- (at your option) any later version.
9 --
9 --
10 -- This program is distributed in the hope that it will be useful,
10 -- This program is distributed in the hope that it will be useful,
11 -- but WITHOUT ANY WARRANTY; without even the implied warranty of
11 -- but WITHOUT ANY WARRANTY; without even the implied warranty of
12 -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 -- GNU General Public License for more details.
13 -- GNU General Public License for more details.
14 --
14 --
15 -- You should have received a copy of the GNU General Public License
15 -- You should have received a copy of the GNU General Public License
16 -- along with this program; if not, write to the Free Software
16 -- along with this program; if not, write to the Free Software
17 -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
17 -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 -------------------------------------------------------------------------------
18 -------------------------------------------------------------------------------
19 library ieee;
19 library ieee;
20 use ieee.std_logic_1164.all;
20 use ieee.std_logic_1164.all;
21 library grlib;
21 library grlib;
22 use grlib.amba.all;
22 use grlib.amba.all;
23 use grlib.stdlib.all;
23 use grlib.stdlib.all;
24 use grlib.devices.all;
24 use grlib.devices.all;
25 library lpp;
25 library lpp;
26 use lpp.lpp_amba.all;
26 use lpp.lpp_amba.all;
27 use lpp.lpp_uart.all;
27 use lpp.lpp_uart.all;
28
28
29 entity APB_UART is
29 entity APB_UART is
30 generic (
30 generic (
31 pindex : integer := 0;
31 pindex : integer := 0;
32 paddr : integer := 0;
32 paddr : integer := 0;
33 pmask : integer := 16#fff#;
33 pmask : integer := 16#fff#;
34 pirq : integer := 0;
34 pirq : integer := 0;
35 abits : integer := 8;
35 abits : integer := 8;
36 Data_sz : integer := 8);
36 Data_sz : integer := 8);
37 port (
37 port (
38 clk : in std_logic;
38 clk : in std_logic;
39 rst : in std_logic;
39 rst : in std_logic;
40 apbi : in apb_slv_in_type;
40 apbi : in apb_slv_in_type;
41 apbo : out apb_slv_out_type;
41 apbo : out apb_slv_out_type;
42 TXD : out std_logic;
42 TXD : out std_logic;
43 RXD : in std_logic
43 RXD : in std_logic
44 );
44 );
45 end APB_UART;
45 end APB_UART;
46
46
47
47
48 architecture ar_APB_UART of APB_UART is
48 architecture ar_APB_UART of APB_UART is
49
49
50 constant REVISION : integer := 1;
50 constant REVISION : integer := 1;
51
51
52 constant pconfig : apb_config_type := (
52 constant pconfig : apb_config_type := (
53 0 => ahb_device_reg (VENDOR_LPP, LPP_UART, 0, REVISION, 0),
53 0 => ahb_device_reg (VENDOR_LPP, LPP_UART, 0, REVISION, 0),
54 1 => apb_iobar(paddr, pmask));
54 1 => apb_iobar(paddr, pmask));
55
55
56 signal NwData : std_logic;
56 signal NwData : std_logic;
57 signal ACK : std_logic;
57 signal ACK : std_logic;
58 signal Capture : std_logic;
58 signal Capture : std_logic;
59 signal Send : std_logic;
59 signal Send : std_logic;
60 signal Sended : std_logic;
60 signal Sended : std_logic;
61
61
62 type UART_ctrlr_Reg is record
62 type UART_ctrlr_Reg is record
63 UART_Cfg : std_logic_vector(4 downto 0);
63 UART_Cfg : std_logic_vector(4 downto 0);
64 UART_Wdata : std_logic_vector(7 downto 0);
64 UART_Wdata : std_logic_vector(7 downto 0);
65 UART_Rdata : std_logic_vector(7 downto 0);
65 UART_Rdata : std_logic_vector(7 downto 0);
66 UART_BTrig : std_logic_vector(11 downto 0);
66 UART_BTrig : std_logic_vector(11 downto 0);
67 end record;
67 end record;
68
68
69 signal Rec : UART_ctrlr_Reg;
69 signal Rec : UART_ctrlr_Reg;
70 signal Rdata : std_logic_vector(31 downto 0);
70 signal Rdata : std_logic_vector(31 downto 0);
71
71
72 begin
72 begin
73
73
74 Capture <= Rec.UART_Cfg(0);
74 Capture <= Rec.UART_Cfg(0);
75 ACK <= Rec.UART_Cfg(1);
75 --ACK <= Rec.UART_Cfg(1);
76 Send <= Rec.UART_Cfg(2);
76 --Send <= Rec.UART_Cfg(2);
77 Rec.UART_Cfg(3) <= Sended;
77 Rec.UART_Cfg(3) <= Sended;
78 Rec.UART_Cfg(4) <= NwData;
78 Rec.UART_Cfg(4) <= NwData;
79
79
80
80
81 COM0 : entity work.UART
81 COM0 : entity work.UART
82 generic map (Data_sz)
82 generic map (Data_sz)
83 port map (clk,rst,TXD,RXD,Capture,NwData,ACK,Send,Sended,Rec.UART_BTrig,Rec.UART_Rdata,Rec.UART_Wdata);
83 port map (clk,rst,TXD,RXD,Capture,NwData,ACK,Send,Sended,Rec.UART_BTrig,Rec.UART_Rdata,Rec.UART_Wdata);
84
84
85
85
86 process(rst,clk)
86 process(rst,clk)
87 begin
87 begin
88 if(rst='0')then
88 if(rst='0')then
89 Rec.UART_Wdata <= (others => '0');
89 Rec.UART_Wdata <= (others => '0');
90
90
91
91
92 elsif(clk'event and clk='1')then
92 elsif(clk'event and clk='1')then
93
93
94
94
95 --APB Write OP
95 --APB Write OP
96 if (apbi.psel(pindex) and apbi.penable and apbi.pwrite) = '1' then
96 if (apbi.psel(pindex) and apbi.penable and apbi.pwrite) = '1' then
97 case apbi.paddr(abits-1 downto 2) is
97 case apbi.paddr(7 downto 2) is
98 when "000000" =>
98 when "000000" =>
99 Rec.UART_Cfg(2 downto 0) <= apbi.pwdata(2 downto 0);
99 Rec.UART_Cfg(2 downto 0) <= apbi.pwdata(2 downto 0);
100 when "000001" =>
100 when "000001" =>
101 Rec.UART_Wdata <= apbi.pwdata(7 downto 0);
101 Rec.UART_Wdata <= apbi.pwdata(7 downto 0);
102 Send <= '1';
102 when others =>
103 when others =>
103 null;
104 null;
104 end case;
105 end case;
106 else
107 Send <= '0';
105 end if;
108 end if;
106
109
107 --APB READ OP
110 --APB READ OP
108 if (apbi.psel(pindex) and (not apbi.pwrite)) = '1' then
111 if (apbi.psel(pindex) and (not apbi.pwrite)) = '1' then
109 case apbi.paddr(abits-1 downto 2) is
112 case apbi.paddr(7 downto 2) is
110 when "000000" =>
113 when "000000" =>
111 Rdata(31 downto 27) <= Rec.UART_Cfg;
114 Rdata(4 downto 0) <= Rec.UART_Cfg;
112 Rdata(26 downto 12) <= (others => '0');
115 Rdata(26 downto 12) <= (others => '0');
113 Rdata(11 downto 0) <= Rec.UART_BTrig;
116 Rdata(27 downto 16) <= Rec.UART_BTrig;
114 when "000001" =>
117 when "000001" =>
115 Rdata(7 downto 0) <= Rec.UART_Wdata;
118 Rdata(7 downto 0) <= Rec.UART_Wdata;
116 when "000010" =>
119 when "000010" =>
117 Rdata(7 downto 0) <= Rec.UART_Rdata;
120 Rdata(7 downto 0) <= Rec.UART_Rdata;
121 Ack <= '1';
118 when others =>
122 when others =>
119 Rdata <= (others => '0');
123 Rdata <= (others => '0');
120 end case;
124 end case;
125 else
126 Ack <= '0';
121 end if;
127 end if;
122
128
123 end if;
129 end if;
124 apbo.pconfig <= pconfig;
130 apbo.pconfig <= pconfig;
125 end process;
131 end process;
126
132
127 apbo.prdata <= Rdata when apbi.penable = '1';
133 apbo.prdata <= Rdata when apbi.penable = '1';
128
134
129 end ar_APB_UART;
135 end ar_APB_UART;
@@ -1,111 +1,109
1 ------------------------------------------------------------------------------
1 ------------------------------------------------------------------------------
2 -- This file is a part of the LPP VHDL IP LIBRARY
2 -- This file is a part of the LPP VHDL IP LIBRARY
3 -- Copyright (C) 2009 - 2010, Laboratory of Plasmas Physic - CNRS
3 -- Copyright (C) 2009 - 2010, Laboratory of Plasmas Physic - CNRS
4 --
4 --
5 -- This program is free software; you can redistribute it and/or modify
5 -- This program is free software; you can redistribute it and/or modify
6 -- it under the terms of the GNU General Public License as published by
6 -- it under the terms of the GNU General Public License as published by
7 -- the Free Software Foundation; either version 3 of the License, or
7 -- the Free Software Foundation; either version 3 of the License, or
8 -- (at your option) any later version.
8 -- (at your option) any later version.
9 --
9 --
10 -- This program is distributed in the hope that it will be useful,
10 -- This program is distributed in the hope that it will be useful,
11 -- but WITHOUT ANY WARRANTY; without even the implied warranty of
11 -- but WITHOUT ANY WARRANTY; without even the implied warranty of
12 -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 -- GNU General Public License for more details.
13 -- GNU General Public License for more details.
14 --
14 --
15 -- You should have received a copy of the GNU General Public License
15 -- You should have received a copy of the GNU General Public License
16 -- along with this program; if not, write to the Free Software
16 -- along with this program; if not, write to the Free Software
17 -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
17 -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 -------------------------------------------------------------------------------
18 -------------------------------------------------------------------------------
19 library IEEE;
19 library IEEE;
20 use IEEE.numeric_std.all;
20 use IEEE.numeric_std.all;
21 use IEEE.std_logic_1164.all;
21 use IEEE.std_logic_1164.all;
22
22
23 --! Gestion Reception/Transmission
23 --! Gestion Reception/Transmission
24
24
25 entity Shift_REG is
25 entity Shift_REG is
26 generic(Data_sz : integer := 10);
26 generic(Data_sz : integer := 10);
27 port(
27 port(
28 clk : in std_logic;
28 clk : in std_logic;
29 Sclk : in std_logic;
29 Sclk : in std_logic;
30 reset : in std_logic;
30 reset : in std_logic;
31 SIN : in std_logic;
31 SIN : in std_logic;
32 SOUT : out std_logic;
32 SOUT : out std_logic;
33 Serialize : in std_logic;
33 Serialize : in std_logic;
34 Serialized : out std_logic;
34 Serialized : out std_logic;
35 D : in std_logic_vector(Data_sz-1 downto 0);
35 D : in std_logic_vector(Data_sz-1 downto 0);
36 Q : out std_logic_vector(Data_sz-1 downto 0)
36 Q : out std_logic_vector(Data_sz-1 downto 0)
37
38 );
37 );
39 end entity;
38 end entity;
40
39
41
40
42 architecture ar_Shift_REG of Shift_REG is
41 architecture ar_Shift_REG of Shift_REG is
43
42
44 signal REG : std_logic_vector(Data_sz-1 downto 0);
43 signal REG : std_logic_vector(Data_sz-1 downto 0);
45 signal Serialized_int : std_logic;
44 signal Serialized_int : std_logic;
46 signal Serialize_reg : std_logic;
45 signal Serialize_reg : std_logic;
47 signal CptBits : std_logic_vector(Data_sz-1 downto 0);
46 signal CptBits : std_logic_vector(Data_sz-1 downto 0);
48 constant CptBits_trig : std_logic_vector(Data_sz-1 downto 0) := (others => '1');
47 constant CptBits_trig : std_logic_vector(Data_sz-1 downto 0) := (others => '1');
49 signal CptBits_flag : std_logic;
48 signal CptBits_flag : std_logic;
50 signal CptBits_flag_reg : std_logic;
49 signal CptBits_flag_reg : std_logic;
51
50
52 begin
51 begin
53
52
54 Serialized <= Serialized_int;
53 Serialized <= Serialized_int;
55 CptBits_flag <= '1' when CptBits = CptBits_trig else '0';
54 CptBits_flag <= '1' when CptBits = CptBits_trig else '0';
56
55
57 process(reset,clk)
56 process(reset,clk)
58 begin
57 begin
59 if reset = '0' then
58 if reset = '0' then
60 Serialized_int <= '1';
59 Serialized_int <= '1';
61 CptBits_flag_reg <= '0';
60 CptBits_flag_reg <= '0';
62 Q <= (others => '0');
61 Q <= (others => '0');
63 elsif clk'event and clk = '1' then
62 elsif clk'event and clk = '1' then
64 CptBits_flag_reg <= CptBits_flag;
63 CptBits_flag_reg <= CptBits_flag;
65
64
66 if CptBits_flag = '1' and CptBits_flag_reg = '0' then
65 if CptBits_flag = '1' and CptBits_flag_reg = '0' then
67 Serialized_int <= '1';
66 Serialized_int <= '1';
68 Q <= REG;
67 Q <= REG;
69 elsif Serialize = '1' then
68 elsif Serialize = '1' then
70 Serialized_int <= '0';
69 Serialized_int <= '0';
71 end if;
70 end if;
72 end if;
71 end if;
73 end process;
72 end process;
74
73
75
74
76 process(reset,Sclk)
75 process(reset,Sclk)
77 begin
76 begin
78 if reset = '0' then
77 if reset = '0' then
79 CptBits <= (others => '0');
78 CptBits <= (others => '0');
80 REG <= (others => '0');
79 REG <= (others => '0');
81 SOUT <= '1';
80 SOUT <= '1';
82 Serialize_reg <= '0';
81 Serialize_reg <= '0';
83 elsif Sclk'event and Sclk = '1' then
82 elsif Sclk'event and Sclk = '1' then
84 Serialize_reg <= Serialized_int;
83 Serialize_reg <= Serialized_int;
85 if (Serialized_int = '0' and Serialize_reg ='1') then
84 if (Serialized_int = '0' and Serialize_reg ='1') then
86 REG <= SIN & D(Data_sz-1 downto 1);
85 REG <= SIN & D(Data_sz-1 downto 1);
87 SOUT <= D(0);
86 SOUT <= D(0);
88 elsif CptBits_flag ='1' then
87 elsif CptBits_flag ='1' then
89 REG <= SIN & D(Data_sz-1 downto 1);
88 REG <= SIN & D(Data_sz-1 downto 1);
90 SOUT <= D(0);
89 SOUT <= D(0);
91 elsif Serialized_int = '0' then
90 elsif Serialized_int = '0' then
92 REG <= SIN & REG(Data_sz-1 downto 1);
91 REG <= SIN & REG(Data_sz-1 downto 1);
93 SOUT <= REG(0);
92 SOUT <= REG(0);
94 else
93 else
95 SOUT <= '1';
94 SOUT <= '1';
96 end if;
95 end if;
97 if Serialized_int = '0' then
96 if Serialized_int = '0' then
98 if CptBits_flag = '1' then
97 if CptBits_flag = '1' then
99 CptBits <= (others => '0');
98 CptBits <= (others => '0');
100 else
99 else
101 CptBits <= '1' & CptBits(Data_sz-1 downto 1);
100 CptBits <= '1' & CptBits(Data_sz-1 downto 1);
102 end if;
101 end if;
103
104 else
102 else
105 CptBits <= (others => '0');
103 CptBits <= (others => '0');
106 end if;
104 end if;
107
105
108 end if;
106 end if;
109 end process;
107 end process;
110
108
111 end ar_Shift_REG;
109 end ar_Shift_REG;
@@ -1,98 +1,99
1 ------------------------------------------------------------------------------
1 ------------------------------------------------------------------------------
2 -- This file is a part of the LPP VHDL IP LIBRARY
2 -- This file is a part of the LPP VHDL IP LIBRARY
3 -- Copyright (C) 2009 - 2010, Laboratory of Plasmas Physic - CNRS
3 -- Copyright (C) 2009 - 2010, Laboratory of Plasmas Physic - CNRS
4 --
4 --
5 -- This program is free software; you can redistribute it and/or modify
5 -- This program is free software; you can redistribute it and/or modify
6 -- it under the terms of the GNU General Public License as published by
6 -- it under the terms of the GNU General Public License as published by
7 -- the Free Software Foundation; either version 3 of the License, or
7 -- the Free Software Foundation; either version 3 of the License, or
8 -- (at your option) any later version.
8 -- (at your option) any later version.
9 --
9 --
10 -- This program is distributed in the hope that it will be useful,
10 -- This program is distributed in the hope that it will be useful,
11 -- but WITHOUT ANY WARRANTY; without even the implied warranty of
11 -- but WITHOUT ANY WARRANTY; without even the implied warranty of
12 -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 -- GNU General Public License for more details.
13 -- GNU General Public License for more details.
14 --
14 --
15 -- You should have received a copy of the GNU General Public License
15 -- You should have received a copy of the GNU General Public License
16 -- along with this program; if not, write to the Free Software
16 -- along with this program; if not, write to the Free Software
17 -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
17 -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 -------------------------------------------------------------------------------
18 -------------------------------------------------------------------------------
19 library IEEE;
19 library IEEE;
20 use IEEE.numeric_std.all;
20 use IEEE.numeric_std.all;
21 use IEEE.std_logic_1164.all;
21 use IEEE.std_logic_1164.all;
22 library lpp;
22 library lpp;
23 use lpp.lpp_uart.all;
23 use lpp.lpp_uart.all;
24
24
25 --! Programme qui va gerer toute la communication entre le PC et le FPGA
25 --! Programme qui va gerer toute la communication entre le PC et le FPGA
26
26
27 entity UART is
27 entity UART is
28 generic(Data_sz : integer := 8); --! Constante de taille pour un mot de donnee
28 generic(Data_sz : integer := 8); --! Constante de taille pour un mot de donnee
29 port(
29 port(
30 clk : in std_logic; --! Horloge a 25Mhz du systeme
30 clk : in std_logic; --! Horloge a 25Mhz du systeme
31 reset : in std_logic; --! Reset du systeme
31 reset : in std_logic; --! Reset du systeme
32 TXD : out std_logic; --! Transmission, cote PC
32 TXD : out std_logic; --! Transmission, cote PC
33 RXD : in std_logic; --! Reception, cote PC
33 RXD : in std_logic; --! Reception, cote PC
34 Capture : in std_logic; --! "Reset" cible pour le generateur de bauds, ici indissocie du reset global
34 Capture : in std_logic; --! "Reset" cible pour le generateur de bauds, ici indissocie du reset global
35 NwDat : out std_logic; --! Flag, Nouvelle donnee presente
35 NwDat : out std_logic; --! Flag, Nouvelle donnee presente
36 ACK : in std_logic; --! Flag, Reponse au flag precedent
36 ACK : in std_logic; --! Flag, Reponse au flag precedent
37 Send : in std_logic; --! Flag, Demande d'envoi sur le bus
37 Send : in std_logic; --! Flag, Demande d'envoi sur le bus
38 Sended : out std_logic; --! Flag, Envoi termine
38 Sended : out std_logic; --! Flag, Envoi termine
39 BTrigger : out std_logic_vector(11 downto 0); --! Registre contenant la valeur du diviseur de frequence pour la transmission
39 BTrigger : out std_logic_vector(11 downto 0); --! Registre contenant la valeur du diviseur de frequence pour la transmission
40 RDATA : out std_logic_vector(Data_sz-1 downto 0); --! Mot de donnee en provenance de l'utilisateur
40 RDATA : out std_logic_vector(Data_sz-1 downto 0); --! Mot de donnee en provenance de l'utilisateur
41 WDATA : in std_logic_vector(Data_sz-1 downto 0) --! Mot de donnee a transmettre a l'utilisateur
41 WDATA : in std_logic_vector(Data_sz-1 downto 0) --! Mot de donnee a transmettre a l'utilisateur
42 );
42 );
43 end entity;
43 end entity;
44
44
45
45
46 --! @details Gestion de la Reception/Transmission donc de la Vectorisation/Serialisation
46 --! @details Gestion de la Reception/Transmission donc de la Vectorisation/Serialisation
47 --! ainsi que la detection et le reglage de le frequence de transmission optimale sur le bus (Generateur de Bauds)
47 --! ainsi que la detection et le reglage de le frequence de transmission optimale sur le bus (Generateur de Bauds)
48 architecture ar_UART of UART is
48 architecture ar_UART of UART is
49 signal Bclk : std_logic;
49 signal Bclk : std_logic;
50
50
51 signal RDATA_int : std_logic_vector(Data_sz+1 downto 0);
51 signal RDATA_int : std_logic_vector(Data_sz+1 downto 0);
52 signal WDATA_int : std_logic_vector(Data_sz+1 downto 0);
52 signal WDATA_int : std_logic_vector(Data_sz+1 downto 0);
53
53
54 signal TXD_Dummy : std_logic;
54 signal TXD_Dummy : std_logic;
55 signal NwDat_int : std_logic;
55 signal NwDat_int : std_logic;
56 signal NwDat_int_reg : std_logic;
56 signal NwDat_int_reg : std_logic;
57 signal receive : std_logic;
57 signal receive : std_logic;
58 constant zeroVect : std_logic_vector(Data_sz+1 downto 0) := (others => '0');
58
59
59 begin
60 begin
60
61
61
62
62 RDATA <= RDATA_int(8 downto 1);
63 RDATA <= RDATA_int(8 downto 1);
63 WDATA_int <= '1' & WDATA & '0';
64 WDATA_int <= '1' & WDATA & '0';
64
65
65 BaudGenerator : BaudGen
66 BaudGenerator : BaudGen
66 port map(clk,reset,Capture,Bclk,RXD,BTrigger);
67 port map(clk,reset,Capture,Bclk,RXD,BTrigger);
67
68
68
69
69 RX_REG : Shift_REG
70 RX_REG : Shift_REG
70 generic map(Data_sz+2)
71 generic map(Data_sz+2)
71 port map(clk,Bclk,reset,RXD,TXD_Dummy,receive,NwDat_int,(others => '0'),RDATA_int);
72 port map(clk,Bclk,reset,RXD,TXD_Dummy,receive,NwDat_int,zeroVect,RDATA_int);
72
73
73 TX_REG : Shift_REG
74 TX_REG : Shift_REG
74 generic map(Data_sz+2)
75 generic map(Data_sz+2)
75 port map(clk,Bclk,reset,'1',TXD,Send,Sended,WDATA_int);
76 port map(clk,Bclk,reset,'1',TXD,Send,Sended,WDATA_int);
76
77
77
78
78
79
79 process(clk,reset)
80 process(clk,reset)
80 begin
81 begin
81 if reset = '0' then
82 if reset = '0' then
82 NwDat <= '0';
83 NwDat <= '0';
83 elsif clk'event and clk = '1' then
84 elsif clk'event and clk = '1' then
84 NwDat_int_reg <= NwDat_int;
85 NwDat_int_reg <= NwDat_int;
85 if RXD = '1' and NwDat_int = '1' then
86 if RXD = '1' and NwDat_int = '1' then
86 receive <= '0';
87 receive <= '0';
87 elsif RXD = '0' then
88 elsif RXD = '0' then
88 receive <= '1';
89 receive <= '1';
89 end if;
90 end if;
90 if NwDat_int_reg = '0' and NwDat_int = '1' then
91 if NwDat_int_reg = '0' and NwDat_int = '1' then
91 NwDat <= '1';
92 NwDat <= '1';
92 elsif ack = '1' then
93 elsif ack = '1' then
93 NwDat <= '0';
94 NwDat <= '0';
94 end if;
95 end if;
95 end if;
96 end if;
96 end process;
97 end process;
97
98
98 end ar_UART;
99 end ar_UART;
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