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1 TECHNOLOGY=PROASIC3
2 PACKAGE=\"\"
3 SPEED=Std
4 SYNFREQ=50
5
6 PART=A3PE3000L
7 DESIGNER_PACKAGE=FBGA
8 DESIGNER_PINS=324
9 DESIGNER_VOLTAGE=COM
10 DESIGNER_TEMP=COM
11
12 MANUFACTURER=Actel
13 MGCPART=$(PART)
14 MGCTECHNOLOGY=PROASIC3
15 MGCPACKAGE= {$(DESIGNER_PINS) $(DESIGNER_PACKAGE)}
16 LIBERO_DIE=IT14X14M4LDP
17 LIBERO_PACKAGE=fg$(DESIGNER_PINS)
18
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1 # Actel Physical design constraints file
2 # Generated file
3
4 # Version: 9.1 SP3 9.1.3.4
5 # Family: ProASIC3L , Die: A3PE3000L , Package: 324 FBGA
6 # Date generated: Tue Oct 18 08:21:45 2011
7
8
9 #
10 # IO banks setting
11 #
12
13
14 #
15 # I/O constraints
16 #
17
18 set_io clk_50 \
19 -pinname F7 \
20 -fixed yes \
21 -DIRECTION Inout
22
23 set_io clk_49 \
24 -pinname K14 \
25 -fixed yes \
26 -DIRECTION Inout
27
28 set_io reset \
29 -pinname T2 \
30 -fixed yes \
31 -DIRECTION Inout
32 #====================================================================
33 # BPs
34 #====================================================================
35 set_io BP0 \
36 -pinname L1 \
37 -fixed yes \
38 -DIRECTION Inout
39
40 set_io BP1 \
41 -pinname R1 \
42 -fixed yes \
43 -DIRECTION Inout
44
45 #====================================================================
46 # LEDs
47 #====================================================================
48
49 set_io LED0 \
50 -pinname V6 \
51 -fixed yes \
52 -DIRECTION Inout
53
54 set_io LED1 \
55 -pinname V5 \
56 -fixed yes \
57 -DIRECTION Inout
58
59 set_io LED2 \
60 -pinname T4 \
61 -fixed yes \
62 -DIRECTION Inout
63
64 #====================================================================
65 # UARTS
66 #====================================================================
67
68 set_io TXD1 \
69 -pinname N17 \
70 -fixed yes \
71 -DIRECTION Inout
72
73 set_io RXD1 \
74 -pinname N18 \
75 -fixed yes \
76 -DIRECTION Inout
77
78 set_io nCTS1 \
79 -pinname P18 \
80 -fixed yes \
81 -DIRECTION Inout
82
83 set_io nRTS1 \
84 -pinname P17 \
85 -fixed yes \
86 -DIRECTION Inout
87
88
89 set_io TXD2 \
90 -pinname P13 \
91 -fixed yes \
92 -DIRECTION Inout
93
94 set_io RXD2 \
95 -pinname T18 \
96 -fixed yes \
97 -DIRECTION Inout
98
99 set_io nCTS2 \
100 -pinname V17 \
101 -fixed yes \
102 -DIRECTION Inout
103
104 set_io nDTR2 \
105 -pinname L15 \
106 -fixed yes \
107 -DIRECTION Inout
108
109 set_io nRTS2 \
110 -pinname M15 \
111 -fixed yes \
112 -DIRECTION Inout
113
114 set_io nDCD2 \
115 -pinname N15 \
116 -fixed yes \
117 -DIRECTION Inout
118
119
120 #====================================================================
121 # EXT CONNECTOR
122 #====================================================================
123
124 set_io IO0 \
125 -pinname E4 \
126 -fixed yes \
127 -DIRECTION Inout
128
129 set_io IO1 \
130 -pinname D3 \
131 -fixed yes \
132 -DIRECTION Inout
133
134 set_io IO2 \
135 -pinname C2 \
136 -fixed yes \
137 -DIRECTION Inout
138
139 set_io IO3 \
140 -pinname D1 \
141 -fixed yes \
142 -DIRECTION Inout
143
144 set_io IO4 \
145 -pinname F2 \
146 -fixed yes \
147 -DIRECTION Inout
148
149 set_io IO5 \
150 -pinname F3 \
151 -fixed yes \
152 -DIRECTION Inout
153
154 set_io IO6 \
155 -pinname G2 \
156 -fixed yes \
157 -DIRECTION Inout
158
159 set_io IO7 \
160 -pinname H3 \
161 -fixed yes \
162 -DIRECTION Inout
163
164 set_io IO8 \
165 -pinname H4 \
166 -fixed yes \
167 -DIRECTION Inout
168
169 set_io IO9 \
170 -pinname J2 \
171 -fixed yes \
172 -DIRECTION Inout
173
174 set_io IO10 \
175 -pinname P1 \
176 -fixed yes \
177 -DIRECTION Inout
178
179 set_io IO11 \
180 -pinname N1 \
181 -fixed yes \
182 -DIRECTION Inout
183
184 #====================================================================
185 # SPACE WIRE
186 #====================================================================
187
188 set_io SPW_EN \
189 -pinname R12 \
190 -fixed yes \
191 -DIRECTION Inout
192
193 #================================
194 # NOMINAL LINK
195 #================================
196
197 set_io SPW_NOM_DIN \
198 -pinname R10 \
199 -fixed yes \
200 -DIRECTION Inout
201
202 set_io SPW_NOM_SIN \
203 -pinname R13 \
204 -fixed yes \
205 -DIRECTION Inout
206
207 set_io SPW_NOM_DOUT \
208 -pinname T13 \
209 -fixed yes \
210 -DIRECTION Inout
211
212 set_io SPW_NOM_SOUT \
213 -pinname T10 \
214 -fixed yes \
215 -DIRECTION Inout
216
217 #================================
218 # REDUNDANT LINK
219 #================================
220
221 set_io SPW_RED_DIN \
222 -pinname U18 \
223 -fixed yes \
224 -DIRECTION Inout
225
226 set_io SPW_RED_SIN \
227 -pinname T12 \
228 -fixed yes \
229 -DIRECTION Inout
230
231 set_io SPW_RED_DOUT \
232 -pinname U10 \
233 -fixed yes \
234 -DIRECTION Inout
235
236 set_io SPW_RED_SOUT \
237 -pinname P16 \
238 -fixed yes \
239 -DIRECTION Inout
240
241 #====================================================================
242 # MINI LFR ADC INPUTS
243 #====================================================================
244
245 set_io ADC_nCS \
246 -pinname K1 \
247 -fixed yes \
248 -DIRECTION Inout
249
250 set_io ADC_CLK \
251 -pinname T1 \
252 -fixed yes \
253 -DIRECTION Inout
254
255
256 #================================
257 # ADC DATA
258 #================================
259
260 set_io ADC_SDO\[0\] \
261 -pinname V4 \
262 -fixed yes \
263 -DIRECTION Inout
264
265 set_io ADC_SDO\[1\] \
266 -pinname V3 \
267 -fixed yes \
268 -DIRECTION Inout
269
270 set_io ADC_SDO\[2\] \
271 -pinname V2 \
272 -fixed yes \
273 -DIRECTION Inout
274
275 set_io ADC_SDO\[3\] \
276 -pinname U1 \
277 -fixed yes \
278 -DIRECTION Inout
279
280 set_io ADC_SDO\[4\] \
281 -pinname J1 \
282 -fixed yes \
283 -DIRECTION Inout
284
285 set_io ADC_SDO\[5\] \
286 -pinname H1 \
287 -fixed yes \
288 -DIRECTION Inout
289
290 set_io ADC_SDO\[6\] \
291 -pinname F1 \
292 -fixed yes \
293 -DIRECTION Inout
294
295 set_io ADC_SDO\[7\] \
296 -pinname E1 \
297 -fixed yes \
298 -DIRECTION Inout
299
300
301 #====================================================================
302 # SRAM
303 #====================================================================
304
305 #================================
306 # SRAM CTRL
307 #================================
308
309 set_io SRAM_nWE \
310 -pinname C13 \
311 -fixed yes \
312 -DIRECTION Inout
313
314 set_io SRAM_CE \
315 -pinname J14 \
316 -fixed yes \
317 -DIRECTION Inout
318
319 set_io SRAM_nOE \
320 -pinname B9 \
321 -fixed yes \
322 -DIRECTION Inout
323
324 set_io SRAM_nBE\[0\] \
325 -pinname H15 \
326 -fixed yes \
327 -DIRECTION Inout
328
329 set_io SRAM_nBE\[1\] \
330 -pinname C12 \
331 -fixed yes \
332 -DIRECTION Inout
333
334 set_io SRAM_nBE\[2\] \
335 -pinname A10 \
336 -fixed yes \
337 -DIRECTION Inout
338
339 set_io SRAM_nBE\[3\] \
340 -pinname A9 \
341 -fixed yes \
342 -DIRECTION Inout
343
344
345 #================================
346 # SRAM ADDRESS
347 #================================
348
349 set_io SRAM_A\[0\] \
350 -pinname C11 \
351 -fixed yes \
352 -DIRECTION Inout
353
354 set_io SRAM_A\[1\] \
355 -pinname C10 \
356 -fixed yes \
357 -DIRECTION Inout
358
359 set_io SRAM_A\[2\] \
360 -pinname C9 \
361 -fixed yes \
362 -DIRECTION Inout
363
364 set_io SRAM_A\[3\] \
365 -pinname C8 \
366 -fixed yes \
367 -DIRECTION Inout
368
369 set_io SRAM_A\[4\] \
370 -pinname C7 \
371 -fixed yes \
372 -DIRECTION Inout
373
374 set_io SRAM_A\[5\] \
375 -pinname A5 \
376 -fixed yes \
377 -DIRECTION Inout
378
379 set_io SRAM_A\[6\] \
380 -pinname A6 \
381 -fixed yes \
382 -DIRECTION Inout
383
384 set_io SRAM_A\[7\] \
385 -pinname B6 \
386 -fixed yes \
387 -DIRECTION Inout
388
389 set_io SRAM_A\[8\] \
390 -pinname B7 \
391 -fixed yes \
392 -DIRECTION Inout
393
394 set_io SRAM_A\[9\] \
395 -pinname A8 \
396 -fixed yes \
397 -DIRECTION Inout
398
399 set_io SRAM_A\[10\] \
400 -pinname B10 \
401 -fixed yes \
402 -DIRECTION Inout
403
404 set_io SRAM_A\[11\] \
405 -pinname A11 \
406 -fixed yes \
407 -DIRECTION Inout
408
409 set_io SRAM_A\[12\] \
410 -pinname B12 \
411 -fixed yes \
412 -DIRECTION Inout
413
414 set_io SRAM_A\[13\] \
415 -pinname A13 \
416 -fixed yes \
417 -DIRECTION Inout
418
419 set_io SRAM_A\[14\] \
420 -pinname B13 \
421 -fixed yes \
422 -DIRECTION Inout
423
424 set_io SRAM_A\[15\] \
425 -pinname C18 \
426 -fixed yes \
427 -DIRECTION Inout
428
429 set_io SRAM_A\[16\] \
430 -pinname C17 \
431 -fixed yes \
432 -DIRECTION Inout
433
434 set_io SRAM_A\[17\] \
435 -pinname B18 \
436 -fixed yes \
437 -DIRECTION Inout
438
439 set_io SRAM_A\[18\] \
440 -pinname C16 \
441 -fixed yes \
442 -DIRECTION Inout
443
444 set_io SRAM_A\[19\] \
445 -pinname D15 \
446 -fixed yes \
447 -DIRECTION Inout
448
449
450 #================================
451 # SRAM DATA
452 #================================
453
454 set_io SRAM_DQ\[0\] \
455 -pinname D16 \
456 -fixed yes \
457 -DIRECTION Inout
458
459 set_io SRAM_DQ\[1\] \
460 -pinname D18 \
461 -fixed yes \
462 -DIRECTION Inout
463
464 set_io SRAM_DQ\[2\] \
465 -pinname E15 \
466 -fixed yes \
467 -DIRECTION Inout
468
469 set_io SRAM_DQ\[3\] \
470 -pinname E18 \
471 -fixed yes \
472 -DIRECTION Inout
473
474 set_io SRAM_DQ\[4\] \
475 -pinname F15 \
476 -fixed yes \
477 -DIRECTION Inout
478
479 set_io SRAM_DQ\[5\] \
480 -pinname F18 \
481 -fixed yes \
482 -DIRECTION Inout
483
484 set_io SRAM_DQ\[6\] \
485 -pinname G15 \
486 -fixed yes \
487 -DIRECTION Inout
488
489 set_io SRAM_DQ\[7\] \
490 -pinname G17 \
491 -fixed yes \
492 -DIRECTION Inout
493
494 set_io SRAM_DQ\[8\] \
495 -pinname K15 \
496 -fixed yes \
497 -DIRECTION Inout
498
499 set_io SRAM_DQ\[9\] \
500 -pinname J18 \
501 -fixed yes \
502 -DIRECTION Inout
503
504 set_io SRAM_DQ\[10\] \
505 -pinname J15 \
506 -fixed yes \
507 -DIRECTION Inout
508
509 set_io SRAM_DQ\[11\] \
510 -pinname H18 \
511 -fixed yes \
512 -DIRECTION Inout
513
514 set_io SRAM_DQ\[12\] \
515 -pinname C3 \
516 -fixed yes \
517 -DIRECTION Inout
518
519 set_io SRAM_DQ\[13\] \
520 -pinname D4 \
521 -fixed yes \
522 -DIRECTION Inout
523
524 set_io SRAM_DQ\[14\] \
525 -pinname D5 \
526 -fixed yes \
527 -DIRECTION Inout
528
529 set_io SRAM_DQ\[15\] \
530 -pinname C6 \
531 -fixed yes \
532 -DIRECTION Inout
533
534 set_io SRAM_DQ\[16\] \
535 -pinname D14 \
536 -fixed yes \
537 -DIRECTION Inout
538
539 set_io SRAM_DQ\[17\] \
540 -pinname A15 \
541 -fixed yes \
542 -DIRECTION Inout
543
544 set_io SRAM_DQ\[18\] \
545 -pinname C15 \
546 -fixed yes \
547 -DIRECTION Inout
548
549 set_io SRAM_DQ\[19\] \
550 -pinname B17 \
551 -fixed yes \
552 -DIRECTION Inout
553
554 set_io SRAM_DQ\[20\] \
555 -pinname A17 \
556 -fixed yes \
557 -DIRECTION Inout
558
559 set_io SRAM_DQ\[21\] \
560 -pinname B16 \
561 -fixed yes \
562 -DIRECTION Inout
563
564 set_io SRAM_DQ\[22\] \
565 -pinname A16 \
566 -fixed yes \
567 -DIRECTION Inout
568
569 set_io SRAM_DQ\[23\] \
570 -pinname A14 \
571 -fixed yes \
572 -DIRECTION Inout
573
574 set_io SRAM_DQ\[24\] \
575 -pinname A4 \
576 -fixed yes \
577 -DIRECTION Inout
578
579 set_io SRAM_DQ\[25\] \
580 -pinname A3 \
581 -fixed yes \
582 -DIRECTION Inout
583
584 set_io SRAM_DQ\[26\] \
585 -pinname A2 \
586 -fixed yes \
587 -DIRECTION Inout
588
589 set_io SRAM_DQ\[27\] \
590 -pinname B1 \
591 -fixed yes \
592 -DIRECTION Inout
593
594 set_io SRAM_DQ\[28\] \
595 -pinname C1 \
596 -fixed yes \
597 -DIRECTION Inout
598
599 set_io SRAM_DQ\[29\] \
600 -pinname B2 \
601 -fixed yes \
602 -DIRECTION Inout
603
604 set_io SRAM_DQ\[30\] \
605 -pinname B3 \
606 -fixed yes \
607 -DIRECTION Inout
608
609 set_io SRAM_DQ\[31\] \
610 -pinname C4 \
611 -fixed yes \
612 -DIRECTION Inout
613
614
615
616
617
618
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620
621
622
623
624
625
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@@ -0,0 +1,59
1 # Synplicity, Inc. constraint file
2 # /home/jiri/ibm/vhdl/grlib/boards/actel-coremp7-1000/default.sdc
3 # Written on Wed Aug 1 19:29:24 2007
4 # by Synplify Pro, Synplify Pro 8.8.0.4 Scope Editor
5
6 #
7 # Collections
8 #
9
10 #
11 # Clocks
12 #
13 define_clock {clk} -name {clk} -freq 60 -clockgroup default_clkgroup -route 5
14
15 #
16 # Clock to Clock
17 #
18
19 #
20 # Inputs/Outputs
21 #
22 define_output_delay -disable -default 5.00 -improve 0.00 -route 0.00 -ref {clk:r}
23 define_input_delay -disable -default 5.00 -improve 0.00 -route 0.00 -ref {clk:r}
24
25
26 #
27 # Registers
28 #
29
30 #
31 # Multicycle Path
32 #
33
34 #
35 # False Path
36 #
37
38 #
39 # Path Delay
40 #
41
42 #
43 # Attributes
44 #
45 define_global_attribute syn_useioff {1}
46 define_global_attribute -disable syn_netlist_hierarchy {0}
47 define_attribute {etx_clk} syn_noclockbuf {1}
48
49 #
50 # I/O standards
51 #
52
53 #
54 # Compile Points
55 #
56
57 #
58 # Other Constraints
59 #
@@ -0,0 +1,288
1 #
2 # Automatically generated make config: don't edit
3 #
4
5 #
6 # Synthesis
7 #
8 # CONFIG_SYN_INFERRED is not set
9 # CONFIG_SYN_STRATIX is not set
10 # CONFIG_SYN_STRATIXII is not set
11 # CONFIG_SYN_STRATIXIII is not set
12 # CONFIG_SYN_CYCLONEIII is not set
13 # CONFIG_SYN_ALTERA is not set
14 # CONFIG_SYN_AXCEL is not set
15 # CONFIG_SYN_PROASIC is not set
16 # CONFIG_SYN_PROASICPLUS is not set
17 CONFIG_SYN_PROASIC3=y
18 # CONFIG_SYN_UT025CRH is not set
19 # CONFIG_SYN_ATC18 is not set
20 # CONFIG_SYN_ATC18RHA is not set
21 # CONFIG_SYN_CUSTOM1 is not set
22 # CONFIG_SYN_EASIC90 is not set
23 # CONFIG_SYN_IHP25 is not set
24 # CONFIG_SYN_IHP25RH is not set
25 # CONFIG_SYN_LATTICE is not set
26 # CONFIG_SYN_ECLIPSE is not set
27 # CONFIG_SYN_PEREGRINE is not set
28 # CONFIG_SYN_RH_LIB18T is not set
29 # CONFIG_SYN_RHUMC is not set
30 # CONFIG_SYN_SMIC13 is not set
31 # CONFIG_SYN_SPARTAN2 is not set
32 # CONFIG_SYN_SPARTAN3 is not set
33 # CONFIG_SYN_SPARTAN3E is not set
34 # CONFIG_SYN_VIRTEX is not set
35 # CONFIG_SYN_VIRTEXE is not set
36 # CONFIG_SYN_VIRTEX2 is not set
37 # CONFIG_SYN_VIRTEX4 is not set
38 # CONFIG_SYN_VIRTEX5 is not set
39 # CONFIG_SYN_UMC is not set
40 # CONFIG_SYN_TSMC90 is not set
41 # CONFIG_SYN_INFER_RAM is not set
42 # CONFIG_SYN_INFER_PADS is not set
43 # CONFIG_SYN_NO_ASYNC is not set
44 # CONFIG_SYN_SCAN is not set
45
46 #
47 # Clock generation
48 #
49 # CONFIG_CLK_INFERRED is not set
50 # CONFIG_CLK_HCLKBUF is not set
51 # CONFIG_CLK_ALTDLL is not set
52 # CONFIG_CLK_LATDLL is not set
53 CONFIG_CLK_PRO3PLL=y
54 # CONFIG_CLK_LIB18T is not set
55 # CONFIG_CLK_RHUMC is not set
56 # CONFIG_CLK_CLKDLL is not set
57 # CONFIG_CLK_DCM is not set
58 CONFIG_CLK_MUL=2
59 CONFIG_CLK_DIV=8
60 CONFIG_OCLK_DIV=2
61 # CONFIG_PCI_SYSCLK is not set
62 CONFIG_LEON3=y
63 CONFIG_PROC_NUM=1
64
65 #
66 # Processor
67 #
68
69 #
70 # Integer unit
71 #
72 CONFIG_IU_NWINDOWS=8
73 # CONFIG_IU_V8MULDIV is not set
74 # CONFIG_IU_SVT is not set
75 CONFIG_IU_LDELAY=1
76 CONFIG_IU_WATCHPOINTS=0
77 # CONFIG_PWD is not set
78 CONFIG_IU_RSTADDR=00000
79
80 #
81 # Floating-point unit
82 #
83 # CONFIG_FPU_ENABLE is not set
84
85 #
86 # Cache system
87 #
88 CONFIG_ICACHE_ENABLE=y
89 CONFIG_ICACHE_ASSO1=y
90 # CONFIG_ICACHE_ASSO2 is not set
91 # CONFIG_ICACHE_ASSO3 is not set
92 # CONFIG_ICACHE_ASSO4 is not set
93 # CONFIG_ICACHE_SZ1 is not set
94 # CONFIG_ICACHE_SZ2 is not set
95 CONFIG_ICACHE_SZ4=y
96 # CONFIG_ICACHE_SZ8 is not set
97 # CONFIG_ICACHE_SZ16 is not set
98 # CONFIG_ICACHE_SZ32 is not set
99 # CONFIG_ICACHE_SZ64 is not set
100 # CONFIG_ICACHE_SZ128 is not set
101 # CONFIG_ICACHE_SZ256 is not set
102 # CONFIG_ICACHE_LZ16 is not set
103 CONFIG_ICACHE_LZ32=y
104 CONFIG_DCACHE_ENABLE=y
105 CONFIG_DCACHE_ASSO1=y
106 # CONFIG_DCACHE_ASSO2 is not set
107 # CONFIG_DCACHE_ASSO3 is not set
108 # CONFIG_DCACHE_ASSO4 is not set
109 # CONFIG_DCACHE_SZ1 is not set
110 # CONFIG_DCACHE_SZ2 is not set
111 CONFIG_DCACHE_SZ4=y
112 # CONFIG_DCACHE_SZ8 is not set
113 # CONFIG_DCACHE_SZ16 is not set
114 # CONFIG_DCACHE_SZ32 is not set
115 # CONFIG_DCACHE_SZ64 is not set
116 # CONFIG_DCACHE_SZ128 is not set
117 # CONFIG_DCACHE_SZ256 is not set
118 # CONFIG_DCACHE_LZ16 is not set
119 CONFIG_DCACHE_LZ32=y
120 # CONFIG_DCACHE_SNOOP is not set
121 CONFIG_CACHE_FIXED=0
122
123 #
124 # MMU
125 #
126 CONFIG_MMU_ENABLE=y
127 # CONFIG_MMU_COMBINED is not set
128 CONFIG_MMU_SPLIT=y
129 # CONFIG_MMU_REPARRAY is not set
130 CONFIG_MMU_REPINCREMENT=y
131 # CONFIG_MMU_I2 is not set
132 # CONFIG_MMU_I4 is not set
133 CONFIG_MMU_I8=y
134 # CONFIG_MMU_I16 is not set
135 # CONFIG_MMU_I32 is not set
136 # CONFIG_MMU_D2 is not set
137 # CONFIG_MMU_D4 is not set
138 CONFIG_MMU_D8=y
139 # CONFIG_MMU_D16 is not set
140 # CONFIG_MMU_D32 is not set
141 CONFIG_MMU_FASTWB=y
142 CONFIG_MMU_PAGE_4K=y
143 # CONFIG_MMU_PAGE_8K is not set
144 # CONFIG_MMU_PAGE_16K is not set
145 # CONFIG_MMU_PAGE_32K is not set
146 # CONFIG_MMU_PAGE_PROG is not set
147
148 #
149 # Debug Support Unit
150 #
151 # CONFIG_DSU_ENABLE is not set
152
153 #
154 # Fault-tolerance
155 #
156
157 #
158 # VHDL debug settings
159 #
160 # CONFIG_IU_DISAS is not set
161 # CONFIG_DEBUG_PC32 is not set
162
163 #
164 # AMBA configuration
165 #
166 CONFIG_AHB_DEFMST=0
167 CONFIG_AHB_RROBIN=y
168 # CONFIG_AHB_SPLIT is not set
169 CONFIG_AHB_IOADDR=FFF
170 CONFIG_APB_HADDR=800
171 # CONFIG_AHB_MON is not set
172
173 #
174 # Debug Link
175 #
176 CONFIG_DSU_UART=y
177 # CONFIG_DSU_JTAG is not set
178
179 #
180 # Peripherals
181 #
182
183 #
184 # Memory controllers
185 #
186
187 #
188 # 8/32-bit PROM/SRAM controller
189 #
190 CONFIG_SRCTRL=y
191 # CONFIG_SRCTRL_8BIT is not set
192 CONFIG_SRCTRL_PROMWS=3
193 CONFIG_SRCTRL_RAMWS=0
194 CONFIG_SRCTRL_IOWS=0
195 # CONFIG_SRCTRL_RMW is not set
196 CONFIG_SRCTRL_SRBANKS1=y
197 # CONFIG_SRCTRL_SRBANKS2 is not set
198 # CONFIG_SRCTRL_SRBANKS3 is not set
199 # CONFIG_SRCTRL_SRBANKS4 is not set
200 # CONFIG_SRCTRL_SRBANKS5 is not set
201 # CONFIG_SRCTRL_BANKSZ0 is not set
202 # CONFIG_SRCTRL_BANKSZ1 is not set
203 # CONFIG_SRCTRL_BANKSZ2 is not set
204 # CONFIG_SRCTRL_BANKSZ3 is not set
205 # CONFIG_SRCTRL_BANKSZ4 is not set
206 # CONFIG_SRCTRL_BANKSZ5 is not set
207 # CONFIG_SRCTRL_BANKSZ6 is not set
208 # CONFIG_SRCTRL_BANKSZ7 is not set
209 # CONFIG_SRCTRL_BANKSZ8 is not set
210 # CONFIG_SRCTRL_BANKSZ9 is not set
211 # CONFIG_SRCTRL_BANKSZ10 is not set
212 # CONFIG_SRCTRL_BANKSZ11 is not set
213 # CONFIG_SRCTRL_BANKSZ12 is not set
214 # CONFIG_SRCTRL_BANKSZ13 is not set
215 CONFIG_SRCTRL_ROMASEL=19
216
217 #
218 # Leon2 memory controller
219 #
220 CONFIG_MCTRL_LEON2=y
221 # CONFIG_MCTRL_8BIT is not set
222 # CONFIG_MCTRL_16BIT is not set
223 # CONFIG_MCTRL_5CS is not set
224 # CONFIG_MCTRL_SDRAM is not set
225
226 #
227 # PC133 SDRAM controller
228 #
229 # CONFIG_SDCTRL is not set
230
231 #
232 # On-chip RAM/ROM
233 #
234 # CONFIG_AHBROM_ENABLE is not set
235 # CONFIG_AHBRAM_ENABLE is not set
236
237 #
238 # Ethernet
239 #
240 # CONFIG_GRETH_ENABLE is not set
241
242 #
243 # CAN
244 #
245 # CONFIG_CAN_ENABLE is not set
246
247 #
248 # PCI
249 #
250 # CONFIG_PCI_SIMPLE_TARGET is not set
251 # CONFIG_PCI_MASTER_TARGET is not set
252 # CONFIG_PCI_ARBITER is not set
253 # CONFIG_PCI_TRACE is not set
254
255 #
256 # Spacewire
257 #
258 # CONFIG_SPW_ENABLE is not set
259
260 #
261 # UARTs, timers and irq control
262 #
263 CONFIG_UART1_ENABLE=y
264 # CONFIG_UA1_FIFO1 is not set
265 # CONFIG_UA1_FIFO2 is not set
266 CONFIG_UA1_FIFO4=y
267 # CONFIG_UA1_FIFO8 is not set
268 # CONFIG_UA1_FIFO16 is not set
269 # CONFIG_UA1_FIFO32 is not set
270 # CONFIG_UART2_ENABLE is not set
271 CONFIG_IRQ3_ENABLE=y
272 # CONFIG_IRQ3_SEC is not set
273 CONFIG_GPT_ENABLE=y
274 CONFIG_GPT_NTIM=2
275 CONFIG_GPT_SW=8
276 CONFIG_GPT_TW=32
277 CONFIG_GPT_IRQ=8
278 CONFIG_GPT_SEPIRQ=y
279 CONFIG_GPT_WDOGEN=y
280 CONFIG_GPT_WDOG=FFFF
281 CONFIG_GRGPIO_ENABLE=y
282 CONFIG_GRGPIO_WIDTH=8
283 CONFIG_GRGPIO_IMASK=0000
284
285 #
286 # VHDL Debugging
287 #
288 # CONFIG_DEBUG_UART is not set
@@ -0,0 +1,456
1 -----------------------------------------------------------------------------
2 -- LEON3 Demonstration design
3 -- Copyright (C) 2004 Jiri Gaisler, Gaisler Research
4 --
5 -- This program is free software; you can redistribute it and/or modify
6 -- it under the terms of the GNU General Public License as published by
7 -- the Free Software Foundation; either version 2 of the License, or
8 -- (at your option) any later version.
9 --
10 -- This program is distributed in the hope that it will be useful,
11 -- but WITHOUT ANY WARRANTY; without even the implied warranty of
12 -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 -- GNU General Public License for more details.
14 --
15 -- You should have received a copy of the GNU General Public License
16 -- along with this program; if not, write to the Free Software
17 -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 ------------------------------------------------------------------------------
19
20
21 LIBRARY ieee;
22 USE ieee.std_logic_1164.ALL;
23 LIBRARY grlib;
24 USE grlib.amba.ALL;
25 USE grlib.stdlib.ALL;
26 LIBRARY techmap;
27 USE techmap.gencomp.ALL;
28 LIBRARY gaisler;
29 USE gaisler.memctrl.ALL;
30 USE gaisler.leon3.ALL;
31 USE gaisler.uart.ALL;
32 USE gaisler.misc.ALL;
33 USE gaisler.spacewire.ALL; -- PLE
34 LIBRARY esa;
35 USE esa.memoryctrl.ALL;
36 USE work.config.ALL;
37 LIBRARY lpp;
38 --use lpp.lpp_amba.all;
39 USE lpp.lpp_memory.ALL;
40 USE lpp.lpp_ad_conv.ALL;
41 USE lpp.lpp_top_lfr_pkg.ALL;
42 --use lpp.lpp_uart.all;
43 --use lpp.lpp_matrix.all;
44 --use lpp.lpp_delay.all;
45 --use lpp.lpp_fft.all;
46 --use lpp.fft_components.all;
47 use lpp.iir_filter.all;
48 USE lpp.general_purpose.ALL;
49 --use lpp.Filtercfg.all;
50 USE lpp.lpp_lfr_time_management.ALL; -- PLE
51 --use lpp.lpp_lfr_spectral_matrices_DMA.all; -- PLE
52
53 ENTITY leon3mp IS
54 GENERIC (
55 fabtech : INTEGER := CFG_FABTECH;
56 memtech : INTEGER := CFG_MEMTECH;
57 padtech : INTEGER := CFG_PADTECH;
58 clktech : INTEGER := CFG_CLKTECH;
59 disas : INTEGER := CFG_DISAS; -- Enable disassembly to console
60 dbguart : INTEGER := CFG_DUART; -- Print UART on console
61 pclow : INTEGER := CFG_PCLOW
62 );
63 PORT (
64 clk50MHz : IN STD_ULOGIC;
65 clk49_152MHz : IN STD_ULOGIC;
66 reset : IN STD_ULOGIC;
67
68 errorn : OUT STD_ULOGIC;
69
70 -- UART AHB ---------------------------------------------------------------
71 ahbrxd : IN STD_ULOGIC; -- DSU rx data
72 ahbtxd : OUT STD_ULOGIC; -- DSU tx data
73
74 -- UART APB ---------------------------------------------------------------
75 urxd1 : IN STD_ULOGIC; -- UART1 rx data
76 utxd1 : OUT STD_ULOGIC; -- UART1 tx data
77
78 -- RAM --------------------------------------------------------------------
79 address : OUT STD_LOGIC_VECTOR(19 DOWNTO 0);
80 data : INOUT STD_LOGIC_VECTOR(31 DOWNTO 0);
81 nSRAM_BE0 : OUT STD_LOGIC;
82 nSRAM_BE1 : OUT STD_LOGIC;
83 nSRAM_BE2 : OUT STD_LOGIC;
84 nSRAM_BE3 : OUT STD_LOGIC;
85 nSRAM_WE : OUT STD_LOGIC;
86 nSRAM_CE : OUT STD_LOGIC;
87 nSRAM_OE : OUT STD_LOGIC;
88
89 -- SPW --------------------------------------------------------------------
90 spw1_din : IN STD_LOGIC; -- PLE
91 spw1_sin : IN STD_LOGIC; -- PLE
92 spw1_dout : OUT STD_LOGIC; -- PLE
93 spw1_sout : OUT STD_LOGIC; -- PLE
94
95 -- ADC --------------------------------------------------------------------
96 bias_fail_sw : OUT STD_LOGIC;
97 ADC_OEB_bar_CH : OUT STD_LOGIC_VECTOR(7 DOWNTO 0);
98 ADC_smpclk : OUT STD_LOGIC;
99 ADC_data : IN STD_LOGIC_VECTOR(13 DOWNTO 0);
100
101 ---------------------------------------------------------------------------
102 led : OUT STD_LOGIC_VECTOR(2 DOWNTO 0)
103 );
104 END;
105
106 ARCHITECTURE Behavioral OF leon3mp IS
107
108 --constant maxahbmsp : integer := CFG_NCPU+CFG_AHB_UART+
109 -- CFG_GRETH+CFG_AHB_JTAG;
110 CONSTANT maxahbmsp : INTEGER := CFG_NCPU+
111 CFG_AHB_UART+
112 CFG_GRETH+
113 CFG_AHB_JTAG
114 +2; -- 1 is for the SpaceWire module grspw2, which is a master
115 CONSTANT maxahbm : INTEGER := maxahbmsp;
116
117 --Clk & Rst g�n�
118 SIGNAL vcc : STD_LOGIC_VECTOR(4 DOWNTO 0);
119 SIGNAL gnd : STD_LOGIC_VECTOR(4 DOWNTO 0);
120 SIGNAL resetnl : STD_ULOGIC;
121 SIGNAL clk2x : STD_ULOGIC;
122 SIGNAL lclk2x : STD_ULOGIC;
123 SIGNAL lclk25MHz : STD_ULOGIC;
124 SIGNAL lclk50MHz : STD_ULOGIC;
125 SIGNAL lclk100MHz : STD_ULOGIC;
126 SIGNAL clkm : STD_ULOGIC;
127 SIGNAL rstn : STD_ULOGIC;
128 SIGNAL rstraw : STD_ULOGIC;
129 SIGNAL pciclk : STD_ULOGIC;
130 SIGNAL sdclkl : STD_ULOGIC;
131 SIGNAL cgi : clkgen_in_type;
132 SIGNAL cgo : clkgen_out_type;
133 --- AHB / APB
134 SIGNAL apbi : apb_slv_in_type;
135 SIGNAL apbo : apb_slv_out_vector := (OTHERS => apb_none);
136 SIGNAL ahbsi : ahb_slv_in_type;
137 SIGNAL ahbso : ahb_slv_out_vector := (OTHERS => ahbs_none);
138 SIGNAL ahbmi : ahb_mst_in_type;
139 SIGNAL ahbmo : ahb_mst_out_vector := (OTHERS => ahbm_none);
140 --UART
141 SIGNAL ahbuarti : uart_in_type;
142 SIGNAL ahbuarto : uart_out_type;
143 SIGNAL apbuarti : uart_in_type;
144 SIGNAL apbuarto : uart_out_type;
145 --MEM CTRLR
146 SIGNAL memi : memory_in_type;
147 SIGNAL memo : memory_out_type;
148 SIGNAL wpo : wprot_out_type;
149 SIGNAL sdo : sdram_out_type;
150 SIGNAL ramcs : STD_ULOGIC;
151 --IRQ
152 SIGNAL irqi : irq_in_vector(0 TO CFG_NCPU-1);
153 SIGNAL irqo : irq_out_vector(0 TO CFG_NCPU-1);
154 --Timer
155 SIGNAL gpti : gptimer_in_type;
156 SIGNAL gpto : gptimer_out_type;
157 --GPIO
158 SIGNAL gpioi : gpio_in_type;
159 SIGNAL gpioo : gpio_out_type;
160 --DSU
161 SIGNAL dbgi : l3_debug_in_vector(0 TO CFG_NCPU-1);
162 SIGNAL dbgo : l3_debug_out_vector(0 TO CFG_NCPU-1);
163 SIGNAL dsui : dsu_in_type;
164 SIGNAL dsuo : dsu_out_type;
165
166 ---------------------------------------------------------------------
167 --- AJOUT TEST ------------------------Signaux----------------------
168 ---------------------------------------------------------------------
169
170 ---------------------------------------------------------------------
171 CONSTANT IOAEN : INTEGER := CFG_CAN;
172 CONSTANT boardfreq : INTEGER := 25000; -- the board frequency (lclk) is 50 MHz
173
174 -- time management signal
175 SIGNAL coarse_time : STD_LOGIC_VECTOR(31 DOWNTO 0);
176 SIGNAL fine_time : STD_LOGIC_VECTOR(31 DOWNTO 0);
177
178 -- Spacewire signals
179 SIGNAL dtmp : STD_ULOGIC; -- PLE
180 SIGNAL stmp : STD_ULOGIC; -- PLE
181 SIGNAL rxclko : STD_ULOGIC; -- PLE
182 SIGNAL swni : grspw_in_type; -- PLE
183 SIGNAL swno : grspw_out_type; -- PLE
184 SIGNAL clkmn : STD_ULOGIC; -- PLE
185 SIGNAL txclk : STD_ULOGIC; -- PLE 2013 02 14
186
187 -- AD Converter RHF1401
188 SIGNAL sample : Samples14v(7 DOWNTO 0);
189 SIGNAL sample_val : STD_LOGIC;
190 -----------------------------------------------------------------------------
191 SIGNAL ADC_OEB_bar_CH_s : STD_LOGIC_VECTOR(7 DOWNTO 0);
192
193 BEGIN
194
195
196 ----------------------------------------------------------------------
197 --- Reset and Clock generation -------------------------------------
198 ----------------------------------------------------------------------
199
200 vcc <= (OTHERS => '1'); gnd <= (OTHERS => '0');
201 cgi.pllctrl <= "00"; cgi.pllrst <= rstraw;
202
203 rst0 : rstgen PORT MAP (reset, clkm, cgo.clklock, rstn, rstraw);
204
205
206 clk_pad : clkpad GENERIC MAP (tech => padtech) PORT MAP (clk50MHz, lclk100MHz);
207
208 clkgen0 : clkgen -- clock generator
209 GENERIC MAP (clktech, CFG_CLKMUL, CFG_CLKDIV, CFG_MCTRL_SDEN,
210 CFG_CLK_NOFB, 0, 0, 0, boardfreq, 0, 0, CFG_OCLKDIV)
211 PORT MAP (lclk25MHz, lclk25MHz, clkm, clkmn, clk2x, sdclkl, pciclk, cgi, cgo);
212
213 PROCESS(lclk100MHz)
214 BEGIN
215 IF lclk100MHz'EVENT AND lclk100MHz = '1' THEN
216 lclk50MHz <= NOT lclk50MHz;
217 END IF;
218 END PROCESS;
219
220 PROCESS(lclk50MHz)
221 BEGIN
222 IF lclk50MHz'EVENT AND lclk50MHz = '1' THEN
223 lclk25MHz <= NOT lclk25MHz;
224 END IF;
225 END PROCESS;
226
227 lclk2x <= lclk50MHz;
228
229 ----------------------------------------------------------------------
230 --- LEON3 processor / DSU / IRQ ------------------------------------
231 ----------------------------------------------------------------------
232
233 l3 : IF CFG_LEON3 = 1 GENERATE
234 cpu : FOR i IN 0 TO CFG_NCPU-1 GENERATE
235 u0 : leon3s -- LEON3 processor
236 GENERIC MAP (i, fabtech, memtech, CFG_NWIN, CFG_DSU, CFG_FPU, CFG_V8,
237 0, CFG_MAC, pclow, 0, CFG_NWP, CFG_ICEN, CFG_IREPL, CFG_ISETS, CFG_ILINE,
238 CFG_ISETSZ, CFG_ILOCK, CFG_DCEN, CFG_DREPL, CFG_DSETS, CFG_DLINE, CFG_DSETSZ,
239 CFG_DLOCK, CFG_DSNOOP, CFG_ILRAMEN, CFG_ILRAMSZ, CFG_ILRAMADDR, CFG_DLRAMEN,
240 CFG_DLRAMSZ, CFG_DLRAMADDR, CFG_MMUEN, CFG_ITLBNUM, CFG_DTLBNUM, CFG_TLB_TYPE, CFG_TLB_REP,
241 CFG_LDDEL, disas, CFG_ITBSZ, CFG_PWD, CFG_SVT, CFG_RSTADDR, CFG_NCPU-1)
242 PORT MAP (clkm, rstn, ahbmi, ahbmo(i), ahbsi, ahbso,
243 irqi(i), irqo(i), dbgi(i), dbgo(i));
244 END GENERATE;
245 errorn_pad : outpad GENERIC MAP (tech => padtech) PORT MAP (errorn, dbgo(0).error);
246
247 dsugen : IF CFG_DSU = 1 GENERATE
248 dsu0 : dsu3 -- LEON3 Debug Support Unit
249 GENERIC MAP (hindex => 2, haddr => 16#900#, hmask => 16#F00#,
250 ncpu => CFG_NCPU, tbits => 30, tech => memtech, irq => 0, kbytes => CFG_ATBSZ)
251 PORT MAP (rstn, clkm, ahbmi, ahbsi, ahbso(2), dbgo, dbgi, dsui, dsuo);
252 dsui.enable <= '1';
253 dsui.break <= '0';
254 led(2) <= dsuo.active;
255 END GENERATE;
256 END GENERATE;
257
258 nodsu : IF CFG_DSU = 0 GENERATE
259 ahbso(2) <= ahbs_none; dsuo.tstop <= '0'; dsuo.active <= '0';
260 END GENERATE;
261
262 irqctrl : IF CFG_IRQ3_ENABLE /= 0 GENERATE
263 irqctrl0 : irqmp -- interrupt controller
264 GENERIC MAP (pindex => 2, paddr => 2, ncpu => CFG_NCPU)
265 PORT MAP (rstn, clkm, apbi, apbo(2), irqo, irqi);
266 END GENERATE;
267 irq3 : IF CFG_IRQ3_ENABLE = 0 GENERATE
268 x : FOR i IN 0 TO CFG_NCPU-1 GENERATE
269 irqi(i).irl <= "0000";
270 END GENERATE;
271 apbo(2) <= apb_none;
272 END GENERATE;
273
274 ----------------------------------------------------------------------
275 --- Memory controllers ---------------------------------------------
276 ----------------------------------------------------------------------
277 memctrlr : mctrl GENERIC MAP (
278 hindex => 0,
279 pindex => 0,
280 paddr => 0,
281 srbanks => 1
282 )
283 PORT MAP (rstn, clkm, memi, memo, ahbsi, ahbso(0), apbi, apbo(0), wpo, sdo);
284
285 memi.brdyn <= '1';
286 memi.bexcn <= '1';
287 memi.writen <= '1';
288 memi.wrn <= "1111";
289 memi.bwidth <= "10";
290
291 bdr : FOR i IN 0 TO 3 GENERATE
292 data_pad : iopadv GENERIC MAP (tech => padtech, width => 8)
293 PORT MAP (
294 data(31-i*8 DOWNTO 24-i*8),
295 memo.data(31-i*8 DOWNTO 24-i*8),
296 memo.bdrive(i),
297 memi.data(31-i*8 DOWNTO 24-i*8));
298 END GENERATE;
299
300 addr_pad : outpadv GENERIC MAP (width => 20, tech => padtech)
301 PORT MAP (address, memo.address(21 DOWNTO 2));
302
303 rams_pad : outpad GENERIC MAP (tech => padtech) PORT MAP (nSRAM_CE, NOT(memo.ramsn(0)));
304 oen_pad : outpad GENERIC MAP (tech => padtech) PORT MAP (nSRAM_OE, memo.ramoen(0));
305 nBWE_pad : outpad GENERIC MAP (tech => padtech) PORT MAP (nSRAM_WE, memo.writen);
306 nBWa_pad : outpad GENERIC MAP (tech => padtech) PORT MAP (nSRAM_BE0, memo.mben(3));
307 nBWb_pad : outpad GENERIC MAP (tech => padtech) PORT MAP (nSRAM_BE1, memo.mben(2));
308 nBWc_pad : outpad GENERIC MAP (tech => padtech) PORT MAP (nSRAM_BE2, memo.mben(1));
309 nBWd_pad : outpad GENERIC MAP (tech => padtech) PORT MAP (nSRAM_BE3, memo.mben(0));
310
311 ----------------------------------------------------------------------
312 --- AHB CONTROLLER -------------------------------------------------
313 ----------------------------------------------------------------------
314 ahb0 : ahbctrl -- AHB arbiter/multiplexer
315 GENERIC MAP (defmast => CFG_DEFMST, split => CFG_SPLIT,
316 rrobin => CFG_RROBIN, ioaddr => CFG_AHBIO,
317 ioen => IOAEN, nahbm => maxahbm, nahbs => 8)
318 PORT MAP (rstn, clkm, ahbmi, ahbmo, ahbsi, ahbso);
319
320 ----------------------------------------------------------------------
321 --- AHB UART -------------------------------------------------------
322 ----------------------------------------------------------------------
323 dcomgen : IF CFG_AHB_UART = 1 GENERATE
324 dcom0 : ahbuart
325 GENERIC MAP ( hindex => 3, pindex => 4, paddr => 4)
326 PORT MAP ( rstn, clkm, ahbuarti, ahbuarto, apbi, apbo(4), ahbmi, ahbmo(3));
327 dsurx_pad : inpad GENERIC MAP (tech => padtech) PORT MAP (ahbrxd, ahbuarti.rxd);
328 dsutx_pad : outpad GENERIC MAP (tech => padtech) PORT MAP (ahbtxd, ahbuarto.txd);
329 led(0) <= NOT ahbuarti.rxd;
330 led(1) <= NOT ahbuarto.txd;
331 END GENERATE;
332 nouah : IF CFG_AHB_UART = 0 GENERATE apbo(4) <= apb_none; END GENERATE;
333
334 ----------------------------------------------------------------------
335 --- APB Bridge -----------------------------------------------------
336 ----------------------------------------------------------------------
337 apb0 : apbctrl -- AHB/APB bridge
338 GENERIC MAP (hindex => 1, haddr => CFG_APBADDR)
339 PORT MAP (rstn, clkm, ahbsi, ahbso(1), apbi, apbo);
340
341 ----------------------------------------------------------------------
342 --- GPT Timer ------------------------------------------------------
343 ----------------------------------------------------------------------
344 gpt : IF CFG_GPT_ENABLE /= 0 GENERATE
345 timer0 : gptimer -- timer unit
346 GENERIC MAP (pindex => 3, paddr => 3, pirq => CFG_GPT_IRQ,
347 sepirq => CFG_GPT_SEPIRQ, sbits => CFG_GPT_SW, ntimers => CFG_GPT_NTIM,
348 nbits => CFG_GPT_TW)
349 PORT MAP (rstn, clkm, apbi, apbo(3), gpti, gpto);
350 gpti.dhalt <= dsuo.tstop;
351 gpti.extclk <= '0';
352 END GENERATE;
353 notim : IF CFG_GPT_ENABLE = 0 GENERATE apbo(3) <= apb_none; END GENERATE;
354
355
356 ----------------------------------------------------------------------
357 --- APB UART -------------------------------------------------------
358 ----------------------------------------------------------------------
359 ua1 : IF CFG_UART1_ENABLE /= 0 GENERATE
360 uart1 : apbuart -- UART 1
361 GENERIC MAP (pindex => 1, paddr => 1, pirq => 2, console => dbguart,
362 fifosize => CFG_UART1_FIFO)
363 PORT MAP (rstn, clkm, apbi, apbo(1), apbuarti, apbuarto);
364 apbuarti.rxd <= urxd1;
365 apbuarti.extclk <= '0';
366 utxd1 <= apbuarto.txd;
367 apbuarti.ctsn <= '0';
368 END GENERATE;
369 noua0 : IF CFG_UART1_ENABLE = 0 GENERATE apbo(1) <= apb_none; END GENERATE;
370
371 -------------------------------------------------------------------------------
372 -- APB_LFR_TIME_MANAGEMENT ----------------------------------------------------
373 -------------------------------------------------------------------------------
374 spw: IF CFG_SPW_ENABLE /= 0 GENERATE
375 lfrtimemanagement0 : apb_lfr_time_management
376 GENERIC MAP(pindex => 6, paddr => 6, pmask => 16#fff#,
377 masterclk => 25000000, timeclk => 49152000, finetimeclk => 65536,
378 pirq => 12)
379 PORT MAP(clkm, clk49_152MHz, rstn, swno.tickout, apbi, apbo(6),
380 coarse_time, fine_time);
381 END GENERATE;
382 IF CFG_SPW_ENABLE = 0 GENERATE
383 apbo(6) <= apb_none;
384 END GENERATE;
385 -----------------------------------------------------------------------
386 --- SpaceWire --------------------------------------------------------
387 -----------------------------------------------------------------------
388 spw: IF CFG_SPW_ENABLE /= 0 GENERATE
389 spw_phy0 : grspw2_phy
390 GENERIC MAP(
391 scantest => 0,
392 tech => memtech,
393 input_type => 0) -- self_clocking mode
394 PORT MAP(
395 rstn => rstn,
396 rxclki => clkm,
397 rxclkin => clkmn,
398 nrxclki => clkm, -- not used in self-clocking
399 di => dtmp,
400 si => stmp,
401 do => swni.d(1 DOWNTO 0),
402 dov => swni.dv(1 DOWNTO 0),
403 dconnect => swni.dconnect(1 DOWNTO 0),
404 rxclko => rxclko);
405
406 sw0 : grspwm
407 GENERIC MAP(
408 tech => apa3e,
409 hindex => 1,
410 pindex => 5,
411 paddr => 5,
412 pirq => 11,
413 sysfreq => 25000,
414 usegen => 1, -- sysfreq not used by the core version 2? usegen?
415 nsync => 1, -- nsync not used by the core version 2?
416 rmap => 1,
417 rmapcrc => 1,
418 fifosize1 => 16,
419 fifosize2 => 16,
420 rxclkbuftype => 2,
421 rxunaligned => 0,
422 spwcore => 2,
423 memtech => apa3e,
424 nodeaddr => 254,
425 destkey => 2, -- added nodeaddr and destkey parameters
426 rmapbufs => 4,
427 netlist => 0,
428 ft => 0,
429 ports => 2)
430 PORT MAP(
431 rstn, clkm,
432 rxclko, rxclko,
433 txclk, txclk,
434 ahbmi, ahbmo(1),
435 apbi, apbo(5),
436 swni, swno);
437
438 swni.tickin <= '0';
439 swni.rmapen <= '1';
440 swni.clkdiv10 <= "00001001";
441
442 spw1_dout <= swno.d(0);
443 spw1_sout <= swno.s(0);
444 dtmp <= spw1_din;
445 stmp <= spw1_sin;
446
447 txclk <= lclk100MHz;
448
449 END GENERATE;
450 IF CFG_SPW_ENABLE = 0 GENERATE
451 ahbmo(1) <= ahbm_none;
452 apbo(5) <= apb_none;
453 END GENERATE;
454
455
456 END Behavioral;
@@ -0,0 +1,46
1 VHDLIB=../..
2 SCRIPTSDIR=$(VHDLIB)/scripts/
3 GRLIB := $(shell sh $(VHDLIB)/scripts/lpp_relpath.sh)
4 TOP=MINI_LFR
5 BOARD=MINI-LFR
6 include $(VHDLIB)/boards/$(BOARD)/Makefile.inc
7 DEVICE=$(PART)-$(PACKAGE)$(SPEED)
8 UCF=$(VHDLIB)/boards/$(BOARD)/$(TOP).ucf
9 QSF=$(VHDLIB)/boards/$(BOARD)/$(TOP).qsf
10 EFFORT=high
11 XSTOPT=
12 SYNPOPT="set_option -pipe 0; set_option -retiming 0; set_option -write_apr_constraint 0"
13 VHDLSYNFILES=config.vhd leon3mp.vhd MINI-LFR-top.vhd
14 PDC=$(VHDLIB)/boards/$(BOARD)/default.pdc
15 BITGEN=$(VHDLIB)/boards/$(BOARD)/default.ut
16 CLEAN=soft-clean
17
18 TECHLIBS = proasic3e
19
20 LIBSKIP = core1553bbc core1553brm core1553brt gr1553 corePCIF \
21 tmtc openchip hynix ihp gleichmann micron usbhc
22
23 DIRSKIP = b1553 pcif leon2 leon2ft crypto satcan ddr usb ata i2c \
24 pci grusbhc haps slink ascs pwm coremp7 spi ac97 \
25 ./amba_lcd_16x2_ctrlr \
26 ./general_purpose/lpp_AMR \
27 ./general_purpose/lpp_balise \
28 ./general_purpose/lpp_delay \
29 ./dsp/lpp_fft \
30 ./lpp_bootloader \
31 ./lpp_cna \
32 ./lpp_demux \
33 ./lpp_matrix \
34 ./lpp_uart \
35 ./lpp_usb \
36 ./lpp_Header \
37
38 FILESKIP = i2cmst.vhd \
39 APB_MULTI_DIODE.vhd \
40 APB_SIMPLE_DIODE.vhd
41
42 include $(GRLIB)/bin/Makefile
43 include $(GRLIB)/software/leon3/Makefile
44
45 ################## project specific targets ##########################
46
@@ -0,0 +1,185
1 -----------------------------------------------------------------------------
2 -- LEON3 Demonstration design test bench configuration
3 -- Copyright (C) 2004 Jiri Gaisler, Gaisler Research
4 --
5 -- This program is free software; you can redistribute it and/or modify
6 -- it under the terms of the GNU General Public License as published by
7 -- the Free Software Foundation; either version 2 of the License, or
8 -- (at your option) any later version.
9 --
10 -- This program is distributed in the hope that it will be useful,
11 -- but WITHOUT ANY WARRANTY; without even the implied warranty of
12 -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 -- GNU General Public License for more details.
14 ------------------------------------------------------------------------------
15
16
17 library techmap;
18 use techmap.gencomp.all;
19
20 package config is
21
22
23 -- Technology and synthesis options
24 constant CFG_FABTECH : integer := apa3e;
25 constant CFG_MEMTECH : integer := apa3e;
26 constant CFG_PADTECH : integer := inferred;
27 constant CFG_NOASYNC : integer := 0;
28 constant CFG_SCAN : integer := 0;
29
30 -- Clock generator
31 constant CFG_CLKTECH : integer := inferred;
32 constant CFG_CLKMUL : integer := (1);
33 constant CFG_CLKDIV : integer := (1); -- divide 50MHz by 2 to get 25MHz
34 constant CFG_OCLKDIV : integer := (1);
35 constant CFG_PCIDLL : integer := 0;
36 constant CFG_PCISYSCLK: integer := 0;
37 constant CFG_CLK_NOFB : integer := 0;
38
39 -- LEON3 processor core
40 constant CFG_LEON3 : integer := 1;
41 constant CFG_NCPU : integer := (1);
42 --constant CFG_NWIN : integer := (7); -- PLE
43 constant CFG_NWIN : integer := (8); -- to be compatible with BCC and RCC
44 constant CFG_V8 : integer := 0;
45 constant CFG_MAC : integer := 0;
46 constant CFG_SVT : integer := 0;
47 constant CFG_RSTADDR : integer := 16#00000#;
48 constant CFG_LDDEL : integer := (1);
49 constant CFG_NWP : integer := (0);
50 constant CFG_PWD : integer := 1*2;
51 constant CFG_FPU : integer := 8 + 16 * 0; -- 8 => grfpu-light, + 16 * 1 => netlist
52 --constant CFG_FPU : integer := 8 + 16 * 1; -- previous value 0 + 16*0 PLE
53 constant CFG_GRFPUSH : integer := 0;
54 constant CFG_ICEN : integer := 1;
55 constant CFG_ISETS : integer := 1;
56 constant CFG_ISETSZ : integer := 4;
57 constant CFG_ILINE : integer := 4;
58 constant CFG_IREPL : integer := 0;
59 constant CFG_ILOCK : integer := 0;
60 constant CFG_ILRAMEN : integer := 0;
61 constant CFG_ILRAMADDR: integer := 16#8E#;
62 constant CFG_ILRAMSZ : integer := 1;
63 constant CFG_DCEN : integer := 1;
64 constant CFG_DSETS : integer := 1;
65 constant CFG_DSETSZ : integer := 4;
66 constant CFG_DLINE : integer := 4;
67 constant CFG_DREPL : integer := 0;
68 constant CFG_DLOCK : integer := 0;
69 constant CFG_DSNOOP : integer := 0 + 0 + 4*0;
70 constant CFG_DFIXED : integer := 16#00F3#;
71 constant CFG_DLRAMEN : integer := 0;
72 constant CFG_DLRAMADDR: integer := 16#8F#;
73 constant CFG_DLRAMSZ : integer := 1;
74 constant CFG_MMUEN : integer := 0;
75 constant CFG_ITLBNUM : integer := 2;
76 constant CFG_DTLBNUM : integer := 2;
77 constant CFG_TLB_TYPE : integer := 1 + 0*2;
78 constant CFG_TLB_REP : integer := 1;
79 constant CFG_DSU : integer := 1;
80 constant CFG_ITBSZ : integer := 0;
81 constant CFG_ATBSZ : integer := 0;
82 constant CFG_LEON3FT_EN : integer := 0;
83 constant CFG_IUFT_EN : integer := 0;
84 constant CFG_FPUFT_EN : integer := 0;
85 constant CFG_RF_ERRINJ : integer := 0;
86 constant CFG_CACHE_FT_EN : integer := 0;
87 constant CFG_CACHE_ERRINJ : integer := 0;
88 constant CFG_LEON3_NETLIST: integer := 0;
89 constant CFG_DISAS : integer := 0 + 0;
90 constant CFG_PCLOW : integer := 2;
91
92 -- AMBA settings
93 constant CFG_DEFMST : integer := (0);
94 constant CFG_RROBIN : integer := 1;
95 constant CFG_SPLIT : integer := 0;
96 constant CFG_AHBIO : integer := 16#FFF#;
97 constant CFG_APBADDR : integer := 16#800#;
98 constant CFG_AHB_MON : integer := 0;
99 constant CFG_AHB_MONERR : integer := 0;
100 constant CFG_AHB_MONWAR : integer := 0;
101
102 -- DSU UART
103 constant CFG_AHB_UART : integer := 1;
104
105 -- JTAG based DSU interface
106 constant CFG_AHB_JTAG : integer := 0;
107
108 -- Ethernet DSU
109 constant CFG_DSU_ETH : integer := 0 + 0;
110 constant CFG_ETH_BUF : integer := 1;
111 constant CFG_ETH_IPM : integer := 16#C0A8#;
112 constant CFG_ETH_IPL : integer := 16#0033#;
113 constant CFG_ETH_ENM : integer := 16#00007A#;
114 constant CFG_ETH_ENL : integer := 16#CC0001#;
115
116 -- LEON2 memory controller
117 constant CFG_MCTRL_LEON2 : integer := 1;
118 constant CFG_MCTRL_RAM8BIT : integer := 0;
119 constant CFG_MCTRL_RAM16BIT : integer := 0;
120 constant CFG_MCTRL_5CS : integer := 0;
121 constant CFG_MCTRL_SDEN : integer := 0;
122 constant CFG_MCTRL_SEPBUS : integer := 0;
123 constant CFG_MCTRL_INVCLK : integer := 0;
124 constant CFG_MCTRL_SD64 : integer := 0;
125 constant CFG_MCTRL_PAGE : integer := 0 + 0;
126
127 -- SSRAM controller
128 constant CFG_SSCTRL : integer := 0;
129 constant CFG_SSCTRLP16 : integer := 0;
130
131 -- AHB ROM
132 constant CFG_AHBROMEN : integer := 0;
133 constant CFG_AHBROPIP : integer := 0;
134 constant CFG_AHBRODDR : integer := 16#000#;
135 constant CFG_ROMADDR : integer := 16#000#;
136 constant CFG_ROMMASK : integer := 16#E00# + 16#000#;
137
138 -- AHB RAM
139 constant CFG_AHBRAMEN : integer := 0;
140 constant CFG_AHBRSZ : integer := 1;
141 constant CFG_AHBRADDR : integer := 16#A00#;
142
143 -- Gaisler Ethernet core
144 constant CFG_GRETH : integer := 0;
145 constant CFG_GRETH1G : integer := 0;
146 constant CFG_ETH_FIFO : integer := 8;
147
148 -- CAN 2.0 interface
149 constant CFG_CAN : integer := 0;
150 constant CFG_CANIO : integer := 16#0#;
151 constant CFG_CANIRQ : integer := 0;
152 constant CFG_CANLOOP : integer := 0;
153 constant CFG_CAN_SYNCRST : integer := 0;
154 constant CFG_CANFT : integer := 0;
155
156 -- UART 1
157 constant CFG_UART1_ENABLE : integer := 1;
158 constant CFG_UART1_FIFO : integer := 1;
159
160 -- LEON3 interrupt controller
161 constant CFG_IRQ3_ENABLE : integer := 1;
162
163 -- Modular timer
164 constant CFG_GPT_ENABLE : integer := 1;
165 constant CFG_GPT_NTIM : integer := (2);
166 constant CFG_GPT_SW : integer := (8);
167 constant CFG_GPT_TW : integer := (32);
168 constant CFG_GPT_IRQ : integer := (8);
169 constant CFG_GPT_SEPIRQ : integer := 1;
170 constant CFG_GPT_WDOGEN : integer := 0;
171 constant CFG_GPT_WDOG : integer := 16#0#;
172
173 -- GPIO port
174 constant CFG_GRGPIO_ENABLE : integer := 1;
175 constant CFG_GRGPIO_IMASK : integer := 16#0000#;
176 constant CFG_GRGPIO_WIDTH : integer := (7);
177
178 -- GRLIB debugging
179 constant CFG_DUART : integer := 0;
180
181 -- SPACEWIRE
182 constant CFG_SPW_ENABLE : integer := 0;
183
184
185 end;
@@ -0,0 +1,330
1 -----------------------------------------------------------------------------
2 -- LEON3 Demonstration design
3 -- Copyright (C) 2004 Jiri Gaisler, Gaisler Research
4 --
5 -- This program is free software; you can redistribute it and/or modify
6 -- it under the terms of the GNU General Public License as published by
7 -- the Free Software Foundation; either version 2 of the License, or
8 -- (at your option) any later version.
9 --
10 -- This program is distributed in the hope that it will be useful,
11 -- but WITHOUT ANY WARRANTY; without even the implied warranty of
12 -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 -- GNU General Public License for more details.
14 --
15 -- You should have received a copy of the GNU General Public License
16 -- along with this program; if not, write to the Free Software
17 -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 ------------------------------------------------------------------------------
19
20
21 LIBRARY ieee;
22 USE ieee.std_logic_1164.ALL;
23 LIBRARY grlib;
24 USE grlib.amba.ALL;
25 USE grlib.stdlib.ALL;
26 LIBRARY techmap;
27 USE techmap.gencomp.ALL;
28 LIBRARY gaisler;
29 USE gaisler.memctrl.ALL;
30 USE gaisler.leon3.ALL;
31 USE gaisler.uart.ALL;
32 USE gaisler.misc.ALL;
33 USE gaisler.spacewire.ALL; -- PLE
34 LIBRARY esa;
35 USE esa.memoryctrl.ALL;
36 USE work.config.ALL;
37 LIBRARY lpp;
38 --use lpp.lpp_amba.all;
39 USE lpp.lpp_memory.ALL;
40 USE lpp.lpp_ad_conv.ALL;
41 USE lpp.lpp_top_lfr_pkg.ALL;
42 --use lpp.lpp_uart.all;
43 --use lpp.lpp_matrix.all;
44 --use lpp.lpp_delay.all;
45 --use lpp.lpp_fft.all;
46 --use lpp.fft_components.all;
47 use lpp.iir_filter.all;
48 USE lpp.general_purpose.ALL;
49 --use lpp.Filtercfg.all;
50 USE lpp.lpp_lfr_time_management.ALL; -- PLE
51 --use lpp.lpp_lfr_spectral_matrices_DMA.all; -- PLE
52
53 ENTITY leon3mp IS
54 GENERIC (
55 fabtech : INTEGER := CFG_FABTECH;
56 memtech : INTEGER := CFG_MEMTECH;
57 padtech : INTEGER := CFG_PADTECH;
58 clktech : INTEGER := CFG_CLKTECH;
59 disas : INTEGER := CFG_DISAS; -- Enable disassembly to console
60 dbguart : INTEGER := CFG_DUART; -- Print UART on console
61 pclow : INTEGER := CFG_PCLOW
62 );
63 PORT (
64 clk50MHz : IN STD_ULOGIC;
65 clk49_152MHz : IN STD_ULOGIC;
66 reset : IN STD_ULOGIC;
67
68 errorn : OUT STD_ULOGIC;
69
70 -- UART AHB ---------------------------------------------------------------
71 ahbrxd : IN STD_ULOGIC; -- DSU rx data
72 ahbtxd : OUT STD_ULOGIC; -- DSU tx data
73
74 -- UART APB ---------------------------------------------------------------
75 urxd1 : IN STD_ULOGIC; -- UART1 rx data
76 utxd1 : OUT STD_ULOGIC; -- UART1 tx data
77
78 -- RAM --------------------------------------------------------------------
79 address : OUT STD_LOGIC_VECTOR(19 DOWNTO 0);
80 data : INOUT STD_LOGIC_VECTOR(31 DOWNTO 0);
81 nSRAM_BE0 : OUT STD_LOGIC;
82 nSRAM_BE1 : OUT STD_LOGIC;
83 nSRAM_BE2 : OUT STD_LOGIC;
84 nSRAM_BE3 : OUT STD_LOGIC;
85 nSRAM_WE : OUT STD_LOGIC;
86 nSRAM_CE : OUT STD_LOGIC;
87 nSRAM_OE : OUT STD_LOGIC;
88
89 -- SPW --------------------------------------------------------------------
90 spw1_din : IN STD_LOGIC; -- PLE
91 spw1_sin : IN STD_LOGIC; -- PLE
92 spw1_dout : OUT STD_LOGIC; -- PLE
93 spw1_sout : OUT STD_LOGIC; -- PLE
94
95 -- ADC --------------------------------------------------------------------
96 bias_fail_sw : OUT STD_LOGIC;
97 ADC_OEB_bar_CH : OUT STD_LOGIC_VECTOR(7 DOWNTO 0);
98 ADC_smpclk : OUT STD_LOGIC;
99 ADC_data : IN STD_LOGIC_VECTOR(13 DOWNTO 0);
100
101 ---------------------------------------------------------------------------
102 led : OUT STD_LOGIC_VECTOR(2 DOWNTO 0)
103 );
104 END;
105
106 ARCHITECTURE Behavioral OF leon3mp IS
107
108 --constant maxahbmsp : integer := CFG_NCPU+CFG_AHB_UART+
109 -- CFG_GRETH+CFG_AHB_JTAG;
110 CONSTANT maxahbmsp : INTEGER := CFG_NCPU+
111 CFG_AHB_UART+
112 CFG_GRETH+
113 CFG_AHB_JTAG
114 +2; -- 1 is for the SpaceWire module grspw2, which is a master
115 CONSTANT maxahbm : INTEGER := maxahbmsp;
116
117 --Clk & Rst g�n�
118 SIGNAL vcc : STD_LOGIC_VECTOR(4 DOWNTO 0);
119 SIGNAL gnd : STD_LOGIC_VECTOR(4 DOWNTO 0);
120 SIGNAL clk2x : STD_ULOGIC;
121 SIGNAL lclk2x : STD_ULOGIC;
122 SIGNAL lclk25MHz : STD_ULOGIC;
123 SIGNAL lclk50MHz : STD_ULOGIC;
124 SIGNAL lclk100MHz : STD_ULOGIC;
125 SIGNAL clkm : STD_ULOGIC;
126 SIGNAL rstn : STD_ULOGIC;
127 SIGNAL rstraw : STD_ULOGIC;
128 SIGNAL pciclk : STD_ULOGIC;
129 SIGNAL sdclkl : STD_ULOGIC;
130 SIGNAL cgi : clkgen_in_type;
131 SIGNAL cgo : clkgen_out_type;
132 --- AHB / APB
133 SIGNAL apbi : apb_slv_in_type;
134 SIGNAL apbo : apb_slv_out_vector := (OTHERS => apb_none);
135 SIGNAL ahbsi : ahb_slv_in_type;
136 SIGNAL ahbso : ahb_slv_out_vector := (OTHERS => ahbs_none);
137 SIGNAL ahbmi : ahb_mst_in_type;
138 SIGNAL ahbmo : ahb_mst_out_vector := (OTHERS => ahbm_none);
139 --UART
140 SIGNAL ahbuarti : uart_in_type;
141 SIGNAL ahbuarto : uart_out_type;
142 SIGNAL apbuarti : uart_in_type;
143 SIGNAL apbuarto : uart_out_type;
144 --MEM CTRLR
145 SIGNAL memi : memory_in_type;
146 SIGNAL memo : memory_out_type;
147 SIGNAL wpo : wprot_out_type;
148 SIGNAL sdo : sdram_out_type;
149 SIGNAL ramcs : STD_ULOGIC;
150 --IRQ
151 SIGNAL irqi : irq_in_vector(0 TO CFG_NCPU-1);
152 SIGNAL irqo : irq_out_vector(0 TO CFG_NCPU-1);
153 --Timer
154 SIGNAL gpti : gptimer_in_type;
155 SIGNAL gpto : gptimer_out_type;
156 --GPIO
157 SIGNAL gpioi : gpio_in_type;
158 SIGNAL gpioo : gpio_out_type;
159 --DSU
160 SIGNAL dbgi : l3_debug_in_vector(0 TO CFG_NCPU-1);
161 SIGNAL dbgo : l3_debug_out_vector(0 TO CFG_NCPU-1);
162 SIGNAL dsui : dsu_in_type;
163 SIGNAL dsuo : dsu_out_type;
164
165 ---------------------------------------------------------------------
166 --- AJOUT TEST ------------------------Signaux----------------------
167 ---------------------------------------------------------------------
168
169 ---------------------------------------------------------------------
170 CONSTANT IOAEN : INTEGER := CFG_CAN;
171 CONSTANT boardfreq : INTEGER := 25000; -- the board frequency (lclk) is 50 MHz
172
173 -- time management signal
174 SIGNAL coarse_time : STD_LOGIC_VECTOR(31 DOWNTO 0);
175 SIGNAL fine_time : STD_LOGIC_VECTOR(31 DOWNTO 0);
176
177 -- Spacewire signals
178 SIGNAL dtmp : STD_ULOGIC; -- PLE
179 SIGNAL stmp : STD_ULOGIC; -- PLE
180 SIGNAL rxclko : STD_ULOGIC; -- PLE
181 SIGNAL swni : grspw_in_type; -- PLE
182 SIGNAL swno : grspw_out_type; -- PLE
183 SIGNAL clkmn : STD_ULOGIC; -- PLE
184 SIGNAL txclk : STD_ULOGIC; -- PLE 2013 02 14
185
186 -- AD Converter RHF1401
187 SIGNAL sample : Samples14v(7 DOWNTO 0);
188 SIGNAL sample_val : STD_LOGIC;
189 -----------------------------------------------------------------------------
190 SIGNAL ADC_OEB_bar_CH_s : STD_LOGIC_VECTOR(7 DOWNTO 0);
191
192 BEGIN
193
194
195 ----------------------------------------------------------------------
196 --- Reset and Clock generation -------------------------------------
197 ----------------------------------------------------------------------
198
199 vcc <= (OTHERS => '1'); gnd <= (OTHERS => '0');
200 cgi.pllctrl <= "00"; cgi.pllrst <= rstraw;
201
202 rst0 : rstgen PORT MAP (reset, clkm, cgo.clklock, rstn, rstraw);
203
204
205 clk_pad : clkpad GENERIC MAP (tech => padtech) PORT MAP (clk50MHz, lclk100MHz);
206
207 clkgen0 : clkgen -- clock generator
208 GENERIC MAP (clktech, CFG_CLKMUL, CFG_CLKDIV, CFG_MCTRL_SDEN,
209 CFG_CLK_NOFB, 0, 0, 0, boardfreq, 0, 0, CFG_OCLKDIV)
210 PORT MAP (lclk25MHz, lclk25MHz, clkm, clkmn, clk2x, sdclkl, pciclk, cgi, cgo);
211
212 PROCESS(lclk100MHz)
213 BEGIN
214 IF lclk100MHz'EVENT AND lclk100MHz = '1' THEN
215 lclk50MHz <= NOT lclk50MHz;
216 END IF;
217 END PROCESS;
218
219 PROCESS(lclk50MHz)
220 BEGIN
221 IF lclk50MHz'EVENT AND lclk50MHz = '1' THEN
222 lclk25MHz <= NOT lclk25MHz;
223 END IF;
224 END PROCESS;
225
226 lclk2x <= lclk50MHz;
227
228
229
230 ----------------------------------------------------------------------
231 --- Memory controllers ---------------------------------------------
232 ----------------------------------------------------------------------
233 memctrlr : mctrl GENERIC MAP (
234 hindex => 0,
235 pindex => 0,
236 paddr => 0,
237 srbanks => 1
238 )
239 PORT MAP (rstn, clkm, memi, memo, ahbsi, ahbso(0), apbi, apbo(0), wpo, sdo);
240
241 memi.brdyn <= '1';
242 memi.bexcn <= '1';
243 memi.writen <= '1';
244 memi.wrn <= "1111";
245 memi.bwidth <= "10";
246
247 bdr : FOR i IN 0 TO 3 GENERATE
248 data_pad : iopadv GENERIC MAP (tech => padtech, width => 8)
249 PORT MAP (
250 data(31-i*8 DOWNTO 24-i*8),
251 memo.data(31-i*8 DOWNTO 24-i*8),
252 memo.bdrive(i),
253 memi.data(31-i*8 DOWNTO 24-i*8));
254 END GENERATE;
255
256 addr_pad : outpadv GENERIC MAP (width => 20, tech => padtech)
257 PORT MAP (address, memo.address(21 DOWNTO 2));
258
259 rams_pad : outpad GENERIC MAP (tech => padtech) PORT MAP (nSRAM_CE, NOT(memo.ramsn(0)));
260 oen_pad : outpad GENERIC MAP (tech => padtech) PORT MAP (nSRAM_OE, memo.ramoen(0));
261 nBWE_pad : outpad GENERIC MAP (tech => padtech) PORT MAP (nSRAM_WE, memo.writen);
262 nBWa_pad : outpad GENERIC MAP (tech => padtech) PORT MAP (nSRAM_BE0, memo.mben(3));
263 nBWb_pad : outpad GENERIC MAP (tech => padtech) PORT MAP (nSRAM_BE1, memo.mben(2));
264 nBWc_pad : outpad GENERIC MAP (tech => padtech) PORT MAP (nSRAM_BE2, memo.mben(1));
265 nBWd_pad : outpad GENERIC MAP (tech => padtech) PORT MAP (nSRAM_BE3, memo.mben(0));
266
267 ----------------------------------------------------------------------
268 --- AHB CONTROLLER -------------------------------------------------
269 ----------------------------------------------------------------------
270 ahb0 : ahbctrl -- AHB arbiter/multiplexer
271 GENERIC MAP (defmast => CFG_DEFMST, split => CFG_SPLIT,
272 rrobin => CFG_RROBIN, ioaddr => CFG_AHBIO,
273 ioen => IOAEN, nahbm => maxahbm, nahbs => 8)
274 PORT MAP (rstn, clkm, ahbmi, ahbmo, ahbsi, ahbso);
275
276 ----------------------------------------------------------------------
277 --- AHB UART -------------------------------------------------------
278 ----------------------------------------------------------------------
279 dcomgen : IF CFG_AHB_UART = 1 GENERATE
280 dcom0 : ahbuart
281 GENERIC MAP ( hindex => 3, pindex => 4, paddr => 4)
282 PORT MAP ( rstn, clkm, ahbuarti, ahbuarto, apbi, apbo(4), ahbmi, ahbmo(3));
283 dsurx_pad : inpad GENERIC MAP (tech => padtech) PORT MAP (ahbrxd, ahbuarti.rxd);
284 dsutx_pad : outpad GENERIC MAP (tech => padtech) PORT MAP (ahbtxd, ahbuarto.txd);
285 led(0) <= NOT ahbuarti.rxd;
286 led(1) <= NOT ahbuarto.txd;
287 END GENERATE;
288 nouah : IF CFG_AHB_UART = 0 GENERATE apbo(4) <= apb_none; END GENERATE;
289
290 ----------------------------------------------------------------------
291 --- APB Bridge -----------------------------------------------------
292 ----------------------------------------------------------------------
293 apb0 : apbctrl -- AHB/APB bridge
294 GENERIC MAP (hindex => 1, haddr => CFG_APBADDR)
295 PORT MAP (rstn, clkm, ahbsi, ahbso(1), apbi, apbo);
296
297 ----------------------------------------------------------------------
298 --- GPT Timer ------------------------------------------------------
299 ----------------------------------------------------------------------
300 gpt : IF CFG_GPT_ENABLE /= 0 GENERATE
301 timer0 : gptimer -- timer unit
302 GENERIC MAP (pindex => 3, paddr => 3, pirq => CFG_GPT_IRQ,
303 sepirq => CFG_GPT_SEPIRQ, sbits => CFG_GPT_SW, ntimers => CFG_GPT_NTIM,
304 nbits => CFG_GPT_TW)
305 PORT MAP (rstn, clkm, apbi, apbo(3), gpti, gpto);
306 gpti.dhalt <= dsuo.tstop;
307 gpti.extclk <= '0';
308 END GENERATE;
309 notim : IF CFG_GPT_ENABLE = 0 GENERATE apbo(3) <= apb_none; END GENERATE;
310
311
312 ----------------------------------------------------------------------
313 --- APB UART -------------------------------------------------------
314 ----------------------------------------------------------------------
315 ua1 : IF CFG_UART1_ENABLE /= 0 GENERATE
316 uart1 : apbuart -- UART 1
317 GENERIC MAP (pindex => 1, paddr => 1, pirq => 2, console => dbguart,
318 fifosize => CFG_UART1_FIFO)
319 PORT MAP (rstn, clkm, apbi, apbo(1), apbuarti, apbuarto);
320 apbuarti.rxd <= urxd1;
321 apbuarti.extclk <= '0';
322 utxd1 <= apbuarto.txd;
323 apbuarti.ctsn <= '0';
324 END GENERATE;
325 noua0 : IF CFG_UART1_ENABLE = 0 GENERATE apbo(1) <= apb_none; END GENERATE;
326
327
328
329
330 END Behavioral; No newline at end of file
@@ -0,0 +1,261
1 ------------------------------------------------------------------------------
2 -- This file is a part of the LPP VHDL IP LIBRARY
3 -- Copyright (C) 2009 - 2010, Laboratory of Plasmas Physic - CNRS
4 --
5 -- This program is free software; you can redistribute it and/or modify
6 -- it under the terms of the GNU General Public License as published by
7 -- the Free Software Foundation; either version 3 of the License, or
8 -- (at your option) any later version.
9 --
10 -- This program is distributed in the hope that it will be useful,
11 -- but WITHOUT ANY WARRANTY; without even the implied warranty of
12 -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 -- GNU General Public License for more details.
14 --
15 -- You should have received a copy of the GNU General Public License
16 -- along with this program; if not, write to the Free Software
17 -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 -------------------------------------------------------------------------------
19 -- Author : Jean-christophe Pellion
20 -- Mail : jean-christophe.pellion@lpp.polytechnique.fr
21 -------------------------------------------------------------------------------
22 LIBRARY IEEE;
23 USE IEEE.numeric_std.ALL;
24 USE IEEE.std_logic_1164.ALL;
25 LIBRARY grlib;
26 USE grlib.amba.ALL;
27 USE grlib.stdlib.ALL;
28 LIBRARY techmap;
29 USE techmap.gencomp.ALL;
30 LIBRARY gaisler;
31 USE gaisler.memctrl.ALL;
32 USE gaisler.leon3.ALL;
33 USE gaisler.uart.ALL;
34 USE gaisler.misc.ALL;
35 USE gaisler.spacewire.ALL; -- PLE
36 LIBRARY esa;
37 USE esa.memoryctrl.ALL;
38 USE work.config.ALL;
39 LIBRARY lpp;
40 USE lpp.lpp_memory.ALL;
41 USE lpp.lpp_ad_conv.ALL;
42 USE lpp.lpp_lfr_pkg.ALL;
43 USE lpp.iir_filter.ALL;
44 USE lpp.general_purpose.ALL;
45 USE lpp.lpp_lfr_time_management.ALL;
46
47 ENTITY MINI_LFR_top IS
48
49 PORT (
50 clk_50 : IN STD_LOGIC;
51 clk_49 : IN STD_LOGIC;
52 reset : IN STD_LOGIC;
53 --BPs
54 BP0 : IN STD_LOGIC;
55 BP1 : IN STD_LOGIC;
56 --LEDs
57 LED0 : OUT STD_LOGIC;
58 LED1 : OUT STD_LOGIC;
59 LED2 : OUT STD_LOGIC;
60 --UARTs
61 TXD1 : IN STD_LOGIC;
62 RXD1 : OUT STD_LOGIC;
63 nCTS1 : OUT STD_LOGIC;
64 nRTS1 : IN STD_LOGIC;
65
66 TXD2 : IN STD_LOGIC;
67 RXD2 : OUT STD_LOGIC;
68 nCTS2 : OUT STD_LOGIC;
69 nDTR2 : IN STD_LOGIC;
70 nRTS2 : IN STD_LOGIC;
71 nDCD2 : OUT STD_LOGIC;
72
73 --EXT CONNECTOR
74 IO0 : INOUT STD_LOGIC;
75 IO1 : INOUT STD_LOGIC;
76 IO2 : INOUT STD_LOGIC;
77 IO3 : INOUT STD_LOGIC;
78 IO4 : INOUT STD_LOGIC;
79 IO5 : INOUT STD_LOGIC;
80 IO6 : INOUT STD_LOGIC;
81 IO7 : INOUT STD_LOGIC;
82 IO8 : INOUT STD_LOGIC;
83 IO9 : INOUT STD_LOGIC;
84 IO10 : INOUT STD_LOGIC;
85 IO11 : INOUT STD_LOGIC;
86
87 --SPACE WIRE
88 SPW_EN : OUT STD_LOGIC; -- 0 => off
89 SPW_NOM_DIN : IN STD_LOGIC; -- NOMINAL LINK
90 SPW_NOM_SIN : IN STD_LOGIC;
91 SPW_NOM_DOUT : OUT STD_LOGIC;
92 SPW_NOM_SOUT : OUT STD_LOGIC;
93 SPW_RED_DIN : IN STD_LOGIC; -- REDUNDANT LINK
94 SPW_RED_SIN : IN STD_LOGIC;
95 SPW_RED_DOUT : OUT STD_LOGIC;
96 SPW_RED_SOUT : OUT STD_LOGIC;
97 -- MINI LFR ADC INPUTS
98 ADC_nCS : OUT STD_LOGIC;
99 ADC_CLK : OUT STD_LOGIC;
100 ADC_SDO : IN STD_LOGIC_VECTOR(7 DOWNTO 0);
101
102 -- SRAM
103 SRAM_nWE : OUT STD_LOGIC;
104 SRAM_CE : OUT STD_LOGIC;
105 SRAM_nOE : OUT STD_LOGIC;
106 SRAM_nBE : OUT STD_LOGIC_VECTOR(3 DOWNTO 0);
107 SRAM_A : OUT STD_LOGIC_VECTOR(19 DOWNTO 0);
108 SRAM_DQ : INOUT STD_LOGIC_VECTOR(31 DOWNTO 0)
109 );
110
111 END MINI_LFR_top;
112
113
114 ARCHITECTURE beh OF MINI_LFR_top IS
115
116 COMPONENT leon3_soc
117 GENERIC (
118 fabtech : INTEGER;
119 memtech : INTEGER;
120 padtech : INTEGER;
121 clktech : INTEGER;
122 disas : INTEGER;
123 dbguart : INTEGER;
124 pclow : INTEGER);
125 PORT (
126 clk100MHz : IN STD_ULOGIC;
127 clk49_152MHz : IN STD_ULOGIC;
128 reset : IN STD_ULOGIC;
129 errorn : OUT STD_ULOGIC;
130 ahbrxd : IN STD_ULOGIC;
131 ahbtxd : OUT STD_ULOGIC;
132 urxd1 : IN STD_ULOGIC;
133 utxd1 : OUT STD_ULOGIC;
134 address : OUT STD_LOGIC_VECTOR(19 DOWNTO 0);
135 data : INOUT STD_LOGIC_VECTOR(31 DOWNTO 0);
136 nSRAM_BE0 : OUT STD_LOGIC;
137 nSRAM_BE1 : OUT STD_LOGIC;
138 nSRAM_BE2 : OUT STD_LOGIC;
139 nSRAM_BE3 : OUT STD_LOGIC;
140 nSRAM_WE : OUT STD_LOGIC;
141 nSRAM_CE : OUT STD_LOGIC;
142 nSRAM_OE : OUT STD_LOGIC;
143 spw1_din : IN STD_LOGIC;
144 spw1_sin : IN STD_LOGIC;
145 spw1_dout : OUT STD_LOGIC;
146 spw1_sout : OUT STD_LOGIC;
147 spw2_din : IN STD_LOGIC;
148 spw2_sin : IN STD_LOGIC;
149 spw2_dout : OUT STD_LOGIC;
150 spw2_sout : OUT STD_LOGIC;
151 apbi_wfp : OUT apb_slv_in_type;
152 apbo_wfp : IN apb_slv_out_type;
153 ahbi_wfp : OUT AHB_Mst_In_Type;
154 ahbo_wfp : IN AHB_Mst_Out_Type;
155 coarse_time : OUT STD_LOGIC_VECTOR(31 DOWNTO 0);
156 fine_time : OUT STD_LOGIC_VECTOR(15 DOWNTO 0));
157 END COMPONENT;
158
159 BEGIN -- beh
160
161 PROCESS (clk_50, reset)
162 BEGIN -- PROCESS
163 IF reset = '0' THEN -- asynchronous reset (active low)
164 LED0 <= '0';
165 LED1 <= '0';
166 LED2 <= '0';
167 ELSIF clk_50'event AND clk_50 = '1' THEN -- rising clock edge
168 LED0 <= '0';
169 LED1 <= '1';
170 LED2 <= BP0;
171 END IF;
172 END PROCESS;
173
174 --UARTs
175 RXD1 <= '0';
176 nCTS1 <= '0';
177 RXD2 <= '0';
178 nCTS2 <= '0';
179 nDCD2 <= '0';
180
181 --EXT CONNECTOR
182 IO0 <= clk_49;
183 IO1 <= clk_50;
184
185 IO2 <= SPW_NOM_DIN OR
186 SPW_NOM_SIN OR
187 SPW_RED_DIN OR
188 SPW_RED_SIN;
189
190 IO3 <= ADC_SDO(0);
191 IO4 <= ADC_SDO(1);
192 IO5 <= ADC_SDO(2);
193 IO6 <= ADC_SDO(3);
194 IO7 <= ADC_SDO(4);
195 IO8 <= ADC_SDO(5);
196 IO9 <= ADC_SDO(6);
197 IO10 <= ADC_SDO(7);
198 IO11 <= BP1 OR TXD1 OR TXD2 OR nDTR2 OR nRTS2 OR nRTS1;
199
200 --SPACE WIRE
201 SPW_EN <= '0'; -- 0 => off
202 SPW_NOM_DOUT <= '0';
203 SPW_NOM_SOUT <= '0';
204 SPW_RED_DOUT <= '0';
205 SPW_RED_SOUT <= '0';
206 ADC_nCS <= '0';
207 ADC_CLK <= '0';
208
209 -- SRAM
210 SRAM_nWE <= '1';
211 SRAM_CE <= '0';
212 SRAM_nOE <= '1';
213 SRAM_nBE <= (OTHERS => '1');
214 SRAM_A <= (OTHERS => '0');
215 SRAM_DQ <= (OTHERS => '0');
216
217
218 leon3mp_1: leon3_soc
219 GENERIC MAP (
220 fabtech => fabtech,
221 memtech => memtech,
222 padtech => padtech,
223 clktech => clktech,
224 disas => disas,
225 dbguart => dbguart,
226 pclow => pclow)
227 PORT MAP (
228 clk100MHz => clk100MHz,
229 clk49_152MHz => clk49_152MHz,
230 reset => reset,
231 errorn => errorn,
232 ahbrxd => ahbrxd,
233 ahbtxd => ahbtxd,
234 urxd1 => urxd1,
235 utxd1 => utxd1,
236 address => address,
237 data => data,
238 nSRAM_BE0 => nSRAM_BE0,
239 nSRAM_BE1 => nSRAM_BE1,
240 nSRAM_BE2 => nSRAM_BE2,
241 nSRAM_BE3 => nSRAM_BE3,
242 nSRAM_WE => nSRAM_WE,
243 nSRAM_CE => nSRAM_CE,
244 nSRAM_OE => nSRAM_OE,
245 spw1_din => spw1_din,
246 spw1_sin => spw1_sin,
247 spw1_dout => spw1_dout,
248 spw1_sout => spw1_sout,
249 spw2_din => spw2_din,
250 spw2_sin => spw2_sin,
251 spw2_dout => spw2_dout,
252 spw2_sout => spw2_sout,
253 apbi_wfp => apbi_wfp,
254 apbo_wfp => apbo_wfp,
255 ahbi_wfp => ahbi_wfp,
256 ahbo_wfp => ahbo_wfp,
257 coarse_time => coarse_time,
258 fine_time => fine_time);
259
260
261 END beh;
@@ -0,0 +1,49
1 VHDLIB=../..
2 SCRIPTSDIR=$(VHDLIB)/scripts/
3 GRLIB := $(shell sh $(VHDLIB)/scripts/lpp_relpath.sh)
4 TOP=MINI_LFR_top
5 BOARD=MINI-LFR
6 include $(VHDLIB)/boards/$(BOARD)/Makefile.inc
7 DEVICE=$(PART)-$(PACKAGE)$(SPEED)
8 UCF=$(VHDLIB)/boards/$(BOARD)/$(TOP).ucf
9 QSF=$(VHDLIB)/boards/$(BOARD)/$(TOP).qsf
10 EFFORT=high
11 XSTOPT=
12 SYNPOPT="set_option -pipe 0; set_option -retiming 0; set_option -write_apr_constraint 0"
13 VHDLSYNFILES= MINI_LFR_top.vhd \
14 config.vhd \
15 leon3_soc.vhd
16
17 PDC=$(VHDLIB)/boards/$(BOARD)/default.pdc
18 BITGEN=$(VHDLIB)/boards/$(BOARD)/default.ut
19 CLEAN=soft-clean
20
21 TECHLIBS = proasic3e
22
23 LIBSKIP = core1553bbc core1553brm core1553brt gr1553 corePCIF \
24 tmtc openchip hynix ihp gleichmann micron usbhc
25
26 DIRSKIP = b1553 pcif leon2 leon2ft crypto satcan ddr usb ata i2c \
27 pci grusbhc haps slink ascs pwm coremp7 spi ac97 \
28 ./amba_lcd_16x2_ctrlr \
29 ./general_purpose/lpp_AMR \
30 ./general_purpose/lpp_balise \
31 ./general_purpose/lpp_delay \
32 ./dsp/lpp_fft \
33 ./lpp_bootloader \
34 ./lpp_cna \
35 ./lpp_demux \
36 ./lpp_matrix \
37 ./lpp_uart \
38 ./lpp_usb \
39 ./lpp_Header \
40
41 FILESKIP = i2cmst.vhd \
42 APB_MULTI_DIODE.vhd \
43 APB_SIMPLE_DIODE.vhd
44
45 include $(GRLIB)/bin/Makefile
46 include $(GRLIB)/software/leon3/Makefile
47
48 ################## project specific targets ##########################
49
@@ -0,0 +1,185
1 -----------------------------------------------------------------------------
2 -- LEON3 Demonstration design test bench configuration
3 -- Copyright (C) 2004 Jiri Gaisler, Gaisler Research
4 --
5 -- This program is free software; you can redistribute it and/or modify
6 -- it under the terms of the GNU General Public License as published by
7 -- the Free Software Foundation; either version 2 of the License, or
8 -- (at your option) any later version.
9 --
10 -- This program is distributed in the hope that it will be useful,
11 -- but WITHOUT ANY WARRANTY; without even the implied warranty of
12 -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 -- GNU General Public License for more details.
14 ------------------------------------------------------------------------------
15
16
17 library techmap;
18 use techmap.gencomp.all;
19
20 package config is
21
22
23 -- Technology and synthesis options
24 constant CFG_FABTECH : integer := apa3e;
25 constant CFG_MEMTECH : integer := apa3e;
26 constant CFG_PADTECH : integer := inferred;
27 constant CFG_NOASYNC : integer := 0;
28 constant CFG_SCAN : integer := 0;
29
30 -- Clock generator
31 constant CFG_CLKTECH : integer := inferred;
32 constant CFG_CLKMUL : integer := (1);
33 constant CFG_CLKDIV : integer := (1); -- divide 50MHz by 2 to get 25MHz
34 constant CFG_OCLKDIV : integer := (1);
35 constant CFG_PCIDLL : integer := 0;
36 constant CFG_PCISYSCLK: integer := 0;
37 constant CFG_CLK_NOFB : integer := 0;
38
39 -- LEON3 processor core
40 constant CFG_LEON3 : integer := 1;
41 constant CFG_NCPU : integer := (1);
42 --constant CFG_NWIN : integer := (7); -- PLE
43 constant CFG_NWIN : integer := (8); -- to be compatible with BCC and RCC
44 constant CFG_V8 : integer := 0;
45 constant CFG_MAC : integer := 0;
46 constant CFG_SVT : integer := 0;
47 constant CFG_RSTADDR : integer := 16#00000#;
48 constant CFG_LDDEL : integer := (1);
49 constant CFG_NWP : integer := (0);
50 constant CFG_PWD : integer := 1*2;
51 constant CFG_FPU : integer := 8 + 16 * 0; -- 8 => grfpu-light, + 16 * 1 => netlist
52 --constant CFG_FPU : integer := 8 + 16 * 1; -- previous value 0 + 16*0 PLE
53 constant CFG_GRFPUSH : integer := 0;
54 constant CFG_ICEN : integer := 1;
55 constant CFG_ISETS : integer := 1;
56 constant CFG_ISETSZ : integer := 4;
57 constant CFG_ILINE : integer := 4;
58 constant CFG_IREPL : integer := 0;
59 constant CFG_ILOCK : integer := 0;
60 constant CFG_ILRAMEN : integer := 0;
61 constant CFG_ILRAMADDR: integer := 16#8E#;
62 constant CFG_ILRAMSZ : integer := 1;
63 constant CFG_DCEN : integer := 1;
64 constant CFG_DSETS : integer := 1;
65 constant CFG_DSETSZ : integer := 4;
66 constant CFG_DLINE : integer := 4;
67 constant CFG_DREPL : integer := 0;
68 constant CFG_DLOCK : integer := 0;
69 constant CFG_DSNOOP : integer := 0 + 0 + 4*0;
70 constant CFG_DFIXED : integer := 16#00F3#;
71 constant CFG_DLRAMEN : integer := 0;
72 constant CFG_DLRAMADDR: integer := 16#8F#;
73 constant CFG_DLRAMSZ : integer := 1;
74 constant CFG_MMUEN : integer := 0;
75 constant CFG_ITLBNUM : integer := 2;
76 constant CFG_DTLBNUM : integer := 2;
77 constant CFG_TLB_TYPE : integer := 1 + 0*2;
78 constant CFG_TLB_REP : integer := 1;
79 constant CFG_DSU : integer := 1;
80 constant CFG_ITBSZ : integer := 0;
81 constant CFG_ATBSZ : integer := 0;
82 constant CFG_LEON3FT_EN : integer := 0;
83 constant CFG_IUFT_EN : integer := 0;
84 constant CFG_FPUFT_EN : integer := 0;
85 constant CFG_RF_ERRINJ : integer := 0;
86 constant CFG_CACHE_FT_EN : integer := 0;
87 constant CFG_CACHE_ERRINJ : integer := 0;
88 constant CFG_LEON3_NETLIST: integer := 0;
89 constant CFG_DISAS : integer := 0 + 0;
90 constant CFG_PCLOW : integer := 2;
91
92 -- AMBA settings
93 constant CFG_DEFMST : integer := (0);
94 constant CFG_RROBIN : integer := 1;
95 constant CFG_SPLIT : integer := 0;
96 constant CFG_AHBIO : integer := 16#FFF#;
97 constant CFG_APBADDR : integer := 16#800#;
98 constant CFG_AHB_MON : integer := 0;
99 constant CFG_AHB_MONERR : integer := 0;
100 constant CFG_AHB_MONWAR : integer := 0;
101
102 -- DSU UART
103 constant CFG_AHB_UART : integer := 1;
104
105 -- JTAG based DSU interface
106 constant CFG_AHB_JTAG : integer := 0;
107
108 -- Ethernet DSU
109 constant CFG_DSU_ETH : integer := 0 + 0;
110 constant CFG_ETH_BUF : integer := 1;
111 constant CFG_ETH_IPM : integer := 16#C0A8#;
112 constant CFG_ETH_IPL : integer := 16#0033#;
113 constant CFG_ETH_ENM : integer := 16#00007A#;
114 constant CFG_ETH_ENL : integer := 16#CC0001#;
115
116 -- LEON2 memory controller
117 constant CFG_MCTRL_LEON2 : integer := 1;
118 constant CFG_MCTRL_RAM8BIT : integer := 0;
119 constant CFG_MCTRL_RAM16BIT : integer := 0;
120 constant CFG_MCTRL_5CS : integer := 0;
121 constant CFG_MCTRL_SDEN : integer := 0;
122 constant CFG_MCTRL_SEPBUS : integer := 0;
123 constant CFG_MCTRL_INVCLK : integer := 0;
124 constant CFG_MCTRL_SD64 : integer := 0;
125 constant CFG_MCTRL_PAGE : integer := 0 + 0;
126
127 -- SSRAM controller
128 constant CFG_SSCTRL : integer := 0;
129 constant CFG_SSCTRLP16 : integer := 0;
130
131 -- AHB ROM
132 constant CFG_AHBROMEN : integer := 0;
133 constant CFG_AHBROPIP : integer := 0;
134 constant CFG_AHBRODDR : integer := 16#000#;
135 constant CFG_ROMADDR : integer := 16#000#;
136 constant CFG_ROMMASK : integer := 16#E00# + 16#000#;
137
138 -- AHB RAM
139 constant CFG_AHBRAMEN : integer := 0;
140 constant CFG_AHBRSZ : integer := 1;
141 constant CFG_AHBRADDR : integer := 16#A00#;
142
143 -- Gaisler Ethernet core
144 constant CFG_GRETH : integer := 0;
145 constant CFG_GRETH1G : integer := 0;
146 constant CFG_ETH_FIFO : integer := 8;
147
148 -- CAN 2.0 interface
149 constant CFG_CAN : integer := 0;
150 constant CFG_CANIO : integer := 16#0#;
151 constant CFG_CANIRQ : integer := 0;
152 constant CFG_CANLOOP : integer := 0;
153 constant CFG_CAN_SYNCRST : integer := 0;
154 constant CFG_CANFT : integer := 0;
155
156 -- UART 1
157 constant CFG_UART1_ENABLE : integer := 1;
158 constant CFG_UART1_FIFO : integer := 1;
159
160 -- LEON3 interrupt controller
161 constant CFG_IRQ3_ENABLE : integer := 1;
162
163 -- Modular timer
164 constant CFG_GPT_ENABLE : integer := 1;
165 constant CFG_GPT_NTIM : integer := (2);
166 constant CFG_GPT_SW : integer := (8);
167 constant CFG_GPT_TW : integer := (32);
168 constant CFG_GPT_IRQ : integer := (8);
169 constant CFG_GPT_SEPIRQ : integer := 1;
170 constant CFG_GPT_WDOGEN : integer := 0;
171 constant CFG_GPT_WDOG : integer := 16#0#;
172
173 -- GPIO port
174 constant CFG_GRGPIO_ENABLE : integer := 1;
175 constant CFG_GRGPIO_IMASK : integer := 16#0000#;
176 constant CFG_GRGPIO_WIDTH : integer := (7);
177
178 -- GRLIB debugging
179 constant CFG_DUART : integer := 0;
180
181 -- SPACEWIRE
182 constant CFG_SPW_ENABLE : integer := 0;
183
184
185 end;
@@ -0,0 +1,473
1 -----------------------------------------------------------------------------
2 -- LEON3 Demonstration design
3 -- Copyright (C) 2004 Jiri Gaisler, Gaisler Research
4 --
5 -- This program is free software; you can redistribute it and/or modify
6 -- it under the terms of the GNU General Public License as published by
7 -- the Free Software Foundation; either version 2 of the License, or
8 -- (at your option) any later version.
9 --
10 -- This program is distributed in the hope that it will be useful,
11 -- but WITHOUT ANY WARRANTY; without even the implied warranty of
12 -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 -- GNU General Public License for more details.
14 --
15 -- You should have received a copy of the GNU General Public License
16 -- along with this program; if not, write to the Free Software
17 -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 ------------------------------------------------------------------------------
19
20
21 LIBRARY ieee;
22 USE ieee.std_logic_1164.ALL;
23 LIBRARY grlib;
24 USE grlib.amba.ALL;
25 USE grlib.stdlib.ALL;
26 LIBRARY techmap;
27 USE techmap.gencomp.ALL;
28 LIBRARY gaisler;
29 USE gaisler.memctrl.ALL;
30 USE gaisler.leon3.ALL;
31 USE gaisler.uart.ALL;
32 USE gaisler.misc.ALL;
33 USE gaisler.spacewire.ALL; -- PLE
34 LIBRARY esa;
35 USE esa.memoryctrl.ALL;
36 USE work.config.ALL;
37 LIBRARY lpp;
38 USE lpp.lpp_memory.ALL;
39 USE lpp.lpp_ad_conv.ALL;
40 USE lpp.lpp_lfr_pkg.ALL;
41 USE lpp.iir_filter.ALL;
42 USE lpp.general_purpose.ALL;
43 USE lpp.lpp_lfr_time_management.ALL;
44
45 ENTITY leon3_soc IS
46 GENERIC (
47 fabtech : INTEGER := CFG_FABTECH;
48 memtech : INTEGER := CFG_MEMTECH;
49 padtech : INTEGER := CFG_PADTECH;
50 clktech : INTEGER := CFG_CLKTECH;
51 disas : INTEGER := CFG_DISAS; -- Enable disassembly to console
52 dbguart : INTEGER := CFG_DUART; -- Print UART on console
53 pclow : INTEGER := CFG_PCLOW
54 );
55 PORT (
56 clk100MHz : IN STD_ULOGIC;
57 clk49_152MHz : IN STD_ULOGIC;
58 reset : IN STD_ULOGIC;
59
60 errorn : OUT STD_ULOGIC;
61
62 -- UART AHB ---------------------------------------------------------------
63 ahbrxd : IN STD_ULOGIC; -- DSU rx data
64 ahbtxd : OUT STD_ULOGIC; -- DSU tx data
65
66 -- UART APB ---------------------------------------------------------------
67 urxd1 : IN STD_ULOGIC; -- UART1 rx data
68 utxd1 : OUT STD_ULOGIC; -- UART1 tx data
69
70 -- RAM --------------------------------------------------------------------
71 address : OUT STD_LOGIC_VECTOR(19 DOWNTO 0);
72 data : INOUT STD_LOGIC_VECTOR(31 DOWNTO 0);
73 nSRAM_BE0 : OUT STD_LOGIC;
74 nSRAM_BE1 : OUT STD_LOGIC;
75 nSRAM_BE2 : OUT STD_LOGIC;
76 nSRAM_BE3 : OUT STD_LOGIC;
77 nSRAM_WE : OUT STD_LOGIC;
78 nSRAM_CE : OUT STD_LOGIC;
79 nSRAM_OE : OUT STD_LOGIC;
80
81 -- SPW --------------------------------------------------------------------
82 spw1_din : IN STD_LOGIC; -- PLE
83 spw1_sin : IN STD_LOGIC; -- PLE
84 spw1_dout : OUT STD_LOGIC; -- PLE
85 spw1_sout : OUT STD_LOGIC; -- PLE
86
87 spw2_din : IN STD_LOGIC; -- JCPE --TODO
88 spw2_sin : IN STD_LOGIC; -- JCPE --TODO
89 spw2_dout : OUT STD_LOGIC; -- JCPE --TODO
90 spw2_sout : OUT STD_LOGIC;
91
92 -- WAVEFORM PICKER --------------------------------------------------------
93 apbi_wfp : OUT apb_slv_in_type;
94 apbo_wfp : IN apb_slv_out_type;
95 ahbi_wfp : OUT AHB_Mst_In_Type;
96 ahbo_wfp : IN AHB_Mst_Out_Type;
97 -- TIME -------------------------------------------------------------------
98 coarse_time : OUT STD_LOGIC_VECTOR(31 DOWNTO 0);
99 fine_time : OUT STD_LOGIC_VECTOR(15 DOWNTO 0)
100
101 );
102 END;
103
104 ARCHITECTURE Behavioral OF leon3_soc IS
105
106 --constant maxahbmsp : integer := CFG_NCPU+CFG_AHB_UART+
107 -- CFG_GRETH+CFG_AHB_JTAG;
108 CONSTANT maxahbmsp : INTEGER := CFG_NCPU+
109 CFG_AHB_UART
110 +2;
111 -- 1 is for the SpaceWire module grspw, which is a master
112 -- 1 is for the LFR
113
114 CONSTANT maxahbm : INTEGER := maxahbmsp;
115
116 --Clk & Rst g�n�
117 SIGNAL vcc : STD_LOGIC_VECTOR(4 DOWNTO 0);
118 SIGNAL gnd : STD_LOGIC_VECTOR(4 DOWNTO 0);
119 SIGNAL resetnl : STD_ULOGIC;
120 SIGNAL clk2x : STD_ULOGIC;
121 SIGNAL lclk2x : STD_ULOGIC;
122 SIGNAL lclk25MHz : STD_ULOGIC;
123 SIGNAL lclk50MHz : STD_ULOGIC;
124 SIGNAL lclk100MHz : STD_ULOGIC;
125 SIGNAL clkm : STD_ULOGIC;
126 SIGNAL rstn : STD_ULOGIC;
127 SIGNAL rstraw : STD_ULOGIC;
128 SIGNAL pciclk : STD_ULOGIC;
129 SIGNAL sdclkl : STD_ULOGIC;
130 SIGNAL cgi : clkgen_in_type;
131 SIGNAL cgo : clkgen_out_type;
132 --- AHB / APB
133 SIGNAL apbi : apb_slv_in_type;
134 SIGNAL apbo : apb_slv_out_vector := (OTHERS => apb_none);
135 SIGNAL ahbsi : ahb_slv_in_type;
136 SIGNAL ahbso : ahb_slv_out_vector := (OTHERS => ahbs_none);
137 SIGNAL ahbmi : ahb_mst_in_type;
138 SIGNAL ahbmo : ahb_mst_out_vector := (OTHERS => ahbm_none);
139 --UART
140 SIGNAL ahbuarti : uart_in_type;
141 SIGNAL ahbuarto : uart_out_type;
142 SIGNAL apbuarti : uart_in_type;
143 SIGNAL apbuarto : uart_out_type;
144 --MEM CTRLR
145 SIGNAL memi : memory_in_type;
146 SIGNAL memo : memory_out_type;
147 SIGNAL wpo : wprot_out_type;
148 SIGNAL sdo : sdram_out_type;
149 SIGNAL ramcs : STD_ULOGIC;
150 --IRQ
151 SIGNAL irqi : irq_in_vector(0 TO CFG_NCPU-1);
152 SIGNAL irqo : irq_out_vector(0 TO CFG_NCPU-1);
153 --Timer
154 SIGNAL gpti : gptimer_in_type;
155 SIGNAL gpto : gptimer_out_type;
156 --GPIO
157 SIGNAL gpioi : gpio_in_type;
158 SIGNAL gpioo : gpio_out_type;
159 --DSU
160 SIGNAL dbgi : l3_debug_in_vector(0 TO CFG_NCPU-1);
161 SIGNAL dbgo : l3_debug_out_vector(0 TO CFG_NCPU-1);
162 SIGNAL dsui : dsu_in_type;
163 SIGNAL dsuo : dsu_out_type;
164
165 ---------------------------------------------------------------------
166 --- AJOUT TEST ------------------------Signaux----------------------
167 ---------------------------------------------------------------------
168
169 ---------------------------------------------------------------------
170 CONSTANT IOAEN : INTEGER := CFG_CAN;
171 CONSTANT boardfreq : INTEGER := 25000; -- the board frequency (lclk) is 50 MHz
172
173 -- Spacewire signals
174 SIGNAL dtmp : STD_LOGIC_VECTOR(1 DOWNTO 0); -- PLE
175 SIGNAL stmp : STD_LOGIC_VECTOR(1 DOWNTO 0); -- PLE
176 SIGNAL spw_rxclk : STD_LOGIC_VECTOR(1 DOWNTO 0); -- PLE
177 SIGNAL spw_rxtxclk : STD_ULOGIC;
178 SIGNAL spw_rxclkn : STD_ULOGIC;
179 SIGNAL spw_clk : STD_LOGIC;
180 SIGNAL swni : grspw_in_type; -- PLE
181 SIGNAL swno : grspw_out_type; -- PLE
182 SIGNAL clkmn : STD_ULOGIC; -- PLE
183 SIGNAL txclk : STD_ULOGIC; -- PLE 2013 02 14
184 -----------------------------------------------------------------------------
185
186 BEGIN
187
188
189 ----------------------------------------------------------------------
190 --- Reset and Clock generation -------------------------------------
191 ----------------------------------------------------------------------
192
193 vcc <= (OTHERS => '1'); gnd <= (OTHERS => '0');
194 cgi.pllctrl <= "00"; cgi.pllrst <= rstraw;
195
196 rst0 : rstgen PORT MAP (reset, clkm, cgo.clklock, rstn, rstraw);
197
198
199 clk_pad : clkpad GENERIC MAP (tech => padtech) PORT MAP (clk100MHz, lclk100MHz);
200
201 clkgen0 : clkgen -- clock generator
202 GENERIC MAP (clktech, CFG_CLKMUL, CFG_CLKDIV, CFG_MCTRL_SDEN,
203 CFG_CLK_NOFB, 0, 0, 0, boardfreq, 0, 0, CFG_OCLKDIV)
204 PORT MAP (lclk25MHz, lclk25MHz, clkm, clkmn, clk2x, sdclkl, pciclk, cgi, cgo);
205
206 PROCESS(lclk100MHz)
207 BEGIN
208 IF lclk100MHz'EVENT AND lclk100MHz = '1' THEN
209 lclk50MHz <= NOT lclk50MHz;
210 END IF;
211 END PROCESS;
212
213 PROCESS(lclk50MHz)
214 BEGIN
215 IF lclk50MHz'EVENT AND lclk50MHz = '1' THEN
216 lclk25MHz <= NOT lclk25MHz;
217 END IF;
218 END PROCESS;
219
220 lclk2x <= lclk50MHz;
221 spw_clk <= lclk50MHz;
222
223 ----------------------------------------------------------------------
224 --- LEON3 processor / DSU / IRQ ------------------------------------
225 ----------------------------------------------------------------------
226
227 l3 : IF CFG_LEON3 = 1 GENERATE
228 cpu : FOR i IN 0 TO CFG_NCPU-1 GENERATE
229 u0 : leon3s -- LEON3 processor
230 GENERIC MAP (i, fabtech, memtech, CFG_NWIN, CFG_DSU, CFG_FPU, CFG_V8,
231 0, CFG_MAC, pclow, 0, CFG_NWP, CFG_ICEN, CFG_IREPL, CFG_ISETS, CFG_ILINE,
232 CFG_ISETSZ, CFG_ILOCK, CFG_DCEN, CFG_DREPL, CFG_DSETS, CFG_DLINE, CFG_DSETSZ,
233 CFG_DLOCK, CFG_DSNOOP, CFG_ILRAMEN, CFG_ILRAMSZ, CFG_ILRAMADDR, CFG_DLRAMEN,
234 CFG_DLRAMSZ, CFG_DLRAMADDR, CFG_MMUEN, CFG_ITLBNUM, CFG_DTLBNUM, CFG_TLB_TYPE, CFG_TLB_REP,
235 CFG_LDDEL, disas, CFG_ITBSZ, CFG_PWD, CFG_SVT, CFG_RSTADDR, CFG_NCPU-1)
236 PORT MAP (clkm, rstn, ahbmi, ahbmo(i), ahbsi, ahbso,
237 irqi(i), irqo(i), dbgi(i), dbgo(i));
238 END GENERATE;
239 errorn_pad : outpad GENERIC MAP (tech => padtech) PORT MAP (errorn, dbgo(0).error);
240
241 dsugen : IF CFG_DSU = 1 GENERATE
242 dsu0 : dsu3 -- LEON3 Debug Support Unit
243 GENERIC MAP (hindex => 2, haddr => 16#900#, hmask => 16#F00#,
244 ncpu => CFG_NCPU, tbits => 30, tech => memtech, irq => 0, kbytes => CFG_ATBSZ)
245 PORT MAP (rstn, clkm, ahbmi, ahbsi, ahbso(2), dbgo, dbgi, dsui, dsuo);
246 dsui.enable <= '1';
247 dsui.break <= '0';
248 END GENERATE;
249 END GENERATE;
250
251 nodsu : IF CFG_DSU = 0 GENERATE
252 ahbso(2) <= ahbs_none; dsuo.tstop <= '0'; dsuo.active <= '0';
253 END GENERATE;
254
255 irqctrl : IF CFG_IRQ3_ENABLE /= 0 GENERATE
256 irqctrl0 : irqmp -- interrupt controller
257 GENERIC MAP (pindex => 2, paddr => 2, ncpu => CFG_NCPU)
258 PORT MAP (rstn, clkm, apbi, apbo(2), irqo, irqi);
259 END GENERATE;
260 irq3 : IF CFG_IRQ3_ENABLE = 0 GENERATE
261 x : FOR i IN 0 TO CFG_NCPU-1 GENERATE
262 irqi(i).irl <= "0000";
263 END GENERATE;
264 apbo(2) <= apb_none;
265 END GENERATE;
266
267 ----------------------------------------------------------------------
268 --- Memory controllers ---------------------------------------------
269 ----------------------------------------------------------------------
270 memctrlr : mctrl GENERIC MAP (
271 hindex => 0,
272 pindex => 0,
273 paddr => 0,
274 srbanks => 1
275 )
276 PORT MAP (rstn, clkm, memi, memo, ahbsi, ahbso(0), apbi, apbo(0), wpo, sdo);
277
278 memi.brdyn <= '1';
279 memi.bexcn <= '1';
280 memi.writen <= '1';
281 memi.wrn <= "1111";
282 memi.bwidth <= "10";
283
284 bdr : FOR i IN 0 TO 3 GENERATE
285 data_pad : iopadv GENERIC MAP (tech => padtech, width => 8)
286 PORT MAP (
287 data(31-i*8 DOWNTO 24-i*8),
288 memo.data(31-i*8 DOWNTO 24-i*8),
289 memo.bdrive(i),
290 memi.data(31-i*8 DOWNTO 24-i*8));
291 END GENERATE;
292
293 addr_pad : outpadv GENERIC MAP (width => 20, tech => padtech)
294 PORT MAP (address, memo.address(21 DOWNTO 2));
295
296 rams_pad : outpad GENERIC MAP (tech => padtech) PORT MAP (nSRAM_CE, NOT(memo.ramsn(0)));
297 oen_pad : outpad GENERIC MAP (tech => padtech) PORT MAP (nSRAM_OE, memo.ramoen(0));
298 nBWE_pad : outpad GENERIC MAP (tech => padtech) PORT MAP (nSRAM_WE, memo.writen);
299 nBWa_pad : outpad GENERIC MAP (tech => padtech) PORT MAP (nSRAM_BE0, memo.mben(3));
300 nBWb_pad : outpad GENERIC MAP (tech => padtech) PORT MAP (nSRAM_BE1, memo.mben(2));
301 nBWc_pad : outpad GENERIC MAP (tech => padtech) PORT MAP (nSRAM_BE2, memo.mben(1));
302 nBWd_pad : outpad GENERIC MAP (tech => padtech) PORT MAP (nSRAM_BE3, memo.mben(0));
303
304 ----------------------------------------------------------------------
305 --- AHB CONTROLLER -------------------------------------------------
306 ----------------------------------------------------------------------
307 ahb0 : ahbctrl -- AHB arbiter/multiplexer
308 GENERIC MAP (defmast => CFG_DEFMST, split => CFG_SPLIT,
309 rrobin => CFG_RROBIN, ioaddr => CFG_AHBIO,
310 ioen => IOAEN, nahbm => maxahbm, nahbs => 8)
311 PORT MAP (rstn, clkm, ahbmi, ahbmo, ahbsi, ahbso);
312
313 ----------------------------------------------------------------------
314 --- AHB UART -------------------------------------------------------
315 ----------------------------------------------------------------------
316 dcomgen : IF CFG_AHB_UART = 1 GENERATE
317 dcom0 : ahbuart
318 GENERIC MAP (hindex => 3, pindex => 4, paddr => 4)
319 PORT MAP (rstn, clkm, ahbuarti, ahbuarto, apbi, apbo(4), ahbmi, ahbmo(3));
320 dsurx_pad : inpad GENERIC MAP (tech => padtech) PORT MAP (ahbrxd, ahbuarti.rxd);
321 dsutx_pad : outpad GENERIC MAP (tech => padtech) PORT MAP (ahbtxd, ahbuarto.txd);
322 END GENERATE;
323 nouah : IF CFG_AHB_UART = 0 GENERATE apbo(4) <= apb_none; END GENERATE;
324
325 ----------------------------------------------------------------------
326 --- APB Bridge -----------------------------------------------------
327 ----------------------------------------------------------------------
328 apb0 : apbctrl -- AHB/APB bridge
329 GENERIC MAP (hindex => 1, haddr => CFG_APBADDR)
330 PORT MAP (rstn, clkm, ahbsi, ahbso(1), apbi, apbo);
331
332 ----------------------------------------------------------------------
333 --- GPT Timer ------------------------------------------------------
334 ----------------------------------------------------------------------
335 gpt : IF CFG_GPT_ENABLE /= 0 GENERATE
336 timer0 : gptimer -- timer unit
337 GENERIC MAP (pindex => 3, paddr => 3, pirq => CFG_GPT_IRQ,
338 sepirq => CFG_GPT_SEPIRQ, sbits => CFG_GPT_SW, ntimers => CFG_GPT_NTIM,
339 nbits => CFG_GPT_TW)
340 PORT MAP (rstn, clkm, apbi, apbo(3), gpti, gpto);
341 gpti.dhalt <= dsuo.tstop;
342 gpti.extclk <= '0';
343 END GENERATE;
344 notim : IF CFG_GPT_ENABLE = 0 GENERATE apbo(3) <= apb_none; END GENERATE;
345
346
347 ----------------------------------------------------------------------
348 --- APB UART -------------------------------------------------------
349 ----------------------------------------------------------------------
350 ua1 : IF CFG_UART1_ENABLE /= 0 GENERATE
351 uart1 : apbuart -- UART 1
352 GENERIC MAP (pindex => 1, paddr => 1, pirq => 2, console => dbguart,
353 fifosize => CFG_UART1_FIFO)
354 PORT MAP (rstn, clkm, apbi, apbo(1), apbuarti, apbuarto);
355 apbuarti.rxd <= urxd1;
356 apbuarti.extclk <= '0';
357 utxd1 <= apbuarto.txd;
358 apbuarti.ctsn <= '0';
359 END GENERATE;
360 noua0 : IF CFG_UART1_ENABLE = 0 GENERATE apbo(1) <= apb_none; END GENERATE;
361
362 -------------------------------------------------------------------------------
363 -- APB_LFR_TIME_MANAGEMENT ----------------------------------------------------
364 -------------------------------------------------------------------------------
365 apb_lfr_time_management_1: apb_lfr_time_management
366 GENERIC MAP (
367 pindex => 6,
368 paddr => 6,
369 pmask => 16#fff#,
370 pirq => 12)
371 PORT MAP (
372 clk25MHz => clkm,
373 clk49_152MHz => clk49_152MHz,
374 resetn => rstn,
375 grspw_tick => swno.tickout,
376 apbi => apbi,
377 apbo => apbo(6),
378 coarse_time => coarse_time,
379 fine_time => fine_time);
380
381 -----------------------------------------------------------------------
382 --- SpaceWire --------------------------------------------------------
383 -----------------------------------------------------------------------
384
385 spw_rxtxclk <= spw_clk;
386 spw_rxclkn <= NOT spw_rxtxclk;
387
388 -- PADS for SPW1
389 spw1_rxd_pad : inpad GENERIC MAP (tech => padtech)
390 PORT MAP (spw1_din, dtmp(0));
391 spw1_rxs_pad : inpad GENERIC MAP (tech => padtech)
392 PORT MAP (spw1_sin, stmp(0));
393 spw1_txd_pad : outpad GENERIC MAP (tech => padtech)
394 PORT MAP (spw1_dout, swno.d(0));
395 spw1_txs_pad : outpad GENERIC MAP (tech => padtech)
396 PORT MAP (spw1_sout, swno.s(0));
397 -- PADS FOR SPW2
398 spw2_rxd_pad : inpad GENERIC MAP (tech => padtech)
399 PORT MAP (spw2_din, dtmp(1));
400 spw2_rxs_pad : inpad GENERIC MAP (tech => padtech)
401 PORT MAP (spw2_sin, stmp(1));
402 spw2_txd_pad : outpad GENERIC MAP (tech => padtech)
403 PORT MAP (spw2_dout, swno.d(1));
404 spw2_txs_pad : outpad GENERIC MAP (tech => padtech)
405 PORT MAP (spw2_sout, swno.s(1));
406
407 -- GRSPW PHY
408 --spw1_input: if CFG_SPW_GRSPW = 1 generate
409 spw_inputloop : FOR j IN 0 TO 1 GENERATE
410 spw_phy0 : grspw_phy
411 GENERIC MAP(
412 tech => fabtech,
413 rxclkbuftype => 1,
414 scantest => 0)
415 PORT MAP(
416 rxrst => swno.rxrst,
417 di => dtmp(j),
418 si => stmp(j),
419 rxclko => spw_rxclk(j),
420 do => swni.d(j),
421 ndo => swni.nd(j*5+4 DOWNTO j*5),
422 dconnect => swni.dconnect(j*2+1 DOWNTO j*2));
423 END GENERATE spw_inputloop;
424
425 -- SPW core
426 sw0 : grspwm
427 GENERIC MAP(
428 tech => apa3e,
429 hindex => 1,
430 pindex => 5,
431 paddr => 5,
432 pirq => 11,
433 sysfreq => 25000, -- CPU_FREQ
434 rmap => 1,
435 rmapcrc => 1,
436 fifosize1 => 16,
437 fifosize2 => 16,
438 rxclkbuftype => 1,
439 rxunaligned => 0,
440 rmapbufs => 4,
441 ft => 0,
442 netlist => 0,
443 ports => 2,
444 --dmachan => CFG_SPW_DMACHAN, -- not used byt the spw core 1
445 memtech => apa3e,
446 destkey => 2,
447 spwcore => 1
448 --input_type => CFG_SPW_INPUT, -- not used byt the spw core 1
449 --output_type => CFG_SPW_OUTPUT, -- not used byt the spw core 1
450 --rxtx_sameclk => CFG_SPW_RTSAME -- not used byt the spw core 1
451 )
452 PORT MAP(rstn, clkm, spw_rxclk(0),
453 spw_rxclk(1), spw_rxtxclk, spw_rxtxclk,
454 ahbmi, ahbmo(1), apbi, apbo(5),
455 swni, swno);
456
457 swni.tickin <= '0';
458 swni.rmapen <= '1';
459 swni.clkdiv10 <= "00000100"; -- 50 MHz / (4 + 1) = 10 MHz
460 swni.tickinraw <= '0';
461 swni.timein <= (OTHERS => '0');
462 swni.dcrstval <= (OTHERS => '0');
463 swni.timerrstval <= (OTHERS => '0');
464
465 -------------------------------------------------------------------------------
466 -- LFR
467 -------------------------------------------------------------------------------
468 apbi_wfp <= apbi;
469 apbo(15) <= apbo_wfp;
470 ahbi_wfp <= ahbmi;
471 ahbmo(2) <= ahbo_wfp;
472
473 END Behavioral;
@@ -221,7 +221,7 port map(
221
221
222
222
223 USB2: entity work.FX2_WithFIFO
223 USB2: entity work.FX2_WithFIFO
224 generic map(CFG_MEMTECH,use_RAM)
224 generic map(CFG_MEMTECH,use_RAM,'0',15,11)
225 port map(
225 port map(
226 clk => clk,
226 clk => clk,
227 if_clk => if_clk,
227 if_clk => if_clk,
@@ -4,20 +4,20 SCRIPTSDIR=$(VHDLIB)/scripts/
4 GRLIB := $(shell sh $(VHDLIB)/scripts/lpp_relpath.sh)
4 GRLIB := $(shell sh $(VHDLIB)/scripts/lpp_relpath.sh)
5 TOP=TOP_EGSE2
5 TOP=TOP_EGSE2
6 BOARD=GSE_ICI
6 BOARD=GSE_ICI
7 include $(GRLIB)/boards/$(BOARD)/Makefile.inc
7 include $(VHDLIB)/boards/$(BOARD)/Makefile.inc
8 DEVICE=$(PART)-$(PACKAGE)$(SPEED)
8 DEVICE=$(PART)-$(PACKAGE)$(SPEED)
9 UCF=$(GRLIB)/boards/$(BOARD)/$(TOP).ucf
9 UCF=$(VHDLIB)/boards/$(BOARD)/$(TOP).ucf
10 QSF=$(GRLIB)/boards/$(BOARD)/$(TOP).qsf
10 QSF=$(VHDLIB)/boards/$(BOARD)/$(TOP).qsf
11 EFFORT=high
11 EFFORT=high
12 XSTOPT=
12 XSTOPT=
13 SYNPOPT="set_option -pipe 0; set_option -retiming 0; set_option -write_apr_constraint 0"
13 SYNPOPT="set_option -pipe 0; set_option -retiming 0; set_option -write_apr_constraint 0"
14 VHDLSYNFILES=config.vhd EGSE_ICI.vhd DC_GATE_GEN.vhd LF_GATE_GEN.vhd MajF_Gen.vhd MinF_Gen.vhd Serial_driver.vhd ICI_EGSE_PROTOCOL.vhd
14 VHDLSYNFILES=config.vhd EGSE_ICI.vhd DC_GATE_GEN.vhd LF_GATE_GEN.vhd MajF_Gen.vhd MinF_Gen.vhd Serial_driver.vhd ICI_EGSE_PROTOCOL.vhd
15 VHDLSIMFILES=testbench.vhd
15 VHDLSIMFILES=testbench.vhd
16 SIMTOP=testbench
16 SIMTOP=testbench
17 SDCFILE=$(GRLIB)/boards/$(BOARD)/synplify.sdc
17 SDCFILE=$(VHDLIB)/boards/$(BOARD)/synplify.sdc
18 SDC=$(GRLIB)/boards/$(BOARD)/default.sdc
18 SDC=$(VHDLIB)/boards/$(BOARD)/default.sdc
19 PDC=$(GRLIB)/boards/$(BOARD)/GSE_ICI.pdc
19 PDC=$(VHDLIB)/boards/$(BOARD)/GSE_ICI.pdc
20 BITGEN=$(GRLIB)/boards/$(BOARD)/default.ut
20 BITGEN=$(VHDLIB)/boards/$(BOARD)/default.ut
21 CLEAN=soft-clean
21 CLEAN=soft-clean
22
22
23 TECHLIBS = proasic3
23 TECHLIBS = proasic3
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1 NO CONTENT: file was removed, binary diff hidden
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NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed, binary diff hidden
NO CONTENT: file was removed, binary diff hidden
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed
NO CONTENT: file was removed
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed
NO CONTENT: file was removed
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed
NO CONTENT: file was removed
1 NO CONTENT: file was removed
NO CONTENT: file was removed
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed, binary diff hidden
NO CONTENT: file was removed, binary diff hidden
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed, binary diff hidden
NO CONTENT: file was removed, binary diff hidden
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed
NO CONTENT: file was removed
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
1 NO CONTENT: file was removed
NO CONTENT: file was removed
The requested commit or file is too big and content was truncated. Show full diff
General Comments 0
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