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Jean-christophe Pellion -
r677:0fe5660f948f default draft
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@@ -1,99 +1,99
1 import numpy as np
1 import numpy as np
2 import random
2 import random
3 import time
3 import time
4 import shutil
4 import shutil
5 import os
5 import os
6
6
7 DOFILE="run.do.in"
7 DOFILE="run.do.in"
8 RAM1={
8 RAM1={
9 "instance":"/testbench/lpp_lfr_filter_1/IIR_CEL_f0_to_f1/IIR_CEL_CTRLR_v2_DATAFLOW_1/RAM_CTRLR_v2_1/memRAM/SRAM/axc/x0/a8to12/agen(0)/u0/u0/rp/rfd",
9 "instance":"/testbench/lpp_lfr_filter_1/IIR_CEL_f0_to_f1/IIR_CEL_CTRLR_v2_DATAFLOW_1/RAM_CTRLR_v2_1/memRAM/SRAM/axc/x0/a8to12/agen(0)/u0/u0/rp/rfd",
10 "abits":10,
10 "abits":10,
11 "dbits":36,
11 "dbits":36,
12 "name":"RAM1.txt"
12 "name":"RAM1.txt"
13 }
13 }
14 RAM2={
14 RAM2={
15 "instance":"/testbench/lpp_lfr_filter_1/YES_IIR_FILTER_f2_f3/IIR_CEL_CTRLR_v3_1/RAM_CTRLR_v2_2/memRAM/SRAM/axc/x0/a8to12/agen(0)/u0/u0/rp/rfd",
15 "instance":"/testbench/lpp_lfr_filter_1/YES_IIR_FILTER_f2_f3/IIR_CEL_CTRLR_v3_1/RAM_CTRLR_v2_2/memRAM/SRAM/axc/x0/a8to12/agen(0)/u0/u0/rp/rfd",
16 "abits":10,
16 "abits":10,
17 "dbits":36,
17 "dbits":36,
18 "name":"RAM2.txt"
18 "name":"RAM2.txt"
19 }
19 }
20 RAM3={
20 RAM3={
21 "instance":"/testbench/lpp_lfr_filter_1/YES_IIR_FILTER_f2_f3/IIR_CEL_CTRLR_v3_1/RAM_CTRLR_v2_1/memRAM/SRAM/axc/x0/a8to12/agen(0)/u0/u0/rp/rfd",
21 "instance":"/testbench/lpp_lfr_filter_1/YES_IIR_FILTER_f2_f3/IIR_CEL_CTRLR_v3_1/RAM_CTRLR_v2_1/memRAM/SRAM/axc/x0/a8to12/agen(0)/u0/u0/rp/rfd",
22 "abits":10,
22 "abits":10,
23 "dbits":36,
23 "dbits":36,
24 "name":"RAM3.txt"
24 "name":"RAM3.txt"
25 }
25 }
26 RAM4={
26 RAM4={
27 "instance":"/testbench/lpp_lfr_filter_1/cic_lfr_1/memRAM/SRAM/axc/x0/a8to12/agen(0)/u0/u0/rp/rfd",
27 "instance":"/testbench/lpp_lfr_filter_1/cic_lfr_1/memRAM/SRAM/axc/x0/a8to12/agen(0)/u0/u0/rp/rfd",
28 "abits":10,
28 "abits":10,
29 "dbits":36,
29 "dbits":36,
30 "name":"RAM4.txt"
30 "name":"RAM4.txt"
31 }
31 }
32 RAM5={
32 RAM5={
33 "instance":"/testbench/lpp_lfr_filter_1/IIR_CEL_CTRLR_v2_1/IIR_CEL_CTRLR_v2_DATAFLOW_1/RAM_CTRLR_v2_1/memRAM/SRAM/axc/x0/a8to12/agen(0)/u0/u0/rp/rfd",
33 "instance":"/testbench/lpp_lfr_filter_1/IIR_CEL_CTRLR_v2_1/IIR_CEL_CTRLR_v2_DATAFLOW_1/RAM_CTRLR_v2_1/memRAM/SRAM/axc/x0/a8to12/agen(0)/u0/u0/rp/rfd",
34 "abits":10,
34 "abits":10,
35 "dbits":36,
35 "dbits":36,
36 "name":"RAM5.txt"
36 "name":"RAM5.txt"
37 }
37 }
38 RAM6={
38 RAM6={
39 "instance":"/testbench/lpp_lfr_filter_1/cic_lfr_1/memRAM/SRAM/axc/x0/a8to12/agen(1)/u0/u0/rp/rfd",
39 "instance":"/testbench/lpp_lfr_filter_1/cic_lfr_1/memRAM/SRAM/axc/x0/a8to12/agen(1)/u0/u0/rp/rfd",
40 "abits":10,
40 "abits":10,
41 "dbits":36,
41 "dbits":36,
42 "name":"RAM6.txt"
42 "name":"RAM6.txt"
43 }
43 }
44
44
45
45
46
46
47 RAMS=[RAM1,RAM2,RAM3,RAM4,RAM5,RAM6]
47 RAMS=[RAM1,RAM2,RAM3,RAM4,RAM5,RAM6]
48
48
49
49
50
50
51
51
52
52
53
53
54
54
55 def mkram(length,width,gentype='rand',**kwargs):
55 def mkram(length,width,gentype='rand',**kwargs):
56 return toBinStr(gen(length,width,gentype,**kwargs),width)
56 return toBinStr(gen(length,width,gentype,**kwargs),width)
57
57
58 def toBinStr(data,width):
58 def toBinStr(data,width):
59 return [format(val, 'b').zfill(width) for val in data]
59 return [format(val, 'b').zfill(width) for val in data]
60
60
61 def gen(length,width,gentype='rand',**kwargs):
61 def gen(length,width,gentype='rand',**kwargs):
62 LUT={
62 LUT={
63 "rand":gen_rand,
63 "rand":gen_rand,
64 "const":gen_const
64 "const":gen_const
65 }
65 }
66 return LUT[gentype](length,width,**kwargs)
66 return LUT[gentype](length,width,**kwargs)
67
67
68 def gen_rand(length,width,**kwargs):
68 def gen_rand(length,width,**kwargs):
69 random.seed(time.time())
69 random.seed(time.time())
70 mask=(2**width)-1
70 mask=(2**width)-1
71 data=[]
71 data=[]
72 for line in range(length):
72 for line in range(length):
73 data.append(int(2**32*random.random())&mask)
73 data.append(int(2**32*random.random())&mask)
74 return data
74 return data
75
75
76 def gen_const(length,width, value):
76 def gen_const(length,width, value):
77 mask=(2**width)-1
77 mask=(2**width)-1
78 return [value&mask for i in range(length)]
78 return [value&mask for i in range(length)]
79
79
80 def save(data,file):
80 def save(data,file):
81 f = open(file,"w")
81 f = open(file,"w")
82 [f.write(line+'\n') for line in data]
82 [f.write(line+'\n') for line in data]
83 f.close()
83 f.close()
84
84
85 if not os.path.exists("simulation"):
85 if not os.path.exists("simulation"):
86 os.mkdir('simulation')
86 os.mkdir('simulation')
87
87
88 args=""
88 args=""
89 for RAM in RAMS:
89 for RAM in RAMS:
90 save(mkram(2**RAM["abits"],RAM["dbits"],gentype='rand',value=0),""+RAM["name"])
90 save(mkram(2**RAM["abits"],RAM["dbits"],gentype='rand',value=0),""+RAM["name"])
91 args = args +"mem load -i {RAMFILE} -format binary {PATH}\n".format(RAMFILE=RAM["name"], PATH=RAM["instance"])
91 args = args +"mem load -i {RAMFILE} -format binary {PATH}\n".format(RAMFILE=RAM["name"], PATH=RAM["instance"])
92 with open("run.do.in","r") as inFile, open("run.do","w") as outFile:
92 with open("run.do.in","r") as inFile, open("run.do","w") as outFile:
93 input = inFile.read()
93 input = inFile.read()
94 outFile.write(input.replace("#RAM_INIT#",args))
94 outFile.write(input.replace("#RAM_INIT#",args))
95
95
96 W,H=8,400
96 W,H=8,100000
97 test = np.ones((H,W))*[(random.random()*65535)-32768 for col in range(W)]
97 test = np.ones((H,W))*[(random.random()*65535)-32768 for col in range(W)]
98 np.savetxt("input.txt", test,fmt="%d", delimiter=" ")
98 np.savetxt("input.txt", test,fmt="%d", delimiter=" ")
99
99
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