HG_REPOSITORIES/LPP/INSTRUMENTATION/USERS/PELLION/VHD_Lib Files · lib/lpp/lfr_time_management/vhdlsyn.txt

Add SDC constraint files for MINI-LFR board....

Add SDC constraint files for MINI-LFR board. To include those constraints, you must into design's makefile the : SDCFILE=$(VHDLIB)/boards/$(BOARD)/MINI_LFR_synthesis.sdc SDC=$(VHDLIB)/boards/$(BOARD)/MINI_LFR_place_and_route.sdc During the Libero flow, you must choice the MINI_LFR_synthesis.sdc file for the synthesis step, and the MINI_LFR_place_and_route.sdc file for the place and route step.

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pellion New lfr_time_management (lib/lpp/lfr_time_management)...	r329	lpp_lfr_time_management.vhd
pellion Synthesis File Updated	r229	apb_lfr_time_management.vhd
paul lfr_time_management added to the repository	r153	lfr_time_management.vhd
pellion New lfr_time_management (lib/lpp/lfr_time_management)...	r329	fine_time_counter.vhd
		coarse_time_counter.vhd

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