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Few fixes....
Few fixes. Whole LFR simulation WIP.

File last commit:

r407:fe963db0333b JC
r682:c53e1b6b3045 default
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vhdlsyn.txt
14 lines | 222 B | text/plain | TextLexer
pellion
temp
r407 lpp_matrix.vhd
Alexis Jeandet
Added simple FX2LP driver to write in endpoint 6 in 8 bit mode.
r217 ALU_Driver.vhd
APB_Matrix.vhd
pellion
Synthesis File Updated
r229 ReUse_CTRLR.vhd
Alexis Jeandet
Added simple FX2LP driver to write in endpoint 6 in 8 bit mode.
r217 Dispatch.vhd
DriveInputs.vhd
GetResult.vhd
MatriceSpectrale.vhd
Matrix.vhd
SpectralMatrix.vhd
Starter.vhd
TopMatrix_PDR.vhd
pellion
Synthesis File Updated
r229 TopSpecMatrix.vhd
Restored previous ALU version as ALU_V0 for IIR filter first version...
r226 Top_MatrixSpec.vhd