HG_REPOSITORIES/LPP/INSTRUMENTATION/USERS/PELLION/VHD_Lib Files · designs/Validation_CIC_LFR/run_calc.vhd

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HG_REPOSITORIES » LPP » INSTRUMENTATION » USERS » PELLION » VHD_Lib

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Clone from http://pc-instru.lpp.polytechnique.fr:5000/VHD_Lib

temp : update ADC driver...

temp : update ADC driver - conversion part clocked by clk_49 (49.152 MHz) - cnv_clk = clk_49.152/100 with duty cycle of 50% - 3 period for each Ren, - Data sampling during the 2nd cycle of Ren, - each 2 data input, 1 data output (@)

pellion - - Load All Authors

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r500:50f24bdc968c JC


                r594:a9702b7364d2

simu_with_Leon3

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        pellion
    
Correction du CIC (probleme d'ecriture des datas des COMB 256)

              r500
            
      vcom -quiet  -93  -work work tb_calc.vhd

      vsim work.testbench

      log -r *

      do wave_calc.do

      run -all

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pellion Correction du CIC (probleme d'ecriture des datas des COMB 256)	r500	vcom -quiet -93 -work work tb_calc.vhd

		vsim work.testbench

		log -r *

		do wave_calc.do

		run -all