HG_REPOSITORIES/LPP/INSTRUMENTATION/USERS/PELLION/VHD_Lib Files · lib/lpp/lpp_ad_Conv/vhdlsyn.txt

MiniSpartan6:...

MiniSpartan6: added ftdi chip config to switch between UART and Async FIFO. added few WIP designs with either spwlight core, FIFO_deom IP... Libs: added SpaceWire Light IP (Works really well!) started design of ahb_ftdi_fifo -> same protocol than AHBUART but over FTDI's Async FIFO interface. This might lead to much faster transfers UP to 12MB/s.

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Alexis Jeandet Added simple FX2LP driver to write in endpoint 6 in 8 bit mode.	r217	lpp_ad_Conv.vhd
jeandet Restored previous ALU version as ALU_V0 for IIR filter first version...	r226	RHF1401.vhd
		top_ad_conv_RHF1401.vhd
pellion New RHF1401 ADC driver (with simple filter)	r400	top_ad_conv_RHF1401_withFilter.vhd
pellion Synthesis File Updated	r229	TestModule_RHF1401.vhd
pellion Add Driver ADS7886 + MINI_LFR_WFRM-GPIO (release 206 porté sur MINI-LFR)	r287	top_ad_conv_ADS7886_v2.vhd
		ADS7886_drvr_v2.vhd
pellion - Update files to simulate with questasim...	r499	lpp_lfr_hk.vhd

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