.config
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r201 | # | ||
| # Automatically generated make config: don't edit | ||||
| # | ||||
| # | ||||
| # Synthesis | ||||
| # | ||||
| # CONFIG_SYN_INFERRED is not set | ||||
| # CONFIG_SYN_STRATIX is not set | ||||
| # CONFIG_SYN_STRATIXII is not set | ||||
| # CONFIG_SYN_STRATIXIII is not set | ||||
| # CONFIG_SYN_CYCLONEIII is not set | ||||
| # CONFIG_SYN_ALTERA is not set | ||||
| # CONFIG_SYN_AXCEL is not set | ||||
| # CONFIG_SYN_PROASIC is not set | ||||
| # CONFIG_SYN_PROASICPLUS is not set | ||||
| CONFIG_SYN_PROASIC3=y | ||||
| # CONFIG_SYN_UT025CRH is not set | ||||
| # CONFIG_SYN_ATC18 is not set | ||||
| # CONFIG_SYN_ATC18RHA is not set | ||||
| # CONFIG_SYN_CUSTOM1 is not set | ||||
| # CONFIG_SYN_EASIC90 is not set | ||||
| # CONFIG_SYN_IHP25 is not set | ||||
| # CONFIG_SYN_IHP25RH is not set | ||||
| # CONFIG_SYN_LATTICE is not set | ||||
| # CONFIG_SYN_ECLIPSE is not set | ||||
| # CONFIG_SYN_PEREGRINE is not set | ||||
| # CONFIG_SYN_RH_LIB18T is not set | ||||
| # CONFIG_SYN_RHUMC is not set | ||||
| # CONFIG_SYN_SMIC13 is not set | ||||
| # CONFIG_SYN_SPARTAN2 is not set | ||||
| # CONFIG_SYN_SPARTAN3 is not set | ||||
| # CONFIG_SYN_SPARTAN3E is not set | ||||
| # CONFIG_SYN_VIRTEX is not set | ||||
| # CONFIG_SYN_VIRTEXE is not set | ||||
| # CONFIG_SYN_VIRTEX2 is not set | ||||
| # CONFIG_SYN_VIRTEX4 is not set | ||||
| # CONFIG_SYN_VIRTEX5 is not set | ||||
| # CONFIG_SYN_UMC is not set | ||||
| # CONFIG_SYN_TSMC90 is not set | ||||
| # CONFIG_SYN_INFER_RAM is not set | ||||
| # CONFIG_SYN_INFER_PADS is not set | ||||
| # CONFIG_SYN_NO_ASYNC is not set | ||||
| # CONFIG_SYN_SCAN is not set | ||||
| # | ||||
| # Clock generation | ||||
| # | ||||
| # CONFIG_CLK_INFERRED is not set | ||||
| # CONFIG_CLK_HCLKBUF is not set | ||||
| # CONFIG_CLK_ALTDLL is not set | ||||
| # CONFIG_CLK_LATDLL is not set | ||||
| CONFIG_CLK_PRO3PLL=y | ||||
| # CONFIG_CLK_LIB18T is not set | ||||
| # CONFIG_CLK_RHUMC is not set | ||||
| # CONFIG_CLK_CLKDLL is not set | ||||
| # CONFIG_CLK_DCM is not set | ||||
| CONFIG_CLK_MUL=2 | ||||
| CONFIG_CLK_DIV=8 | ||||
| CONFIG_OCLK_DIV=2 | ||||
| # CONFIG_PCI_SYSCLK is not set | ||||
| CONFIG_LEON3=y | ||||
| CONFIG_PROC_NUM=1 | ||||
| # | ||||
| # Processor | ||||
| # | ||||
| # | ||||
| # Integer unit | ||||
| # | ||||
| CONFIG_IU_NWINDOWS=8 | ||||
| # CONFIG_IU_V8MULDIV is not set | ||||
| # CONFIG_IU_SVT is not set | ||||
| CONFIG_IU_LDELAY=1 | ||||
| CONFIG_IU_WATCHPOINTS=0 | ||||
| # CONFIG_PWD is not set | ||||
| CONFIG_IU_RSTADDR=00000 | ||||
| # | ||||
| # Floating-point unit | ||||
| # | ||||
| # CONFIG_FPU_ENABLE is not set | ||||
| # | ||||
| # Cache system | ||||
| # | ||||
| CONFIG_ICACHE_ENABLE=y | ||||
| CONFIG_ICACHE_ASSO1=y | ||||
| # CONFIG_ICACHE_ASSO2 is not set | ||||
| # CONFIG_ICACHE_ASSO3 is not set | ||||
| # CONFIG_ICACHE_ASSO4 is not set | ||||
| # CONFIG_ICACHE_SZ1 is not set | ||||
| # CONFIG_ICACHE_SZ2 is not set | ||||
| CONFIG_ICACHE_SZ4=y | ||||
| # CONFIG_ICACHE_SZ8 is not set | ||||
| # CONFIG_ICACHE_SZ16 is not set | ||||
| # CONFIG_ICACHE_SZ32 is not set | ||||
| # CONFIG_ICACHE_SZ64 is not set | ||||
| # CONFIG_ICACHE_SZ128 is not set | ||||
| # CONFIG_ICACHE_SZ256 is not set | ||||
| # CONFIG_ICACHE_LZ16 is not set | ||||
| CONFIG_ICACHE_LZ32=y | ||||
| CONFIG_DCACHE_ENABLE=y | ||||
| CONFIG_DCACHE_ASSO1=y | ||||
| # CONFIG_DCACHE_ASSO2 is not set | ||||
| # CONFIG_DCACHE_ASSO3 is not set | ||||
| # CONFIG_DCACHE_ASSO4 is not set | ||||
| # CONFIG_DCACHE_SZ1 is not set | ||||
| # CONFIG_DCACHE_SZ2 is not set | ||||
| CONFIG_DCACHE_SZ4=y | ||||
| # CONFIG_DCACHE_SZ8 is not set | ||||
| # CONFIG_DCACHE_SZ16 is not set | ||||
| # CONFIG_DCACHE_SZ32 is not set | ||||
| # CONFIG_DCACHE_SZ64 is not set | ||||
| # CONFIG_DCACHE_SZ128 is not set | ||||
| # CONFIG_DCACHE_SZ256 is not set | ||||
| # CONFIG_DCACHE_LZ16 is not set | ||||
| CONFIG_DCACHE_LZ32=y | ||||
| # CONFIG_DCACHE_SNOOP is not set | ||||
| CONFIG_CACHE_FIXED=0 | ||||
| # | ||||
| # MMU | ||||
| # | ||||
| CONFIG_MMU_ENABLE=y | ||||
| # CONFIG_MMU_COMBINED is not set | ||||
| CONFIG_MMU_SPLIT=y | ||||
| # CONFIG_MMU_REPARRAY is not set | ||||
| CONFIG_MMU_REPINCREMENT=y | ||||
| # CONFIG_MMU_I2 is not set | ||||
| # CONFIG_MMU_I4 is not set | ||||
| CONFIG_MMU_I8=y | ||||
| # CONFIG_MMU_I16 is not set | ||||
| # CONFIG_MMU_I32 is not set | ||||
| # CONFIG_MMU_D2 is not set | ||||
| # CONFIG_MMU_D4 is not set | ||||
| CONFIG_MMU_D8=y | ||||
| # CONFIG_MMU_D16 is not set | ||||
| # CONFIG_MMU_D32 is not set | ||||
| CONFIG_MMU_FASTWB=y | ||||
| CONFIG_MMU_PAGE_4K=y | ||||
| # CONFIG_MMU_PAGE_8K is not set | ||||
| # CONFIG_MMU_PAGE_16K is not set | ||||
| # CONFIG_MMU_PAGE_32K is not set | ||||
| # CONFIG_MMU_PAGE_PROG is not set | ||||
| # | ||||
| # Debug Support Unit | ||||
| # | ||||
| # CONFIG_DSU_ENABLE is not set | ||||
| # | ||||
| # Fault-tolerance | ||||
| # | ||||
| # | ||||
| # VHDL debug settings | ||||
| # | ||||
| # CONFIG_IU_DISAS is not set | ||||
| # CONFIG_DEBUG_PC32 is not set | ||||
| # | ||||
| # AMBA configuration | ||||
| # | ||||
| CONFIG_AHB_DEFMST=0 | ||||
| CONFIG_AHB_RROBIN=y | ||||
| # CONFIG_AHB_SPLIT is not set | ||||
| CONFIG_AHB_IOADDR=FFF | ||||
| CONFIG_APB_HADDR=800 | ||||
| # CONFIG_AHB_MON is not set | ||||
| # | ||||
| # Debug Link | ||||
| # | ||||
| CONFIG_DSU_UART=y | ||||
| # CONFIG_DSU_JTAG is not set | ||||
| # | ||||
| # Peripherals | ||||
| # | ||||
| # | ||||
| # Memory controllers | ||||
| # | ||||
| # | ||||
| # 8/32-bit PROM/SRAM controller | ||||
| # | ||||
| CONFIG_SRCTRL=y | ||||
| # CONFIG_SRCTRL_8BIT is not set | ||||
| CONFIG_SRCTRL_PROMWS=3 | ||||
| CONFIG_SRCTRL_RAMWS=0 | ||||
| CONFIG_SRCTRL_IOWS=0 | ||||
| # CONFIG_SRCTRL_RMW is not set | ||||
| CONFIG_SRCTRL_SRBANKS1=y | ||||
| # CONFIG_SRCTRL_SRBANKS2 is not set | ||||
| # CONFIG_SRCTRL_SRBANKS3 is not set | ||||
| # CONFIG_SRCTRL_SRBANKS4 is not set | ||||
| # CONFIG_SRCTRL_SRBANKS5 is not set | ||||
| # CONFIG_SRCTRL_BANKSZ0 is not set | ||||
| # CONFIG_SRCTRL_BANKSZ1 is not set | ||||
| # CONFIG_SRCTRL_BANKSZ2 is not set | ||||
| # CONFIG_SRCTRL_BANKSZ3 is not set | ||||
| # CONFIG_SRCTRL_BANKSZ4 is not set | ||||
| # CONFIG_SRCTRL_BANKSZ5 is not set | ||||
| # CONFIG_SRCTRL_BANKSZ6 is not set | ||||
| # CONFIG_SRCTRL_BANKSZ7 is not set | ||||
| # CONFIG_SRCTRL_BANKSZ8 is not set | ||||
| # CONFIG_SRCTRL_BANKSZ9 is not set | ||||
| # CONFIG_SRCTRL_BANKSZ10 is not set | ||||
| # CONFIG_SRCTRL_BANKSZ11 is not set | ||||
| # CONFIG_SRCTRL_BANKSZ12 is not set | ||||
| # CONFIG_SRCTRL_BANKSZ13 is not set | ||||
| CONFIG_SRCTRL_ROMASEL=19 | ||||
| # | ||||
| # Leon2 memory controller | ||||
| # | ||||
| CONFIG_MCTRL_LEON2=y | ||||
| # CONFIG_MCTRL_8BIT is not set | ||||
| # CONFIG_MCTRL_16BIT is not set | ||||
| # CONFIG_MCTRL_5CS is not set | ||||
| # CONFIG_MCTRL_SDRAM is not set | ||||
| # | ||||
| # PC133 SDRAM controller | ||||
| # | ||||
| # CONFIG_SDCTRL is not set | ||||
| # | ||||
| # On-chip RAM/ROM | ||||
| # | ||||
| # CONFIG_AHBROM_ENABLE is not set | ||||
| # CONFIG_AHBRAM_ENABLE is not set | ||||
| # | ||||
| # Ethernet | ||||
| # | ||||
| # CONFIG_GRETH_ENABLE is not set | ||||
| # | ||||
| # CAN | ||||
| # | ||||
| # CONFIG_CAN_ENABLE is not set | ||||
| # | ||||
| # PCI | ||||
| # | ||||
| # CONFIG_PCI_SIMPLE_TARGET is not set | ||||
| # CONFIG_PCI_MASTER_TARGET is not set | ||||
| # CONFIG_PCI_ARBITER is not set | ||||
| # CONFIG_PCI_TRACE is not set | ||||
| # | ||||
| # Spacewire | ||||
| # | ||||
| # CONFIG_SPW_ENABLE is not set | ||||
| # | ||||
| # UARTs, timers and irq control | ||||
| # | ||||
| CONFIG_UART1_ENABLE=y | ||||
| # CONFIG_UA1_FIFO1 is not set | ||||
| # CONFIG_UA1_FIFO2 is not set | ||||
| CONFIG_UA1_FIFO4=y | ||||
| # CONFIG_UA1_FIFO8 is not set | ||||
| # CONFIG_UA1_FIFO16 is not set | ||||
| # CONFIG_UA1_FIFO32 is not set | ||||
| # CONFIG_UART2_ENABLE is not set | ||||
| CONFIG_IRQ3_ENABLE=y | ||||
| # CONFIG_IRQ3_SEC is not set | ||||
| CONFIG_GPT_ENABLE=y | ||||
| CONFIG_GPT_NTIM=2 | ||||
| CONFIG_GPT_SW=8 | ||||
| CONFIG_GPT_TW=32 | ||||
| CONFIG_GPT_IRQ=8 | ||||
| CONFIG_GPT_SEPIRQ=y | ||||
| CONFIG_GPT_WDOGEN=y | ||||
| CONFIG_GPT_WDOG=FFFF | ||||
| CONFIG_GRGPIO_ENABLE=y | ||||
| CONFIG_GRGPIO_WIDTH=8 | ||||
| CONFIG_GRGPIO_IMASK=0000 | ||||
| # | ||||
| # VHDL Debugging | ||||
| # | ||||
| # CONFIG_DEBUG_UART is not set | ||||