fsw_misc.c
274 lines
| 10.2 KiB
| text/x-c
|
CLexer
/ src / fsw_misc.c
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r45 | /** General usage functions and RTEMS tasks. | ||
* | ||||
* @file | ||||
* @author P. LEROY | ||||
* | ||||
*/ | ||||
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r40 | #include "fsw_misc.h" | ||
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r5 | |||
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r45 | char *DumbMessages[6] = {"in DUMB *** default", // RTEMS_EVENT_0 | ||
"in DUMB *** timecode_irq_handler", // RTEMS_EVENT_1 | ||||
"in DUMB *** waveforms_isr", // RTEMS_EVENT_2 | ||||
"in DUMB *** in SMIQ *** Error sending event to AVF0", // RTEMS_EVENT_3 | ||||
"in DUMB *** spectral_matrices_isr *** Error sending event to SMIQ", // RTEMS_EVENT_4 | ||||
"in DUMB *** waveforms_simulator_isr" // RTEMS_EVENT_5 | ||||
}; | ||||
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r5 | int configure_timer(gptimer_regs_t *gptimer_regs, unsigned char timer, unsigned int clock_divider, | ||
unsigned char interrupt_level, rtems_isr (*timer_isr)() ) | ||||
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r45 | { | ||
/** This function configures a GPTIMER timer instantiated in the VHDL design. | ||||
* | ||||
* @param gptimer_regs points to the APB registers of the GPTIMER IP core. | ||||
* @param timer is the number of the timer in the IP core (several timers can be instantiated). | ||||
* @param clock_divider is the divider of the 1 MHz clock that will be configured. | ||||
* @param interrupt_level is the interrupt level that the timer drives. | ||||
* @param timer_isr is the interrupt subroutine that will be attached to the IRQ driven by the timer. | ||||
* | ||||
* @return | ||||
* | ||||
* Interrupt levels are described in the SPARC documentation sparcv8.pdf p.76 | ||||
* | ||||
*/ | ||||
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r21 | rtems_status_code status; | ||
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r5 | rtems_isr_entry old_isr_handler; | ||
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r21 | status = rtems_interrupt_catch( timer_isr, interrupt_level, &old_isr_handler) ; // see sparcv8.pdf p.76 for interrupt levels | ||
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r35 | if (status!=RTEMS_SUCCESSFUL) | ||
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r31 | { | ||
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r35 | PRINTF("in configure_timer *** ERR rtems_interrupt_catch\n") | ||
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r31 | } | ||
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r5 | |||
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r31 | timer_set_clock_divider( gptimer_regs, timer, clock_divider); | ||
return 1; | ||||
} | ||||
int timer_start(gptimer_regs_t *gptimer_regs, unsigned char timer) | ||||
{ | ||||
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r45 | /** This function starts a GPTIMER timer. | ||
* | ||||
* @param gptimer_regs points to the APB registers of the GPTIMER IP core. | ||||
* @param timer is the number of the timer in the IP core (several timers can be instantiated). | ||||
* | ||||
* @return 1 | ||||
* | ||||
*/ | ||||
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r5 | gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl | 0x00000010; // clear pending IRQ if any | ||
gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl | 0x00000004; // LD load value from the reload register | ||||
gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl | 0x00000001; // EN enable the timer | ||||
gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl | 0x00000002; // RS restart | ||||
gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl | 0x00000008; // IE interrupt enable | ||||
return 1; | ||||
} | ||||
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r31 | int timer_stop(gptimer_regs_t *gptimer_regs, unsigned char timer) | ||
{ | ||||
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r45 | /** This function stops a GPTIMER timer. | ||
* | ||||
* @param gptimer_regs points to the APB registers of the GPTIMER IP core. | ||||
* @param timer is the number of the timer in the IP core (several timers can be instantiated). | ||||
* | ||||
* @return 1 | ||||
* | ||||
*/ | ||||
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r31 | gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl & 0xfffffffe; // EN enable the timer | ||
gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl & 0xffffffef; // IE interrupt enable | ||||
gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl | 0x00000010; // clear pending IRQ if any | ||||
return 1; | ||||
} | ||||
int timer_set_clock_divider(gptimer_regs_t *gptimer_regs, unsigned char timer, unsigned int clock_divider) | ||||
{ | ||||
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r45 | /** This function sets the clock divider of a GPTIMER timer. | ||
* | ||||
* @param gptimer_regs points to the APB registers of the GPTIMER IP core. | ||||
* @param timer is the number of the timer in the IP core (several timers can be instantiated). | ||||
* @param clock_divider is the divider of the 1 MHz clock that will be configured. | ||||
* | ||||
* @return 1 | ||||
* | ||||
*/ | ||||
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r31 | gptimer_regs->timer[timer].reload = clock_divider; // base clock frequency is 1 MHz | ||
return 1; | ||||
} | ||||
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r25 | int send_console_outputs_on_apbuart_port( void ) // Send the console outputs on the apbuart port | ||
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r5 | { | ||
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r18 | struct apbuart_regs_str *apbuart_regs = (struct apbuart_regs_str *) REGS_ADDR_APBUART; | ||
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r21 | |||
apbuart_regs->ctrl = apbuart_regs->ctrl & APBUART_CTRL_REG_MASK_DB; | ||||
PRINTF("\n\n\n\n\nIn INIT *** Now the console is on port COM1\n") | ||||
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r5 | |||
return 0; | ||||
} | ||||
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r40 | void set_apbuart_scaler_reload_register(unsigned int regs, unsigned int value) | ||
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r17 | { | ||
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r40 | /** This function sets the scaler reload register of the apbuart module | ||
* | ||||
* @param regs is the address of the apbuart registers in memory | ||||
* @param value is the value that will be stored in the scaler register | ||||
* | ||||
* The value shall be set by the software to get data on the serial interface. | ||||
* | ||||
*/ | ||||
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r18 | struct apbuart_regs_str *apbuart_regs = (struct apbuart_regs_str *) regs; | ||
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r21 | |||
apbuart_regs->scaler = value; | ||||
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r35 | BOOT_PRINTF1("OK *** apbuart port scaler reload register set to 0x%x\n", value) | ||
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r17 | } | ||
//************ | ||||
// RTEMS TASKS | ||||
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r9 | rtems_task stat_task(rtems_task_argument argument) | ||
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r21 | { | ||
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r17 | int i; | ||
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r21 | int j; | ||
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r17 | i = 0; | ||
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r21 | j = 0; | ||
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r35 | BOOT_PRINTF("in STAT *** \n") | ||
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r21 | while(1){ | ||
rtems_task_wake_after(1000); | ||||
PRINTF1("%d\n", j) | ||||
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r33 | if (i == CPU_USAGE_REPORT_PERIOD) { | ||
// #ifdef PRINT_TASK_STATISTICS | ||||
// rtems_cpu_usage_report(); | ||||
// rtems_cpu_usage_reset(); | ||||
// #endif | ||||
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r21 | i = 0; | ||
} | ||||
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r17 | else i++; | ||
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r21 | j++; | ||
} | ||||
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r5 | } | ||
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r21 | |||
rtems_task hous_task(rtems_task_argument argument) | ||||
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r17 | { | ||
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r18 | rtems_status_code status; | ||
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r33 | spw_ioctl_pkt_send spw_ioctl_send; | ||
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r35 | rtems_id queue_id; | ||
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r33 | |||
spw_ioctl_send.hlen = 0; | ||||
spw_ioctl_send.hdr = NULL; | ||||
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r34 | spw_ioctl_send.dlen = PACKET_LENGTH_HK + CCSDS_TC_TM_PACKET_OFFSET + CCSDS_PROTOCOLE_EXTRA_BYTES; | ||
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r33 | spw_ioctl_send.data = (char*) &housekeeping_packet; | ||
spw_ioctl_send.options = 0; | ||||
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r21 | |||
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r42 | status = rtems_message_queue_ident( misc_name[QUEUE_SEND], 0, &queue_id ); | ||
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r35 | if (status != RTEMS_SUCCESSFUL) | ||
{ | ||||
PRINTF1("in HOUS *** ERR %d\n", status) | ||||
} | ||||
BOOT_PRINTF("in HOUS ***\n") | ||||
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r17 | |||
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r21 | if (rtems_rate_monotonic_ident( HK_name, &HK_id) != RTEMS_SUCCESSFUL) { | ||
status = rtems_rate_monotonic_create( HK_name, &HK_id ); | ||||
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r18 | if( status != RTEMS_SUCCESSFUL ) { | ||
PRINTF1( "rtems_rate_monotonic_create failed with status of %d\n", status ) | ||||
} | ||||
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r17 | } | ||
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r21 | housekeeping_packet.targetLogicalAddress = CCSDS_DESTINATION_ID; | ||
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r23 | housekeeping_packet.protocolIdentifier = CCSDS_PROTOCOLE_ID; | ||
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r33 | housekeeping_packet.reserved = DEFAULT_RESERVED; | ||
housekeeping_packet.userApplication = CCSDS_USER_APP; | ||||
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r23 | housekeeping_packet.packetID[0] = (unsigned char) (TM_PACKET_ID_HK >> 8); | ||
housekeeping_packet.packetID[1] = (unsigned char) (TM_PACKET_ID_HK); | ||||
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r33 | housekeeping_packet.packetSequenceControl[0] = TM_PACKET_SEQ_CTRL_STANDALONE; | ||
housekeeping_packet.packetSequenceControl[1] = TM_PACKET_SEQ_CNT_DEFAULT; | ||||
housekeeping_packet.packetLength[0] = (unsigned char) (PACKET_LENGTH_HK >> 8); | ||||
housekeeping_packet.packetLength[1] = (unsigned char) (PACKET_LENGTH_HK ); | ||||
housekeeping_packet.spare1_pusVersion_spare2 = DEFAULT_SPARE1_PUSVERSION_SPARE2; | ||||
housekeeping_packet.serviceType = TM_TYPE_HK; | ||||
housekeeping_packet.serviceSubType = TM_SUBTYPE_HK; | ||||
housekeeping_packet.destinationID = TM_DESTINATION_ID_GROUND; | ||||
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r17 | |||
status = rtems_rate_monotonic_cancel(HK_id); | ||||
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r23 | if( status != RTEMS_SUCCESSFUL ) { | ||
PRINTF1( "ERR *** in HOUS *** rtems_rate_monotonic_cancel(HK_id) ***code: %d\n", status ) | ||||
} | ||||
else { | ||||
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r35 | DEBUG_PRINTF("OK *** in HOUS *** rtems_rate_monotonic_cancel(HK_id)\n") | ||
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r23 | } | ||
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r21 | |||
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r17 | while(1){ // launch the rate monotonic task | ||
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r21 | status = rtems_rate_monotonic_period( HK_id, HK_PERIOD ); | ||
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r23 | if ( status != RTEMS_SUCCESSFUL ) { | ||
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r21 | PRINTF1( "ERR *** in HOUS *** rtems_rate_monotonic_period *** code %d\n", status); | ||
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r17 | } | ||
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r23 | else { | ||
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r33 | housekeeping_packet.time[0] = (unsigned char) (time_management_regs->coarse_time>>24); | ||
housekeeping_packet.time[1] = (unsigned char) (time_management_regs->coarse_time>>16); | ||||
housekeeping_packet.time[2] = (unsigned char) (time_management_regs->coarse_time>>8); | ||||
housekeeping_packet.time[3] = (unsigned char) (time_management_regs->coarse_time); | ||||
housekeeping_packet.time[4] = (unsigned char) (time_management_regs->fine_time>>8); | ||||
housekeeping_packet.time[5] = (unsigned char) (time_management_regs->fine_time); | ||||
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r23 | housekeeping_packet.sid = SID_HK; | ||
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r45 | spacewire_update_statistics(); | ||
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r23 | |||
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r31 | // SEND PACKET | ||
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r37 | status = rtems_message_queue_send( queue_id, &spw_ioctl_send, ACTION_MSG_SPW_IOCTL_SEND_SIZE); | ||
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r33 | if (status != RTEMS_SUCCESSFUL) { | ||
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r35 | PRINTF1("in HOUS *** ERR %d\n", status) | ||
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r17 | } | ||
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r21 | } | ||
} | ||||
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r5 | |||
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r17 | PRINTF("in HOUS *** deleting task\n") | ||
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r21 | |||
status = rtems_task_delete( RTEMS_SELF ); // should not return | ||||
printf( "rtems_task_delete returned with status of %d.\n", status ); | ||||
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r45 | return; | ||
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r16 | } | ||
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r45 | rtems_task dumb_task( rtems_task_argument unused ) | ||
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r33 | { | ||
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r45 | /** This RTEMS taks is used to print messages without affecting the general behaviour of the software. | ||
* | ||||
* @param unused is the starting argument of the RTEMS task | ||||
* | ||||
* The DUMB taks waits for RTEMS events and print messages depending on the incoming events. | ||||
* | ||||
*/ | ||||
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r35 | |||
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r45 | unsigned int i; | ||
unsigned int intEventOut; | ||||
unsigned int coarse_time = 0; | ||||
unsigned int fine_time = 0; | ||||
rtems_event_set event_out; | ||||
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r33 | |||
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r45 | BOOT_PRINTF("in DUMB *** \n") | ||
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r35 | |||
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r45 | while(1){ | ||
rtems_event_receive(RTEMS_EVENT_0 | RTEMS_EVENT_1 | RTEMS_EVENT_2 | RTEMS_EVENT_3 | RTEMS_EVENT_4 | RTEMS_EVENT_5, | ||||
RTEMS_WAIT | RTEMS_EVENT_ANY, RTEMS_NO_TIMEOUT, &event_out); // wait for an RTEMS_EVENT | ||||
intEventOut = (unsigned int) event_out; | ||||
for ( i=0; i<32; i++) | ||||
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r34 | { | ||
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r45 | if ( ((intEventOut >> i) & 0x0001) != 0) | ||
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r35 | { | ||
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r45 | coarse_time = time_management_regs->coarse_time; | ||
fine_time = time_management_regs->fine_time; | ||||
printf("in DUMB *** time = coarse: %x, fine: %x, %s\n", coarse_time, fine_time, DumbMessages[i]); | ||||
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r34 | } | ||
} | ||||
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r33 | } | ||
} | ||||
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r34 | |||