HG_REPOSITORIES/LPP/INSTRUMENTATION/USERS/JEANDET/LFR_FSW Commit - r5:ad4f943b1cb5

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header/fsw_init.h created 644 +39 0

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	1	#ifndef FSW_RTEMS_H_INCLUDED
	2	#define FSW_RTEMS_H_INCLUDED
	3
	4	#include <errno.h>
	5	#include <fcntl.h>
	6	#include <stdio.h>
	7	#include <stdlib.h>
	8
	9	#include <grspw.h>
	10	#include <apbuart.h>
	11
	12	#include <fsw_params.h>
	13	#include <fsw_misc.h>
	14	#include <fsw_processing.h>
	15	#include <tc_handler.h>
	16	#include <wf_handler.h>
	17	#include <grlib_regs.h>
	18
	19	extern int sched_yield();
	20	extern int errno;
	21
	22	// RTEMS TASKS
	23	rtems_task Init( rtems_task_argument argument); /* forward declaration needed */
	24	rtems_task spw_recv_task(rtems_task_argument argument);
	25	rtems_task spw_spiq_task(rtems_task_argument argument);
	26	rtems_task spw_stat_task(rtems_task_argument argument);
	27	rtems_task spw_wfrm_task(rtems_task_argument argument);
	28	int create_all_tasks();
	29	int start_all_tasks();
	30
	31	// OTHER functions
	32	int configure_spw_link();
	33	int send_console_outputs_on_serial_port();
	34	extern int rtems_cpu_usage_report();
	35	extern int rtems_cpu_usage_reset();
	36	void print_statistics(spw_stats *);
	37	rtems_status_code write_spw(spw_ioctl_pkt_send* spw_ioctl_send);
	38
	39	#endif // FSW_RTEMS_CONFIG_H_INCLUDED

header/fsw_misc.h created 644 +19 0

@@ -0,0 +1,19
	1	#ifndef FSW_MISC_H_INCLUDED
	2	#define FSW_MISC_H_INCLUDED
	3
	4	#include <rtems.h>
	5	#include <stdio.h>
	6
	7	#include <fsw_init.h>
	8	#include <fsw_params.h>
	9	#include <grlib_regs.h>
	10	#include <grspw.h>
	11	#include <ccsds_types.h>
	12
	13	int configure_timer(gptimer_regs_t *gptimer_regs, unsigned char timer, unsigned int clock_divider,
	14	unsigned char interrupt_level, rtems_isr (*timer_isr)() );
	15	void print_statistics(spw_stats *stats);
	16	int send_console_outputs_on_serial_port();
	17	rtems_task spw_stat_task(rtems_task_argument argument);
	18
	19	#endif // FSW_MISC_H_INCLUDED

header/fsw_params.h created 644 +51 0

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	1	#ifndef FSW_RTEMS_CONFIG_H_INCLUDED
	2	#define FSW_RTEMS_CONFIG_H_INCLUDED
	3
	4	#define GRSPW_DEVICE_NAME "/dev/grspw0"
	5	#define UART_DEVICE_NAME "/dev/console"
	6
	7	#define REGS_ADDR_APBUART 0x80000100
	8	#define REGS_ADDR_GPTIMER 0x80000300
	9	#define REGS_ADDR_GRSPW 0x80000500
	10	#define REGS_ADDR_SPECTRAL_MATRICES 0x80000700
	11
	12	#define APBUART_CTRL_REG_MASK_DB 0xfffff7ff
	13
	14	#define IRQ_SM 9
	15	#define IRQ_SPARC_SM 0x19 // see sparcv8.pdf p.76 for interrupt levels
	16	#define IRQ_WF 10
	17	#define IRQ_SPARC_WF 0x1a // see sparcv8.pdf p.76 for interrupt levels
	18
	19	#define CLKDIV_SM_SIMULATOR 9999
	20	#define CLKDIV_WF_SIMULATOR 9999999
	21	#define TIMER_SM_SIMULATOR 1
	22	#define TIMER_WF_SIMULATOR 2
	23
	24	#define TASKID_RECV 1
	25	#define TASKID_SPIQ 3
	26	#define TASKID_SMIQ 4
	27	#define TASKID_STAT 5
	28	#define TASKID_AVF0 6
	29	#define TASKID_BPF0 7
	30	#define TASKID_WFRM 8
	31
	32	#define PRINT_MESSAGES_ON_CONSOLE // enable or disable the printf instructions
	33	#ifdef PRINT_MESSAGES_ON_CONSOLE
	34	#define PRINTF(x) printf(x);
	35	#define PRINTF1(x,y) printf(x,y);
	36	#define PRINTF2(x,y,z) printf(x,y,z);
	37	#else
	38	#define PRINTF(x) ;
	39	#define PRINTF1(x,y) ;
	40	#define PRINTF2(x,y,z) ;
	41	#endif
	42
	43	#define NB_SAMPLES_PER_SNAPSHOT 2048
	44	#define NB_BYTES_SWF_BLK 2 * 6
	45
	46	extern volatile int wf_snap_f0[ ]; // 24576 bytes
	47	extern volatile int wf_snap_f1[ ]; // 24576 bytes
	48	extern volatile int wf_snap_f2[ ]; // 24576 bytes
	49	extern volatile int wf_cont_f3[ ]; // 24576 bytes
	50
	51	#endif // FSW_RTEMS_CONFIG_H_INCLUDED

header/fsw_processing.h created 644 +44 0

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	1	#ifndef FSW_RTEMS_PROCESSING_H_INCLUDED
	2	#define FSW_RTEMS_PROCESSING_H_INCLUDED
	3
	4	#define NB_BINS_spec_mat 128
	5	#define NB_VALUES_PER_spec_mat 25
	6	#define TOTAL_SIZE_SPEC_MAT NB_BINS_spec_mat * NB_VALUES_PER_spec_mat
	7	#define NB_BINS_COMPRESSED_MATRIX_f0 11
	8	#define SIZE_COMPRESSED_spec_mat_f1 13
	9	#define SIZE_COMPRESSED_spec_mat_f2 12
	10	#define TOTAL_SIZE_COMPRESSED_MATRIX_f0 NB_BINS_COMPRESSED_MATRIX_f0 * NB_VALUES_PER_spec_mat
	11	#define NB_AVERAGE_NORMAL_f0 96*4
	12	#define NB_SM_TO_RECEIVE_BEFORE_AVF0 8
	13
	14	#include <rtems.h>
	15	#include <grlib_regs.h>
	16	#include <fsw_params.h>
	17
	18	struct BP1_str{
	19	volatile unsigned char PE[2];
	20	volatile unsigned char PB[2];
	21	volatile unsigned char V0;
	22	volatile unsigned char V1;
	23	volatile unsigned char V2_ELLIP_DOP;
	24	volatile unsigned char SZ;
	25	volatile unsigned char VPHI;
	26	};
	27	typedef struct BP1_str BP1_t;
	28
	29	// ISR
	30	rtems_isr spectral_matrices_isr( rtems_vector_number vector );
	31	// RTEMS TASKS
	32	rtems_task spw_bppr_task(rtems_task_argument argument);
	33	rtems_task spw_avf0_task(rtems_task_argument argument);
	34	rtems_task spw_bpf0_task(rtems_task_argument argument);
	35	rtems_task spw_smiq_task(rtems_task_argument argument); // added to test the spectral matrix simulator
	36	//
	37	rtems_task spw_bppr_task_rate_monotonic(rtems_task_argument argument);
	38	void matrix_average(volatile int spec_mat, float averaged_spec_mat);
	39	void matrix_compression(float averaged_spec_mat, unsigned char fChannel, float compressed_spec_mat);
	40	void matrix_reset(float *averaged_spec_mat);
	41	void BP1_set(float * compressed_spec_mat, unsigned char nb_bins_compressed_spec_mat, unsigned char * LFR_BP1);
	42	void BP2_set(float * compressed_spec_mat, unsigned char nb_bins_compressed_spec_mat);
	43
	44	#endif // FSW_RTEMS_PROCESSING_H_INCLUDED

header/grlib_regs.h created 644 +40 0

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	1	#ifndef GRLIBREGS_H_INCLUDED
	2	#define GRLIBREGS_H_INCLUDED
	3
	4	#define NB_GPTIMER 3
	5
	6	struct apbuart_regs_str{
	7	volatile unsigned int data;
	8	volatile unsigned int status;
	9	volatile unsigned int ctrl;
	10	volatile unsigned int scaler;
	11	volatile unsigned int fifoDebug;
	12	};
	13
	14	struct timer_regs_str
	15	{
	16	volatile unsigned int counter;
	17	volatile unsigned int reload;
	18	volatile unsigned int ctrl;
	19	volatile unsigned int unused;
	20	};
	21	typedef struct timer_regs_str timer_regs_t;
	22
	23	struct gptimer_regs_str
	24	{
	25	volatile unsigned int scaler_value;
	26	volatile unsigned int scaler_reload;
	27	volatile unsigned int conf;
	28	volatile unsigned int unused0;
	29	timer_regs_t timer[NB_GPTIMER];
	30	};
	31	typedef struct gptimer_regs_str gptimer_regs_t;
	32
	33	struct spectral_matrices_regs_str{
	34	volatile int ctrl;
	35	volatile int address0;
	36	volatile int address1;
	37	};
	38	typedef struct spectral_matrices_regs_str spectral_matrices_regs_t;
	39
	40	#endif // GRLIBREGS_H_INCLUDED

header/tc_handler.h created 644 +36 0

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	1	#ifndef TC_HANDLER_H_INCLUDED
	2	#define TC_HANDLER_H_INCLUDED
	3
	4	#include <rtems.h>
	5	#include <stdio.h>
	6	#include <unistd.h> // for the read call
	7	#include <sys/ioctl.h> // for the ioctl call
	8	#include <ccsds_types.h>
	9	#include <grspw.h>
	10
	11	extern int fdSPW;
	12	extern rtems_id Task_id[ ]; /* array of task ids */
	13
	14	unsigned char currentTC_LEN_RCV[2]; // SHALL be equal to the current TC packet estimated packet length field
	15	unsigned char currentTC_COMPUTED_CRC[2];
	16	unsigned int currentTC_LEN_RCV_AsUnsignedInt;
	17	unsigned int currentTM_length;
	18	unsigned char currentTC_processedFlag;
	19
	20	unsigned int lookUpTableForCRC[256];
	21	void InitLookUpTableForCRC();
	22	void GetCRCAsTwoBytes(unsigned char* data, unsigned char* crcAsTwoBytes, unsigned int sizeOfData);
	23
	24	// ACCEPTANCE FUNCTIONS
	25	unsigned char acceptTM(ccsdsTelecommandPacket_t * TMPacket, unsigned int TC_LEN_RCV);
	26
	27	unsigned char TM_build_header( enum TM_TYPE tm_type, unsigned int SID, unsigned int packetLength,
	28	unsigned int coarseTime, unsigned int fineTime, TMHeader_t *TMHeader);
	29	unsigned char TM_build_data(ccsdsTelecommandPacket_t TC, char data, unsigned int SID, unsigned char *computed_CRC);
	30	unsigned int TC_checker(ccsdsTelecommandPacket_t *TC, unsigned int TC_LEN_RCV,
	31	TMHeader_t TM_Header, unsigned int hlen, char *data);
	32
	33	// RTEMS TASK
	34	rtems_task spw_recv_task( rtems_task_argument unused );
	35
	36	#endif // TC_HANDLER_H_INCLUDED

header/wf_handler.h created 644 +20 0

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	1	#ifndef WF_HANDLER_H_INCLUDED
	2	#define WF_HANDLER_H_INCLUDED
	3
	4	#include <rtems.h>
	5	#include <fsw_params.h>
	6	#include <grspw.h>
	7	#include <grlib_regs.h>
	8	#include <ccsds_types.h>
	9	#include <stdio.h>
	10	#include <fsw_init.h>
	11
	12	//#include <sys/ioctl.h>
	13
	14	extern rtems_id Task_id[]; /* array of task ids */
	15	extern int fdSPW;
	16
	17	rtems_isr waveforms_isr( rtems_vector_number vector );
	18	rtems_task spw_wfrm_task(rtems_task_argument argument);
	19
	20	#endif // WF_HANDLER_H_INCLUDED

src/fsw_config.c created 644 +53 0

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	1	#include <drvmgr/ambapp_bus.h>
	2
	3	// GRSPW0 resources
	4	struct drvmgr_key grlib_grspw_0n1_res[] = {
	5	{"txBdCnt", KEY_TYPE_INT, {(unsigned int)10}},
	6	{"rxBdCnt", KEY_TYPE_INT, {(unsigned int)10}},
	7	{"txDataSize", KEY_TYPE_INT, {(unsigned int)4096}},
	8	{"txHdrSize", KEY_TYPE_INT, {(unsigned int)20+6}}, // 6 is for the auxiliary header, when needed
	9	{"rxPktSize", KEY_TYPE_INT, {(unsigned int)248+4}},
	10	KEY_EMPTY
	11	};
	12
	13	#if 0
	14	/* APBUART0 */
	15	struct drvmgr_key grlib_drv_res_apbuart0[] =
	16	{
	17	{"mode", KEY_TYPE_INT, {(unsigned int)1}},
	18	{"syscon", KEY_TYPE_INT, {(unsigned int)1}},
	19	KEY_EMPTY
	20	};
	21	/* APBUART1 */
	22	struct drvmgr_key grlib_drv_res_apbuart1[] =
	23	{
	24	{"mode", KEY_TYPE_INT, {(unsigned int)1}},
	25	{"syscon", KEY_TYPE_INT, {(unsigned int)0}},
	26	KEY_EMPTY
	27	};
	28	/* LEON3 System with driver configuration for 2 APBUARTs, the
	29	* the rest of the AMBA device drivers use their defaults.
	30	*/
	31
	32	/* Override default debug UART assignment.
	33	* 0 = Default APBUART. APBUART[0], but on MP system CPU0=APBUART0,
	34	* CPU1=APBUART1...
	35	* 1 = APBUART[0]
	36	* 2 = APBUART[1]
	37	* 3 = APBUART[2]
	38	* ...
	39	*/
	40	//int debug_uart_index = 2; /* second UART -- APBUART[1] */
	41	#endif
	42
	43	// If RTEMS_DRVMGR_STARTUP is defined we override the "weak defaults" that is defined by the LEON3 BSP.
	44
	45	struct drvmgr_bus_res grlib_drv_resources = {
	46	.next = NULL,
	47	.resource = {
	48	{DRIVER_AMBAPP_GAISLER_GRSPW_ID, 0, &grlib_grspw_0n1_res[0]},
	49	// {DRIVER_AMBAPP_GAISLER_APBUART_ID, 0, &grlib_drv_res_apbuart0[0]},
	50	// {DRIVER_AMBAPP_GAISLER_APBUART_ID, 1, &grlib_drv_res_apbuart1[0]},
	51	RES_EMPTY /* Mark end of device resource array */
	52	}
	53	};

src/fsw_globals.c created 644 +25 0

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	1	#include <fsw_processing.h>
	2
	3	// WAVEFORMS GLOBAL VARIABLES
	4	volatile int wf_snap_f0[ NB_SAMPLES_PER_SNAPSHOT * NB_BYTES_SWF_BLK ]; // 24576 bytes
	5	volatile int wf_snap_f1[ NB_SAMPLES_PER_SNAPSHOT * NB_BYTES_SWF_BLK ]; // 24576 bytes
	6	volatile int wf_snap_f2[ NB_SAMPLES_PER_SNAPSHOT * NB_BYTES_SWF_BLK ]; // 24576 bytes
	7	volatile int wf_cont_f3[ NB_SAMPLES_PER_SNAPSHOT * NB_BYTES_SWF_BLK ]; // 24576 bytes
	8
	9	// SPECTRAL MATRICES GLOBAL VARIABLES
	10	volatile int spec_mat_f0_a[ TOTAL_SIZE_SPEC_MAT ];
	11	volatile int spec_mat_f0_b[ TOTAL_SIZE_SPEC_MAT ];
	12	volatile int spec_mat_f0_c[ TOTAL_SIZE_SPEC_MAT ];
	13	volatile int spec_mat_f0_d[ TOTAL_SIZE_SPEC_MAT ];
	14	volatile int spec_mat_f0_e[ TOTAL_SIZE_SPEC_MAT ];
	15	volatile int spec_mat_f0_f[ TOTAL_SIZE_SPEC_MAT ];
	16	volatile int spec_mat_f0_g[ TOTAL_SIZE_SPEC_MAT ];
	17	volatile int spec_mat_f0_h[ TOTAL_SIZE_SPEC_MAT ];
	18	//
	19	float averaged_spec_mat_f0[ TOTAL_SIZE_SPEC_MAT ];
	20	float compressed_spec_mat_f0[ TOTAL_SIZE_COMPRESSED_MATRIX_f0 ];
	21
	22	// BASIC PARAMETERS GLOBAL VAIRABLES
	23	unsigned char LFR_BP1_F0[ NB_BINS_COMPRESSED_MATRIX_f0 * 9 ];
	24
	25	BP1_t data_BP1[ NB_BINS_COMPRESSED_MATRIX_f0 ];

src/fsw_init.c created 644 +250 0

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	1	//*************************
	2	// GPL reminder to be added
	3	//*************************
	4
	5	#include <rtems.h>
	6
	7	/* configuration information */
	8
	9	#define CONFIGURE_INIT
	10
	11	#include <bsp.h> /* for device driver prototypes */
	12
	13	/* configuration information */
	14
	15	#define CONFIGURE_APPLICATION_NEEDS_CONSOLE_DRIVER
	16	#define CONFIGURE_APPLICATION_NEEDS_CLOCK_DRIVER
	17
	18	#define CONFIGURE_MAXIMUM_TASKS 10
	19	#define CONFIGURE_RTEMS_INIT_TASKS_TABLE
	20	#define CONFIGURE_EXTRA_TASK_STACKS (3 * RTEMS_MINIMUM_STACK_SIZE)
	21	#define CONFIGURE_LIBIO_MAXIMUM_FILE_DESCRIPTORS 32
	22	#define CONFIGURE_INIT_TASK_PRIORITY 100
	23	#define CONFIGURE_MAXIMUM_DRIVERS 16
	24	#define CONFIGURE_MAXIMUM_PERIODS 1
	25
	26	#include <rtems/confdefs.h>
	27
	28	/* If --drvmgr was enabled during the configuration of the RTEMS kernel */
	29	#ifdef RTEMS_DRVMGR_STARTUP
	30	#ifdef LEON3
	31	/* Add Timer and UART Driver */
	32	#ifdef CONFIGURE_APPLICATION_NEEDS_CLOCK_DRIVER
	33	#define CONFIGURE_DRIVER_AMBAPP_GAISLER_GPTIMER
	34	#endif
	35	#ifdef CONFIGURE_APPLICATION_NEEDS_CONSOLE_DRIVER
	36	#define CONFIGURE_DRIVER_AMBAPP_GAISLER_APBUART
	37	#endif
	38	#endif
	39	#define CONFIGURE_DRIVER_AMBAPP_GAISLER_GRSPW /* GRSPW Driver */
	40	#include <drvmgr/drvmgr_confdefs.h>
	41	#endif
	42
	43	#include <fsw_init.h>
	44	#include <fsw_config.c>
	45
	46	int fdSPW;
	47	int fdUART;
	48
	49	char *link_status(int status);
	50
	51	char *lstates[6] = {"Error-reset",
	52	"Error-wait",
	53	"Ready",
	54	"Started",
	55	"Connecting",
	56	"Run"
	57	};
	58
	59	rtems_id Task_id[10]; /* array of task ids */
	60	rtems_name Task_name[10]; /* array of task names */
	61
	62	rtems_task Init( rtems_task_argument ignored )
	63	{
	64	rtems_status_code status;
	65
	66	//send_console_outputs_on_serial_port();
	67
	68	InitLookUpTableForCRC(); // in tc_handler.h
	69
	70	create_all_tasks();
	71	start_all_tasks();
	72
	73	configure_spw_link();
	74	// configure timer for spectral matrices simulation
	75	configure_timer((gptimer_regs_t*) REGS_ADDR_GPTIMER, TIMER_SM_SIMULATOR, CLKDIV_SM_SIMULATOR,
	76	IRQ_SPARC_SM, spectral_matrices_isr );
	77	// configure timer for waveforms simulation
	78	configure_timer((gptimer_regs_t*) REGS_ADDR_GPTIMER, TIMER_WF_SIMULATOR, CLKDIV_WF_SIMULATOR,
	79	IRQ_SPARC_WF, waveforms_isr );
	80
	81	LEON_Unmask_interrupt( IRQ_SM );
	82	LEON_Unmask_interrupt( IRQ_WF );
	83
	84	status = rtems_task_delete(RTEMS_SELF);
	85	}
	86
	87	rtems_task spw_spiq_task(rtems_task_argument unused)
	88	{
	89	rtems_event_set event_out;
	90	struct grspw_regs_str *grspw_regs;
	91	grspw_regs = (struct grspw_regs_str *) REGS_ADDR_GRSPW;
	92
	93	while(1){
	94	PRINTF("In SPIQ *** Waiting for SPW_LINKERR_EVENT\n")
	95	rtems_event_receive(SPW_LINKERR_EVENT, RTEMS_WAIT, RTEMS_NO_TIMEOUT, &event_out); // wait for an SPW_LINKERR_EVENT
	96
	97	if (rtems_task_suspend(Task_id[1])!=RTEMS_SUCCESSFUL) // suspend RECV task
	98	PRINTF("In SPIQ *** Error suspending RECV Task\n")
	99
	100	configure_spw_link();
	101
	102	if (rtems_task_restart(Task_id[1], 1)!=RTEMS_SUCCESSFUL) // restart RECV task
	103	PRINTF("In SPIQ *** Error resume RECV Task\n")
	104	}
	105	}
	106
	107	int create_all_tasks()
	108	{
	109	rtems_status_code status;
	110
	111	Task_name[1] = rtems_build_name( 'R', 'E', 'C', 'V' );
	112	Task_name[3] = rtems_build_name( 'S', 'P', 'I', 'Q' );
	113	Task_name[4] = rtems_build_name( 'S', 'M', 'I', 'Q' );
	114	Task_name[5] = rtems_build_name( 'S', 'T', 'A', 'T' );
	115	Task_name[6] = rtems_build_name( 'A', 'V', 'F', '0' );
	116	Task_name[7] = rtems_build_name( 'B', 'P', 'F', '0' );
	117	Task_name[8] = rtems_build_name( 'W', 'F', 'R', 'M' );
	118
	119	// RECV
	120	status = rtems_task_create(
	121	Task_name[1], 200, RTEMS_MINIMUM_STACK_SIZE * 2,
	122	RTEMS_DEFAULT_MODES,
	123	RTEMS_DEFAULT_ATTRIBUTES, &Task_id[1]
	124	);
	125	// SPIQ
	126	status = rtems_task_create(
	127	Task_name[3], 50, RTEMS_MINIMUM_STACK_SIZE * 2,
	128	RTEMS_DEFAULT_MODES,
	129	RTEMS_DEFAULT_ATTRIBUTES, &Task_id[3]
	130	);
	131	// SMIQ
	132	status = rtems_task_create(
	133	Task_name[4], 10, RTEMS_MINIMUM_STACK_SIZE * 2,
	134	RTEMS_DEFAULT_MODES \| RTEMS_NO_PREEMPT,
	135	RTEMS_DEFAULT_ATTRIBUTES, &Task_id[4]
	136	);
	137	// STAT
	138	status = rtems_task_create(
	139	Task_name[5], 200, RTEMS_MINIMUM_STACK_SIZE * 2,
	140	RTEMS_DEFAULT_MODES,
	141	RTEMS_DEFAULT_ATTRIBUTES, &Task_id[5]
	142	);
	143	// AVF0
	144	status = rtems_task_create(
	145	Task_name[6], 50, RTEMS_MINIMUM_STACK_SIZE * 2,
	146	RTEMS_DEFAULT_MODES \| RTEMS_NO_PREEMPT,
	147	RTEMS_DEFAULT_ATTRIBUTES \| RTEMS_FLOATING_POINT, &Task_id[6]
	148	);
	149	// BPF0
	150	status = rtems_task_create(
	151	Task_name[7], 50, RTEMS_MINIMUM_STACK_SIZE * 2,
	152	RTEMS_DEFAULT_MODES,
	153	RTEMS_DEFAULT_ATTRIBUTES \| RTEMS_FLOATING_POINT, &Task_id[7]
	154	);
	155	// WFRM
	156	status = rtems_task_create(
	157	Task_name[8], 100, RTEMS_MINIMUM_STACK_SIZE * 2,
	158	RTEMS_DEFAULT_MODES,
	159	RTEMS_DEFAULT_ATTRIBUTES \| RTEMS_FLOATING_POINT, &Task_id[8]
	160	);
	161
	162	return 0;
	163	}
	164
	165	int start_all_tasks()
	166	{
	167	rtems_status_code status;
	168
	169	status = rtems_task_start( Task_id[3], spw_spiq_task, 1 );
	170	if (status!=RTEMS_SUCCESSFUL) PRINTF("In INIT *** Error starting TASK_SPIQ\n")
	171
	172	status = rtems_task_start( Task_id[1], spw_recv_task, 1 );
	173	if (status!=RTEMS_SUCCESSFUL) PRINTF("In INIT *** Error starting TASK_RECV\n")
	174
	175	//status = rtems_task_start( Task_id[4], spw_bppr_task_rate_monotonic, 1 );
	176	status = rtems_task_start( Task_id[4], spw_smiq_task, 1 );
	177	if (status!=RTEMS_SUCCESSFUL) PRINTF("In INIT *** Error starting TASK_BPPR\n")
	178
	179	status = rtems_task_start( Task_id[5], spw_stat_task, 1 );
	180	if (status!=RTEMS_SUCCESSFUL) PRINTF("In INIT *** Error starting TASK_STAT\n")
	181
	182	status = rtems_task_start( Task_id[6], spw_avf0_task, 1 );
	183	if (status!=RTEMS_SUCCESSFUL) PRINTF("In INIT *** Error starting TASK_AVF0\n")
	184
	185	status = rtems_task_start( Task_id[7], spw_bpf0_task, 1 );
	186	if (status!=RTEMS_SUCCESSFUL) PRINTF("In INIT *** Error starting TASK_BPF0\n")
	187
	188	status = rtems_task_start( Task_id[8], spw_wfrm_task, 1 );
	189	if (status!=RTEMS_SUCCESSFUL) PRINTF("In INIT *** Error starting TASK_WFRM\n")
	190
	191	return 0;
	192	}
	193
	194	int configure_spw_link()
	195	{
	196	rtems_status_code status;
	197
	198	close(fdSPW); // close the device if it is already open
	199	fdSPW = open(GRSPW_DEVICE_NAME, O_RDWR); // open the device. the open call reset the hardware
	200	if (fdSPW<0) PRINTF("In configure_spw_link *** Error opening"GRSPW_DEVICE_NAME"\n")
	201	while(ioctl(fdSPW, SPACEWIRE_IOCTRL_START, 0) != RTEMS_SUCCESSFUL){
	202	PRINTF("In configure_spw_link *** "GRSPW_DEVICE_NAME" not started, retry\n")
	203	close(fdSPW); // close the device
	204	fdSPW = open(GRSPW_DEVICE_NAME, O_RDWR); // open the device. the open call reset the hardware
	205	if (fdSPW<0) PRINTF("In configure_spw_link *** Error opening"GRSPW_DEVICE_NAME"\n")
	206	rtems_task_wake_after(100);
	207	}
	208
	209	PRINTF("In configure_spw_link *** "GRSPW_DEVICE_NAME" opened and started successfully\n")
	210
	211	// sets a few parameters of the link
	212	status = ioctl(fdSPW, SPACEWIRE_IOCTRL_SET_RMAPEN, 1); // sets the RMAP enable bit
	213	if (status!=RTEMS_SUCCESSFUL) PRINTF("In RECV *** Error SPACEWIRE_IOCTRL_SET_RMAPEN\n")
	214	//
	215	status = ioctl(fdSPW, SPACEWIRE_IOCTRL_SET_RXBLOCK, 1); // sets the blocking mode for reception
	216	if (status!=RTEMS_SUCCESSFUL) PRINTF("In RECV *** Error SPACEWIRE_IOCTRL_SET_RXBLOCK\n")
	217	//
	218	status = ioctl(fdSPW, SPACEWIRE_IOCTRL_SET_EVENT_ID, Task_id[3]); // sets the task ID to which an event is sent when a
	219	if (status!=RTEMS_SUCCESSFUL) PRINTF("In RECV *** Error SPACEWIRE_IOCTRL_SET_EVENT_ID\n") // link-error interrupt occurs
	220	//
	221	status = ioctl(fdSPW, SPACEWIRE_IOCTRL_SET_DISABLE_ERR, 1); // automatic link-disabling due to link-error interrupts
	222	if (status!=RTEMS_SUCCESSFUL) PRINTF("In RECV *** Error SPACEWIRE_IOCTRL_SET_DISABLE_ERR\n")
	223	//
	224	status = ioctl(fdSPW, SPACEWIRE_IOCTRL_SET_LINK_ERR_IRQ, 1); // sets the link-error interrupt bit
	225	if (status!=RTEMS_SUCCESSFUL) PRINTF("In RECV *** Error SPACEWIRE_IOCTRL_SET_LINK_ERR_IRQ\n")
	226
	227	status = ioctl(fdSPW, SPACEWIRE_IOCTRL_SET_TXBLOCK_ON_FULL, 1); // sets the link-error interrupt bit
	228	if (status!=RTEMS_SUCCESSFUL) PRINTF("In RECV *** Error SPACEWIRE_IOCTRL_SET_LINK_ERR_IRQ\n")
	229	//
	230	//status = ioctl(fdSPW, SPACEWIRE_IOCTRL_SET_DESTKEY, CCSDS_DESTINATION_ID); // sets the destination key
	231	//if (status!=RTEMS_SUCCESSFUL) PRINTF("In RECV *** Error SPACEWIRE_IOCTRL_SET_LINK_ERR_IRQ\n")
	232	//
	233	PRINTF("In configure_spw_link *** "GRSPW_DEVICE_NAME" configured successfully\n")
	234
	235	return RTEMS_SUCCESSFUL;
	236	}
	237
	238	char *link_status(int status){
	239	return lstates[status];
	240	}
	241
	242	rtems_status_code write_spw(spw_ioctl_pkt_send* spw_ioctl_send)
	243	{
	244	rtems_status_code status;
	245	status = ioctl( fdSPW, SPACEWIRE_IOCTRL_SEND, spw_ioctl_send );
	246	if (status!=RTEMS_SUCCESSFUL) printf("In write_spw *** Error SPACEWIRE_IOCTRL_SEND\n");
	247	return status;
	248	}
	249
	250

src/fsw_misc.c created 644 +73 0

@@ -0,0 +1,73
	1	#include <fsw_misc.h>
	2	#include <fsw_params.h>
	3
	4	extern rtems_id Task_id[]; /* array of task ids */
	5	extern int fdSPW;
	6
	7	int configure_timer(gptimer_regs_t *gptimer_regs, unsigned char timer, unsigned int clock_divider,
	8	unsigned char interrupt_level, rtems_isr (*timer_isr)() )
	9	{ // configure the timer for the waveforms simulation
	10	rtems_status_code status;
	11	rtems_isr_entry old_isr_handler;
	12
	13	status = rtems_interrupt_catch( timer_isr, interrupt_level, &old_isr_handler) ; // see sparcv8.pdf p.76 for interrupt levels
	14	//if (status==RTEMS_SUCCESSFUL) PRINTF("In configure_timer_for_wf_simulation *** rtems_interrupt_catch successfullly configured\n")
	15
	16	gptimer_regs->timer[timer].reload = clock_divider; // base clock frequency is 1 MHz
	17	gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl \| 0x00000010; // clear pending IRQ if any
	18	gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl \| 0x00000004; // LD load value from the reload register
	19	gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl \| 0x00000001; // EN enable the timer
	20	gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl \| 0x00000002; // RS restart
	21	gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl \| 0x00000008; // IE interrupt enable
	22
	23	return 1;
	24	}
	25
	26	void print_statistics(spw_stats *stats)
	27	{
	28	//printf(" ****** STATISTICS ****** \n");
	29	printf("Transmit link errors: %i\n", stats->tx_link_err);
	30	printf("Receiver RMAP header CRC errors: %i\n", stats->rx_rmap_header_crc_err);
	31	printf("Receiver RMAP data CRC errors: %i\n", stats->rx_rmap_data_crc_err);
	32	printf("Receiver EEP errors: %i\n", stats->rx_eep_err);
	33	printf("Receiver truncation errors: %i\n", stats->rx_truncated);
	34	printf("Parity errors: %i\n", stats->parity_err);
	35	printf("Escape errors: %i\n", stats->escape_err);
	36	printf("Credit errors: %i\n", stats->credit_err);
	37	printf("Disconnect errors: %i\n", stats->disconnect_err);
	38	printf("Write synchronization errors: %i\n", stats->write_sync_err);
	39	printf("Early EOP/EEP: %i\n", stats->early_ep);
	40	printf("Invalid Node Address: %i\n", stats->invalid_address);
	41	printf("Packets transmitted: %i\n", stats->packets_sent);
	42	printf("Packets received: %i\n", stats->packets_received);
	43	}
	44
	45	int send_console_outputs_on_serial_port() // Send the console outputs on the serial port
	46	{
	47	struct apbuart_regs_str *apbuart_regs;
	48
	49	apbuart_regs = (struct apbuart_regs_str *) REGS_ADDR_APBUART;
	50	apbuart_regs->ctrl = apbuart_regs->ctrl & APBUART_CTRL_REG_MASK_DB;
	51	PRINTF("\n\n\n\n\nIn INIT *** Now the console is on port COM1\n")
	52
	53	return 0;
	54	}
	55
	56	rtems_task spw_stat_task(rtems_task_argument argument)
	57	{
	58	int i;
	59	i = 0;
	60	PRINTF("In STAT *** \n")
	61	while(1){
	62	rtems_task_wake_after(1000);
	63	PRINTF1("%d\n", i)
	64	if (i == 2) {
	65	rtems_cpu_usage_report();
	66	rtems_cpu_usage_reset();
	67	i = 0;
	68	}
	69	else i++;
	70	}
	71	}
	72
	73

src/fsw_processing.c created 644 +423 0

@@ -0,0 +1,423
	1	#include <fsw_processing.h>
	2	#include <math.h>
	3	#include <stdio.h>
	4	#include <leon.h>
	5
	6	float k14_re = 1;
	7	float k14_im = 1;
	8	float k14_bis_re = 1;
	9	float k14_bis_im = 1;
	10	float k14_tris_re = 1;
	11	float k14_tris_im = 1;
	12	float k15_re = 1;
	13	float k15_im = 1;
	14	float k15_bis_re = 1;
	15	float k15_bis_im = 1;
	16	float k24_re = 1;
	17	float k24_im = 1;
	18	float k24_bis_re = 1;
	19	float k24_bis_im = 1;
	20	float k24_tris_re = 1;
	21	float k24_tris_im = 1;
	22	float k25_re = 1;
	23	float k25_im = 1;
	24	float k25_bis_re = 1;
	25	float k25_bis_im = 1;
	26	float k34_re = 1;
	27	float k34_im = 1;
	28	float k44 = 1;
	29	float k55 = 1;
	30	float k45_re = 1;
	31	float k45_im = 1;
	32	float alpha_M = M_PI/4;
	33
	34	extern volatile int spec_mat_f0_a[ ];
	35	extern volatile int spec_mat_f0_b[ ];
	36	extern volatile int spec_mat_f0_c[ ];
	37	extern volatile int spec_mat_f0_d[ ];
	38	extern volatile int spec_mat_f0_e[ ];
	39	extern volatile int spec_mat_f0_f[ ];
	40	extern volatile int spec_mat_f0_g[ ];
	41	extern volatile int spec_mat_f0_h[ ];
	42	extern float averaged_spec_mat_f0[ ];
	43	extern float compressed_spec_mat_f0[ ];
	44	extern unsigned char LFR_BP1_F0[ ];
	45
	46	extern BP1_t data_BP1[ ];
	47
	48	extern rtems_id Task_id[ ]; /* array of task ids */
	49
	50	spectral_matrices_regs_t *spectral_matrices_regs;
	51
	52	// Interrupt Service Routine for spectral matrices processing
	53	rtems_isr spectral_matrices_isr( rtems_vector_number vector )
	54	{
	55	if (rtems_event_send( Task_id[TASKID_SMIQ], RTEMS_EVENT_0 ) != RTEMS_SUCCESSFUL)
	56	printf("In spectral_matrices_isr *** Error sending event to AVF0\n");
	57	}
	58
	59	rtems_task spw_smiq_task(rtems_task_argument argument) // process the Spectral Matrices IRQ
	60	{
	61	rtems_event_set event_out;
	62	gptimer_regs_t *gptimer_regs;
	63	gptimer_regs = (gptimer_regs_t *) REGS_ADDR_GPTIMER;
	64	unsigned char nb_interrupt_f0 = 0;
	65
	66	while(1){
	67	rtems_event_receive(RTEMS_EVENT_0, RTEMS_WAIT, RTEMS_NO_TIMEOUT, &event_out); // wait for an RTEMS_EVENT0
	68	nb_interrupt_f0 = nb_interrupt_f0 + 1;
	69	if (nb_interrupt_f0 == (NB_SM_TO_RECEIVE_BEFORE_AVF0-1) ){
	70	if (rtems_event_send( Task_id[6], RTEMS_EVENT_0 ) != RTEMS_SUCCESSFUL)
	71	printf("In spw_smiq_task *** Error sending event to AVF0\n");
	72	nb_interrupt_f0 = 0;
	73	}
	74	gptimer_regs->timer[1].ctrl = gptimer_regs->timer[1].ctrl \| 0x00000010;
	75	}
	76	}
	77
	78	rtems_task spw_bppr_task(rtems_task_argument argument)
	79	{
	80	rtems_status_code status;
	81	rtems_event_set event_out;
	82	static int nb_average_f0 = 0;
	83	//static int nb_average_f1 = 0;
	84	//static int nb_average_f2 = 0;
	85
	86	while(1)
	87
	88	spectral_matrices_regs = (struct spectral_matrices_regs_str *) REGS_ADDR_SPECTRAL_MATRICES;
	89	spectral_matrices_regs->address0 = (volatile int) spec_mat_f0_a;
	90	spectral_matrices_regs->address1 = (volatile int) spec_mat_f0_b;
	91
	92	printf("In BPPR ***\n");
	93
	94	while(1){ // wait for an event to begin with the processing
	95	status = rtems_event_receive(RTEMS_EVENT_0, RTEMS_WAIT, RTEMS_NO_TIMEOUT, &event_out);
	96