##// END OF EJS Templates
3.1.0.2...
paul -
r293:e6dce572ae0e R3_plus draft
parent child
Show More
@@ -1,2 +1,2
1 3081d1f9bb20b2b64a192585337a292a9804e0c5 LFR_basic-parameters
1 3081d1f9bb20b2b64a192585337a292a9804e0c5 LFR_basic-parameters
2 2450d4935652a4d0370245cc7fc60a4c51e6fc9b header/lfr_common_headers
2 c378fa14eadd80b3b873ca7c8f9f387893c07692 header/lfr_common_headers
@@ -1,123 +1,123
1 TEMPLATE = app
1 TEMPLATE = app
2 # CONFIG += console v8 sim
2 # CONFIG += console v8 sim
3 # CONFIG options =
3 # CONFIG options =
4 # verbose
4 # verbose
5 # boot_messages
5 # boot_messages
6 # debug_messages
6 # debug_messages
7 # cpu_usage_report
7 # cpu_usage_report
8 # stack_report
8 # stack_report
9 # vhdl_dev
9 # vhdl_dev
10 # debug_tch
10 # debug_tch
11 # lpp_dpu_destid /!\ REMOVE BEFORE DELIVERY TO LESIA /!\
11 # lpp_dpu_destid /!\ REMOVE BEFORE DELIVERY TO LESIA /!\
12 # debug_watchdog
12 # debug_watchdog
13 CONFIG += console verbose lpp_dpu_destid cpu_usage_report
13 CONFIG += console verbose lpp_dpu_destid cpu_usage_report
14 CONFIG -= qt
14 CONFIG -= qt
15
15
16 include(./sparc.pri)
16 include(./sparc.pri)
17
17
18 # flight software version
18 # flight software version
19 SWVERSION=-1-0
19 SWVERSION=-1-0
20 DEFINES += SW_VERSION_N1=3 # major
20 DEFINES += SW_VERSION_N1=3 # major
21 DEFINES += SW_VERSION_N2=1 # minor
21 DEFINES += SW_VERSION_N2=1 # minor
22 DEFINES += SW_VERSION_N3=0 # patch
22 DEFINES += SW_VERSION_N3=0 # patch
23 DEFINES += SW_VERSION_N4=1 # internal
23 DEFINES += SW_VERSION_N4=2 # internal
24
24
25 # <GCOV>
25 # <GCOV>
26 #QMAKE_CFLAGS_RELEASE += -fprofile-arcs -ftest-coverage
26 #QMAKE_CFLAGS_RELEASE += -fprofile-arcs -ftest-coverage
27 #LIBS += -lgcov /opt/GCOV/01A/lib/overload.o -lc
27 #LIBS += -lgcov /opt/GCOV/01A/lib/overload.o -lc
28 # </GCOV>
28 # </GCOV>
29
29
30 # <CHANGE BEFORE FLIGHT>
30 # <CHANGE BEFORE FLIGHT>
31 contains( CONFIG, lpp_dpu_destid ) {
31 contains( CONFIG, lpp_dpu_destid ) {
32 DEFINES += LPP_DPU_DESTID
32 DEFINES += LPP_DPU_DESTID
33 }
33 }
34 # </CHANGE BEFORE FLIGHT>
34 # </CHANGE BEFORE FLIGHT>
35
35
36 contains( CONFIG, debug_tch ) {
36 contains( CONFIG, debug_tch ) {
37 DEFINES += DEBUG_TCH
37 DEFINES += DEBUG_TCH
38 }
38 }
39 DEFINES += MSB_FIRST_TCH
39 DEFINES += MSB_FIRST_TCH
40
40
41 contains( CONFIG, vhdl_dev ) {
41 contains( CONFIG, vhdl_dev ) {
42 DEFINES += VHDL_DEV
42 DEFINES += VHDL_DEV
43 }
43 }
44
44
45 contains( CONFIG, verbose ) {
45 contains( CONFIG, verbose ) {
46 DEFINES += PRINT_MESSAGES_ON_CONSOLE
46 DEFINES += PRINT_MESSAGES_ON_CONSOLE
47 }
47 }
48
48
49 contains( CONFIG, debug_messages ) {
49 contains( CONFIG, debug_messages ) {
50 DEFINES += DEBUG_MESSAGES
50 DEFINES += DEBUG_MESSAGES
51 }
51 }
52
52
53 contains( CONFIG, cpu_usage_report ) {
53 contains( CONFIG, cpu_usage_report ) {
54 DEFINES += PRINT_TASK_STATISTICS
54 DEFINES += PRINT_TASK_STATISTICS
55 }
55 }
56
56
57 contains( CONFIG, stack_report ) {
57 contains( CONFIG, stack_report ) {
58 DEFINES += PRINT_STACK_REPORT
58 DEFINES += PRINT_STACK_REPORT
59 }
59 }
60
60
61 contains( CONFIG, boot_messages ) {
61 contains( CONFIG, boot_messages ) {
62 DEFINES += BOOT_MESSAGES
62 DEFINES += BOOT_MESSAGES
63 }
63 }
64
64
65 contains( CONFIG, debug_watchdog ) {
65 contains( CONFIG, debug_watchdog ) {
66 DEFINES += DEBUG_WATCHDOG
66 DEFINES += DEBUG_WATCHDOG
67 }
67 }
68
68
69 #doxygen.target = doxygen
69 #doxygen.target = doxygen
70 #doxygen.commands = doxygen ../doc/Doxyfile
70 #doxygen.commands = doxygen ../doc/Doxyfile
71 #QMAKE_EXTRA_TARGETS += doxygen
71 #QMAKE_EXTRA_TARGETS += doxygen
72
72
73 TARGET = fsw
73 TARGET = fsw
74
74
75 INCLUDEPATH += \
75 INCLUDEPATH += \
76 $${PWD}/../src \
76 $${PWD}/../src \
77 $${PWD}/../header \
77 $${PWD}/../header \
78 $${PWD}/../header/lfr_common_headers \
78 $${PWD}/../header/lfr_common_headers \
79 $${PWD}/../header/processing \
79 $${PWD}/../header/processing \
80 $${PWD}/../LFR_basic-parameters
80 $${PWD}/../LFR_basic-parameters
81
81
82 SOURCES += \
82 SOURCES += \
83 ../src/wf_handler.c \
83 ../src/wf_handler.c \
84 ../src/tc_handler.c \
84 ../src/tc_handler.c \
85 ../src/fsw_misc.c \
85 ../src/fsw_misc.c \
86 ../src/fsw_init.c \
86 ../src/fsw_init.c \
87 ../src/fsw_globals.c \
87 ../src/fsw_globals.c \
88 ../src/fsw_spacewire.c \
88 ../src/fsw_spacewire.c \
89 ../src/tc_load_dump_parameters.c \
89 ../src/tc_load_dump_parameters.c \
90 ../src/tm_lfr_tc_exe.c \
90 ../src/tm_lfr_tc_exe.c \
91 ../src/tc_acceptance.c \
91 ../src/tc_acceptance.c \
92 ../src/processing/fsw_processing.c \
92 ../src/processing/fsw_processing.c \
93 ../src/processing/avf0_prc0.c \
93 ../src/processing/avf0_prc0.c \
94 ../src/processing/avf1_prc1.c \
94 ../src/processing/avf1_prc1.c \
95 ../src/processing/avf2_prc2.c \
95 ../src/processing/avf2_prc2.c \
96 ../src/lfr_cpu_usage_report.c \
96 ../src/lfr_cpu_usage_report.c \
97 ../LFR_basic-parameters/basic_parameters.c
97 ../LFR_basic-parameters/basic_parameters.c
98
98
99 HEADERS += \
99 HEADERS += \
100 ../header/wf_handler.h \
100 ../header/wf_handler.h \
101 ../header/tc_handler.h \
101 ../header/tc_handler.h \
102 ../header/grlib_regs.h \
102 ../header/grlib_regs.h \
103 ../header/fsw_misc.h \
103 ../header/fsw_misc.h \
104 ../header/fsw_init.h \
104 ../header/fsw_init.h \
105 ../header/fsw_spacewire.h \
105 ../header/fsw_spacewire.h \
106 ../header/tc_load_dump_parameters.h \
106 ../header/tc_load_dump_parameters.h \
107 ../header/tm_lfr_tc_exe.h \
107 ../header/tm_lfr_tc_exe.h \
108 ../header/tc_acceptance.h \
108 ../header/tc_acceptance.h \
109 ../header/processing/fsw_processing.h \
109 ../header/processing/fsw_processing.h \
110 ../header/processing/avf0_prc0.h \
110 ../header/processing/avf0_prc0.h \
111 ../header/processing/avf1_prc1.h \
111 ../header/processing/avf1_prc1.h \
112 ../header/processing/avf2_prc2.h \
112 ../header/processing/avf2_prc2.h \
113 ../header/fsw_params_wf_handler.h \
113 ../header/fsw_params_wf_handler.h \
114 ../header/lfr_cpu_usage_report.h \
114 ../header/lfr_cpu_usage_report.h \
115 ../header/lfr_common_headers/ccsds_types.h \
115 ../header/lfr_common_headers/ccsds_types.h \
116 ../header/lfr_common_headers/fsw_params.h \
116 ../header/lfr_common_headers/fsw_params.h \
117 ../header/lfr_common_headers/fsw_params_nb_bytes.h \
117 ../header/lfr_common_headers/fsw_params_nb_bytes.h \
118 ../header/lfr_common_headers/fsw_params_processing.h \
118 ../header/lfr_common_headers/fsw_params_processing.h \
119 ../header/lfr_common_headers/tm_byte_positions.h \
119 ../header/lfr_common_headers/tm_byte_positions.h \
120 ../LFR_basic-parameters/basic_parameters.h \
120 ../LFR_basic-parameters/basic_parameters.h \
121 ../LFR_basic-parameters/basic_parameters_params.h \
121 ../LFR_basic-parameters/basic_parameters_params.h \
122 ../header/GscMemoryLPP.hpp
122 ../header/GscMemoryLPP.hpp
123
123
@@ -1,64 +1,64
1 #ifndef FSW_INIT_H_INCLUDED
1 #ifndef FSW_INIT_H_INCLUDED
2 #define FSW_INIT_H_INCLUDED
2 #define FSW_INIT_H_INCLUDED
3
3
4 #include <rtems.h>
4 #include <rtems.h>
5 #include <leon.h>
5 #include <leon.h>
6
6
7 #include "fsw_params.h"
7 #include "fsw_params.h"
8 #include "fsw_misc.h"
8 #include "fsw_misc.h"
9 #include "fsw_processing.h"
9 #include "fsw_processing.h"
10
10
11 #include "tc_handler.h"
11 #include "tc_handler.h"
12 #include "wf_handler.h"
12 #include "wf_handler.h"
13 #include "fsw_spacewire.h"
13 #include "fsw_spacewire.h"
14
14
15 #include "avf0_prc0.h"
15 #include "avf0_prc0.h"
16 #include "avf1_prc1.h"
16 #include "avf1_prc1.h"
17 #include "avf2_prc2.h"
17 #include "avf2_prc2.h"
18
18
19 extern rtems_name Task_name[20]; /* array of task names */
19 extern rtems_name Task_name[20]; /* array of task names */
20 extern rtems_id Task_id[20]; /* array of task ids */
20 extern rtems_id Task_id[20]; /* array of task ids */
21 extern rtems_name timecode_timer_name;
21 extern rtems_name timecode_timer_name;
22 extern rtems_id timecode_timer_id;
22 extern rtems_id timecode_timer_id;
23 extern unsigned char pa_bia_status_info;
23 extern unsigned char pa_bia_status_info;
24 extern unsigned char cp_rpw_sc_rw_f_flags;
24 extern unsigned char cp_rpw_sc_rw_f_flags;
25 extern float cp_rpw_sc_rw1_f1;
25 extern float cp_rpw_sc_rw1_f1;
26 extern float cp_rpw_sc_rw1_f2;
26 extern float cp_rpw_sc_rw1_f2;
27 extern float cp_rpw_sc_rw2_f1;
27 extern float cp_rpw_sc_rw2_f1;
28 extern float cp_rpw_sc_rw2_f2;
28 extern float cp_rpw_sc_rw2_f2;
29 extern float cp_rpw_sc_rw3_f1;
29 extern float cp_rpw_sc_rw3_f1;
30 extern float cp_rpw_sc_rw3_f2;
30 extern float cp_rpw_sc_rw3_f2;
31 extern float cp_rpw_sc_rw4_f1;
31 extern float cp_rpw_sc_rw4_f1;
32 extern float cp_rpw_sc_rw4_f2;
32 extern float cp_rpw_sc_rw4_f2;
33 extern float sy_lfr_sc_rw_delta_f;
33 extern filterPar_t filterPar;
34
34
35 // RTEMS TASKS
35 // RTEMS TASKS
36 rtems_task Init( rtems_task_argument argument);
36 rtems_task Init( rtems_task_argument argument);
37
37
38 // OTHER functions
38 // OTHER functions
39 void create_names( void );
39 void create_names( void );
40 int create_all_tasks( void );
40 int create_all_tasks( void );
41 int start_all_tasks( void );
41 int start_all_tasks( void );
42 //
42 //
43 rtems_status_code create_message_queues( void );
43 rtems_status_code create_message_queues( void );
44 rtems_status_code create_timecode_timer( void );
44 rtems_status_code create_timecode_timer( void );
45 rtems_status_code get_message_queue_id_send( rtems_id *queue_id );
45 rtems_status_code get_message_queue_id_send( rtems_id *queue_id );
46 rtems_status_code get_message_queue_id_recv( rtems_id *queue_id );
46 rtems_status_code get_message_queue_id_recv( rtems_id *queue_id );
47 rtems_status_code get_message_queue_id_prc0( rtems_id *queue_id );
47 rtems_status_code get_message_queue_id_prc0( rtems_id *queue_id );
48 rtems_status_code get_message_queue_id_prc1( rtems_id *queue_id );
48 rtems_status_code get_message_queue_id_prc1( rtems_id *queue_id );
49 rtems_status_code get_message_queue_id_prc2( rtems_id *queue_id );
49 rtems_status_code get_message_queue_id_prc2( rtems_id *queue_id );
50 void update_queue_max_count( rtems_id queue_id, unsigned char*fifo_size_max );
50 void update_queue_max_count( rtems_id queue_id, unsigned char*fifo_size_max );
51 void init_ring(ring_node ring[], unsigned char nbNodes, volatile int buffer[], unsigned int bufferSize );
51 void init_ring(ring_node ring[], unsigned char nbNodes, volatile int buffer[], unsigned int bufferSize );
52 //
52 //
53 int start_recv_send_tasks( void );
53 int start_recv_send_tasks( void );
54 //
54 //
55 void init_local_mode_parameters( void );
55 void init_local_mode_parameters( void );
56 void reset_local_time( void );
56 void reset_local_time( void );
57
57
58 extern void rtems_cpu_usage_report( void );
58 extern void rtems_cpu_usage_report( void );
59 extern void rtems_cpu_usage_reset( void );
59 extern void rtems_cpu_usage_reset( void );
60 extern void rtems_stack_checker_report_usage( void );
60 extern void rtems_stack_checker_report_usage( void );
61
61
62 extern int sched_yield( void );
62 extern int sched_yield( void );
63
63
64 #endif // FSW_INIT_H_INCLUDED
64 #endif // FSW_INIT_H_INCLUDED
@@ -1,96 +1,98
1 /** Global variables of the LFR flight software.
1 /** Global variables of the LFR flight software.
2 *
2 *
3 * @file
3 * @file
4 * @author P. LEROY
4 * @author P. LEROY
5 *
5 *
6 * Among global variables, there are:
6 * Among global variables, there are:
7 * - RTEMS names and id.
7 * - RTEMS names and id.
8 * - APB configuration registers.
8 * - APB configuration registers.
9 * - waveforms global buffers, used by the waveform picker hardware module to store data.
9 * - waveforms global buffers, used by the waveform picker hardware module to store data.
10 * - spectral matrices buffesr, used by the hardware module to store data.
10 * - spectral matrices buffesr, used by the hardware module to store data.
11 * - variable related to LFR modes parameters.
11 * - variable related to LFR modes parameters.
12 * - the global HK packet buffer.
12 * - the global HK packet buffer.
13 * - the global dump parameter buffer.
13 * - the global dump parameter buffer.
14 *
14 *
15 */
15 */
16
16
17 #include <rtems.h>
17 #include <rtems.h>
18 #include <grspw.h>
18 #include <grspw.h>
19
19
20 #include "ccsds_types.h"
20 #include "ccsds_types.h"
21 #include "grlib_regs.h"
21 #include "grlib_regs.h"
22 #include "fsw_params.h"
22 #include "fsw_params.h"
23 #include "fsw_params_wf_handler.h"
23 #include "fsw_params_wf_handler.h"
24
24
25 // RTEMS GLOBAL VARIABLES
25 // RTEMS GLOBAL VARIABLES
26 rtems_name misc_name[5];
26 rtems_name misc_name[5];
27 rtems_name Task_name[20]; /* array of task names */
27 rtems_name Task_name[20]; /* array of task names */
28 rtems_id Task_id[20]; /* array of task ids */
28 rtems_id Task_id[20]; /* array of task ids */
29 rtems_name timecode_timer_name;
29 rtems_name timecode_timer_name;
30 rtems_id timecode_timer_id;
30 rtems_id timecode_timer_id;
31 int fdSPW = 0;
31 int fdSPW = 0;
32 int fdUART = 0;
32 int fdUART = 0;
33 unsigned char lfrCurrentMode;
33 unsigned char lfrCurrentMode;
34 unsigned char pa_bia_status_info;
34 unsigned char pa_bia_status_info;
35 unsigned char thisIsAnASMRestart = 0;
35 unsigned char thisIsAnASMRestart = 0;
36 unsigned char oneTcLfrUpdateTimeReceived = 0;
36 unsigned char oneTcLfrUpdateTimeReceived = 0;
37
37
38 // WAVEFORMS GLOBAL VARIABLES // 2048 * 3 * 4 + 2 * 4 = 24576 + 8 bytes = 24584
38 // WAVEFORMS GLOBAL VARIABLES // 2048 * 3 * 4 + 2 * 4 = 24576 + 8 bytes = 24584
39 // 97 * 256 = 24832 => delta = 248 bytes = 62 words
39 // 97 * 256 = 24832 => delta = 248 bytes = 62 words
40 // WAVEFORMS GLOBAL VARIABLES // 2688 * 3 * 4 + 2 * 4 = 32256 + 8 bytes = 32264
40 // WAVEFORMS GLOBAL VARIABLES // 2688 * 3 * 4 + 2 * 4 = 32256 + 8 bytes = 32264
41 // 127 * 256 = 32512 => delta = 248 bytes = 62 words
41 // 127 * 256 = 32512 => delta = 248 bytes = 62 words
42 // F0 F1 F2 F3
42 // F0 F1 F2 F3
43 volatile int wf_buffer_f0[ NB_RING_NODES_F0 * WFRM_BUFFER ] __attribute__((aligned(0x100)));
43 volatile int wf_buffer_f0[ NB_RING_NODES_F0 * WFRM_BUFFER ] __attribute__((aligned(0x100)));
44 volatile int wf_buffer_f1[ NB_RING_NODES_F1 * WFRM_BUFFER ] __attribute__((aligned(0x100)));
44 volatile int wf_buffer_f1[ NB_RING_NODES_F1 * WFRM_BUFFER ] __attribute__((aligned(0x100)));
45 volatile int wf_buffer_f2[ NB_RING_NODES_F2 * WFRM_BUFFER ] __attribute__((aligned(0x100)));
45 volatile int wf_buffer_f2[ NB_RING_NODES_F2 * WFRM_BUFFER ] __attribute__((aligned(0x100)));
46 volatile int wf_buffer_f3[ NB_RING_NODES_F3 * WFRM_BUFFER ] __attribute__((aligned(0x100)));
46 volatile int wf_buffer_f3[ NB_RING_NODES_F3 * WFRM_BUFFER ] __attribute__((aligned(0x100)));
47
47
48 //***********************************
48 //***********************************
49 // SPECTRAL MATRICES GLOBAL VARIABLES
49 // SPECTRAL MATRICES GLOBAL VARIABLES
50
50
51 // alignment constraints for the spectral matrices buffers => the first data after the time (8 bytes) shall be aligned on 0x00
51 // alignment constraints for the spectral matrices buffers => the first data after the time (8 bytes) shall be aligned on 0x00
52 volatile int sm_f0[ NB_RING_NODES_SM_F0 * TOTAL_SIZE_SM ] __attribute__((aligned(0x100)));
52 volatile int sm_f0[ NB_RING_NODES_SM_F0 * TOTAL_SIZE_SM ] __attribute__((aligned(0x100)));
53 volatile int sm_f1[ NB_RING_NODES_SM_F1 * TOTAL_SIZE_SM ] __attribute__((aligned(0x100)));
53 volatile int sm_f1[ NB_RING_NODES_SM_F1 * TOTAL_SIZE_SM ] __attribute__((aligned(0x100)));
54 volatile int sm_f2[ NB_RING_NODES_SM_F2 * TOTAL_SIZE_SM ] __attribute__((aligned(0x100)));
54 volatile int sm_f2[ NB_RING_NODES_SM_F2 * TOTAL_SIZE_SM ] __attribute__((aligned(0x100)));
55
55
56 // APB CONFIGURATION REGISTERS
56 // APB CONFIGURATION REGISTERS
57 time_management_regs_t *time_management_regs = (time_management_regs_t*) REGS_ADDR_TIME_MANAGEMENT;
57 time_management_regs_t *time_management_regs = (time_management_regs_t*) REGS_ADDR_TIME_MANAGEMENT;
58 gptimer_regs_t *gptimer_regs = (gptimer_regs_t *) REGS_ADDR_GPTIMER;
58 gptimer_regs_t *gptimer_regs = (gptimer_regs_t *) REGS_ADDR_GPTIMER;
59 waveform_picker_regs_0_1_18_t *waveform_picker_regs = (waveform_picker_regs_0_1_18_t*) REGS_ADDR_WAVEFORM_PICKER;
59 waveform_picker_regs_0_1_18_t *waveform_picker_regs = (waveform_picker_regs_0_1_18_t*) REGS_ADDR_WAVEFORM_PICKER;
60 spectral_matrix_regs_t *spectral_matrix_regs = (spectral_matrix_regs_t*) REGS_ADDR_SPECTRAL_MATRIX;
60 spectral_matrix_regs_t *spectral_matrix_regs = (spectral_matrix_regs_t*) REGS_ADDR_SPECTRAL_MATRIX;
61
61
62 // MODE PARAMETERS
62 // MODE PARAMETERS
63 Packet_TM_LFR_PARAMETER_DUMP_t parameter_dump_packet;
63 Packet_TM_LFR_PARAMETER_DUMP_t parameter_dump_packet;
64 struct param_local_str param_local;
64 struct param_local_str param_local;
65 unsigned int lastValidEnterModeTime;
65 unsigned int lastValidEnterModeTime;
66
66
67 // HK PACKETS
67 // HK PACKETS
68 Packet_TM_LFR_HK_t housekeeping_packet;
68 Packet_TM_LFR_HK_t housekeeping_packet;
69 unsigned char cp_rpw_sc_rw_f_flags;
69 unsigned char cp_rpw_sc_rw_f_flags;
70 // message queues occupancy
70 // message queues occupancy
71 unsigned char hk_lfr_q_sd_fifo_size_max;
71 unsigned char hk_lfr_q_sd_fifo_size_max;
72 unsigned char hk_lfr_q_rv_fifo_size_max;
72 unsigned char hk_lfr_q_rv_fifo_size_max;
73 unsigned char hk_lfr_q_p0_fifo_size_max;
73 unsigned char hk_lfr_q_p0_fifo_size_max;
74 unsigned char hk_lfr_q_p1_fifo_size_max;
74 unsigned char hk_lfr_q_p1_fifo_size_max;
75 unsigned char hk_lfr_q_p2_fifo_size_max;
75 unsigned char hk_lfr_q_p2_fifo_size_max;
76 // sequence counters are incremented by APID (PID + CAT) and destination ID
76 // sequence counters are incremented by APID (PID + CAT) and destination ID
77 unsigned short sequenceCounters_SCIENCE_NORMAL_BURST;
77 unsigned short sequenceCounters_SCIENCE_NORMAL_BURST;
78 unsigned short sequenceCounters_SCIENCE_SBM1_SBM2;
78 unsigned short sequenceCounters_SCIENCE_SBM1_SBM2;
79 unsigned short sequenceCounters_TC_EXE[SEQ_CNT_NB_DEST_ID];
79 unsigned short sequenceCounters_TC_EXE[SEQ_CNT_NB_DEST_ID];
80 unsigned short sequenceCounters_TM_DUMP[SEQ_CNT_NB_DEST_ID];
80 unsigned short sequenceCounters_TM_DUMP[SEQ_CNT_NB_DEST_ID];
81 unsigned short sequenceCounterHK;
81 unsigned short sequenceCounterHK;
82 spw_stats grspw_stats;
82 spw_stats grspw_stats;
83
83
84 // TC_LFR_UPDATE_INFO
84 // TC_LFR_UPDATE_INFO
85 float cp_rpw_sc_rw1_f1;
85 float cp_rpw_sc_rw1_f1;
86 float cp_rpw_sc_rw1_f2;
86 float cp_rpw_sc_rw1_f2;
87 float cp_rpw_sc_rw2_f1;
87 float cp_rpw_sc_rw2_f1;
88 float cp_rpw_sc_rw2_f2;
88 float cp_rpw_sc_rw2_f2;
89 float cp_rpw_sc_rw3_f1;
89 float cp_rpw_sc_rw3_f1;
90 float cp_rpw_sc_rw3_f2;
90 float cp_rpw_sc_rw3_f2;
91 float cp_rpw_sc_rw4_f1;
91 float cp_rpw_sc_rw4_f1;
92 float cp_rpw_sc_rw4_f2;
92 float cp_rpw_sc_rw4_f2;
93 float sy_lfr_sc_rw_delta_f;
93
94 // TC_LFR_LOAD_FILTER_PAR
95 filterPar_t filterPar;
94
96
95 fbins_masks_t fbins_masks;
97 fbins_masks_t fbins_masks;
96 unsigned int acquisitionDurations[3] = {ACQUISITION_DURATION_F0, ACQUISITION_DURATION_F1, ACQUISITION_DURATION_F2};
98 unsigned int acquisitionDurations[3] = {ACQUISITION_DURATION_F0, ACQUISITION_DURATION_F1, ACQUISITION_DURATION_F2};
@@ -1,928 +1,934
1 /** This is the RTEMS initialization module.
1 /** This is the RTEMS initialization module.
2 *
2 *
3 * @file
3 * @file
4 * @author P. LEROY
4 * @author P. LEROY
5 *
5 *
6 * This module contains two very different information:
6 * This module contains two very different information:
7 * - specific instructions to configure the compilation of the RTEMS executive
7 * - specific instructions to configure the compilation of the RTEMS executive
8 * - functions related to the fligth softwre initialization, especially the INIT RTEMS task
8 * - functions related to the fligth softwre initialization, especially the INIT RTEMS task
9 *
9 *
10 */
10 */
11
11
12 //*************************
12 //*************************
13 // GPL reminder to be added
13 // GPL reminder to be added
14 //*************************
14 //*************************
15
15
16 #include <rtems.h>
16 #include <rtems.h>
17
17
18 /* configuration information */
18 /* configuration information */
19
19
20 #define CONFIGURE_INIT
20 #define CONFIGURE_INIT
21
21
22 #include <bsp.h> /* for device driver prototypes */
22 #include <bsp.h> /* for device driver prototypes */
23
23
24 /* configuration information */
24 /* configuration information */
25
25
26 #define CONFIGURE_APPLICATION_NEEDS_CONSOLE_DRIVER
26 #define CONFIGURE_APPLICATION_NEEDS_CONSOLE_DRIVER
27 #define CONFIGURE_APPLICATION_NEEDS_CLOCK_DRIVER
27 #define CONFIGURE_APPLICATION_NEEDS_CLOCK_DRIVER
28
28
29 #define CONFIGURE_MAXIMUM_TASKS 20
29 #define CONFIGURE_MAXIMUM_TASKS 20
30 #define CONFIGURE_RTEMS_INIT_TASKS_TABLE
30 #define CONFIGURE_RTEMS_INIT_TASKS_TABLE
31 #define CONFIGURE_EXTRA_TASK_STACKS (3 * RTEMS_MINIMUM_STACK_SIZE)
31 #define CONFIGURE_EXTRA_TASK_STACKS (3 * RTEMS_MINIMUM_STACK_SIZE)
32 #define CONFIGURE_LIBIO_MAXIMUM_FILE_DESCRIPTORS 32
32 #define CONFIGURE_LIBIO_MAXIMUM_FILE_DESCRIPTORS 32
33 #define CONFIGURE_INIT_TASK_PRIORITY 1 // instead of 100
33 #define CONFIGURE_INIT_TASK_PRIORITY 1 // instead of 100
34 #define CONFIGURE_INIT_TASK_MODE (RTEMS_DEFAULT_MODES | RTEMS_NO_PREEMPT)
34 #define CONFIGURE_INIT_TASK_MODE (RTEMS_DEFAULT_MODES | RTEMS_NO_PREEMPT)
35 #define CONFIGURE_INIT_TASK_ATTRIBUTES (RTEMS_DEFAULT_ATTRIBUTES | RTEMS_FLOATING_POINT)
35 #define CONFIGURE_INIT_TASK_ATTRIBUTES (RTEMS_DEFAULT_ATTRIBUTES | RTEMS_FLOATING_POINT)
36 #define CONFIGURE_MAXIMUM_DRIVERS 16
36 #define CONFIGURE_MAXIMUM_DRIVERS 16
37 #define CONFIGURE_MAXIMUM_PERIODS 5
37 #define CONFIGURE_MAXIMUM_PERIODS 5
38 #define CONFIGURE_MAXIMUM_TIMERS 5 // [spiq] [link] [spacewire_reset_link]
38 #define CONFIGURE_MAXIMUM_TIMERS 5 // [spiq] [link] [spacewire_reset_link]
39 #define CONFIGURE_MAXIMUM_MESSAGE_QUEUES 5
39 #define CONFIGURE_MAXIMUM_MESSAGE_QUEUES 5
40 #ifdef PRINT_STACK_REPORT
40 #ifdef PRINT_STACK_REPORT
41 #define CONFIGURE_STACK_CHECKER_ENABLED
41 #define CONFIGURE_STACK_CHECKER_ENABLED
42 #endif
42 #endif
43
43
44 #include <rtems/confdefs.h>
44 #include <rtems/confdefs.h>
45
45
46 /* If --drvmgr was enabled during the configuration of the RTEMS kernel */
46 /* If --drvmgr was enabled during the configuration of the RTEMS kernel */
47 #ifdef RTEMS_DRVMGR_STARTUP
47 #ifdef RTEMS_DRVMGR_STARTUP
48 #ifdef LEON3
48 #ifdef LEON3
49 /* Add Timer and UART Driver */
49 /* Add Timer and UART Driver */
50 #ifdef CONFIGURE_APPLICATION_NEEDS_CLOCK_DRIVER
50 #ifdef CONFIGURE_APPLICATION_NEEDS_CLOCK_DRIVER
51 #define CONFIGURE_DRIVER_AMBAPP_GAISLER_GPTIMER
51 #define CONFIGURE_DRIVER_AMBAPP_GAISLER_GPTIMER
52 #endif
52 #endif
53 #ifdef CONFIGURE_APPLICATION_NEEDS_CONSOLE_DRIVER
53 #ifdef CONFIGURE_APPLICATION_NEEDS_CONSOLE_DRIVER
54 #define CONFIGURE_DRIVER_AMBAPP_GAISLER_APBUART
54 #define CONFIGURE_DRIVER_AMBAPP_GAISLER_APBUART
55 #endif
55 #endif
56 #endif
56 #endif
57 #define CONFIGURE_DRIVER_AMBAPP_GAISLER_GRSPW /* GRSPW Driver */
57 #define CONFIGURE_DRIVER_AMBAPP_GAISLER_GRSPW /* GRSPW Driver */
58 #include <drvmgr/drvmgr_confdefs.h>
58 #include <drvmgr/drvmgr_confdefs.h>
59 #endif
59 #endif
60
60
61 #include "fsw_init.h"
61 #include "fsw_init.h"
62 #include "fsw_config.c"
62 #include "fsw_config.c"
63 #include "GscMemoryLPP.hpp"
63 #include "GscMemoryLPP.hpp"
64
64
65 void initCache()
65 void initCache()
66 {
66 {
67 // ASI 2 contains a few control registers that have not been assigned as ancillary state registers.
67 // ASI 2 contains a few control registers that have not been assigned as ancillary state registers.
68 // These should only be read and written using 32-bit LDA/STA instructions.
68 // These should only be read and written using 32-bit LDA/STA instructions.
69 // All cache registers are accessed through load/store operations to the alternate address space (LDA/STA), using ASI = 2.
69 // All cache registers are accessed through load/store operations to the alternate address space (LDA/STA), using ASI = 2.
70 // The table below shows the register addresses:
70 // The table below shows the register addresses:
71 // 0x00 Cache control register
71 // 0x00 Cache control register
72 // 0x04 Reserved
72 // 0x04 Reserved
73 // 0x08 Instruction cache configuration register
73 // 0x08 Instruction cache configuration register
74 // 0x0C Data cache configuration register
74 // 0x0C Data cache configuration register
75
75
76 // Cache Control Register Leon3 / Leon3FT
76 // Cache Control Register Leon3 / Leon3FT
77 // 31..30 29 28 27..24 23 22 21 20..19 18 17 16
77 // 31..30 29 28 27..24 23 22 21 20..19 18 17 16
78 // RFT PS TB DS FD FI FT ST IB
78 // RFT PS TB DS FD FI FT ST IB
79 // 15 14 13..12 11..10 9..8 7..6 5 4 3..2 1..0
79 // 15 14 13..12 11..10 9..8 7..6 5 4 3..2 1..0
80 // IP DP ITE IDE DTE DDE DF IF DCS ICS
80 // IP DP ITE IDE DTE DDE DF IF DCS ICS
81
81
82 unsigned int cacheControlRegister;
82 unsigned int cacheControlRegister;
83
83
84 CCR_resetCacheControlRegister();
84 CCR_resetCacheControlRegister();
85 ASR16_resetRegisterProtectionControlRegister();
85 ASR16_resetRegisterProtectionControlRegister();
86
86
87 cacheControlRegister = CCR_getValue();
87 cacheControlRegister = CCR_getValue();
88 PRINTF1("(0) CCR - Cache Control Register = %x\n", cacheControlRegister);
88 PRINTF1("(0) CCR - Cache Control Register = %x\n", cacheControlRegister);
89 PRINTF1("(0) ASR16 = %x\n", *asr16Ptr);
89 PRINTF1("(0) ASR16 = %x\n", *asr16Ptr);
90
90
91 CCR_enableInstructionCache(); // ICS bits
91 CCR_enableInstructionCache(); // ICS bits
92 CCR_enableDataCache(); // DCS bits
92 CCR_enableDataCache(); // DCS bits
93 CCR_enableInstructionBurstFetch(); // IB bit
93 CCR_enableInstructionBurstFetch(); // IB bit
94
94
95 faultTolerantScheme();
95 faultTolerantScheme();
96
96
97 cacheControlRegister = CCR_getValue();
97 cacheControlRegister = CCR_getValue();
98 PRINTF1("(1) CCR - Cache Control Register = %x\n", cacheControlRegister);
98 PRINTF1("(1) CCR - Cache Control Register = %x\n", cacheControlRegister);
99 PRINTF1("(1) ASR16 Register protection control register = %x\n", *asr16Ptr);
99 PRINTF1("(1) ASR16 Register protection control register = %x\n", *asr16Ptr);
100
100
101 PRINTF("\n");
101 PRINTF("\n");
102 }
102 }
103
103
104 rtems_task Init( rtems_task_argument ignored )
104 rtems_task Init( rtems_task_argument ignored )
105 {
105 {
106 /** This is the RTEMS INIT taks, it is the first task launched by the system.
106 /** This is the RTEMS INIT taks, it is the first task launched by the system.
107 *
107 *
108 * @param unused is the starting argument of the RTEMS task
108 * @param unused is the starting argument of the RTEMS task
109 *
109 *
110 * The INIT task create and run all other RTEMS tasks.
110 * The INIT task create and run all other RTEMS tasks.
111 *
111 *
112 */
112 */
113
113
114 //***********
114 //***********
115 // INIT CACHE
115 // INIT CACHE
116
116
117 unsigned char *vhdlVersion;
117 unsigned char *vhdlVersion;
118
118
119 reset_lfr();
119 reset_lfr();
120
120
121 reset_local_time();
121 reset_local_time();
122
122
123 rtems_cpu_usage_reset();
123 rtems_cpu_usage_reset();
124
124
125 rtems_status_code status;
125 rtems_status_code status;
126 rtems_status_code status_spw;
126 rtems_status_code status_spw;
127 rtems_isr_entry old_isr_handler;
127 rtems_isr_entry old_isr_handler;
128
128
129 // UART settings
129 // UART settings
130 enable_apbuart_transmitter();
130 enable_apbuart_transmitter();
131 set_apbuart_scaler_reload_register(REGS_ADDR_APBUART, APBUART_SCALER_RELOAD_VALUE);
131 set_apbuart_scaler_reload_register(REGS_ADDR_APBUART, APBUART_SCALER_RELOAD_VALUE);
132
132
133 DEBUG_PRINTF("\n\n\n\n\nIn INIT *** Now the console is on port COM1\n")
133 DEBUG_PRINTF("\n\n\n\n\nIn INIT *** Now the console is on port COM1\n")
134
134
135
135
136 PRINTF("\n\n\n\n\n")
136 PRINTF("\n\n\n\n\n")
137
137
138 initCache();
138 initCache();
139
139
140 PRINTF("*************************\n")
140 PRINTF("*************************\n")
141 PRINTF("** LFR Flight Software **\n")
141 PRINTF("** LFR Flight Software **\n")
142 PRINTF1("** %d.", SW_VERSION_N1)
142 PRINTF1("** %d.", SW_VERSION_N1)
143 PRINTF1("%d." , SW_VERSION_N2)
143 PRINTF1("%d." , SW_VERSION_N2)
144 PRINTF1("%d." , SW_VERSION_N3)
144 PRINTF1("%d." , SW_VERSION_N3)
145 PRINTF1("%d **\n", SW_VERSION_N4)
145 PRINTF1("%d **\n", SW_VERSION_N4)
146
146
147 vhdlVersion = (unsigned char *) (REGS_ADDR_VHDL_VERSION);
147 vhdlVersion = (unsigned char *) (REGS_ADDR_VHDL_VERSION);
148 PRINTF("** VHDL **\n")
148 PRINTF("** VHDL **\n")
149 PRINTF1("** %d.", vhdlVersion[1])
149 PRINTF1("** %d.", vhdlVersion[1])
150 PRINTF1("%d." , vhdlVersion[2])
150 PRINTF1("%d." , vhdlVersion[2])
151 PRINTF1("%d **\n", vhdlVersion[3])
151 PRINTF1("%d **\n", vhdlVersion[3])
152 PRINTF("*************************\n")
152 PRINTF("*************************\n")
153 PRINTF("\n\n")
153 PRINTF("\n\n")
154
154
155 init_parameter_dump();
155 init_parameter_dump();
156 init_kcoefficients_dump();
156 init_kcoefficients_dump();
157 init_local_mode_parameters();
157 init_local_mode_parameters();
158 init_housekeeping_parameters();
158 init_housekeeping_parameters();
159 init_k_coefficients_prc0();
159 init_k_coefficients_prc0();
160 init_k_coefficients_prc1();
160 init_k_coefficients_prc1();
161 init_k_coefficients_prc2();
161 init_k_coefficients_prc2();
162 pa_bia_status_info = 0x00;
162 pa_bia_status_info = 0x00;
163 cp_rpw_sc_rw_f_flags = 0x00;
163 cp_rpw_sc_rw_f_flags = 0x00;
164 cp_rpw_sc_rw1_f1 = 0.0;
164 cp_rpw_sc_rw1_f1 = 0.0;
165 cp_rpw_sc_rw1_f2 = 0.0;
165 cp_rpw_sc_rw1_f2 = 0.0;
166 cp_rpw_sc_rw2_f1 = 0.0;
166 cp_rpw_sc_rw2_f1 = 0.0;
167 cp_rpw_sc_rw2_f2 = 0.0;
167 cp_rpw_sc_rw2_f2 = 0.0;
168 cp_rpw_sc_rw3_f1 = 0.0;
168 cp_rpw_sc_rw3_f1 = 0.0;
169 cp_rpw_sc_rw3_f2 = 0.0;
169 cp_rpw_sc_rw3_f2 = 0.0;
170 cp_rpw_sc_rw4_f1 = 0.0;
170 cp_rpw_sc_rw4_f1 = 0.0;
171 cp_rpw_sc_rw4_f2 = 0.0;
171 cp_rpw_sc_rw4_f2 = 0.0;
172 sy_lfr_sc_rw_delta_f = 0.0;
172 // initialize filtering parameters
173 filterPar.spare_sy_lfr_pas_filter_enabled = DEFAULT_SY_LFR_PAS_FILTER_ENABLED;
174 filterPar.sy_lfr_pas_filter_modulus = DEFAULT_SY_LFR_PAS_FILTER_MODULUS;
175 filterPar.sy_lfr_pas_filter_tbad = DEFAULT_SY_LFR_PAS_FILTER_TBAD;
176 filterPar.sy_lfr_pas_filter_offset = DEFAULT_SY_LFR_PAS_FILTER_OFFSET;
177 filterPar.sy_lfr_pas_filter_shift = DEFAULT_SY_LFR_PAS_FILTER_SHIFT;
178 filterPar.sy_lfr_sc_rw_delta_f = DEFAULT_SY_LFR_SC_RW_DELTA_F;
173 update_last_valid_transition_date( DEFAULT_LAST_VALID_TRANSITION_DATE );
179 update_last_valid_transition_date( DEFAULT_LAST_VALID_TRANSITION_DATE );
174
180
175 // waveform picker initialization
181 // waveform picker initialization
176 WFP_init_rings();
182 WFP_init_rings();
177 LEON_Clear_interrupt( IRQ_SPARC_GPTIMER_WATCHDOG ); // initialize the waveform rings
183 LEON_Clear_interrupt( IRQ_SPARC_GPTIMER_WATCHDOG ); // initialize the waveform rings
178 WFP_reset_current_ring_nodes();
184 WFP_reset_current_ring_nodes();
179 reset_waveform_picker_regs();
185 reset_waveform_picker_regs();
180
186
181 // spectral matrices initialization
187 // spectral matrices initialization
182 SM_init_rings(); // initialize spectral matrices rings
188 SM_init_rings(); // initialize spectral matrices rings
183 SM_reset_current_ring_nodes();
189 SM_reset_current_ring_nodes();
184 reset_spectral_matrix_regs();
190 reset_spectral_matrix_regs();
185
191
186 // configure calibration
192 // configure calibration
187 configureCalibration( false ); // true means interleaved mode, false is for normal mode
193 configureCalibration( false ); // true means interleaved mode, false is for normal mode
188
194
189 updateLFRCurrentMode( LFR_MODE_STANDBY );
195 updateLFRCurrentMode( LFR_MODE_STANDBY );
190
196
191 BOOT_PRINTF1("in INIT *** lfrCurrentMode is %d\n", lfrCurrentMode)
197 BOOT_PRINTF1("in INIT *** lfrCurrentMode is %d\n", lfrCurrentMode)
192
198
193 create_names(); // create all names
199 create_names(); // create all names
194
200
195 status = create_timecode_timer(); // create the timer used by timecode_irq_handler
201 status = create_timecode_timer(); // create the timer used by timecode_irq_handler
196 if (status != RTEMS_SUCCESSFUL)
202 if (status != RTEMS_SUCCESSFUL)
197 {
203 {
198 PRINTF1("in INIT *** ERR in create_timer_timecode, code %d", status)
204 PRINTF1("in INIT *** ERR in create_timer_timecode, code %d", status)
199 }
205 }
200
206
201 status = create_message_queues(); // create message queues
207 status = create_message_queues(); // create message queues
202 if (status != RTEMS_SUCCESSFUL)
208 if (status != RTEMS_SUCCESSFUL)
203 {
209 {
204 PRINTF1("in INIT *** ERR in create_message_queues, code %d", status)
210 PRINTF1("in INIT *** ERR in create_message_queues, code %d", status)
205 }
211 }
206
212
207 status = create_all_tasks(); // create all tasks
213 status = create_all_tasks(); // create all tasks
208 if (status != RTEMS_SUCCESSFUL)
214 if (status != RTEMS_SUCCESSFUL)
209 {
215 {
210 PRINTF1("in INIT *** ERR in create_all_tasks, code %d\n", status)
216 PRINTF1("in INIT *** ERR in create_all_tasks, code %d\n", status)
211 }
217 }
212
218
213 // **************************
219 // **************************
214 // <SPACEWIRE INITIALIZATION>
220 // <SPACEWIRE INITIALIZATION>
215 status_spw = spacewire_open_link(); // (1) open the link
221 status_spw = spacewire_open_link(); // (1) open the link
216 if ( status_spw != RTEMS_SUCCESSFUL )
222 if ( status_spw != RTEMS_SUCCESSFUL )
217 {
223 {
218 PRINTF1("in INIT *** ERR spacewire_open_link code %d\n", status_spw )
224 PRINTF1("in INIT *** ERR spacewire_open_link code %d\n", status_spw )
219 }
225 }
220
226
221 if ( status_spw == RTEMS_SUCCESSFUL ) // (2) configure the link
227 if ( status_spw == RTEMS_SUCCESSFUL ) // (2) configure the link
222 {
228 {
223 status_spw = spacewire_configure_link( fdSPW );
229 status_spw = spacewire_configure_link( fdSPW );
224 if ( status_spw != RTEMS_SUCCESSFUL )
230 if ( status_spw != RTEMS_SUCCESSFUL )
225 {
231 {
226 PRINTF1("in INIT *** ERR spacewire_configure_link code %d\n", status_spw )
232 PRINTF1("in INIT *** ERR spacewire_configure_link code %d\n", status_spw )
227 }
233 }
228 }
234 }
229
235
230 if ( status_spw == RTEMS_SUCCESSFUL) // (3) start the link
236 if ( status_spw == RTEMS_SUCCESSFUL) // (3) start the link
231 {
237 {
232 status_spw = spacewire_start_link( fdSPW );
238 status_spw = spacewire_start_link( fdSPW );
233 if ( status_spw != RTEMS_SUCCESSFUL )
239 if ( status_spw != RTEMS_SUCCESSFUL )
234 {
240 {
235 PRINTF1("in INIT *** ERR spacewire_start_link code %d\n", status_spw )
241 PRINTF1("in INIT *** ERR spacewire_start_link code %d\n", status_spw )
236 }
242 }
237 }
243 }
238 // </SPACEWIRE INITIALIZATION>
244 // </SPACEWIRE INITIALIZATION>
239 // ***************************
245 // ***************************
240
246
241 status = start_all_tasks(); // start all tasks
247 status = start_all_tasks(); // start all tasks
242 if (status != RTEMS_SUCCESSFUL)
248 if (status != RTEMS_SUCCESSFUL)
243 {
249 {
244 PRINTF1("in INIT *** ERR in start_all_tasks, code %d", status)
250 PRINTF1("in INIT *** ERR in start_all_tasks, code %d", status)
245 }
251 }
246
252
247 // start RECV and SEND *AFTER* SpaceWire Initialization, due to the timeout of the start call during the initialization
253 // start RECV and SEND *AFTER* SpaceWire Initialization, due to the timeout of the start call during the initialization
248 status = start_recv_send_tasks();
254 status = start_recv_send_tasks();
249 if ( status != RTEMS_SUCCESSFUL )
255 if ( status != RTEMS_SUCCESSFUL )
250 {
256 {
251 PRINTF1("in INIT *** ERR start_recv_send_tasks code %d\n", status )
257 PRINTF1("in INIT *** ERR start_recv_send_tasks code %d\n", status )
252 }
258 }
253
259
254 // suspend science tasks, they will be restarted later depending on the mode
260 // suspend science tasks, they will be restarted later depending on the mode
255 status = suspend_science_tasks(); // suspend science tasks (not done in stop_current_mode if current mode = STANDBY)
261 status = suspend_science_tasks(); // suspend science tasks (not done in stop_current_mode if current mode = STANDBY)
256 if (status != RTEMS_SUCCESSFUL)
262 if (status != RTEMS_SUCCESSFUL)
257 {
263 {
258 PRINTF1("in INIT *** in suspend_science_tasks *** ERR code: %d\n", status)
264 PRINTF1("in INIT *** in suspend_science_tasks *** ERR code: %d\n", status)
259 }
265 }
260
266
261 // configure IRQ handling for the waveform picker unit
267 // configure IRQ handling for the waveform picker unit
262 status = rtems_interrupt_catch( waveforms_isr,
268 status = rtems_interrupt_catch( waveforms_isr,
263 IRQ_SPARC_WAVEFORM_PICKER,
269 IRQ_SPARC_WAVEFORM_PICKER,
264 &old_isr_handler) ;
270 &old_isr_handler) ;
265 // configure IRQ handling for the spectral matrices unit
271 // configure IRQ handling for the spectral matrices unit
266 status = rtems_interrupt_catch( spectral_matrices_isr,
272 status = rtems_interrupt_catch( spectral_matrices_isr,
267 IRQ_SPARC_SPECTRAL_MATRIX,
273 IRQ_SPARC_SPECTRAL_MATRIX,
268 &old_isr_handler) ;
274 &old_isr_handler) ;
269
275
270 // if the spacewire link is not up then send an event to the SPIQ task for link recovery
276 // if the spacewire link is not up then send an event to the SPIQ task for link recovery
271 if ( status_spw != RTEMS_SUCCESSFUL )
277 if ( status_spw != RTEMS_SUCCESSFUL )
272 {
278 {
273 status = rtems_event_send( Task_id[TASKID_SPIQ], SPW_LINKERR_EVENT );
279 status = rtems_event_send( Task_id[TASKID_SPIQ], SPW_LINKERR_EVENT );
274 if ( status != RTEMS_SUCCESSFUL ) {
280 if ( status != RTEMS_SUCCESSFUL ) {
275 PRINTF1("in INIT *** ERR rtems_event_send to SPIQ code %d\n", status )
281 PRINTF1("in INIT *** ERR rtems_event_send to SPIQ code %d\n", status )
276 }
282 }
277 }
283 }
278
284
279 BOOT_PRINTF("delete INIT\n")
285 BOOT_PRINTF("delete INIT\n")
280
286
281 set_hk_lfr_sc_potential_flag( true );
287 set_hk_lfr_sc_potential_flag( true );
282
288
283 // start the timer to detect a missing spacewire timecode
289 // start the timer to detect a missing spacewire timecode
284 // the timeout is larger because the spw IP needs to receive several valid timecodes before generating a tickout
290 // the timeout is larger because the spw IP needs to receive several valid timecodes before generating a tickout
285 // if a tickout is generated, the timer is restarted
291 // if a tickout is generated, the timer is restarted
286 status = rtems_timer_fire_after( timecode_timer_id, TIMECODE_TIMER_TIMEOUT_INIT, timecode_timer_routine, NULL );
292 status = rtems_timer_fire_after( timecode_timer_id, TIMECODE_TIMER_TIMEOUT_INIT, timecode_timer_routine, NULL );
287
293
288 grspw_timecode_callback = &timecode_irq_handler;
294 grspw_timecode_callback = &timecode_irq_handler;
289
295
290 status = rtems_task_delete(RTEMS_SELF);
296 status = rtems_task_delete(RTEMS_SELF);
291
297
292 }
298 }
293
299
294 void init_local_mode_parameters( void )
300 void init_local_mode_parameters( void )
295 {
301 {
296 /** This function initialize the param_local global variable with default values.
302 /** This function initialize the param_local global variable with default values.
297 *
303 *
298 */
304 */
299
305
300 unsigned int i;
306 unsigned int i;
301
307
302 // LOCAL PARAMETERS
308 // LOCAL PARAMETERS
303
309
304 BOOT_PRINTF1("local_sbm1_nb_cwf_max %d \n", param_local.local_sbm1_nb_cwf_max)
310 BOOT_PRINTF1("local_sbm1_nb_cwf_max %d \n", param_local.local_sbm1_nb_cwf_max)
305 BOOT_PRINTF1("local_sbm2_nb_cwf_max %d \n", param_local.local_sbm2_nb_cwf_max)
311 BOOT_PRINTF1("local_sbm2_nb_cwf_max %d \n", param_local.local_sbm2_nb_cwf_max)
306 BOOT_PRINTF1("nb_interrupt_f0_MAX = %d\n", param_local.local_nb_interrupt_f0_MAX)
312 BOOT_PRINTF1("nb_interrupt_f0_MAX = %d\n", param_local.local_nb_interrupt_f0_MAX)
307
313
308 // init sequence counters
314 // init sequence counters
309
315
310 for(i = 0; i<SEQ_CNT_NB_DEST_ID; i++)
316 for(i = 0; i<SEQ_CNT_NB_DEST_ID; i++)
311 {
317 {
312 sequenceCounters_TC_EXE[i] = 0x00;
318 sequenceCounters_TC_EXE[i] = 0x00;