##// END OF EJS Templates
ICD 2.0...
paul -
r92:7c50b5fd63ee VHDLib206
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@@ -1,6 +1,6
1 #############################################################################
1 #############################################################################
2 # Makefile for building: bin/fsw-vhdl-dev
2 # Makefile for building: bin/fsw-vhdl-dev
3 # Generated by qmake (2.01a) (Qt 4.8.5) on: Thu Jan 23 13:51:15 2014
3 # Generated by qmake (2.01a) (Qt 4.8.5) on: Mon Jan 27 07:11:41 2014
4 # Project: fsw-qt.pro
4 # Project: fsw-qt.pro
5 # Template: app
5 # Template: app
6 # Command: /usr/bin/qmake-qt4 -spec /usr/lib64/qt4/mkspecs/linux-g++ -o Makefile fsw-qt.pro
6 # Command: /usr/bin/qmake-qt4 -spec /usr/lib64/qt4/mkspecs/linux-g++ -o Makefile fsw-qt.pro
@@ -1,6 +1,6
1 <?xml version="1.0" encoding="UTF-8"?>
1 <?xml version="1.0" encoding="UTF-8"?>
2 <!DOCTYPE QtCreatorProject>
2 <!DOCTYPE QtCreatorProject>
3 <!-- Written by QtCreator 3.0.0, 2014-01-24T06:51:07. -->
3 <!-- Written by QtCreator 3.0.0, 2014-01-28T06:58:48. -->
4 <qtcreator>
4 <qtcreator>
5 <data>
5 <data>
6 <variable>ProjectExplorer.Project.ActiveTarget</variable>
6 <variable>ProjectExplorer.Project.ActiveTarget</variable>
@@ -10,13 +10,13
10
10
11 #define PACKET_LENGTH_TC_LFR_RESET (12 - CCSDS_TC_TM_PACKET_OFFSET)
11 #define PACKET_LENGTH_TC_LFR_RESET (12 - CCSDS_TC_TM_PACKET_OFFSET)
12 #define PACKET_LENGTH_TC_LFR_LOAD_COMMON_PAR (14 - CCSDS_TC_TM_PACKET_OFFSET)
12 #define PACKET_LENGTH_TC_LFR_LOAD_COMMON_PAR (14 - CCSDS_TC_TM_PACKET_OFFSET)
13 #define PACKET_LENGTH_TC_LFR_LOAD_NORMAL_PAR (20 - CCSDS_TC_TM_PACKET_OFFSET)
13 #define PACKET_LENGTH_TC_LFR_LOAD_NORMAL_PAR (22 - CCSDS_TC_TM_PACKET_OFFSET)
14 #define PACKET_LENGTH_TC_LFR_LOAD_BURST_PAR (14 - CCSDS_TC_TM_PACKET_OFFSET)
14 #define PACKET_LENGTH_TC_LFR_LOAD_BURST_PAR (14 - CCSDS_TC_TM_PACKET_OFFSET)
15 #define PACKET_LENGTH_TC_LFR_LOAD_SBM1_PAR (14 - CCSDS_TC_TM_PACKET_OFFSET)
15 #define PACKET_LENGTH_TC_LFR_LOAD_SBM1_PAR (14 - CCSDS_TC_TM_PACKET_OFFSET)
16 #define PACKET_LENGTH_TC_LFR_LOAD_SBM2_PAR (14 - CCSDS_TC_TM_PACKET_OFFSET)
16 #define PACKET_LENGTH_TC_LFR_LOAD_SBM2_PAR (14 - CCSDS_TC_TM_PACKET_OFFSET)
17 #define PACKET_LENGTH_TC_LFR_DUMP_PAR (12 - CCSDS_TC_TM_PACKET_OFFSET)
17 #define PACKET_LENGTH_TC_LFR_DUMP_PAR (12 - CCSDS_TC_TM_PACKET_OFFSET)
18 #define PACKET_LENGTH_TC_LFR_ENTER_MODE (20 - CCSDS_TC_TM_PACKET_OFFSET)
18 #define PACKET_LENGTH_TC_LFR_ENTER_MODE (20 - CCSDS_TC_TM_PACKET_OFFSET)
19 #define PACKET_LENGTH_TC_LFR_UPDATE_INFO (48 - CCSDS_TC_TM_PACKET_OFFSET)
19 #define PACKET_LENGTH_TC_LFR_UPDATE_INFO (46 - CCSDS_TC_TM_PACKET_OFFSET)
20 #define PACKET_LENGTH_TC_LFR_ENABLE_CALIBRATION (12 - CCSDS_TC_TM_PACKET_OFFSET)
20 #define PACKET_LENGTH_TC_LFR_ENABLE_CALIBRATION (12 - CCSDS_TC_TM_PACKET_OFFSET)
21 #define PACKET_LENGTH_TC_LFR_DISABLE_CALIBRATION (12 - CCSDS_TC_TM_PACKET_OFFSET)
21 #define PACKET_LENGTH_TC_LFR_DISABLE_CALIBRATION (12 - CCSDS_TC_TM_PACKET_OFFSET)
22 #define PACKET_LENGTH_TC_LFR_UPDATE_TIME (18 - CCSDS_TC_TM_PACKET_OFFSET)
22 #define PACKET_LENGTH_TC_LFR_UPDATE_TIME (18 - CCSDS_TC_TM_PACKET_OFFSET)
@@ -145,6 +145,8 struct Packet_TC_LFR_LOAD_NORMAL_PAR_str
145 unsigned char sy_lfr_n_asm_p[2];
145 unsigned char sy_lfr_n_asm_p[2];
146 unsigned char sy_lfr_n_bp_p0;
146 unsigned char sy_lfr_n_bp_p0;
147 unsigned char sy_lfr_n_bp_p1;
147 unsigned char sy_lfr_n_bp_p1;
148 unsigned char sy_lfr_n_cwf_long_f3;
149 unsigned char lfr_normal_parameters_spare;
148 unsigned char crc[2];
150 unsigned char crc[2];
149 };
151 };
150 typedef struct Packet_TC_LFR_LOAD_NORMAL_PAR_str Packet_TC_LFR_LOAD_NORMAL_PAR_t;
152 typedef struct Packet_TC_LFR_LOAD_NORMAL_PAR_str Packet_TC_LFR_LOAD_NORMAL_PAR_t;
@@ -80,13 +80,13
80 // TC LEN
80 // TC LEN
81 #define TC_LEN_RESET 12
81 #define TC_LEN_RESET 12
82 #define TC_LEN_LOAD_COMM 14
82 #define TC_LEN_LOAD_COMM 14
83 #define TC_LEN_LOAD_NORM 20
83 #define TC_LEN_LOAD_NORM 22
84 #define TC_LEN_LOAD_BURST 14
84 #define TC_LEN_LOAD_BURST 14
85 #define TC_LEN_LOAD_SBM1 14
85 #define TC_LEN_LOAD_SBM1 14
86 #define TC_LEN_LOAD_SBM2 14
86 #define TC_LEN_LOAD_SBM2 14
87 #define TC_LEN_DUMP 12
87 #define TC_LEN_DUMP 12
88 #define TC_LEN_ENTER 20
88 #define TC_LEN_ENTER 20
89 #define TC_LEN_UPDT_INFO 48
89 #define TC_LEN_UPDT_INFO 46
90 #define TC_LEN_EN_CAL 12
90 #define TC_LEN_EN_CAL 12
91 #define TC_LEN_DIS_CAL 12
91 #define TC_LEN_DIS_CAL 12
92 #define TC_LEN_UPDT_TIME 18
92 #define TC_LEN_UPDT_TIME 18
@@ -182,6 +182,7 enum apid_destid{
182 #define SID_SBM2_BP2_F0 32
182 #define SID_SBM2_BP2_F0 32
183 #define SID_SBM2_BP1_F1 30
183 #define SID_SBM2_BP1_F1 30
184 #define SID_SBM2_BP2_F1 33
184 #define SID_SBM2_BP2_F1 33
185 #define SID_NORM_CWF_LONG_F3 34
185
186
186 // LENGTH (BYTES)
187 // LENGTH (BYTES)
187 #define LENGTH_TM_LFR_TC_EXE_MAX 32
188 #define LENGTH_TM_LFR_TC_EXE_MAX 32
@@ -206,8 +207,13 enum apid_destid{
206 #define LEN_TM_LFR_HK 130 // 126 + 4
207 #define LEN_TM_LFR_HK 130 // 126 + 4
207 #define LEN_TM_LFR_TC_EXE_NOT_IMP 28 // 24 + 4
208 #define LEN_TM_LFR_TC_EXE_NOT_IMP 28 // 24 + 4
208
209
210 // R1
209 #define TM_LEN_SCI_SWF_340 4101 // 340 * 12 + 10 + 12 - 1
211 #define TM_LEN_SCI_SWF_340 4101 // 340 * 12 + 10 + 12 - 1
210 #define TM_LEN_SCI_SWF_8 117 // 8 * 12 + 10 + 12 - 1
212 #define TM_LEN_SCI_SWF_8 117 // 8 * 12 + 10 + 12 - 1
213 // R2
214 #define TM_LEN_SCI_SWF_304 3669 // 304 * 12 + 10 + 12 - 1
215 #define TM_LEN_SCI_SWF_224 2709 // 224 * 12 + 10 + 12 - 1
216 //
211 #define TM_LEN_SCI_CWF_340 4099 // 340 * 12 + 10 + 10 - 1
217 #define TM_LEN_SCI_CWF_340 4099 // 340 * 12 + 10 + 10 - 1
212 #define TM_LEN_SCI_CWF_8 115 // 8 * 12 + 10 + 10 - 1
218 #define TM_LEN_SCI_CWF_8 115 // 8 * 12 + 10 + 10 - 1
213 #define TM_LEN_SCI_CWF3_LIGHT_340 2059 // 340 * 6 + 10 + 10 - 1
219 #define TM_LEN_SCI_CWF3_LIGHT_340 2059 // 340 * 6 + 10 + 10 - 1
@@ -215,6 +221,8 enum apid_destid{
215 #define DEFAULT_PKTCNT 0x07
221 #define DEFAULT_PKTCNT 0x07
216 #define BLK_NR_340 0x0154
222 #define BLK_NR_340 0x0154
217 #define BLK_NR_8 0x0008
223 #define BLK_NR_8 0x0008
224 #define BLK_NR_304 0x0130
225 #define BLK_NR_224 0x00e0
218
226
219 enum TM_TYPE{
227 enum TM_TYPE{
220 TM_LFR_TC_EXE_OK,
228 TM_LFR_TC_EXE_OK,
@@ -469,11 +477,16 typedef struct {
469 // HK PARAMETERS
477 // HK PARAMETERS
470 unsigned char lfr_status_word[2];
478 unsigned char lfr_status_word[2];
471 unsigned char lfr_sw_version[4];
479 unsigned char lfr_sw_version[4];
480 unsigned char lfr_fpga_version[3];
481 // ressource statistics
482 unsigned char hk_lfr_cpu_load;
483 unsigned char hk_lfr_load_max;
484 unsigned char hk_lfr_load_aver;
472 // tc statistics
485 // tc statistics
473 unsigned char hk_lfr_update_info_tc_cnt[2];
486 unsigned char hk_lfr_update_info_tc_cnt[2];
474 unsigned char hk_lfr_update_time_tc_cnt[2];
487 unsigned char hk_lfr_update_time_tc_cnt[2];
475 unsigned char hk_dpu_exe_tc_lfr_cnt[2];
488 unsigned char hk_lfr_exe_tc_cnt[2];
476 unsigned char hk_dpu_rej_tc_lfr_cnt[2];
489 unsigned char hk_lfr_rej_tc_cnt[2];
477 unsigned char hk_lfr_last_exe_tc_id[2];
490 unsigned char hk_lfr_last_exe_tc_id[2];
478 unsigned char hk_lfr_last_exe_tc_type[2];
491 unsigned char hk_lfr_last_exe_tc_type[2];
479 unsigned char hk_lfr_last_exe_tc_subtype[2];
492 unsigned char hk_lfr_last_exe_tc_subtype[2];
@@ -498,13 +511,17 typedef struct {
498 unsigned char hk_lfr_dpu_spw_pkt_rcv_cnt[2];
511 unsigned char hk_lfr_dpu_spw_pkt_rcv_cnt[2];
499 unsigned char hk_lfr_dpu_spw_pkt_sent_cnt[2];
512 unsigned char hk_lfr_dpu_spw_pkt_sent_cnt[2];
500 unsigned char hk_lfr_dpu_spw_tick_out_cnt;
513 unsigned char hk_lfr_dpu_spw_tick_out_cnt;
501 unsigned char hk_lfr_dpu_spw_last_time;
514 unsigned char hk_lfr_dpu_spw_last_timc;
502 // ahb error statistics
515 // ahb error statistics
503 unsigned int hk_lfr_last_fail_addr;
516 unsigned int hk_lfr_last_fail_addr;
504 // temperatures
517 // temperatures
505 unsigned char hk_lfr_temp_scm[2];
518 unsigned char hk_lfr_temp_scm[2];
506 unsigned char hk_lfr_temp_pcb[2];
519 unsigned char hk_lfr_temp_pcb[2];
507 unsigned char hk_lfr_temp_fpga[2];
520 unsigned char hk_lfr_temp_fpga[2];
521 // spacecraft potential
522 unsigned char hk_lfr_sc_v_f3[2];
523 unsigned char hk_lfr_sc_e1_f3[2];
524 unsigned char hk_lfr_sc_e2_f3[2];
508 // error counters
525 // error counters
509 unsigned char hk_lfr_dpu_spw_parity;
526 unsigned char hk_lfr_dpu_spw_parity;
510 unsigned char hk_lfr_dpu_spw_disconnect;
527 unsigned char hk_lfr_dpu_spw_disconnect;
@@ -513,8 +530,6 typedef struct {
513 unsigned char hk_lfr_dpu_spw_write_sync;
530 unsigned char hk_lfr_dpu_spw_write_sync;
514 unsigned char hk_lfr_dpu_spw_rx_ahb;
531 unsigned char hk_lfr_dpu_spw_rx_ahb;
515 unsigned char hk_lfr_dpu_spw_tx_ahb;
532 unsigned char hk_lfr_dpu_spw_tx_ahb;
516 unsigned char hk_lfr_dpu_spw_header_crc;
517 unsigned char hk_lfr_dpu_spw_data_crc;
518 unsigned char hk_lfr_dpu_spw_early_eop;
533 unsigned char hk_lfr_dpu_spw_early_eop;
519 unsigned char hk_lfr_dpu_spw_invalid_addr;
534 unsigned char hk_lfr_dpu_spw_invalid_addr;
520 unsigned char hk_lfr_dpu_spw_eep;
535 unsigned char hk_lfr_dpu_spw_eep;
@@ -533,21 +548,8 typedef struct {
533 // hk_lfr_ahb_
548 // hk_lfr_ahb_
534 unsigned char hk_lfr_ahb_correctable;
549 unsigned char hk_lfr_ahb_correctable;
535 unsigned char hk_lfr_ahb_uncorrectable;
550 unsigned char hk_lfr_ahb_uncorrectable;
536 unsigned char hk_lfr_ahb_fails_trans;
551 // spare
537 // hk_lfr_adc_
552 unsigned char parameters_spare;
538 unsigned char hk_lfr_adc_failure;
539 unsigned char hk_lfr_adc_timeout;
540 unsigned char hk_lfr_toomany_err;
541 // hk_lfr_cpu_
542 unsigned char hk_lfr_cpu_write_err;
543 unsigned char hk_lfr_cpu_ins_access_err;
544 unsigned char hk_lfr_cpu_illegal_ins;
545 unsigned char hk_lfr_cpu_privilegied_ins;
546 unsigned char hk_lfr_cpu_register_hw;
547 unsigned char hk_lfr_cpu_not_aligned;
548 unsigned char hk_lfr_cpu_data_exception;
549 unsigned char hk_lfr_cpu_div_exception;
550 unsigned char hk_lfr_cpu_arith_overflow;
551 } Packet_TM_LFR_HK_t;
553 } Packet_TM_LFR_HK_t;
552
554
553 typedef struct {
555 typedef struct {
@@ -578,6 +580,8 typedef struct {
578 unsigned char sy_lfr_n_asm_p[2];
580 unsigned char sy_lfr_n_asm_p[2];
579 unsigned char sy_lfr_n_bp_p0;
581 unsigned char sy_lfr_n_bp_p0;
580 unsigned char sy_lfr_n_bp_p1;
582 unsigned char sy_lfr_n_bp_p1;
583 unsigned char sy_lfr_n_cwf_long_f3;
584 unsigned char lfr_normal_parameters_spare;
581
585
582 //*****************
586 //*****************
583 // BURST PARAMETERS
587 // BURST PARAMETERS
@@ -21,6 +21,7
21 #define NB_WORDS_SWF_BLK 3
21 #define NB_WORDS_SWF_BLK 3
22 #define NB_BYTES_CWF3_LIGHT_BLK 6
22 #define NB_BYTES_CWF3_LIGHT_BLK 6
23 #define WFRM_INDEX_OF_LAST_PACKET 6 // waveforms are transmitted in groups of 2048 blocks, 6 packets of 340 and 1 of 8
23 #define WFRM_INDEX_OF_LAST_PACKET 6 // waveforms are transmitted in groups of 2048 blocks, 6 packets of 340 and 1 of 8
24 #define NB_RING_NODES_F0 3 // AT LEAST 3
24 #define NB_RING_NODES_F1 5 // AT LEAST 3
25 #define NB_RING_NODES_F1 5 // AT LEAST 3
25 #define NB_RING_NODES_F2 5 // AT LEAST 3
26 #define NB_RING_NODES_F2 5 // AT LEAST 3
26
27
@@ -21,6 +21,7 int set_sy_lfr_n_swf_p( ccsdsTelecommand
21 int set_sy_lfr_n_asm_p( ccsdsTelecommandPacket_t *TC, rtems_id queue_id );
21 int set_sy_lfr_n_asm_p( ccsdsTelecommandPacket_t *TC, rtems_id queue_id );
22 int set_sy_lfr_n_bp_p0( ccsdsTelecommandPacket_t *TC, rtems_id queue_id );
22 int set_sy_lfr_n_bp_p0( ccsdsTelecommandPacket_t *TC, rtems_id queue_id );
23 int set_sy_lfr_n_bp_p1( ccsdsTelecommandPacket_t *TC, rtems_id queue_id );
23 int set_sy_lfr_n_bp_p1( ccsdsTelecommandPacket_t *TC, rtems_id queue_id );
24 int set_sy_lfr_n_cwf_long_f3(ccsdsTelecommandPacket_t *TC, rtems_id queue_id);
24
25
25 void init_parameter_dump( void );
26 void init_parameter_dump( void );
26
27
@@ -11,6 +11,7
11 #define BYTE_POS_SY_LFR_N_ASM_P 4
11 #define BYTE_POS_SY_LFR_N_ASM_P 4
12 #define BYTE_POS_SY_LFR_N_BP_P0 6
12 #define BYTE_POS_SY_LFR_N_BP_P0 6
13 #define BYTE_POS_SY_LFR_N_BP_P1 7
13 #define BYTE_POS_SY_LFR_N_BP_P1 7
14 #define BYTE_POS_SY_LFR_N_CWF_LONG_F3 8
14
15
15 // TC_LFR_LOAD_BURST_PAR
16 // TC_LFR_LOAD_BURST_PAR
16
17
@@ -25,8 +25,9 extern int fdSPW;
25 //*****************
25 //*****************
26 // waveform buffers
26 // waveform buffers
27 // F0
27 // F0
28 extern volatile int wf_snap_f0[ ];
28 //extern volatile int wf_snap_f0[ ];
29 // F1 F2
29 // F1 F2
30 extern volatile int wf_snap_f0[ ][ (NB_SAMPLES_PER_SNAPSHOT * NB_WORDS_SWF_BLK) + TIME_OFFSET + 46 ];
30 extern volatile int wf_snap_f1[ ][ (NB_SAMPLES_PER_SNAPSHOT * NB_WORDS_SWF_BLK) + TIME_OFFSET + 46 ];
31 extern volatile int wf_snap_f1[ ][ (NB_SAMPLES_PER_SNAPSHOT * NB_WORDS_SWF_BLK) + TIME_OFFSET + 46 ];
31 extern volatile int wf_snap_f2[ ][ (NB_SAMPLES_PER_SNAPSHOT * NB_WORDS_SWF_BLK) + TIME_OFFSET + 46 ];
32 extern volatile int wf_snap_f2[ ][ (NB_SAMPLES_PER_SNAPSHOT * NB_WORDS_SWF_BLK) + TIME_OFFSET + 46 ];
32 // F3
33 // F3
@@ -65,7 +66,7 void reset_current_ring_nodes( void );
65 //
66 //
66 int init_header_snapshot_wf_table( unsigned int sid, Header_TM_LFR_SCIENCE_SWF_t *headerSWF );
67 int init_header_snapshot_wf_table( unsigned int sid, Header_TM_LFR_SCIENCE_SWF_t *headerSWF );
67 int init_header_continuous_wf_table( unsigned int sid, Header_TM_LFR_SCIENCE_CWF_t *headerCWF );
68 int init_header_continuous_wf_table( unsigned int sid, Header_TM_LFR_SCIENCE_CWF_t *headerCWF );
68 int init_header_continuous_wf3_light_table( Header_TM_LFR_SCIENCE_CWF_t *headerCWF );
69 int init_header_continuous_cwf3_light_table( Header_TM_LFR_SCIENCE_CWF_t *headerCWF );
69 //
70 //
70 int send_waveform_SWF( volatile int *waveform, unsigned int sid, Header_TM_LFR_SCIENCE_SWF_t *headerSWF, rtems_id queue_id );
71 int send_waveform_SWF( volatile int *waveform, unsigned int sid, Header_TM_LFR_SCIENCE_SWF_t *headerSWF, rtems_id queue_id );
71 int send_waveform_CWF( volatile int *waveform, unsigned int sid, Header_TM_LFR_SCIENCE_CWF_t *headerCWF, rtems_id queue_id );
72 int send_waveform_CWF( volatile int *waveform, unsigned int sid, Header_TM_LFR_SCIENCE_CWF_t *headerCWF, rtems_id queue_id );
@@ -33,7 +33,8 unsigned char lfrCurrentMode;
33
33
34 // WAVEFORMS GLOBAL VARIABLES // 2048 * 3 * 4 + 2 * 4 = 24576 + 8 bytes
34 // WAVEFORMS GLOBAL VARIABLES // 2048 * 3 * 4 + 2 * 4 = 24576 + 8 bytes
35 // F0
35 // F0
36 volatile int wf_snap_f0[ NB_SAMPLES_PER_SNAPSHOT * NB_WORDS_SWF_BLK + TIME_OFFSET ] __attribute__((aligned(0x100)));
36 //volatile int wf_snap_f0 [ (NB_SAMPLES_PER_SNAPSHOT * NB_WORDS_SWF_BLK) + TIME_OFFSET + 46 ] __attribute__((aligned(0x100)));
37 volatile int wf_snap_f0[ NB_RING_NODES_F0 ][ (NB_SAMPLES_PER_SNAPSHOT * NB_WORDS_SWF_BLK) + TIME_OFFSET + 46 ] __attribute__((aligned(0x100)));
37 // F1 F2
38 // F1 F2
38 volatile int wf_snap_f1[ NB_RING_NODES_F1 ][ (NB_SAMPLES_PER_SNAPSHOT * NB_WORDS_SWF_BLK) + TIME_OFFSET + 46 ] __attribute__((aligned(0x100)));
39 volatile int wf_snap_f1[ NB_RING_NODES_F1 ][ (NB_SAMPLES_PER_SNAPSHOT * NB_WORDS_SWF_BLK) + TIME_OFFSET + 46 ] __attribute__((aligned(0x100)));
39 volatile int wf_snap_f2[ NB_RING_NODES_F2 ][ (NB_SAMPLES_PER_SNAPSHOT * NB_WORDS_SWF_BLK) + TIME_OFFSET + 46 ] __attribute__((aligned(0x100)));
40 volatile int wf_snap_f2[ NB_RING_NODES_F2 ][ (NB_SAMPLES_PER_SNAPSHOT * NB_WORDS_SWF_BLK) + TIME_OFFSET + 46 ] __attribute__((aligned(0x100)));
@@ -75,18 +75,19 rtems_task Init( rtems_task_argument ign
75 rtems_status_code status_spw;
75 rtems_status_code status_spw;
76 rtems_isr_entry old_isr_handler;
76 rtems_isr_entry old_isr_handler;
77
77
78 // UART settings
79 send_console_outputs_on_apbuart_port();
80 set_apbuart_scaler_reload_register(REGS_ADDR_APBUART, APBUART_SCALER_RELOAD_VALUE);
81
78 BOOT_PRINTF("\n\n\n\n\n")
82 BOOT_PRINTF("\n\n\n\n\n")
79 BOOT_PRINTF("***************************\n")
83 BOOT_PRINTF("***************************\n")
80 BOOT_PRINTF("** START Flight Software **\n")
84 BOOT_PRINTF("** START Flight Software **\n")
81 #ifdef VHDL_DEV
85 #ifdef VHDL_DEV
82 PRINTF("/!\\ this is the VHDL_DEV flight software /!\\ \n")
86 PRINTF("/!\\ this is the VHDL_DEV flight software /!\\ \n")
83 #endif
87 #endif
84 BOOT_PRINTF("***************************\n")
88 BOOT_PRINTF("***************************\n")
85 BOOT_PRINTF("\n\n")
89 BOOT_PRINTF("\n\n")
86
90
87 //send_console_outputs_on_apbuart_port();
88 set_apbuart_scaler_reload_register(REGS_ADDR_APBUART, APBUART_SCALER_RELOAD_VALUE);
89
90 reset_wfp_burst_enable(); // stop the waveform picker if it was running
91 reset_wfp_burst_enable(); // stop the waveform picker if it was running
91 init_waveform_rings(); // initialize the waveform rings
92 init_waveform_rings(); // initialize the waveform rings
92
93
@@ -162,22 +163,19 rtems_task Init( rtems_task_argument ign
162 PRINTF1("in INIT *** in suspend_science_tasks *** ERR code: %d\n", status)
163 PRINTF1("in INIT *** in suspend_science_tasks *** ERR code: %d\n", status)
163 }
164 }
164
165
165 #ifdef GSA
166
166 // mask IRQ lines
167 //******************************
168 // <SPECTRAL MATRICES SIMULATOR>
167 LEON_Mask_interrupt( IRQ_SM );
169 LEON_Mask_interrupt( IRQ_SM );
168 LEON_Mask_interrupt( IRQ_WF );
169 // Spectral Matrices simulator
170 configure_timer((gptimer_regs_t*) REGS_ADDR_GPTIMER, TIMER_SM_SIMULATOR, CLKDIV_SM_SIMULATOR,
170 configure_timer((gptimer_regs_t*) REGS_ADDR_GPTIMER, TIMER_SM_SIMULATOR, CLKDIV_SM_SIMULATOR,
171 IRQ_SPARC_SM, spectral_matrices_isr );
171 IRQ_SPARC_SM, spectral_matrices_isr_simu );
172 // WaveForms
172 // </SPECTRAL MATRICES SIMULATOR>
173 configure_timer((gptimer_regs_t*) REGS_ADDR_GPTIMER, TIMER_WF_SIMULATOR, CLKDIV_WF_SIMULATOR,
173 //*******************************
174 IRQ_SPARC_WF, waveforms_simulator_isr );
174
175 #else
176 // configure IRQ handling for the waveform picker unit
175 // configure IRQ handling for the waveform picker unit
177 status = rtems_interrupt_catch( waveforms_isr,
176 status = rtems_interrupt_catch( waveforms_isr,
178 IRQ_SPARC_WAVEFORM_PICKER,
177 IRQ_SPARC_WAVEFORM_PICKER,
179 &old_isr_handler) ;
178 &old_isr_handler) ;
180 #endif
181
179
182 // if the spacewire link is not up then send an event to the SPIQ task for link recovery
180 // if the spacewire link is not up then send an event to the SPIQ task for link recovery
183 if ( status_spw != RTEMS_SUCCESSFUL )
181 if ( status_spw != RTEMS_SUCCESSFUL )
@@ -231,20 +231,21 rtems_task dumb_task( rtems_task_argumen
231 unsigned int fine_time = 0;
231 unsigned int fine_time = 0;
232 rtems_event_set event_out;
232 rtems_event_set event_out;
233
233
234 char *DumbMessages[7] = {"in DUMB *** default", // RTEMS_EVENT_0
234 char *DumbMessages[8] = {"in DUMB *** default", // RTEMS_EVENT_0
235 "in DUMB *** timecode_irq_handler", // RTEMS_EVENT_1
235 "in DUMB *** timecode_irq_handler", // RTEMS_EVENT_1
236 "in DUMB *** waveforms_isr", // RTEMS_EVENT_2
236 "in DUMB *** waveforms_isr", // RTEMS_EVENT_2
237 "in DUMB *** in SMIQ *** Error sending event to AVF0", // RTEMS_EVENT_3
237 "in DUMB *** in SMIQ *** Error sending event to AVF0", // RTEMS_EVENT_3
238 "in DUMB *** spectral_matrices_isr *** Error sending event to SMIQ", // RTEMS_EVENT_4
238 "in DUMB *** spectral_matrices_isr *** Error sending event to SMIQ", // RTEMS_EVENT_4
239 "in DUMB *** waveforms_simulator_isr", // RTEMS_EVENT_5
239 "in DUMB *** waveforms_simulator_isr", // RTEMS_EVENT_5
240 "ERR HK" // RTEMS_EVENT_6
240 "ERR HK", // RTEMS_EVENT_6
241 "ready for dump" // RTEMS_EVENT_7
241 };
242 };
242
243
243 BOOT_PRINTF("in DUMB *** \n")
244 BOOT_PRINTF("in DUMB *** \n")
244
245
245 while(1){
246 while(1){
246 rtems_event_receive(RTEMS_EVENT_0 | RTEMS_EVENT_1 | RTEMS_EVENT_2 | RTEMS_EVENT_3
247 rtems_event_receive(RTEMS_EVENT_0 | RTEMS_EVENT_1 | RTEMS_EVENT_2 | RTEMS_EVENT_3
247 | RTEMS_EVENT_4 | RTEMS_EVENT_5 | RTEMS_EVENT_6,
248 | RTEMS_EVENT_4 | RTEMS_EVENT_5 | RTEMS_EVENT_6 | RTEMS_EVENT_7,
248 RTEMS_WAIT | RTEMS_EVENT_ANY, RTEMS_NO_TIMEOUT, &event_out); // wait for an RTEMS_EVENT
249 RTEMS_WAIT | RTEMS_EVENT_ANY, RTEMS_NO_TIMEOUT, &event_out); // wait for an RTEMS_EVENT
249 intEventOut = (unsigned int) event_out;
250 intEventOut = (unsigned int) event_out;
250 for ( i=0; i<32; i++)
251 for ( i=0; i<32; i++)
@@ -269,9 +270,9 void init_housekeeping_parameters( void
269 */
270 */
270
271
271 unsigned int i = 0;
272 unsigned int i = 0;
272 char *parameters;
273 unsigned char *parameters;
273
274
274 parameters = (char*) &housekeeping_packet.lfr_status_word;
275 parameters = (unsigned char*) &housekeeping_packet.lfr_status_word;
275 for(i = 0; i< SIZE_HK_PARAMETERS; i++)
276 for(i = 0; i< SIZE_HK_PARAMETERS; i++)
276 {
277 {
277 parameters[i] = 0x00;
278 parameters[i] = 0x00;
@@ -284,7 +285,11 void init_housekeeping_parameters( void
284 housekeeping_packet.lfr_sw_version[1] = SW_VERSION_N2;
285 housekeeping_packet.lfr_sw_version[1] = SW_VERSION_N2;
285 housekeeping_packet.lfr_sw_version[2] = SW_VERSION_N3;
286 housekeeping_packet.lfr_sw_version[2] = SW_VERSION_N3;
286 housekeeping_packet.lfr_sw_version[3] = SW_VERSION_N4;
287 housekeeping_packet.lfr_sw_version[3] = SW_VERSION_N4;
287
288 // init fpga version
289 parameters = (unsigned char *) (REGS_ADDR_WAVEFORM_PICKER + 0xd0);
290 housekeeping_packet.lfr_fpga_version[0] = parameters[1]; // n1
291 housekeeping_packet.lfr_fpga_version[1] = parameters[2]; // n2
292 housekeeping_packet.lfr_fpga_version[2] = parameters[3]; // n3
288 }
293 }
289
294
290 void increment_seq_counter( unsigned char *packet_sequence_control)
295 void increment_seq_counter( unsigned char *packet_sequence_control)
@@ -200,13 +200,9 rtems_task matr_task(rtems_task_argument
200
200
201 while(1){
201 while(1){
202 rtems_event_receive(RTEMS_EVENT_0, RTEMS_WAIT, RTEMS_NO_TIMEOUT, &event_out); // wait for an RTEMS_EVENT0
202 rtems_event_receive(RTEMS_EVENT_0, RTEMS_WAIT, RTEMS_NO_TIMEOUT, &event_out); // wait for an RTEMS_EVENT0
203
203 // 1) convert the float array in a char array
204 #ifdef GSA
205 #else
206 fill_averaged_spectral_matrix( );
207 #endif
208 convert_averaged_spectral_matrix( averaged_spec_mat_f0, averaged_spec_mat_f0_char);
204 convert_averaged_spectral_matrix( averaged_spec_mat_f0, averaged_spec_mat_f0_char);
209
205 // 2) send the spectral matrix packets
210 send_spectral_matrix( &headerASM, averaged_spec_mat_f0_char, SID_NORM_ASM_F0, &spw_ioctl_send_ASM, queue_id);
206 send_spectral_matrix( &headerASM, averaged_spec_mat_f0_char, SID_NORM_ASM_F0, &spw_ioctl_send_ASM, queue_id);
211 }
207 }
212 }
208 }
@@ -528,10 +524,10 void convert_averaged_spectral_matrix( v
528 {
524 {
529 for ( j=0; j<NB_VALUES_PER_SM; j++)
525 for ( j=0; j<NB_VALUES_PER_SM; j++)
530 {
526 {
531 pt_char_input = (char*) &input_matrix[ (i*NB_VALUES_PER_SM) + j ];
527 pt_char_input = (char*) &input_matrix [ (i*NB_VALUES_PER_SM) + j ];
532 pt_char_output = (char*) &output_matrix[ 2 * ( (i*NB_VALUES_PER_SM) + j ) ];
528 pt_char_output = (char*) &output_matrix[ 2 * ( (i*NB_VALUES_PER_SM) + j ) ];
533 pt_char_output[0] = pt_char_input[0]; // bits 31 downto 24 of the float
529 pt_char_output[0] = pt_char_input[0]; // bits 31 downto 24 of the float
534 pt_char_output[1] = pt_char_input[1]; // bits 23 downto 16 of the float
530 pt_char_output[1] = pt_char_input[1]; // bits 23 downto 16 of the float
535 }
531 }
536 }
532 }
537 }
533 }
@@ -544,10 +540,11 void fill_averaged_spectral_matrix(void)
544 *
540 *
545 */
541 */
546
542
547 #ifdef GSA
543 float offset;
548 float offset = 10.;
544 float coeff;
549 float coeff = 100000.;
550
545
546 offset = 10.;
547 coeff = 100000.;
551 averaged_spec_mat_f0[ 0 + 25 * 0 ] = 0. + offset;
548 averaged_spec_mat_f0[ 0 + 25 * 0 ] = 0. + offset;
552 averaged_spec_mat_f0[ 0 + 25 * 1 ] = 1. + offset;
549 averaged_spec_mat_f0[ 0 + 25 * 1 ] = 1. + offset;
553 averaged_spec_mat_f0[ 0 + 25 * 2 ] = 2. + offset;
550 averaged_spec_mat_f0[ 0 + 25 * 2 ] = 2. + offset;
@@ -578,6 +575,7 void fill_averaged_spectral_matrix(void)
578 averaged_spec_mat_f0[ 9 + 25 * 12 ] = -(12. + offset)* coeff;
575 averaged_spec_mat_f0[ 9 + 25 * 12 ] = -(12. + offset)* coeff;
579 averaged_spec_mat_f0[ 9 + 25 * 13 ] = -(13. + offset)* coeff;
576 averaged_spec_mat_f0[ 9 + 25 * 13 ] = -(13. + offset)* coeff;
580 averaged_spec_mat_f0[ 9 + 25 * 14 ] = -(14. + offset)* coeff;
577 averaged_spec_mat_f0[ 9 + 25 * 14 ] = -(14. + offset)* coeff;
578
581 offset = 10000000;
579 offset = 10000000;
582 averaged_spec_mat_f0[ 16 + 25 * 0 ] = (0. + offset)* coeff;
580 averaged_spec_mat_f0[ 16 + 25 * 0 ] = (0. + offset)* coeff;
583 averaged_spec_mat_f0[ 16 + 25 * 1 ] = (1. + offset)* coeff;
581 averaged_spec_mat_f0[ 16 + 25 * 1 ] = (1. + offset)* coeff;
@@ -611,17 +609,6 void fill_averaged_spectral_matrix(void)
611 averaged_spec_mat_f0[ (TOTAL_SIZE_SM/2) + 13 ] = averaged_spec_mat_f0[ 13 ];
609 averaged_spec_mat_f0[ (TOTAL_SIZE_SM/2) + 13 ] = averaged_spec_mat_f0[ 13 ];
612 averaged_spec_mat_f0[ (TOTAL_SIZE_SM/2) + 14 ] = averaged_spec_mat_f0[ 14 ];
610 averaged_spec_mat_f0[ (TOTAL_SIZE_SM/2) + 14 ] = averaged_spec_mat_f0[ 14 ];
613 averaged_spec_mat_f0[ (TOTAL_SIZE_SM/2) + 15 ] = averaged_spec_mat_f0[ 15 ];
611 averaged_spec_mat_f0[ (TOTAL_SIZE_SM/2) + 15 ] = averaged_spec_mat_f0[ 15 ];
614 #else
615 unsigned int i;
616
617 for(i=0; i<TOTAL_SIZE_SM; i++)
618 {
619 if (spectral_matrix_regs->matrixF0_Address0 == (int) spec_mat_f0_0)
620 averaged_spec_mat_f0[i] = (float) spec_mat_f0_0_bis[ SM_HEADER + i ];
621 else
622 averaged_spec_mat_f0[i] = (float) spec_mat_f0_0[ SM_HEADER + i ];
623 }
624 #endif
625 }
612 }
626
613
627 void reset_spectral_matrix_regs()
614 void reset_spectral_matrix_regs()
@@ -571,10 +571,6 void spacewire_update_statistics( void )
571 housekeeping_packet.hk_lfr_dpu_spw_escape = (unsigned char) spacewire_stats.escape_err;
571 housekeeping_packet.hk_lfr_dpu_spw_escape = (unsigned char) spacewire_stats.escape_err;
572 housekeeping_packet.hk_lfr_dpu_spw_credit = (unsigned char) spacewire_stats.credit_err;
572 housekeeping_packet.hk_lfr_dpu_spw_credit = (unsigned char) spacewire_stats.credit_err;
573 housekeeping_packet.hk_lfr_dpu_spw_write_sync = (unsigned char) spacewire_stats.write_sync_err;
573 housekeeping_packet.hk_lfr_dpu_spw_write_sync = (unsigned char) spacewire_stats.write_sync_err;
574 // housekeeping_packet.hk_lfr_dpu_spw_rx_ahb;
575 // housekeeping_packet.hk_lfr_dpu_spw_tx_ahb;
576 housekeeping_packet.hk_lfr_dpu_spw_header_crc = (unsigned char) spacewire_stats.rx_rmap_header_crc_err;
577 housekeeping_packet.hk_lfr_dpu_spw_data_crc = (unsigned char) spacewire_stats.rx_rmap_data_crc_err;
578
574
579 //*********************************************
575 //*********************************************
580 // ERROR COUNTERS / SPACEWIRE / MEDIUM SEVERITY
576 // ERROR COUNTERS / SPACEWIRE / MEDIUM SEVERITY
@@ -582,7 +578,6 void spacewire_update_statistics( void )
582 housekeeping_packet.hk_lfr_dpu_spw_invalid_addr = (unsigned char) spacewire_stats.invalid_address;
578 housekeeping_packet.hk_lfr_dpu_spw_invalid_addr = (unsigned char) spacewire_stats.invalid_address;
583 housekeeping_packet.hk_lfr_dpu_spw_eep = (unsigned char) spacewire_stats.rx_eep_err;
579 housekeeping_packet.hk_lfr_dpu_spw_eep = (unsigned char) spacewire_stats.rx_eep_err;
584 housekeeping_packet.hk_lfr_dpu_spw_rx_too_big = (unsigned char) spacewire_stats.rx_truncated;
580 housekeeping_packet.hk_lfr_dpu_spw_rx_too_big = (unsigned char) spacewire_stats.rx_truncated;
585
586 }
581 }
587
582
588 void timecode_irq_handler( void *pDev, void *regs, int minor, unsigned int tc )
583 void timecode_irq_handler( void *pDev, void *regs, int minor, unsigned int tc )
@@ -396,13 +396,15 int stop_current_mode()
396
396
397 // mask interruptions
397 // mask interruptions
398 LEON_Mask_interrupt( IRQ_WAVEFORM_PICKER ); // mask waveform picker interrupt
398 LEON_Mask_interrupt( IRQ_WAVEFORM_PICKER ); // mask waveform picker interrupt
399 LEON_Mask_interrupt( IRQ_SPECTRAL_MATRIX ); // mask spectral matrix interrupt
399 //LEON_Mask_interrupt( IRQ_SPECTRAL_MATRIX ); // clear spectral matrix interrupt
400 LEON_Mask_interrupt( IRQ_SM ); // mask spectral matrix interrupt simulator
400 // reset registers
401 // reset registers
401 reset_wfp_burst_enable(); // reset burst and enable bits
402 reset_wfp_burst_enable(); // reset burst and enable bits
402 reset_wfp_status(); // reset all the status bits
403 reset_wfp_status(); // reset all the status bits
403 // clear interruptions
404 // clear interruptions
404 LEON_Clear_interrupt( IRQ_WAVEFORM_PICKER ); // clear waveform picker interrupt
405 LEON_Clear_interrupt( IRQ_WAVEFORM_PICKER ); // clear waveform picker interrupt
405 LEON_Clear_interrupt( IRQ_SPECTRAL_MATRIX ); // clear spectarl matrix interrupt
406 //LEON_Clear_interrupt( IRQ_SPECTRAL_MATRIX ); // clear spectral matrix interrupt
407 LEON_Clear_interrupt( IRQ_SM ); // clear spectral matrix interrupt simulator
406 //**********************
408 //**********************
407 // suspend several tasks
409 // suspend several tasks
408 if (lfrCurrentMode != LFR_MODE_STANDBY) {
410 if (lfrCurrentMode != LFR_MODE_STANDBY) {
@@ -493,15 +495,13 int enter_normal_mode()
493
495
494 status = restart_science_tasks();
496 status = restart_science_tasks();
495
497
496 #ifdef GSA
498 // Spectral Matrices simulator
497 timer_start( (gptimer_regs_t*) REGS_ADDR_GPTIMER, TIMER_SM_SIMULATOR );
499 // timer_start( (gptimer_regs_t*) REGS_ADDR_GPTIMER, TIMER_SM_SIMULATOR );
498 //
500 // set_local_nb_interrupt_f0_MAX();
499 set_local_nb_interrupt_f0_MAX();
501 // LEON_Clear_interrupt( IRQ_SM );
500 LEON_Clear_interrupt( IRQ_SM ); // the IRQ_SM seems to be incompatible with the IRQ_WF on the xilinx board
502 // LEON_Unmask_interrupt( IRQ_SM );
501 LEON_Unmask_interrupt( IRQ_SM );
503
502 #else
504 launch_waveform_picker( LFR_MODE_NORMAL );
503 launch_waveform_picker( LFR_MODE_SBM1 );
504 #endif
505
505
506 return status;
506 return status;
507 }
507 }
@@ -787,18 +787,18 void close_action(ccsdsTelecommandPacket
787 send_tm_lfr_tc_exe_success( TC, queue_id, time );
787 send_tm_lfr_tc_exe_success( TC, queue_id, time );
788 }
788 }
789 update_last_TC_exe( TC, time );
789 update_last_TC_exe( TC, time );
790 val = housekeeping_packet.hk_dpu_exe_tc_lfr_cnt[0] * 256 + housekeeping_packet.hk_dpu_exe_tc_lfr_cnt[1];
790 val = housekeeping_packet.hk_lfr_exe_tc_cnt[0] * 256 + housekeeping_packet.hk_lfr_exe_tc_cnt[1];
791 val++;
791 val++;
792 housekeeping_packet.hk_dpu_exe_tc_lfr_cnt[0] = (unsigned char) (val >> 8);
792 housekeeping_packet.hk_lfr_exe_tc_cnt[0] = (unsigned char) (val >> 8);
793 housekeeping_packet.hk_dpu_exe_tc_lfr_cnt[1] = (unsigned char) (val);
793 housekeeping_packet.hk_lfr_exe_tc_cnt[1] = (unsigned char) (val);
794 }
794 }
795 else
795 else
796 {
796 {
797 update_last_TC_rej( TC, time );
797 update_last_TC_rej( TC, time );
798 val = housekeeping_packet.hk_dpu_rej_tc_lfr_cnt[0] * 256 + housekeeping_packet.hk_dpu_rej_tc_lfr_cnt[1];
798 val = housekeeping_packet.hk_lfr_rej_tc_cnt[0] * 256 + housekeeping_packet.hk_lfr_rej_tc_cnt[1];
799 val++;
799 val++;
800 housekeeping_packet.hk_dpu_rej_tc_lfr_cnt[0] = (unsigned char) (val >> 8);
800 housekeeping_packet.hk_lfr_rej_tc_cnt[0] = (unsigned char) (val >> 8);
801 housekeeping_packet.hk_dpu_rej_tc_lfr_cnt[1] = (unsigned char) (val);
801 housekeeping_packet.hk_lfr_rej_tc_cnt[1] = (unsigned char) (val);
802 }
802 }
803 }
803 }
804
804
@@ -105,6 +105,17 int action_load_normal_par(ccsdsTelecomm
105 }
105 }
106 }
106 }
107
107
108 //*********************
109 // sy_lfr_n_cwf_long_f3
110 if (flag == LFR_SUCCESSFUL)
111 {
112 result = set_sy_lfr_n_cwf_long_f3( TC, queue_id );
113 if (result != LFR_SUCCESSFUL)
114 {
115 flag = LFR_DEFAULT;
116 }
117 }
118
108 return flag;
119 return flag;
109 }
120 }
110
121
@@ -374,6 +385,24 int set_sy_lfr_n_bp_p1(ccsdsTelecommandP
374 return status;
385 return status;
375 }
386 }
376
387
388 int set_sy_lfr_n_cwf_long_f3(ccsdsTelecommandPacket_t *TC, rtems_id queue_id)
389 {
390 /** This function allows to switch from CWF_F3 packets to CWF_LONG_F3 packets.
391 *
392 * @param TC points to the TeleCommand packet that is being processed
393 * @param queue_id is the id of the queue which handles TM related to this execution step
394 *
395 */
396
397 int status;
398
399 status = LFR_SUCCESSFUL;
400
401 parameter_dump_packet.sy_lfr_n_cwf_long_f3 = TC->dataAndCRC[ BYTE_POS_SY_LFR_N_CWF_LONG_F3 ];
402
403 return status;
404 }
405
377 //**********************
406 //**********************
378 // BURST MODE PARAMETERS
407 // BURST MODE PARAMETERS
379
408
@@ -24,8 +24,11 Header_TM_LFR_SCIENCE_CWF_t headerCWF_F3
24
24
25 //**************
25 //**************
26 // waveform ring
26 // waveform ring
27 ring_node waveform_ring_f0[NB_RING_NODES_F0];
27 ring_node waveform_ring_f1[NB_RING_NODES_F1];
28 ring_node waveform_ring_f1[NB_RING_NODES_F1];
28 ring_node waveform_ring_f2[NB_RING_NODES_F2];
29 ring_node waveform_ring_f2[NB_RING_NODES_F2];
30 ring_node *current_ring_node_f0;
31 ring_node *ring_node_to_send_swf_f0;
29 ring_node *current_ring_node_f1;
32 ring_node *current_ring_node_f1;
30 ring_node *ring_node_to_send_swf_f1;
33 ring_node *ring_node_to_send_swf_f1;
31 ring_node *ring_node_to_send_cwf_f1;
34 ring_node *ring_node_to_send_cwf_f1;
@@ -75,6 +78,10 rtems_isr waveforms_isr( rtems_vector_nu
75 // NORMAL
78 // NORMAL
76 case(LFR_MODE_NORMAL):
79 case(LFR_MODE_NORMAL):
77 if ( (waveform_picker_regs->status & 0x7) == 0x7 ){ // f2 f1 and f0 are full
80 if ( (waveform_picker_regs->status & 0x7) == 0x7 ){ // f2 f1 and f0 are full
81 // change F0 ring node
82 ring_node_to_send_swf_f0 = current_ring_node_f0;
83 current_ring_node_f0 = current_ring_node_f0->next;
84 waveform_picker_regs->addr_data_f0 = current_ring_node_f0->buffer_address;
78 // change F1 ring node
85 // change F1 ring node
79 ring_node_to_send_swf_f1 = current_ring_node_f1;
86 ring_node_to_send_swf_f1 = current_ring_node_f1;
80 current_ring_node_f1 = current_ring_node_f1->next;
87 current_ring_node_f1 = current_ring_node_f1->next;
@@ -88,6 +95,8 rtems_isr waveforms_isr( rtems_vector_nu
88 rtems_event_send( Task_id[TASKID_DUMB], RTEMS_EVENT_2 );
95 rtems_event_send( Task_id[TASKID_DUMB], RTEMS_EVENT_2 );
89 }
96 }
90 waveform_picker_regs->status = waveform_picker_regs->status & 0xfffff888; // [1000 1000 1000]
97 waveform_picker_regs->status = waveform_picker_regs->status & 0xfffff888; // [1000 1000 1000]
98 // rtems_event_send( Task_id[TASKID_DUMB], RTEMS_EVENT_7 );
99 // reset_wfp_burst_enable();
91 }
100 }
92 break;
101 break;
93
102
@@ -202,7 +211,7 rtems_task wfrm_task(rtems_task_argument
202 RTEMS_WAIT | RTEMS_EVENT_ANY, RTEMS_NO_TIMEOUT, &event_out);
211 RTEMS_WAIT | RTEMS_EVENT_ANY, RTEMS_NO_TIMEOUT, &event_out);
203 if (event_out == RTEMS_EVENT_MODE_NORMAL)
212 if (event_out == RTEMS_EVENT_MODE_NORMAL)
204 {
213 {
205 send_waveform_SWF(wf_snap_f0, SID_NORM_SWF_F0, headerSWF_F0, queue_id);
214 send_waveform_SWF((volatile int*) ring_node_to_send_swf_f0->buffer_address, SID_NORM_SWF_F0, headerSWF_F0, queue_id);
206 send_waveform_SWF((volatile int*) ring_node_to_send_swf_f1->buffer_address, SID_NORM_SWF_F1, headerSWF_F1, queue_id);
215 send_waveform_SWF((volatile int*) ring_node_to_send_swf_f1->buffer_address, SID_NORM_SWF_F1, headerSWF_F1, queue_id);
207 send_waveform_SWF((volatile int*) ring_node_to_send_swf_f2->buffer_address, SID_NORM_SWF_F2, headerSWF_F2, queue_id);
216 send_waveform_SWF((volatile int*) ring_node_to_send_swf_f2->buffer_address, SID_NORM_SWF_F2, headerSWF_F2, queue_id);
208 }
217 }
@@ -228,8 +237,8 rtems_task cwf3_task(rtems_task_argument
228 rtems_id queue_id;
237 rtems_id queue_id;
229 rtems_status_code status;
238 rtems_status_code status;
230
239
231 init_header_continuous_wf_table( SID_NORM_CWF_F3, headerCWF_F3 );
240 init_header_continuous_wf_table( SID_NORM_CWF_LONG_F3, headerCWF_F3 );
232 init_header_continuous_wf3_light_table( headerCWF_F3_light );
241 init_header_continuous_cwf3_light_table( headerCWF_F3_light );
233
242
234 status = get_message_queue_id_send( &queue_id );
243 status = get_message_queue_id_send( &queue_id );
235 if (status != RTEMS_SUCCESSFUL)
244 if (status != RTEMS_SUCCESSFUL)
@@ -244,15 +253,28 rtems_task cwf3_task(rtems_task_argument
244 rtems_event_receive( RTEMS_EVENT_0,
253 rtems_event_receive( RTEMS_EVENT_0,
245 RTEMS_WAIT | RTEMS_EVENT_ANY, RTEMS_NO_TIMEOUT, &event_out);
254 RTEMS_WAIT | RTEMS_EVENT_ANY, RTEMS_NO_TIMEOUT, &event_out);
246 PRINTF("send CWF F3 \n")
255 PRINTF("send CWF F3 \n")
247 #ifdef GSA
248 #else
249 if (waveform_picker_regs->addr_data_f3 == (int) wf_cont_f3_a) {
256 if (waveform_picker_regs->addr_data_f3 == (int) wf_cont_f3_a) {
250 send_waveform_CWF3_light( wf_cont_f3_b, headerCWF_F3_light, queue_id );
257 if ( (parameter_dump_packet.sy_lfr_n_cwf_long_f3 & 0x01) == 0x01)
258 {
259 send_waveform_CWF( wf_cont_f3_b, SID_NORM_CWF_LONG_F3, headerCWF_F3, queue_id );
260 }
261 else
262 {
263 send_waveform_CWF3_light( wf_cont_f3_b, headerCWF_F3_light, queue_id );
264 }
251 }
265 }
252 else {
266 else
253 send_waveform_CWF3_light( wf_cont_f3_a, headerCWF_F3_light, queue_id );
267 {
268 if ( (parameter_dump_packet.sy_lfr_n_cwf_long_f3 & 0x01) == 0x00)
269 {
270 send_waveform_CWF( wf_cont_f3_a, SID_NORM_CWF_LONG_F3, headerCWF_F3, queue_id );
271 }
272 else
273 {
274 send_waveform_CWF3_light( wf_cont_f3_a, headerCWF_F3_light, queue_id );
275 }
276
254 }
277 }
255 #endif
256 }
278 }
257 }
279 }
258
280
@@ -341,9 +363,9 void init_waveforms( void )
341 {
363 {
342 //***
364 //***
343 // F0
365 // F0
344 wf_snap_f0[ (i* NB_WORDS_SWF_BLK) + 0 + TIME_OFFSET ] = 0x88887777; //
366 // wf_snap_f0[ (i* NB_WORDS_SWF_BLK) + 0 + TIME_OFFSET ] = 0x88887777; //
345 wf_snap_f0[ (i* NB_WORDS_SWF_BLK) + 1 + TIME_OFFSET ] = 0x22221111; //
367 // wf_snap_f0[ (i* NB_WORDS_SWF_BLK) + 1 + TIME_OFFSET ] = 0x22221111; //
346 wf_snap_f0[ (i* NB_WORDS_SWF_BLK) + 2 + TIME_OFFSET ] = 0x44443333; //
368 // wf_snap_f0[ (i* NB_WORDS_SWF_BLK) + 2 + TIME_OFFSET ] = 0x44443333; //
347
369
348 //***
370 //***
349 // F1
371 // F1
@@ -369,6 +391,22 void init_waveform_rings( void )
369 {
391 {
370 unsigned char i;
392 unsigned char i;
371
393
394 // F0 RING
395 waveform_ring_f0[0].next = (ring_node*) &waveform_ring_f0[1];
396 waveform_ring_f0[0].previous = (ring_node*) &waveform_ring_f0[NB_RING_NODES_F0-1];
397 waveform_ring_f0[0].buffer_address = (int) &wf_snap_f0[0][0];
398
399 waveform_ring_f0[NB_RING_NODES_F0-1].next = (ring_node*) &waveform_ring_f0[0];
400 waveform_ring_f0[NB_RING_NODES_F0-1].previous = (ring_node*) &waveform_ring_f0[NB_RING_NODES_F0-2];
401 waveform_ring_f0[NB_RING_NODES_F0-1].buffer_address = (int) &wf_snap_f0[NB_RING_NODES_F0-1][0];
402
403 for(i=1; i<NB_RING_NODES_F0-1; i++)
404 {
405 waveform_ring_f0[i].next = (ring_node*) &waveform_ring_f0[i+1];
406 waveform_ring_f0[i].previous = (ring_node*) &waveform_ring_f0[i-1];
407 waveform_ring_f0[i].buffer_address = (int) &wf_snap_f0[i][0];
408 }
409
372 // F1 RING
410 // F1 RING
373 waveform_ring_f1[0].next = (ring_node*) &waveform_ring_f1[1];
411 waveform_ring_f1[0].next = (ring_node*) &waveform_ring_f1[1];
374 waveform_ring_f1[0].previous = (ring_node*) &waveform_ring_f1[NB_RING_NODES_F1-1];
412 waveform_ring_f1[0].previous = (ring_node*) &waveform_ring_f1[NB_RING_NODES_F1-1];
@@ -401,6 +439,7 void init_waveform_rings( void )
401 waveform_ring_f2[i].buffer_address = (int) &wf_snap_f2[i][0];
439 waveform_ring_f2[i].buffer_address = (int) &wf_snap_f2[i][0];
402 }
440 }
403
441
442 DEBUG_PRINTF1("waveform_ring_f0 @%x\n", (unsigned int) waveform_ring_f0)
404 DEBUG_PRINTF1("waveform_ring_f1 @%x\n", (unsigned int) waveform_ring_f1)
443 DEBUG_PRINTF1("waveform_ring_f1 @%x\n", (unsigned int) waveform_ring_f1)
405 DEBUG_PRINTF1("waveform_ring_f2 @%x\n", (unsigned int) waveform_ring_f2)
444 DEBUG_PRINTF1("waveform_ring_f2 @%x\n", (unsigned int) waveform_ring_f2)
406
445
@@ -408,6 +447,9 void init_waveform_rings( void )
408
447
409 void reset_current_ring_nodes( void )
448 void reset_current_ring_nodes( void )
410 {
449 {
450 current_ring_node_f0 = waveform_ring_f0;
451 ring_node_to_send_swf_f0 = waveform_ring_f0;
452
411 current_ring_node_f1 = waveform_ring_f1;
453 current_ring_node_f1 = waveform_ring_f1;
412 ring_node_to_send_cwf_f1 = waveform_ring_f1;
454 ring_node_to_send_cwf_f1 = waveform_ring_f1;
413 ring_node_to_send_swf_f1 = waveform_ring_f1;
455 ring_node_to_send_swf_f1 = waveform_ring_f1;
@@ -429,29 +471,20 int init_header_snapshot_wf_table( unsig
429 headerSWF[ i ].userApplication = CCSDS_USER_APP;
471 headerSWF[ i ].userApplication = CCSDS_USER_APP;
430 headerSWF[ i ].packetID[0] = (unsigned char) (TM_PACKET_ID_SCIENCE_NORMAL_BURST >> 8);
472 headerSWF[ i ].packetID[0] = (unsigned char) (TM_PACKET_ID_SCIENCE_NORMAL_BURST >> 8);
431 headerSWF[ i ].packetID[1] = (unsigned char) (TM_PACKET_ID_SCIENCE_NORMAL_BURST);
473 headerSWF[ i ].packetID[1] = (unsigned char) (TM_PACKET_ID_SCIENCE_NORMAL_BURST);
432 if (i == 0)
474 headerSWF[ i ].packetSequenceControl[0] = TM_PACKET_SEQ_CTRL_STANDALONE;
475 if (i == 6)
433 {
476 {
434 headerSWF[ i ].packetSequenceControl[0] = TM_PACKET_SEQ_CTRL_FIRST;
477 headerSWF[ i ].packetLength[0] = (unsigned char) (TM_LEN_SCI_SWF_224 >> 8);
435 headerSWF[ i ].packetLength[0] = (unsigned char) (TM_LEN_SCI_SWF_340 >> 8);
478 headerSWF[ i ].packetLength[1] = (unsigned char) (TM_LEN_SCI_SWF_224 );
436 headerSWF[ i ].packetLength[1] = (unsigned char) (TM_LEN_SCI_SWF_340 );
479 headerSWF[ i ].blkNr[0] = (unsigned char) (BLK_NR_224 >> 8);