FPGA Pinout » History » Version 2
Alexis Jeandet, 21/11/2013 08:14 PM
| 1 | 1 | Alexis Jeandet | h1. Pinout |
|---|---|---|---|
| 2 | |||
| 3 | |||
| 4 | |||
| 5 | h2. Clocks |
||
| 6 | |||
| 7 | |_.Net |_.Direction |_.FPGA pin | |
||
| 8 | |clk_50 |Input |F7 | |
||
| 9 | |clk_49 |Input |K14 | |
||
| 10 | |||
| 11 | h2. Push Buttons |
||
| 12 | |||
| 13 | |_.Net |_.Direction |_.FPGA pin | |
||
| 14 | |BP0 |Input |L1 | |
||
| 15 | |BP1 |Input |R1 | |
||
| 16 | |BP2/reset |Input |T2 | |
||
| 17 | |||
| 18 | h2. Leds |
||
| 19 | |||
| 20 | |_.Net |_.Direction |_.FPGA pin | |
||
| 21 | |LED0 |output |V6 | |
||
| 22 | |LED1 |output |V5 | |
||
| 23 | |LED2 |output |T4 | |
||
| 24 | |||
| 25 | |||
| 26 | h2. Uarts |
||
| 27 | |||
| 28 | |_.Net |_.Direction |_.FPGA pin | |
||
| 29 | 2 | Alexis Jeandet | |\3=.UART1 | |
| 30 | |TXD1 |output |N17 | |
||
| 31 | |RXD1 |output |N18 | |
||
| 32 | |nCTS1 |output |P18 | |
||
| 33 | |nRTS1 |output |P17 | |
||
| 34 | |\3=.UART2 | |
||
| 35 | |TXD2 |output |P13 | |
||
| 36 | |RXD2 |output |T18 | |
||
| 37 | |nCTS2 |output |V17 | |
||
| 38 | |nDTR2 |output |L15 | |
||
| 39 | |nRTS2 |output |M15 | |
||
| 40 | |nDCD2 |output |N15 | |