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FPGA Pinout » History » Revision 1
Revision 1/9
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Alexis Jeandet, 21/11/2013 08:00 PM
Pinout¶
Clocks¶
| Net | Direction | FPGA pin |
|---|---|---|
| clk_50 | Input | F7 |
| clk_49 | Input | K14 |
Push Buttons¶
| Net | Direction | FPGA pin |
|---|---|---|
| BP0 | Input | L1 |
| BP1 | Input | R1 |
| BP2/reset | Input | T2 |
Leds¶
| Net | Direction | FPGA pin |
|---|---|---|
| LED0 | output | V6 |
| LED1 | output | V5 |
| LED2 | output | T4 |
Uarts¶
| Net | Direction | FPGA pin |
|---|---|---|
| TXD1 | output | V6 |
| TXD1 | output | V5 |
| TXD1 | output | T4 |
Updated by Alexis Jeandet over 10 years ago · 1 revisions